OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /openmsp430/trunk/fpga/xilinx_diligent_s3board/software
    from Rev 202 to Rev 212
    Reverse comparison

Rev 202 → Rev 212

/ta_uart/linker.msp430.x
0,0 → 1,231
/* Default linker script, for normal executables */
OUTPUT_FORMAT("elf32-msp430")
OUTPUT_ARCH("msp430")
MEMORY {
sfr : ORIGIN = 0x0000, LENGTH = 0x0010
peripheral_8bit : ORIGIN = 0x0010, LENGTH = 0x00f0
peripheral_16bit : ORIGIN = 0x0100, LENGTH = 0x0100
ram (wx) : ORIGIN = 0x0200, LENGTH = 0x0400
rom (rx) : ORIGIN = 0xF000, LENGTH = 0x1000-0x20
vectors : ORIGIN = 0xffe0, LENGTH = 0x0020
}
REGION_ALIAS("REGION_TEXT", rom);
REGION_ALIAS("REGION_DATA", ram);
PROVIDE (__info_segment_size = 0x80);
__WDTCTL = 0x0120;
__MPY = 0x0130;
__MPYS = 0x0132;
__MAC = 0x0134;
__MACS = 0x0136;
__OP2 = 0x0138;
__RESLO = 0x013A;
__RESHI = 0x013C;
__SUMEXT = 0x013E;
CCTL0 = 0x0162;
CCR0 = 0x0172;
CCTL1 = 0x0164;
CCR1 = 0x0174;
TAR = 0x0170;
P1OUT = 0x0021;
 
SCCI = 0x0400;
CCIFG = 0x0001;
 
SECTIONS
{
/* Read-only sections, merged into text segment. */
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.gnu.version : { *(.gnu.version) }
.gnu.version_d : { *(.gnu.version_d) }
.gnu.version_r : { *(.gnu.version_r) }
.rel.init : { *(.rel.init) }
.rela.init : { *(.rela.init) }
.rel.fini : { *(.rel.fini) }
.rela.fini : { *(.rela.fini) }
.rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) }
.rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) }
.rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) }
.rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) }
.rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) }
.rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) }
.rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) }
.rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
/* .any.{text,rodata,data,bss}{,.*} sections are treated as orphans and
* placed in output sections with available space by linker. Do not list
* them here, or the linker will not consider them orphans. */
.text :
{
. = ALIGN(2);
KEEP(*(.init .init.*))
KEEP(*(.init0)) /* Start here after reset. */
KEEP(*(.init1)) /* User definable. */
KEEP(*(.init2)) /* Initialize stack. */
KEEP(*(.init3)) /* Initialize hardware, user definable. */
KEEP(*(.init4)) /* Copy data to .data, clear bss. */
KEEP(*(.init5)) /* User definable. */
KEEP(*(.init6)) /* C++ constructors. */
KEEP(*(.init7)) /* User definable. */
KEEP(*(.init8)) /* User definable. */
KEEP(*(.init9)) /* Call main(). */
KEEP(*(.fini9)) /* Falls into here after main(). User definable. */
KEEP(*(.fini8)) /* User definable. */
KEEP(*(.fini7)) /* User definable. */
KEEP(*(.fini6)) /* C++ destructors. */
KEEP(*(.fini5)) /* User definable. */
KEEP(*(.fini4)) /* User definable. */
KEEP(*(.fini3)) /* User definable. */
KEEP(*(.fini2)) /* User definable. */
KEEP(*(.fini1)) /* User definable. */
KEEP(*(.fini0)) /* Infinite loop after program termination. */
KEEP(*(.fini .fini.*))
. = ALIGN(2);
__ctors_start = .;
KEEP(*(.ctors))
__ctors_end = .;
__dtors_start = .;
KEEP(*(.dtors))
__dtors_end = .;
. = ALIGN(2);
*(.text .text.* .gnu.linkonce.t.*)
*(.near.text .near.text.*)
} > REGION_TEXT
.rodata :
{
. = ALIGN(2);
*(.rodata .rodata.* .gnu.linkonce.r.*)
*(.near.rodata .near.rodata.*)
} > REGION_TEXT
. = ALIGN(2);
_etext = .; /* Past last read-only (loadable) segment */
.data :
{
. = ALIGN(2);
PROVIDE (__data_start = .) ;
PROVIDE (__datastart = .) ;
*(.data .data.* .gnu.linkonce.d.*)
*(.near.data .near.data.*)
. = ALIGN(2);
_edata = .; /* Past last read-write (loadable) segment */
} > REGION_DATA AT > REGION_TEXT
__data_load_start = LOADADDR(.data);
__data_size = SIZEOF(.data);
.bss :
{
__bss_start = .;
*(.bss .bss.*)
*(.near.bss .near.bss.*)
*(COMMON)
. = ALIGN(2);
__bss_end = .;
} > REGION_DATA
__bss_size = SIZEOF(.bss);
.noinit :
{
. = ALIGN(2);
__noinit_start = .;
*(.noinit .noinit.*)
. = ALIGN(2);
__noinit_end = .;
} > REGION_DATA
. = ALIGN(2);
_end = .; /* Past last write (loadable) segment */
 
/* Values placed in the first 32 entries of a 64-entry interrupt vector
* table. This exists because the FRAM chips place the BSL and JTAG
* passwords at specific offsets that technically fall within the
* interrupt table, but for which no MCU has a corresponding interrupt.
* See https://sourceforge.net/tracker/?func=detail&aid=3554291&group_id=42303&atid=432701 */
PROVIDE(__vte_0 = 0xffff);
PROVIDE(__vte_1 = 0xffff);
PROVIDE(__vte_2 = 0xffff);
PROVIDE(__vte_3 = 0xffff);
PROVIDE(__vte_4 = 0xffff);
PROVIDE(__vte_5 = 0xffff);
PROVIDE(__vte_6 = 0xffff);
PROVIDE(__vte_7 = 0xffff);
PROVIDE(__vte_8 = 0xffff);
PROVIDE(__vte_9 = 0xffff);
PROVIDE(__vte_10 = 0xffff);
PROVIDE(__vte_11 = 0xffff);
PROVIDE(__vte_12 = 0xffff);
PROVIDE(__vte_13 = 0xffff);
PROVIDE(__vte_14 = 0xffff);
PROVIDE(__vte_15 = 0xffff);
PROVIDE(__vte_16 = 0xffff);
PROVIDE(__vte_17 = 0xffff);
PROVIDE(__vte_18 = 0xffff);
PROVIDE(__vte_19 = 0xffff);
PROVIDE(__vte_20 = 0xffff);
PROVIDE(__vte_21 = 0xffff);
PROVIDE(__vte_22 = 0xffff);
PROVIDE(__vte_23 = 0xffff);
PROVIDE(__vte_24 = 0xffff);
PROVIDE(__vte_25 = 0xffff);
PROVIDE(__vte_26 = 0xffff);
PROVIDE(__vte_27 = 0xffff);
PROVIDE(__vte_28 = 0xffff);
PROVIDE(__vte_29 = 0xffff);
PROVIDE(__vte_30 = 0xffff);
PROVIDE(__vte_31 = 0xffff);
.vectors :
{
__vectors_start = .;
KEEP(*(.vectors*))
_vectors_end = .;
} > vectors
/* Legacy section, prefer .far.text */
. = ALIGN(2);
_efartext = .; /* Past last read-only (loadable) segment */
. = ALIGN(2);
_far_end = .; /* Past last write (loadable) segment */
/* Stabs for profiling information*/
.profiler 0 : { *(.profiler) }
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* DWARF 3 */
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
/* __stack is the only symbol that the user can override */
PROVIDE (__stack = ORIGIN(ram) + LENGTH(ram));
PROVIDE (__data_start_rom = _etext) ;
PROVIDE (__data_end_rom = _etext + SIZEOF (.data)) ;
PROVIDE (__romdatastart = _etext) ;
PROVIDE (__romdataend = _etext + SIZEOF (.data)) ;
PROVIDE (__romdatacopysize = SIZEOF(.data));
}
/ta_uart/hardware.h
1,11 → 1,38
#ifndef HARDWARE_H
#define HARDWARE_H
 
#include <msp430.h>
#include <legacymsp430.h>
#include <iomacros.h>
#define BIT0 (0x0001)
#define BIT1 (0x0002)
#define BIT2 (0x0004)
#define BIT3 (0x0008)
#define BIT4 (0x0010)
#define BIT5 (0x0020)
#define BIT6 (0x0040)
#define BIT7 (0x0080)
#define BIT8 (0x0100)
#define BIT9 (0x0200)
#define BITA (0x0400)
#define BITB (0x0800)
#define BITC (0x1000)
#define BITD (0x2000)
#define BITE (0x4000)
#define BITF (0x8000)
 
#define CCIS_0 (0x0000) /* Capture input select: 0 - CCIxA */
#define CCIS_1 (0x1000) /* Capture input select: 1 - CCIxB */
#define CCIS_2 (0x2000) /* Capture input select: 2 - GND */
#define CCIS_3 (0x3000) /* Capture input select: 3 - Vcc */
#define CM_0 (0x0000) /* Capture mode: 0 - disabled */
#define CM_1 (0x4000) /* Capture mode: 1 - pos. edge */
#define CM_2 (0x8000) /* Capture mode: 1 - neg. edge */
#define CM_3 (0xC000) /* Capture mode: 1 - both edges */
 
#define CCIE (0x0010) /* Capture/compare interrupt enable */
#define CCI (0x0008) /* Capture input signal (read) */
#define SCS (0x0800) /* Capture sychronize */
#define CAP (0x0100) /* Capture mode: 1 /Compare mode : 0 */
 
 
//PINS
//PORT1
#define TX BIT1
/ta_uart/linker.msp430-elf.x
0,0 → 1,261
/* ============================================================================ */
/* Copyright (c) 2014, Texas Instruments Incorporated */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* * Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* * Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in the */
/* documentation and/or other materials provided with the distribution. */
/* */
/* * Neither the name of Texas Instruments Incorporated nor the names of */
/* its contributors may be used to endorse or promote products derived */
/* from this software without specific prior written permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ============================================================================ */
 
/* This file supports MSP430F110 devices. */
/* Version: 1.155 */
/* Default linker script, for normal executables */
 
OUTPUT_ARCH(msp430)
ENTRY(_start)
 
MEMORY {
SFR : ORIGIN = 0x0000, LENGTH = 0x0010
PERIPHERAL_8BIT : ORIGIN = 0x0010, LENGTH = 0x00F0
PERIPHERAL_16BIT : ORIGIN = 0x0100, LENGTH = 0x0100
RAM : ORIGIN = 0x0200, LENGTH = 0x0400
ROM (rx) : ORIGIN = 0xF000, LENGTH = 0x1000-0x20
VECT1 : ORIGIN = 0xFFE0, LENGTH = 0x0002
VECT2 : ORIGIN = 0xFFE2, LENGTH = 0x0002
VECT3 : ORIGIN = 0xFFE4, LENGTH = 0x0002
VECT4 : ORIGIN = 0xFFE6, LENGTH = 0x0002
VECT5 : ORIGIN = 0xFFE8, LENGTH = 0x0002
VECT6 : ORIGIN = 0xFFEA, LENGTH = 0x0002
VECT7 : ORIGIN = 0xFFEC, LENGTH = 0x0002
VECT8 : ORIGIN = 0xFFEE, LENGTH = 0x0002
VECT9 : ORIGIN = 0xFFF0, LENGTH = 0x0002
VECT10 : ORIGIN = 0xFFF2, LENGTH = 0x0002
VECT11 : ORIGIN = 0xFFF4, LENGTH = 0x0002
VECT12 : ORIGIN = 0xFFF6, LENGTH = 0x0002
VECT13 : ORIGIN = 0xFFF8, LENGTH = 0x0002
VECT14 : ORIGIN = 0xFFFA, LENGTH = 0x0002
VECT15 : ORIGIN = 0xFFFC, LENGTH = 0x0002
RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002
}
 
CCTL0 = 0x0162;
CCR0 = 0x0172;
CCTL1 = 0x0164;
CCR1 = 0x0174;
TAR = 0x0170;
P1OUT = 0x0021;
 
SCCI = 0x0400;
CCIFG = 0x0001;
 
SECTIONS
{
__interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) } > VECT1
__interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) } > VECT2
__interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) KEEP (*(__interrupt_vector_port1)) } > VECT3
__interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) KEEP (*(__interrupt_vector_port2)) } > VECT4
__interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) } > VECT5
__interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) } > VECT6
__interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) } > VECT7
__interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) } > VECT8
__interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) KEEP (*(__interrupt_vector_timera1)) } > VECT9
__interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) KEEP (*(__interrupt_vector_timera0)) } > VECT10
__interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) KEEP (*(__interrupt_vector_wdt)) } > VECT11
__interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) } > VECT12
__interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) } > VECT13
__interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) } > VECT14
__interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) KEEP (*(__interrupt_vector_nmi)) } > VECT15
__reset_vector :
{
KEEP (*(__interrupt_vector_16))
KEEP (*(__interrupt_vector_reset))
KEEP (*(.resetvec))
} > RESETVEC
 
.rodata : {
. = ALIGN(2);
*(.plt)
*(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)
*(.rodata1)
*(.eh_frame_hdr)
KEEP (*(.eh_frame))
KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)
PROVIDE (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
PROVIDE (__fini_array_end = .);
LONG(0); /* Sentinel. */
 
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
doesn't matter if the user does not actually link against
crtbegin.o; the linker won't look for a file to match a
wildcard. The wildcard also means that it doesn't matter which
directory crtbegin.o is in. */
KEEP (*crtbegin*.o(.ctors))
 
/* We don't want to include the .ctor section from from the
crtend.o file until after the sorted ctors. The .ctor section
from the crtend file contains the end of ctors marker and it
must be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
 
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} > ROM
 
.text :
{
. = ALIGN(2);
PROVIDE (_start = .);
KEEP (*(SORT(.crt_*)))
*(.lowtext .text .stub .text.* .gnu.linkonce.t.* .text:*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.interp .hash .dynsym .dynstr .gnu.version*)
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
. = ALIGN(2);
KEEP (*(.init))
KEEP (*(.fini))
KEEP (*(.tm_clone_table))
} > ROM
 
.data : {
. = ALIGN(2);
PROVIDE (__datastart = .);
 
KEEP (*(.jcr))
*(.data.rel.ro.local) *(.data.rel.ro*)
*(.dynamic)
 
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
*(.data1)
*(.got.plt) *(.got)
 
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
. = ALIGN(2);
*(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)
 
. = ALIGN(2);
_edata = .;
PROVIDE (edata = .);
PROVIDE (__dataend = .);
} > RAM AT>ROM
 
/* Note that crt0 assumes this is a multiple of two; all the
start/stop symbols are also assumed word-aligned. */
PROVIDE(__romdatastart = LOADADDR(.data));
PROVIDE (__romdatacopysize = SIZEOF(.data));
 
.bss : {
. = ALIGN(2);
PROVIDE (__bssstart = .);
*(.dynbss)
*(.sbss .sbss.*)
*(.bss .bss.* .gnu.linkonce.b.*)
. = ALIGN(2);
*(COMMON)
PROVIDE (__bssend = .);
} > RAM
PROVIDE (__bsssize = SIZEOF(.bss));
 
.noinit (NOLOAD) : {
. = ALIGN(2);
PROVIDE (__noinit_start = .);
*(.noinit)
. = ALIGN(2);
PROVIDE (__noinit_end = .);
end = .;
} > RAM
 
.stack (ORIGIN (RAM) + LENGTH(RAM)) :
{
PROVIDE (__stack = .);
*(.stack)
}
 
.MP430.attributes 0 :
{
KEEP (*(.MSP430.attributes))
KEEP (*(.gnu.attributes))
KEEP (*(__TI_build_attributes))
}
 
/* The rest are all not normally part of the runtime image. */
 
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/DISCARD/ : { *(.note.GNU-stack) }
}
/ta_uart/main.c
3,11 → 3,12
 
chris <cliechti@gmx.net>
*/
#include "omsp_system.h"
#include "hardware.h"
#include <stdlib.h>
#include <stdio.h>
#include "swuart.h"
//#include "fll.h"
#include "cprintf.h"
 
volatile int rxdata;
 
16,8 → 17,8
*/
void delay(unsigned int d) {
while(d--) {
nop();
nop();
__nop();
__nop();
}
}
 
30,7 → 31,7
int pos = 0;
char buf[40];
int led = 0;
 
WDTCTL = WDTCTL_INIT; //Init watchdog timer
 
P1OUT = P1OUT_INIT; //Init output data of port1
51,20 → 52,20
delay(10);
// fllInit(); //Init FLL to desired frequency using the 32k768 cystal as reference.
P3OUT = 0x00; //switch off LED
 
TACTL = TACTL_AFTER_FLL; //setup timer (still stopped)
CCTL0 = CCIE|CAP|CM_2|CCIS_1|SCS; //select P2.2 with UART signal
CCTL1 = 0; //
CCTL2 = 0; //
TACTL |= MC1; //start timer
 
eint(); //enable interrupts
printf("\r\n====== openMSP430 in action ======\r\n"); //say hello
printf("\r\nSimple Line Editor Ready\r\n"); //say hello
 
cprintf("\r\n====== openMSP430 in action ======\r\n"); //say hello
cprintf("\r\nSimple Line Editor Ready\r\n"); //say hello
 
while (1) { //main loop, never ends...
printf("> "); //show prompt
cprintf("> "); //show prompt
reading = 1;
while (reading) { //loop and read characters
LPM0; //sync, wakeup by irq
79,9 → 80,9
//process RETURN key
case '\r':
//case '\n':
printf("\r\n"); //finish line
buf[pos++] = 0; //to use printf...
printf(":%s\r\n", buf);
cprintf("\r\n"); //finish line
buf[pos++] = 0; //to use cprintf...
cprintf(":%s\r\n", buf);
reading = 0; //exit read loop
pos = 0; //reset buffer
break;
89,9 → 90,9
case '\b':
if (pos > 0) { //is there a char to delete?
pos--; //remove it in buffer
putchar((int)'\b'); //go back
putchar((int)' '); //erase on screen
putchar((int)'\b'); //go back
tty_putc((int)'\b'); //go back
tty_putc((int)' '); //erase on screen
tty_putc((int)'\b'); //go back
}
break;
//other characters
98,7 → 99,7
default:
//only store characters if buffer has space
if (pos < sizeof(buf)) {
putchar(rxdata); //echo
tty_putc(rxdata); //echo
buf[pos++] = (char)rxdata; //store
}
}
/ta_uart/swuart.s
23,7 → 23,7
jmp .Lrxdatabit ;D5
jmp .Lrxdatabit ;D6
; jmp .Lrxlastbit ;D7 that one is following anyway
 
.Lrxlastbit: ;last bit, handle byte
bit #SCCI, &CCTL0 ;read last bit
rrc.b &rxshift ;and save it
55,14 → 55,14
mov #0xffff, r15 ;return 0xffff
ret
 
; void serPutc(char)
; void tty_putc(char)
;use an other Capture/Compare than for receiving (full duplex).
;this one is without interrupts and OUTMOD, because only
;this way P1.1 can be used. P1.1 is prefered because the
;BSL is on that pin too.
.global putchar
.type putchar, @function
putchar: ;send a byte
.global tty_putc
.type tty_putc, @function
tty_putc: ;send a byte
mov #0, &CCTL1 ;select compare mode
mov #10, r13 ;ten bits: Start, 8 Data, Stop
rla r15 ;shift in start bit (0)
/ta_uart/cprintf.c
0,0 → 1,158
#include <stdarg.h>
 
#include "cprintf.h"
 
typedef unsigned char byte;
 
static char hex[] = "0123456789abcdef";
 
void
cput_nibble (int n)
{
tty_putc (hex[n&0x0f]);
}
 
void
cput_hex_byte (int n)
{
cput_nibble (n >> 4);
cput_nibble (n);
}
 
void
cput_binary_byte (int n)
{
int i;
for (i=7; i>=0; i--)
tty_putc((n & (1<<i)) ? '1' : '0');
}
 
void
cput_hex_word (int n)
{
cput_hex_byte (n >> 8);
cput_hex_byte (n);
}
 
void
cput_hex_long (long int n)
{
cput_hex_byte (n >> 24);
cput_hex_byte (n >> 16);
cput_hex_byte (n >> 8);
cput_hex_byte (n);
}
 
void
cput_hex_block (char *block, int n)
{
int i = 0;
while (n)
{
cput_hex_byte (*block++);
if (--n == 0)
break;
i++;
if ((i & 7) == 0)
tty_putc (' ');
else
tty_putc (':');
}
}
 
void
cput_nibble_block (char *block, int n)
{
int i = 0;
while (n)
{
cput_nibble (*block);
if (--n == 0)
break;
i++;
if ((i & 7) == 0)
tty_putc (' ');
}
}
 
void
cput_number (int n)
{
char buf[20];
int i = 0;
if (n < 0)
{
tty_putc ('-');
n = -n;
}
while (n > 9)
{
buf[i++] = (n%10) + '0';
n /= 10;
}
buf[i++] = (n%10) + '0';
while (i > 0)
tty_putc (buf[--i]);
}
 
void
cprintf (const char *fmt, ...)
{
va_list v;
int i;
char *s;
 
va_start (v, fmt);
 
while (*fmt)
{
if (*fmt != '%')
tty_putc (*fmt);
else
switch (*++fmt)
{
case '%':
tty_putc ('%');
break;
case 'c':
i = va_arg (v, int);
tty_putc(i);
break;
case 'd':
i = va_arg (v, int);
cput_number(i);
break;
case 'b':
i = va_arg (v, int);
cput_hex_byte (i);
break;
case 'B':
i = va_arg (v, int);
cput_binary_byte (i);
break;
case 'w':
i = va_arg (v, int);
cput_hex_word (i);
break;
case 'l':
i = va_arg (v, int);
cput_hex_long (i);
break;
case 'x':
s = va_arg (v, char *);
i = va_arg (v, int);
cput_hex_block (s, i);
break;
case 'n':
s = va_arg (v, char *);
i = va_arg (v, int);
cput_nibble_block (s, i);
break;
case 's':
s = va_arg (v, char *);
tty_putc (s);
break;
}
fmt ++;
}
}
/ta_uart/omsp_system.h
0,0 → 1,274
/*===========================================================================*/
/* Copyright (C) 2001 Authors */
/* */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer. */
/* */
/* This source file is free software; you can redistribute it and/or modify */
/* it under the terms of the GNU Lesser General Public License as published */
/* by the Free Software Foundation; either version 2.1 of the License, or */
/* (at your option) any later version. */
/* */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
/* License for more details. */
/* */
/* You should have received a copy of the GNU Lesser General Public License */
/* along with this source; if not, write to the Free Software Foundation, */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
/* */
/*===========================================================================*/
/* OMSP_SYSTEM HEADER FILE */
/*---------------------------------------------------------------------------*/
/* */
/* Author(s): */
/* - Olivier Girard, olgirard@gmail.com */
/* */
/*---------------------------------------------------------------------------*/
/* $Rev: 19 $ */
/* $LastChangedBy: olivier.girard $ */
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */
/*===========================================================================*/
 
#include <in430.h>
 
//=============================================================================
// STATUS REGISTER BITS
//=============================================================================
 
// Flags
#define C (0x0001)
#define Z (0x0002)
#define N (0x0004)
#define V (0x0100)
#define GIE (0x0008)
#define CPUOFF (0x0010)
#define OSCOFF (0x0020)
#define SCG0 (0x0040)
#define SCG1 (0x0080)
 
// Low Power Modes coded with Bits 4-7 in SR
#define LPM0_bits (CPUOFF)
#define LPM1_bits (SCG0+CPUOFF)
#define LPM2_bits (SCG1+CPUOFF)
#define LPM3_bits (SCG1+SCG0+CPUOFF)
#define LPM4_bits (SCG1+SCG0+OSCOFF+CPUOFF)
 
#define LPM0 _BIS_SR(LPM0_bits) // Enter Low Power Mode 0
#define LPM0_EXIT _BIC_SR_IRQ(LPM0_bits) // Exit Low Power Mode 0
#define LPM1 _BIS_SR(LPM1_bits) // Enter Low Power Mode 1
#define LPM1_EXIT _BIC_SR_IRQ(LPM1_bits) // Exit Low Power Mode 1
#define LPM2 _BIS_SR(LPM2_bits) // Enter Low Power Mode 2
#define LPM2_EXIT _BIC_SR_IRQ(LPM2_bits) // Exit Low Power Mode 2
#define LPM3 _BIS_SR(LPM3_bits) // Enter Low Power Mode 3
#define LPM3_EXIT _BIC_SR_IRQ(LPM3_bits) // Exit Low Power Mode 3
#define LPM4 _BIS_SR(LPM4_bits) // Enter Low Power Mode 4
#define LPM4_EXIT _BIC_SR_IRQ(LPM4_bits) // Exit Low Power Mode 4
 
 
//=============================================================================
// PERIPHERALS REGISTER DEFINITIONS
//=============================================================================
 
//----------------------------------------------------------
// SPECIAL FUNCTION REGISTERS
//----------------------------------------------------------
#define IE1_set_wdtie() __asm__ __volatile__ ("bis.b #0x01, &0x0000")
//#define IE1 (*(volatile unsigned char *) 0x0000)
#define IFG1 (*(volatile unsigned char *) 0x0002)
 
#define CPU_ID_LO (*(volatile unsigned char *) 0x0004)
#define CPU_ID_HI (*(volatile unsigned char *) 0x0006)
 
 
//----------------------------------------------------------
// GPIOs
//----------------------------------------------------------
#define P1IN (*(volatile unsigned char *) 0x0020)
#define P1OUT (*(volatile unsigned char *) 0x0021)
#define P1DIR (*(volatile unsigned char *) 0x0022)
#define P1IFG (*(volatile unsigned char *) 0x0023)
#define P1IES (*(volatile unsigned char *) 0x0024)
#define P1IE (*(volatile unsigned char *) 0x0025)
#define P1SEL (*(volatile unsigned char *) 0x0026)
 
#define P2IN (*(volatile unsigned char *) 0x0028)
#define P2OUT (*(volatile unsigned char *) 0x0029)
#define P2DIR (*(volatile unsigned char *) 0x002A)
#define P2IFG (*(volatile unsigned char *) 0x002B)
#define P2IES (*(volatile unsigned char *) 0x002C)
#define P2IE (*(volatile unsigned char *) 0x002D)
#define P2SEL (*(volatile unsigned char *) 0x002E)
 
#define P3IN (*(volatile unsigned char *) 0x0018)
#define P3OUT (*(volatile unsigned char *) 0x0019)
#define P3DIR (*(volatile unsigned char *) 0x001A)
#define P3SEL (*(volatile unsigned char *) 0x001B)
 
#define P4IN (*(volatile unsigned char *) 0x001C)
#define P4OUT (*(volatile unsigned char *) 0x001D)
#define P4DIR (*(volatile unsigned char *) 0x001E)
#define P4SEL (*(volatile unsigned char *) 0x001F)
 
#define P5IN (*(volatile unsigned char *) 0x0030)
#define P5OUT (*(volatile unsigned char *) 0x0031)
#define P5DIR (*(volatile unsigned char *) 0x0032)
#define P5SEL (*(volatile unsigned char *) 0x0033)
 
#define P6IN (*(volatile unsigned char *) 0x0034)
#define P6OUT (*(volatile unsigned char *) 0x0035)
#define P6DIR (*(volatile unsigned char *) 0x0036)
#define P6SEL (*(volatile unsigned char *) 0x0037)
 
 
//----------------------------------------------------------
// BASIC CLOCK MODULE
//----------------------------------------------------------
#define DCOCTL (*(volatile unsigned char *) 0x0056)
#define BCSCTL1 (*(volatile unsigned char *) 0x0057)
#define BCSCTL2 (*(volatile unsigned char *) 0x0058)
 
 
//----------------------------------------------------------
// WATCHDOG TIMER
//----------------------------------------------------------
 
// Addresses
#define WDTCTL (*(volatile unsigned int *) 0x0120)
 
// Bit masks
#define WDTIS0 (0x0001)
#define WDTIS1 (0x0002)
#define WDTSSEL (0x0004)
#define WDTCNTCL (0x0008)
#define WDTTMSEL (0x0010)
#define WDTNMI (0x0020)
#define WDTNMIES (0x0040)
#define WDTHOLD (0x0080)
#define WDTPW (0x5A00)
 
 
//----------------------------------------------------------
// HARDWARE MULTIPLIER
//----------------------------------------------------------
#define OP1_MPY (*(volatile unsigned int *) 0x0130)
#define OP1_MPYS (*(volatile unsigned int *) 0x0132)
#define OP1_MAC (*(volatile unsigned int *) 0x0134)
#define OP1_MACS (*(volatile unsigned int *) 0x0136)
#define OP2 (*(volatile unsigned int *) 0x0138)
 
#define RESLO (*(volatile unsigned int *) 0x013A)
#define RESHI (*(volatile unsigned int *) 0x013C)
#define SUMEXT (*(volatile unsigned int *) 0x013E)
 
 
//----------------------------------------------------------
// TIMER A
//----------------------------------------------------------
#define TACTL (*(volatile unsigned int *) 0x0160)
#define TAR (*(volatile unsigned int *) 0x0170)
#define TACCTL0 (*(volatile unsigned int *) 0x0162)
#define TACCR0 (*(volatile unsigned int *) 0x0172)
#define TACCTL1 (*(volatile unsigned int *) 0x0164)
#define TACCR1 (*(volatile unsigned int *) 0x0174)
#define TACCTL2 (*(volatile unsigned int *) 0x0166)
#define TACCR2 (*(volatile unsigned int *) 0x0176)
#define TAIV (*(volatile unsigned int *) 0x012E)
 
// Alternate register names
#define CCTL0 TACCTL0
#define CCTL1 TACCTL1
#define CCTL2 TACCTL2
#define CCR0 TACCR0
#define CCR1 TACCR1
 
// Bit-masks
#define TASSEL1 (0x0200) /* Timer A clock source select 1 */
#define TASSEL0 (0x0100) /* Timer A clock source select 0 */
#define ID1 (0x0080) /* Timer A clock input divider 1 */
#define ID0 (0x0040) /* Timer A clock input divider 0 */
#define MC1 (0x0020) /* Timer A mode control 1 */
#define MC0 (0x0010) /* Timer A mode control 0 */
#define TACLR (0x0004) /* Timer A counter clear */
#define TAIE (0x0002) /* Timer A counter interrupt enable */
#define TAIFG (0x0001) /* Timer A counter interrupt flag */
 
#define MC_0 (0x0000) /* Timer A mode control: 0 - Stop */
#define MC_1 (0x0010) /* Timer A mode control: 1 - Up to CCR0 */
#define MC_2 (0x0020) /* Timer A mode control: 2 - Continous up */
#define MC_3 (0x0030) /* Timer A mode control: 3 - Up/Down */
#define ID_0 (0x0000) /* Timer A input divider: 0 - /1 */
#define ID_1 (0x0040) /* Timer A input divider: 1 - /2 */
#define ID_2 (0x0080) /* Timer A input divider: 2 - /4 */
#define ID_3 (0x00C0) /* Timer A input divider: 3 - /8 */
#define TASSEL_0 (0x0000) /* Timer A clock source select: 0 - TACLK */
#define TASSEL_1 (0x0100) /* Timer A clock source select: 1 - ACLK */
#define TASSEL_2 (0x0200) /* Timer A clock source select: 2 - SMCLK */
#define TASSEL_3 (0x0300) /* Timer A clock source select: 3 - INCLK */
 
#define CM1 (0x8000) /* Capture mode 1 */
#define CM0 (0x4000) /* Capture mode 0 */
#define CCIS1 (0x2000) /* Capture input select 1 */
#define CCIS0 (0x1000) /* Capture input select 0 */
#define SCS (0x0800) /* Capture sychronize */
#define SCCI (0x0400) /* Latched capture signal (read) */
#define CAP (0x0100) /* Capture mode: 1 /Compare mode : 0 */
#define OUTMOD2 (0x0080) /* Output mode 2 */
#define OUTMOD1 (0x0040) /* Output mode 1 */
#define OUTMOD0 (0x0020) /* Output mode 0 */
#define CCIE (0x0010) /* Capture/compare interrupt enable */
#define CCI (0x0008) /* Capture input signal (read) */
#define OUT (0x0004) /* PWM Output signal if output mode 0 */
#define COV (0x0002) /* Capture/compare overflow flag */
#define CCIFG (0x0001) /* Capture/compare interrupt flag */
 
 
//=============================================================================
// INTERRUPT VECTORS
//=============================================================================
#define interrupt(x) void __attribute__((interrupt (x)))
#define wakeup __attribute__((wakeup))
#define eint() __eint()
#define dint() __dint()
 
// Vector definition for RedHat/TI toolchain
#ifdef PFX_MSP430_ELF
#define RESET_VECTOR ("reset") // Vector 15 (0xFFFE) - Reset - [Highest Priority]
#define NMI_VECTOR (15) // Vector 14 (0xFFFC) - Non-maskable -
#define UNUSED_13_VECTOR (14) // Vector 13 (0xFFFA) - -
#define UNUSED_12_VECTOR (13) // Vector 12 (0xFFF8) - -
#define UNUSED_11_VECTOR (12) // Vector 11 (0xFFF6) - -
#define WDT_VECTOR (11) // Vector 10 (0xFFF4) - Watchdog Timer -
#define TIMERA0_VECTOR (10) // Vector 9 (0xFFF2) - Timer A CC0 -
#define TIMERA1_VECTOR (9) // Vector 8 (0xFFF0) - Timer A CC1-2, TA -
#define UNUSED_07_VECTOR (8) // Vector 7 (0xFFEE) - -
#define UNUSED_06_VECTOR (7) // Vector 6 (0xFFEC) - -
#define UNUSED_05_VECTOR (6) // Vector 5 (0xFFEA) - -
#define UNUSED_04_VECTOR (5) // Vector 4 (0xFFE8) - -
#define UNUSED_03_VECTOR (4) // Vector 3 (0xFFE6) - -
#define PORT1_VECTOR (3) // Vector 2 (0xFFE4) - Port 1 -
#define UNUSED_01_VECTOR (2) // Vector 1 (0xFFE2) - -
#define UNUSED_00_VECTOR (1) // Vector 0 (0xFFE0) - - [Lowest Priority]
 
// Vector definition for MSPGCC toolchain
#else
#define RESET_VECTOR (0x001E) // Vector 15 (0xFFFE) - Reset - [Highest Priority]
#define NMI_VECTOR (0x001C) // Vector 14 (0xFFFC) - Non-maskable -
#define UNUSED_13_VECTOR (0x001A) // Vector 13 (0xFFFA) - -
#define UNUSED_12_VECTOR (0x0018) // Vector 12 (0xFFF8) - -
#define UNUSED_11_VECTOR (0x0016) // Vector 11 (0xFFF6) - -
#define WDT_VECTOR (0x0014) // Vector 10 (0xFFF4) - Watchdog Timer -
#define TIMERA0_VECTOR (0x0012) // Vector 9 (0xFFF2) - Timer A CC0 -
#define TIMERA1_VECTOR (0x0010) // Vector 8 (0xFFF0) - Timer A CC1-2, TA -
#define UNUSED_07_VECTOR (0x000E) // Vector 7 (0xFFEE) - -
#define UNUSED_06_VECTOR (0x000C) // Vector 6 (0xFFEC) - -
#define UNUSED_05_VECTOR (0x000A) // Vector 5 (0xFFEA) - -
#define UNUSED_04_VECTOR (0x0008) // Vector 4 (0xFFE8) - -
#define UNUSED_03_VECTOR (0x0006) // Vector 3 (0xFFE6) - -
#define PORT1_VECTOR (0x0004) // Vector 2 (0xFFE4) - Port 1 -
#define UNUSED_01_VECTOR (0x0002) // Vector 1 (0xFFE2) - -
#define UNUSED_00_VECTOR (0x0000) // Vector 0 (0xFFE0) - - [Lowest Priority]
#endif
/ta_uart/swuart.h
1,7 → 1,7
#ifndef SWUART_H
#define SWUART_H
 
void serPutc(char); //send one character over timer_a uart
void tty_putc(char); //send one character over timer_a uart
int ccr0();
//extern char rxdata;
#endif //SWUART_H
/ta_uart/cprintf.h
0,0 → 1,7
void cprintf(const char *, ...);
/ta_uart/makefile
1,46 → 1,62
# makfile configuration
NAME = ta_uart
OBJECTS = main.o swuart.o
OBJECTS = main.o swuart.o cprintf.o
 
CPU = msp430f122
ASFLAGS = -mmcu=${CPU} -x assembler-with-cpp -D_GNU_ASSEMBLER_ -c
CFLAGS = -mmcu=${CPU} -O2 -Wall -g
# Compiler performance option (-Os / -O2 / -O3)
PORT_CFLAGS = -O2
 
#switch the compiler (for the internal make rules)
CC = msp430-gcc
AS = msp430-gcc
# Choose GCC toolchain prefix ('msp430' for MSPGCC / 'msp430-elf' for GCC RedHat/TI)
ifndef MSPGCC_PFX
MSPGCC_PFX = msp430-elf
endif
 
.PHONY: all FORCE clean download download-jtag download-bsl dist
# disable some warnings specific to the Dhrystone code
WARNINGS = -Wall
 
# Select flags depending on selected toolchain
ifeq ($(MSPGCC_PFX),msp430-elf)
INCDIR = -I /cad/ti/gcc/include
CFLAGS = -D PFX_MSP430_ELF $(INCDIR) $(PORT_CFLAGS) ${WARNINGS} -g -mcpu=msp430 -mhwmult=16bit
ASFLAGS = -x assembler-with-cpp -D_GNU_ASSEMBLER_ -c -mcpu=msp430
else
CFLAGS = -D PFX_MSP430 $(PORT_CFLAGS) ${WARNINGS} -g -mcpu=430 -mmpy=16 -mivcnt=16
ASFLAGS = -x assembler-with-cpp -D_GNU_ASSEMBLER_ -c
endif
 
# Toolchain executables
CC = ${MSPGCC_PFX}-gcc
AS = ${MSPGCC_PFX}-gcc
OBJCOPY = ${MSPGCC_PFX}-objcopy
OBJDUMP = ${MSPGCC_PFX}-objdump
OBJSIZE = ${MSPGCC_PFX}-size
 
 
.PHONY: all FORCE clean download dist
 
#all should be the first target. it's built when make is runwithout args
all: ${NAME}.elf ${NAME}.a43 ${NAME}.lst
all: ${NAME}.elf ${NAME}.a43 ${NAME}.lst ${NAME}.size
 
#confgigure the next line if you want to use the serial download
download: download-uart
#download: download-jtag
#download: download-bsl
 
#additional rules for files
${NAME}.elf: ${OBJECTS}
${CC} -mmcu=${CPU} -o $@ ${OBJECTS}
${CC} ${CFLAGS} -T linker.${MSPGCC_PFX}.x -o $@ ${OBJECTS}
 
${NAME}.a43: ${NAME}.elf
msp430-objcopy -O ihex $^ $@
${OBJCOPY} -O ihex $^ $@
 
${NAME}.lst: ${NAME}.elf
msp430-objdump -dSt $^ > $@
${OBJDUMP} -dSt $^ >$@
 
download-jtag: all
msp430-jtag -e ${NAME}.elf
${NAME}.size: ${NAME}.elf
${OBJSIZE} $^ >$@
 
download-bsl: all
msp430-bsl -e ${NAME}.elf
 
download-uart: all
openmsp430-loader.tcl -device /dev/ttyUSB0 -baudrate 115200 ${NAME}.elf
 
clean:
rm -f ${NAME} ${NAME}.a43 ${NAME}.lst *.o
rm -f ${NAME}.elf ${NAME}.a43 ${NAME}.lst ${NAME}.size *.o
 
#backup archive
dist:
53,3 → 69,4
main.o: main.c hardware.h
fll.o: fll.s hardware.h
swuart.o: swuart.s hardware.h
cprintf.o: cprintf.c cprintf.h
/leds/linker.x File deleted
leds/linker.x Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Index: leds/linker.msp430.x =================================================================== --- leds/linker.msp430.x (nonexistent) +++ leds/linker.msp430.x (revision 212) @@ -0,0 +1,222 @@ +/* Default linker script, for normal executables */ +OUTPUT_FORMAT("elf32-msp430") +OUTPUT_ARCH("msp430") +MEMORY { + sfr : ORIGIN = 0x0000, LENGTH = 0x0010 + peripheral_8bit : ORIGIN = 0x0010, LENGTH = 0x00f0 + peripheral_16bit : ORIGIN = 0x0100, LENGTH = 0x0100 + ram (wx) : ORIGIN = 0x0200, LENGTH = 0x0400 + rom (rx) : ORIGIN = 0xF000, LENGTH = 0x1000-0x20 + vectors : ORIGIN = 0xffe0, LENGTH = 0x0020 +} +REGION_ALIAS("REGION_TEXT", rom); +REGION_ALIAS("REGION_DATA", ram); +PROVIDE (__info_segment_size = 0x80); +__WDTCTL = 0x0120; +__MPY = 0x0130; +__MPYS = 0x0132; +__MAC = 0x0134; +__MACS = 0x0136; +__OP2 = 0x0138; +__RESLO = 0x013A; +__RESHI = 0x013C; +__SUMEXT = 0x013E; + +SECTIONS +{ + /* Read-only sections, merged into text segment. */ + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rel.init : { *(.rel.init) } + .rela.init : { *(.rela.init) } + .rel.fini : { *(.rel.fini) } + .rela.fini : { *(.rela.fini) } + .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } + .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } + .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } + .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } + .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } + .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } + .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } + .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + /* .any.{text,rodata,data,bss}{,.*} sections are treated as orphans and + * placed in output sections with available space by linker. Do not list + * them here, or the linker will not consider them orphans. */ + .text : + { + . = ALIGN(2); + KEEP(*(.init .init.*)) + KEEP(*(.init0)) /* Start here after reset. */ + KEEP(*(.init1)) /* User definable. */ + KEEP(*(.init2)) /* Initialize stack. */ + KEEP(*(.init3)) /* Initialize hardware, user definable. */ + KEEP(*(.init4)) /* Copy data to .data, clear bss. */ + KEEP(*(.init5)) /* User definable. */ + KEEP(*(.init6)) /* C++ constructors. */ + KEEP(*(.init7)) /* User definable. */ + KEEP(*(.init8)) /* User definable. */ + KEEP(*(.init9)) /* Call main(). */ + KEEP(*(.fini9)) /* Falls into here after main(). User definable. */ + KEEP(*(.fini8)) /* User definable. */ + KEEP(*(.fini7)) /* User definable. */ + KEEP(*(.fini6)) /* C++ destructors. */ + KEEP(*(.fini5)) /* User definable. */ + KEEP(*(.fini4)) /* User definable. */ + KEEP(*(.fini3)) /* User definable. */ + KEEP(*(.fini2)) /* User definable. */ + KEEP(*(.fini1)) /* User definable. */ + KEEP(*(.fini0)) /* Infinite loop after program termination. */ + KEEP(*(.fini .fini.*)) + . = ALIGN(2); + __ctors_start = .; + KEEP(*(.ctors)) + __ctors_end = .; + __dtors_start = .; + KEEP(*(.dtors)) + __dtors_end = .; + . = ALIGN(2); + *(.text .text.* .gnu.linkonce.t.*) + *(.near.text .near.text.*) + } > REGION_TEXT + .rodata : + { + . = ALIGN(2); + *(.rodata .rodata.* .gnu.linkonce.r.*) + *(.near.rodata .near.rodata.*) + } > REGION_TEXT + . = ALIGN(2); + _etext = .; /* Past last read-only (loadable) segment */ + .data : + { + . = ALIGN(2); + PROVIDE (__data_start = .) ; + PROVIDE (__datastart = .) ; + *(.data .data.* .gnu.linkonce.d.*) + *(.near.data .near.data.*) + . = ALIGN(2); + _edata = .; /* Past last read-write (loadable) segment */ + } > REGION_DATA AT > REGION_TEXT + __data_load_start = LOADADDR(.data); + __data_size = SIZEOF(.data); + .bss : + { + __bss_start = .; + *(.bss .bss.*) + *(.near.bss .near.bss.*) + *(COMMON) + . = ALIGN(2); + __bss_end = .; + } > REGION_DATA + __bss_size = SIZEOF(.bss); + .noinit : + { + . = ALIGN(2); + __noinit_start = .; + *(.noinit .noinit.*) + . = ALIGN(2); + __noinit_end = .; + } > REGION_DATA + . = ALIGN(2); + _end = .; /* Past last write (loadable) segment */ + + /* Values placed in the first 32 entries of a 64-entry interrupt vector + * table. This exists because the FRAM chips place the BSL and JTAG + * passwords at specific offsets that technically fall within the + * interrupt table, but for which no MCU has a corresponding interrupt. + * See https://sourceforge.net/tracker/?func=detail&aid=3554291&group_id=42303&atid=432701 */ + PROVIDE(__vte_0 = 0xffff); + PROVIDE(__vte_1 = 0xffff); + PROVIDE(__vte_2 = 0xffff); + PROVIDE(__vte_3 = 0xffff); + PROVIDE(__vte_4 = 0xffff); + PROVIDE(__vte_5 = 0xffff); + PROVIDE(__vte_6 = 0xffff); + PROVIDE(__vte_7 = 0xffff); + PROVIDE(__vte_8 = 0xffff); + PROVIDE(__vte_9 = 0xffff); + PROVIDE(__vte_10 = 0xffff); + PROVIDE(__vte_11 = 0xffff); + PROVIDE(__vte_12 = 0xffff); + PROVIDE(__vte_13 = 0xffff); + PROVIDE(__vte_14 = 0xffff); + PROVIDE(__vte_15 = 0xffff); + PROVIDE(__vte_16 = 0xffff); + PROVIDE(__vte_17 = 0xffff); + PROVIDE(__vte_18 = 0xffff); + PROVIDE(__vte_19 = 0xffff); + PROVIDE(__vte_20 = 0xffff); + PROVIDE(__vte_21 = 0xffff); + PROVIDE(__vte_22 = 0xffff); + PROVIDE(__vte_23 = 0xffff); + PROVIDE(__vte_24 = 0xffff); + PROVIDE(__vte_25 = 0xffff); + PROVIDE(__vte_26 = 0xffff); + PROVIDE(__vte_27 = 0xffff); + PROVIDE(__vte_28 = 0xffff); + PROVIDE(__vte_29 = 0xffff); + PROVIDE(__vte_30 = 0xffff); + PROVIDE(__vte_31 = 0xffff); + .vectors : + { + __vectors_start = .; + KEEP(*(.vectors*)) + _vectors_end = .; + } > vectors + /* Legacy section, prefer .far.text */ + . = ALIGN(2); + _efartext = .; /* Past last read-only (loadable) segment */ + . = ALIGN(2); + _far_end = .; /* Past last write (loadable) segment */ + /* Stabs for profiling information*/ + .profiler 0 : { *(.profiler) } + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* DWARF 3 */ + .debug_pubtypes 0 : { *(.debug_pubtypes) } + .debug_ranges 0 : { *(.debug_ranges) } + /* __stack is the only symbol that the user can override */ + PROVIDE (__stack = ORIGIN(ram) + LENGTH(ram)); + PROVIDE (__data_start_rom = _etext) ; + PROVIDE (__data_end_rom = _etext + SIZEOF (.data)) ; + PROVIDE (__romdatastart = _etext) ; + PROVIDE (__romdataend = _etext + SIZEOF (.data)) ; + PROVIDE (__romdatacopysize = SIZEOF(.data)); +} Index: leds/linker.msp430-elf.x =================================================================== --- leds/linker.msp430-elf.x (nonexistent) +++ leds/linker.msp430-elf.x (revision 212) @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2014, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/* This file supports MSP430F110 devices. */ +/* Version: 1.155 */ +/* Default linker script, for normal executables */ + +OUTPUT_ARCH(msp430) +ENTRY(_start) + +MEMORY { + SFR : ORIGIN = 0x0000, LENGTH = 0x0010 + PERIPHERAL_8BIT : ORIGIN = 0x0010, LENGTH = 0x00F0 + PERIPHERAL_16BIT : ORIGIN = 0x0100, LENGTH = 0x0100 + RAM : ORIGIN = 0x0200, LENGTH = 0x0400 + ROM (rx) : ORIGIN = 0xF000, LENGTH = 0x1000-0x20 + VECT1 : ORIGIN = 0xFFE0, LENGTH = 0x0002 + VECT2 : ORIGIN = 0xFFE2, LENGTH = 0x0002 + VECT3 : ORIGIN = 0xFFE4, LENGTH = 0x0002 + VECT4 : ORIGIN = 0xFFE6, LENGTH = 0x0002 + VECT5 : ORIGIN = 0xFFE8, LENGTH = 0x0002 + VECT6 : ORIGIN = 0xFFEA, LENGTH = 0x0002 + VECT7 : ORIGIN = 0xFFEC, LENGTH = 0x0002 + VECT8 : ORIGIN = 0xFFEE, LENGTH = 0x0002 + VECT9 : ORIGIN = 0xFFF0, LENGTH = 0x0002 + VECT10 : ORIGIN = 0xFFF2, LENGTH = 0x0002 + VECT11 : ORIGIN = 0xFFF4, LENGTH = 0x0002 + VECT12 : ORIGIN = 0xFFF6, LENGTH = 0x0002 + VECT13 : ORIGIN = 0xFFF8, LENGTH = 0x0002 + VECT14 : ORIGIN = 0xFFFA, LENGTH = 0x0002 + VECT15 : ORIGIN = 0xFFFC, LENGTH = 0x0002 + RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002 +} + +SECTIONS +{ + __interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) } > VECT1 + __interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) } > VECT2 + __interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) KEEP (*(__interrupt_vector_port1)) } > VECT3 + __interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) KEEP (*(__interrupt_vector_port2)) } > VECT4 + __interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) } > VECT5 + __interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) } > VECT6 + __interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) } > VECT7 + __interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) } > VECT8 + __interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) KEEP (*(__interrupt_vector_timera1)) } > VECT9 + __interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) KEEP (*(__interrupt_vector_timera0)) } > VECT10 + __interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) KEEP (*(__interrupt_vector_wdt)) } > VECT11 + __interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) } > VECT12 + __interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) } > VECT13 + __interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) } > VECT14 + __interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) KEEP (*(__interrupt_vector_nmi)) } > VECT15 + __reset_vector : + { + KEEP (*(__interrupt_vector_16)) + KEEP (*(__interrupt_vector_reset)) + KEEP (*(.resetvec)) + } > RESETVEC + + .rodata : { + . = ALIGN(2); + *(.plt) + *(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*) + *(.rodata1) + *(.eh_frame_hdr) + KEEP (*(.eh_frame)) + KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) + PROVIDE (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE (__preinit_array_end = .); + PROVIDE (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + PROVIDE (__init_array_end = .); + PROVIDE (__fini_array_start = .); + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE (__fini_array_end = .); + LONG(0); /* Sentinel. */ + + /* gcc uses crtbegin.o to find the start of the constructors, so + we make sure it is first. Because this is a wildcard, it + doesn't matter if the user does not actually link against + crtbegin.o; the linker won't look for a file to match a + wildcard. The wildcard also means that it doesn't matter which + directory crtbegin.o is in. */ + KEEP (*crtbegin*.o(.ctors)) + + /* We don't want to include the .ctor section from from the + crtend.o file until after the sorted ctors. The .ctor section + from the crtend file contains the end of ctors marker and it + must be last */ + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + + KEEP (*crtbegin*.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } > ROM + + .text : + { + . = ALIGN(2); + PROVIDE (_start = .); + KEEP (*(SORT(.crt_*))) + *(.lowtext .text .stub .text.* .gnu.linkonce.t.* .text:*) + KEEP (*(.text.*personality*)) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + *(.interp .hash .dynsym .dynstr .gnu.version*) + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + . = ALIGN(2); + KEEP (*(.init)) + KEEP (*(.fini)) + KEEP (*(.tm_clone_table)) + } > ROM + + .data : { + . = ALIGN(2); + PROVIDE (__datastart = .); + + KEEP (*(.jcr)) + *(.data.rel.ro.local) *(.data.rel.ro*) + *(.dynamic) + + *(.data .data.* .gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + SORT(CONSTRUCTORS) + *(.data1) + *(.got.plt) *(.got) + + /* We want the small data sections together, so single-instruction offsets + can access them all, and initialized data all before uninitialized, so + we can shorten the on-disk segment size. */ + . = ALIGN(2); + *(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1) + + . = ALIGN(2); + _edata = .; + PROVIDE (edata = .); + PROVIDE (__dataend = .); + } > RAM AT>ROM + + /* Note that crt0 assumes this is a multiple of two; all the + start/stop symbols are also assumed word-aligned. */ + PROVIDE(__romdatastart = LOADADDR(.data)); + PROVIDE (__romdatacopysize = SIZEOF(.data)); + + .bss : { + . = ALIGN(2); + PROVIDE (__bssstart = .); + *(.dynbss) + *(.sbss .sbss.*) + *(.bss .bss.* .gnu.linkonce.b.*) + . = ALIGN(2); + *(COMMON) + PROVIDE (__bssend = .); + } > RAM + PROVIDE (__bsssize = SIZEOF(.bss)); + + .noinit (NOLOAD) : { + . = ALIGN(2); + PROVIDE (__noinit_start = .); + *(.noinit) + . = ALIGN(2); + PROVIDE (__noinit_end = .); + end = .; + } > RAM + + .stack (ORIGIN (RAM) + LENGTH(RAM)) : + { + PROVIDE (__stack = .); + *(.stack) + } + + .MP430.attributes 0 : + { + KEEP (*(.MSP430.attributes)) + KEEP (*(.gnu.attributes)) + KEEP (*(__TI_build_attributes)) + } + + /* The rest are all not normally part of the runtime image. */ + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + /DISCARD/ : { *(.note.GNU-stack) } +} Index: leds/main.c =================================================================== --- leds/main.c (revision 202) +++ leds/main.c (revision 212) @@ -8,8 +8,8 @@ volatile int i, j; for (i = 0; i>(o&7)); delay(0x0007, 0xffff); } } + + return 0; } -
/leds/omsp_system.h
76,7 → 76,8
//----------------------------------------------------------
// SPECIAL FUNCTION REGISTERS
//----------------------------------------------------------
#define IE1 (*(volatile unsigned char *) 0x0000)
#define IE1_set_wdtie() __asm__ __volatile__ ("bis.b #0x01, &0x0000")
//#define IE1 (*(volatile unsigned char *) 0x0000)
#define IFG1 (*(volatile unsigned char *) 0x0002)
 
#define CPU_ID_LO (*(volatile unsigned char *) 0x0004)
232,19 → 233,41
#define eint() __eint()
#define dint() __dint()
 
#define RESET_VECTOR (0x001E) // Vector 15 (0xFFFE) - Reset - [Highest Priority]
#define NMI_VECTOR (0x001C) // Vector 14 (0xFFFC) - Non-maskable -
#define UNUSED_13_VECTOR (0x001A) // Vector 13 (0xFFFA) - -
#define UNUSED_12_VECTOR (0x0018) // Vector 12 (0xFFF8) - -
#define UNUSED_11_VECTOR (0x0016) // Vector 11 (0xFFF6) - -
#define WDT_VECTOR (0x0014) // Vector 10 (0xFFF4) - Watchdog Timer -
#define TIMERA0_VECTOR (0x0012) // Vector 9 (0xFFF2) - Timer A CC0 -
#define TIMERA1_VECTOR (0x0010) // Vector 8 (0xFFF0) - Timer A CC1-2, TA -
#define UNUSED_07_VECTOR (0x000E) // Vector 7 (0xFFEE) - -
#define UNUSED_06_VECTOR (0x000C) // Vector 6 (0xFFEC) - -
#define UNUSED_05_VECTOR (0x000A) // Vector 5 (0xFFEA) - -
#define UNUSED_04_VECTOR (0x0008) // Vector 4 (0xFFE8) - -
#define UNUSED_03_VECTOR (0x0006) // Vector 3 (0xFFE6) - -
#define PORT1_VECTOR (0x0004) // Vector 2 (0xFFE4) - Port 1 -
#define UNUSED_01_VECTOR (0x0002) // Vector 1 (0xFFE2) - -
#define UNUSED_00_VECTOR (0x0000) // Vector 0 (0xFFE0) - - [Lowest Priority]
// Vector definition for RedHat/TI toolchain
#ifdef PFX_MSP430_ELF
#define RESET_VECTOR ("reset") // Vector 15 (0xFFFE) - Reset - [Highest Priority]
#define NMI_VECTOR (15) // Vector 14 (0xFFFC) - Non-maskable -
#define UNUSED_13_VECTOR (14) // Vector 13 (0xFFFA) - -
#define UNUSED_12_VECTOR (13) // Vector 12 (0xFFF8) - -
#define UNUSED_11_VECTOR (12) // Vector 11 (0xFFF6) - -
#define WDT_VECTOR (11) // Vector 10 (0xFFF4) - Watchdog Timer -
#define TIMERA0_VECTOR (10) // Vector 9 (0xFFF2) - Timer A CC0 -
#define TIMERA1_VECTOR (9) // Vector 8 (0xFFF0) - Timer A CC1-2, TA -
#define UNUSED_07_VECTOR (8) // Vector 7 (0xFFEE) - -
#define UNUSED_06_VECTOR (7) // Vector 6 (0xFFEC) - -
#define UNUSED_05_VECTOR (6) // Vector 5 (0xFFEA) - -
#define UNUSED_04_VECTOR (5) // Vector 4 (0xFFE8) - -
#define UNUSED_03_VECTOR (4) // Vector 3 (0xFFE6) - -
#define PORT1_VECTOR (3) // Vector 2 (0xFFE4) - Port 1 -
#define UNUSED_01_VECTOR (2) // Vector 1 (0xFFE2) - -
#define UNUSED_00_VECTOR (1) // Vector 0 (0xFFE0) - - [Lowest Priority]
 
// Vector definition for MSPGCC toolchain
#else
#define RESET_VECTOR (0x001E) // Vector 15 (0xFFFE) - Reset - [Highest Priority]
#define NMI_VECTOR (0x001C) // Vector 14 (0xFFFC) - Non-maskable -
#define UNUSED_13_VECTOR (0x001A) // Vector 13 (0xFFFA) - -
#define UNUSED_12_VECTOR (0x0018) // Vector 12 (0xFFF8) - -
#define UNUSED_11_VECTOR (0x0016) // Vector 11 (0xFFF6) - -
#define WDT_VECTOR (0x0014) // Vector 10 (0xFFF4) - Watchdog Timer -
#define TIMERA0_VECTOR (0x0012) // Vector 9 (0xFFF2) - Timer A CC0 -
#define TIMERA1_VECTOR (0x0010) // Vector 8 (0xFFF0) - Timer A CC1-2, TA -
#define UNUSED_07_VECTOR (0x000E) // Vector 7 (0xFFEE) - -
#define UNUSED_06_VECTOR (0x000C) // Vector 6 (0xFFEC) - -
#define UNUSED_05_VECTOR (0x000A) // Vector 5 (0xFFEA) - -
#define UNUSED_04_VECTOR (0x0008) // Vector 4 (0xFFE8) - -
#define UNUSED_03_VECTOR (0x0006) // Vector 3 (0xFFE6) - -
#define PORT1_VECTOR (0x0004) // Vector 2 (0xFFE4) - Port 1 -
#define UNUSED_01_VECTOR (0x0002) // Vector 1 (0xFFE2) - -
#define UNUSED_00_VECTOR (0x0000) // Vector 0 (0xFFE0) - - [Lowest Priority]
#endif
/leds/makefile
2,43 → 2,58
NAME = leds
OBJECTS = main.o 7seg.o
 
CFLAGS = -O2 -Wall -g -mcpu=430 -mivcnt=16 -mmpy=16 # Uniarch flags
# Compiler performance option (-Os / -O2 / -O3)
PORT_CFLAGS = -O2
 
#switch the compiler (for the internal make rules)
CC = msp430-gcc
# Choose GCC toolchain prefix ('msp430' for MSPGCC / 'msp430-elf' for GCC RedHat/TI)
ifndef MSPGCC_PFX
MSPGCC_PFX = msp430-elf
endif
 
# disable some warnings specific to the Dhrystone code
WARNINGS = -Wall
 
.PHONY: all FORCE clean download download-jtag download-bsl dist
# Select flags depending on selected toolchain
ifeq ($(MSPGCC_PFX),msp430-elf)
INCDIR = -I /cad/ti/gcc/include
CFLAGS = -D PFX_MSP430_ELF $(INCDIR) $(PORT_CFLAGS) ${WARNINGS} -g -mcpu=msp430 -mhwmult=16bit
else
CFLAGS = -D PFX_MSP430 $(PORT_CFLAGS) ${WARNINGS} -g -mcpu=430 -mmpy=16 -mivcnt=16
endif
 
# Toolchain executables
CC = ${MSPGCC_PFX}-gcc
OBJCOPY = ${MSPGCC_PFX}-objcopy
OBJDUMP = ${MSPGCC_PFX}-objdump
OBJSIZE = ${MSPGCC_PFX}-size
 
 
.PHONY: all FORCE clean download dist
 
#all should be the first target. it's built when make is runwithout args
all: ${NAME}.elf ${NAME}.a43 ${NAME}.lst
all: ${NAME}.elf ${NAME}.a43 ${NAME}.lst ${NAME}.size
 
#confgigure the next line if you want to use the serial download
download: download-uart
#download: download-jtag
#download: download-bsl
 
#additional rules for files
${NAME}.elf: ${OBJECTS}
${CC} -Tlinker.x -o $@ ${OBJECTS}
${CC} ${CFLAGS} -T linker.${MSPGCC_PFX}.x -o $@ ${OBJECTS}
 
${NAME}.a43: ${NAME}.elf
msp430-objcopy -O ihex $^ $@
${OBJCOPY} -O ihex $^ $@
 
${NAME}.lst: ${NAME}.elf
msp430-objdump -dSt $^ >$@
${OBJDUMP} -dSt $^ >$@
 
download-jtag: all
msp430-jtag -e ${NAME}.elf
${NAME}.size: ${NAME}.elf
${OBJSIZE} $^ >$@
 
download-bsl: all
msp430-bsl -e ${NAME}.elf
 
download-uart: all
openmsp430-loader.tcl -device /dev/ttyUSB0 -baudrate 115200 ${NAME}.elf
 
clean:
rm -f ${NAME} ${NAME}.a43 ${NAME}.lst ${NAME}.elf *.o
rm -f ${NAME}.elf ${NAME}.a43 ${NAME}.lst ${NAME}.size *.o
 
#backup archive
dist:
/hw_uart/linker.x File deleted
hw_uart/linker.x Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Index: hw_uart/linker.msp430.x =================================================================== --- hw_uart/linker.msp430.x (nonexistent) +++ hw_uart/linker.msp430.x (revision 212) @@ -0,0 +1,222 @@ +/* Default linker script, for normal executables */ +OUTPUT_FORMAT("elf32-msp430") +OUTPUT_ARCH("msp430") +MEMORY { + sfr : ORIGIN = 0x0000, LENGTH = 0x0010 + peripheral_8bit : ORIGIN = 0x0010, LENGTH = 0x00f0 + peripheral_16bit : ORIGIN = 0x0100, LENGTH = 0x0100 + ram (wx) : ORIGIN = 0x0200, LENGTH = 0x0400 + rom (rx) : ORIGIN = 0xF000, LENGTH = 0x1000-0x20 + vectors : ORIGIN = 0xffe0, LENGTH = 0x0020 +} +REGION_ALIAS("REGION_TEXT", rom); +REGION_ALIAS("REGION_DATA", ram); +PROVIDE (__info_segment_size = 0x80); +__WDTCTL = 0x0120; +__MPY = 0x0130; +__MPYS = 0x0132; +__MAC = 0x0134; +__MACS = 0x0136; +__OP2 = 0x0138; +__RESLO = 0x013A; +__RESHI = 0x013C; +__SUMEXT = 0x013E; + +SECTIONS +{ + /* Read-only sections, merged into text segment. */ + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rel.init : { *(.rel.init) } + .rela.init : { *(.rela.init) } + .rel.fini : { *(.rel.fini) } + .rela.fini : { *(.rela.fini) } + .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } + .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } + .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } + .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } + .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } + .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } + .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } + .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + /* .any.{text,rodata,data,bss}{,.*} sections are treated as orphans and + * placed in output sections with available space by linker. Do not list + * them here, or the linker will not consider them orphans. */ + .text : + { + . = ALIGN(2); + KEEP(*(.init .init.*)) + KEEP(*(.init0)) /* Start here after reset. */ + KEEP(*(.init1)) /* User definable. */ + KEEP(*(.init2)) /* Initialize stack. */ + KEEP(*(.init3)) /* Initialize hardware, user definable. */ + KEEP(*(.init4)) /* Copy data to .data, clear bss. */ + KEEP(*(.init5)) /* User definable. */ + KEEP(*(.init6)) /* C++ constructors. */ + KEEP(*(.init7)) /* User definable. */ + KEEP(*(.init8)) /* User definable. */ + KEEP(*(.init9)) /* Call main(). */ + KEEP(*(.fini9)) /* Falls into here after main(). User definable. */ + KEEP(*(.fini8)) /* User definable. */ + KEEP(*(.fini7)) /* User definable. */ + KEEP(*(.fini6)) /* C++ destructors. */ + KEEP(*(.fini5)) /* User definable. */ + KEEP(*(.fini4)) /* User definable. */ + KEEP(*(.fini3)) /* User definable. */ + KEEP(*(.fini2)) /* User definable. */ + KEEP(*(.fini1)) /* User definable. */ + KEEP(*(.fini0)) /* Infinite loop after program termination. */ + KEEP(*(.fini .fini.*)) + . = ALIGN(2); + __ctors_start = .; + KEEP(*(.ctors)) + __ctors_end = .; + __dtors_start = .; + KEEP(*(.dtors)) + __dtors_end = .; + . = ALIGN(2); + *(.text .text.* .gnu.linkonce.t.*) + *(.near.text .near.text.*) + } > REGION_TEXT + .rodata : + { + . = ALIGN(2); + *(.rodata .rodata.* .gnu.linkonce.r.*) + *(.near.rodata .near.rodata.*) + } > REGION_TEXT + . = ALIGN(2); + _etext = .; /* Past last read-only (loadable) segment */ + .data : + { + . = ALIGN(2); + PROVIDE (__data_start = .) ; + PROVIDE (__datastart = .) ; + *(.data .data.* .gnu.linkonce.d.*) + *(.near.data .near.data.*) + . = ALIGN(2); + _edata = .; /* Past last read-write (loadable) segment */ + } > REGION_DATA AT > REGION_TEXT + __data_load_start = LOADADDR(.data); + __data_size = SIZEOF(.data); + .bss : + { + __bss_start = .; + *(.bss .bss.*) + *(.near.bss .near.bss.*) + *(COMMON) + . = ALIGN(2); + __bss_end = .; + } > REGION_DATA + __bss_size = SIZEOF(.bss); + .noinit : + { + . = ALIGN(2); + __noinit_start = .; + *(.noinit .noinit.*) + . = ALIGN(2); + __noinit_end = .; + } > REGION_DATA + . = ALIGN(2); + _end = .; /* Past last write (loadable) segment */ + + /* Values placed in the first 32 entries of a 64-entry interrupt vector + * table. This exists because the FRAM chips place the BSL and JTAG + * passwords at specific offsets that technically fall within the + * interrupt table, but for which no MCU has a corresponding interrupt. + * See https://sourceforge.net/tracker/?func=detail&aid=3554291&group_id=42303&atid=432701 */ + PROVIDE(__vte_0 = 0xffff); + PROVIDE(__vte_1 = 0xffff); + PROVIDE(__vte_2 = 0xffff); + PROVIDE(__vte_3 = 0xffff); + PROVIDE(__vte_4 = 0xffff); + PROVIDE(__vte_5 = 0xffff); + PROVIDE(__vte_6 = 0xffff); + PROVIDE(__vte_7 = 0xffff); + PROVIDE(__vte_8 = 0xffff); + PROVIDE(__vte_9 = 0xffff); + PROVIDE(__vte_10 = 0xffff); + PROVIDE(__vte_11 = 0xffff); + PROVIDE(__vte_12 = 0xffff); + PROVIDE(__vte_13 = 0xffff); + PROVIDE(__vte_14 = 0xffff); + PROVIDE(__vte_15 = 0xffff); + PROVIDE(__vte_16 = 0xffff); + PROVIDE(__vte_17 = 0xffff); + PROVIDE(__vte_18 = 0xffff); + PROVIDE(__vte_19 = 0xffff); + PROVIDE(__vte_20 = 0xffff); + PROVIDE(__vte_21 = 0xffff); + PROVIDE(__vte_22 = 0xffff); + PROVIDE(__vte_23 = 0xffff); + PROVIDE(__vte_24 = 0xffff); + PROVIDE(__vte_25 = 0xffff); + PROVIDE(__vte_26 = 0xffff); + PROVIDE(__vte_27 = 0xffff); + PROVIDE(__vte_28 = 0xffff); + PROVIDE(__vte_29 = 0xffff); + PROVIDE(__vte_30 = 0xffff); + PROVIDE(__vte_31 = 0xffff); + .vectors : + { + __vectors_start = .; + KEEP(*(.vectors*)) + _vectors_end = .; + } > vectors + /* Legacy section, prefer .far.text */ + . = ALIGN(2); + _efartext = .; /* Past last read-only (loadable) segment */ + . = ALIGN(2); + _far_end = .; /* Past last write (loadable) segment */ + /* Stabs for profiling information*/ + .profiler 0 : { *(.profiler) } + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* DWARF 3 */ + .debug_pubtypes 0 : { *(.debug_pubtypes) } + .debug_ranges 0 : { *(.debug_ranges) } + /* __stack is the only symbol that the user can override */ + PROVIDE (__stack = ORIGIN(ram) + LENGTH(ram)); + PROVIDE (__data_start_rom = _etext) ; + PROVIDE (__data_end_rom = _etext + SIZEOF (.data)) ; + PROVIDE (__romdatastart = _etext) ; + PROVIDE (__romdataend = _etext + SIZEOF (.data)) ; + PROVIDE (__romdatacopysize = SIZEOF(.data)); +} Index: hw_uart/linker.msp430-elf.x =================================================================== --- hw_uart/linker.msp430-elf.x (nonexistent) +++ hw_uart/linker.msp430-elf.x (revision 212) @@ -0,0 +1,251 @@ +/* ============================================================================ */ +/* Copyright (c) 2014, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/* This file supports MSP430F110 devices. */ +/* Version: 1.155 */ +/* Default linker script, for normal executables */ + +OUTPUT_ARCH(msp430) +ENTRY(_start) + +MEMORY { + SFR : ORIGIN = 0x0000, LENGTH = 0x0010 + PERIPHERAL_8BIT : ORIGIN = 0x0010, LENGTH = 0x00F0 + PERIPHERAL_16BIT : ORIGIN = 0x0100, LENGTH = 0x0100 + RAM : ORIGIN = 0x0200, LENGTH = 0x0400 + ROM (rx) : ORIGIN = 0xF000, LENGTH = 0x1000-0x20 + VECT1 : ORIGIN = 0xFFE0, LENGTH = 0x0002 + VECT2 : ORIGIN = 0xFFE2, LENGTH = 0x0002 + VECT3 : ORIGIN = 0xFFE4, LENGTH = 0x0002 + VECT4 : ORIGIN = 0xFFE6, LENGTH = 0x0002 + VECT5 : ORIGIN = 0xFFE8, LENGTH = 0x0002 + VECT6 : ORIGIN = 0xFFEA, LENGTH = 0x0002 + VECT7 : ORIGIN = 0xFFEC, LENGTH = 0x0002 + VECT8 : ORIGIN = 0xFFEE, LENGTH = 0x0002 + VECT9 : ORIGIN = 0xFFF0, LENGTH = 0x0002 + VECT10 : ORIGIN = 0xFFF2, LENGTH = 0x0002 + VECT11 : ORIGIN = 0xFFF4, LENGTH = 0x0002 + VECT12 : ORIGIN = 0xFFF6, LENGTH = 0x0002 + VECT13 : ORIGIN = 0xFFF8, LENGTH = 0x0002 + VECT14 : ORIGIN = 0xFFFA, LENGTH = 0x0002 + VECT15 : ORIGIN = 0xFFFC, LENGTH = 0x0002 + RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002 +} + +SECTIONS +{ + __interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) } > VECT1 + __interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) } > VECT2 + __interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) KEEP (*(__interrupt_vector_port1)) } > VECT3 + __interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) KEEP (*(__interrupt_vector_port2)) } > VECT4 + __interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) } > VECT5 + __interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) } > VECT6 + __interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) } > VECT7 + __interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) } > VECT8 + __interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) KEEP (*(__interrupt_vector_timera1)) } > VECT9 + __interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) KEEP (*(__interrupt_vector_timera0)) } > VECT10 + __interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) KEEP (*(__interrupt_vector_wdt)) } > VECT11 + __interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) } > VECT12 + __interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) } > VECT13 + __interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) } > VECT14 + __interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) KEEP (*(__interrupt_vector_nmi)) } > VECT15 + __reset_vector : + { + KEEP (*(__interrupt_vector_16)) + KEEP (*(__interrupt_vector_reset)) + KEEP (*(.resetvec)) + } > RESETVEC + + .rodata : { + . = ALIGN(2); + *(.plt) + *(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*) + *(.rodata1) + *(.eh_frame_hdr) + KEEP (*(.eh_frame)) + KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) + PROVIDE (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE (__preinit_array_end = .); + PROVIDE (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + PROVIDE (__init_array_end = .); + PROVIDE (__fini_array_start = .); + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE (__fini_array_end = .); + LONG(0); /* Sentinel. */ + + /* gcc uses crtbegin.o to find the start of the constructors, so + we make sure it is first. Because this is a wildcard, it + doesn't matter if the user does not actually link against + crtbegin.o; the linker won't look for a file to match a + wildcard. The wildcard also means that it doesn't matter which + directory crtbegin.o is in. */ + KEEP (*crtbegin*.o(.ctors)) + + /* We don't want to include the .ctor section from from the + crtend.o file until after the sorted ctors. The .ctor section + from the crtend file contains the end of ctors marker and it + must be last */ + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + + KEEP (*crtbegin*.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } > ROM + + .text : + { + . = ALIGN(2); + PROVIDE (_start = .); + KEEP (*(SORT(.crt_*))) + *(.lowtext .text .stub .text.* .gnu.linkonce.t.* .text:*) + KEEP (*(.text.*personality*)) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + *(.interp .hash .dynsym .dynstr .gnu.version*) + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + . = ALIGN(2); + KEEP (*(.init)) + KEEP (*(.fini)) + KEEP (*(.tm_clone_table)) + } > ROM + + .data : { + . = ALIGN(2); + PROVIDE (__datastart = .); + + KEEP (*(.jcr)) + *(.data.rel.ro.local) *(.data.rel.ro*) + *(.dynamic) + + *(.data .data.* .gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + SORT(CONSTRUCTORS) + *(.data1) + *(.got.plt) *(.got) + + /* We want the small data sections together, so single-instruction offsets + can access them all, and initialized data all before uninitialized, so + we can shorten the on-disk segment size. */ + . = ALIGN(2); + *(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1) + + . = ALIGN(2); + _edata = .; + PROVIDE (edata = .); + PROVIDE (__dataend = .); + } > RAM AT>ROM + + /* Note that crt0 assumes this is a multiple of two; all the + start/stop symbols are also assumed word-aligned. */ + PROVIDE(__romdatastart = LOADADDR(.data)); + PROVIDE (__romdatacopysize = SIZEOF(.data)); + + .bss : { + . = ALIGN(2); + PROVIDE (__bssstart = .); + *(.dynbss) + *(.sbss .sbss.*) + *(.bss .bss.* .gnu.linkonce.b.*) + . = ALIGN(2); + *(COMMON) + PROVIDE (__bssend = .); + } > RAM + PROVIDE (__bsssize = SIZEOF(.bss)); + + .noinit (NOLOAD) : { + . = ALIGN(2); + PROVIDE (__noinit_start = .); + *(.noinit) + . = ALIGN(2); + PROVIDE (__noinit_end = .); + end = .; + } > RAM + + .stack (ORIGIN (RAM) + LENGTH(RAM)) : + { + PROVIDE (__stack = .); + *(.stack) + } + + .MP430.attributes 0 : + { + KEEP (*(.MSP430.attributes)) + KEEP (*(.gnu.attributes)) + KEEP (*(__TI_build_attributes)) + } + + /* The rest are all not normally part of the runtime image. */ + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + /DISCARD/ : { *(.note.GNU-stack) } +} Index: hw_uart/main.c =================================================================== --- hw_uart/main.c (revision 202) +++ hw_uart/main.c (revision 212) @@ -8,16 +8,16 @@ //--------------------------------------------------// void delay(unsigned int d) { while(d--) { - nop(); - nop(); + __nop(); + __nop(); } } //--------------------------------------------------// -// putChar function // +// tty_putc function // // (Send a byte to the UART) // //--------------------------------------------------// -int putchar (int txdata) { +int tty_putc (int txdata) { // Wait until the TX buffer is not full while (UART_STAT & UART_TX_FULL); @@ -41,7 +41,7 @@ // Clear the receive pending flag UART_STAT = UART_RX_PND; - + // Exit the low power mode LPM0_EXIT; } @@ -57,7 +57,7 @@ int pos = 0; char buf[40]; int led = 0; - + WDTCTL = WDTPW | WDTHOLD; // Init watchdog timer P3DIR = 0xff; @@ -70,15 +70,15 @@ //delay(65535); P3OUT = 0x00; // Switch off LED - - printf("\r\n====== openMSP430 in action ======\r\n"); //say hello - printf("\r\nSimple Line Editor Ready\r\n"); + cprintf("\r\n====== openMSP430 in action ======\r\n"); //say hello + cprintf("\r\nSimple Line Editor Ready\r\n"); + eint(); // Enable interrupts - + while (1) { //main loop, never ends... - printf("> "); //show prompt + cprintf("> "); //show prompt reading = 1; while (reading) { //loop and read characters @@ -94,9 +94,9 @@ //process RETURN key case '\r': //case '\n': - printf("\r\n"); //finish line - buf[pos++] = 0; //to use printf... - printf(":%s\r\n", buf); + cprintf("\r\n"); //finish line + buf[pos++] = 0; //to use cprintf... + cprintf(":%s\r\n", buf); reading = 0; //exit read loop pos = 0; //reset buffer break; @@ -104,9 +104,9 @@ case '\b': if (pos > 0) { //is there a char to delete? pos--; //remove it in buffer - putchar('\b'); //go back - putchar(' '); //erase on screen - putchar('\b'); //go back + tty_putc('\b'); //go back + tty_putc(' '); //erase on screen + tty_putc('\b'); //go back } break; //other characters @@ -113,7 +113,7 @@ default: //only store characters if buffer has space if (pos < sizeof(buf)) { - putchar(rxdata); //echo + tty_putc(rxdata); //echo buf[pos++] = rxdata; //store } } @@ -120,4 +120,3 @@ } } } -
/hw_uart/cprintf.c
0,0 → 1,158
#include <stdarg.h>
 
#include "cprintf.h"
 
typedef unsigned char byte;
 
static char hex[] = "0123456789abcdef";
 
void
cput_nibble (int n)
{
tty_putc (hex[n&0x0f]);
}
 
void
cput_hex_byte (int n)
{
cput_nibble (n >> 4);
cput_nibble (n);
}
 
void
cput_binary_byte (int n)
{
int i;
for (i=7; i>=0; i--)
tty_putc((n & (1<<i)) ? '1' : '0');
}
 
void
cput_hex_word (int n)
{
cput_hex_byte (n >> 8);
cput_hex_byte (n);
}
 
void
cput_hex_long (long int n)
{
cput_hex_byte (n >> 24);
cput_hex_byte (n >> 16);
cput_hex_byte (n >> 8);
cput_hex_byte (n);
}
 
void
cput_hex_block (char *block, int n)
{
int i = 0;
while (n)
{
cput_hex_byte (*block++);
if (--n == 0)
break;
i++;
if ((i & 7) == 0)
tty_putc (' ');
else
tty_putc (':');
}
}
 
void
cput_nibble_block (char *block, int n)
{
int i = 0;
while (n)
{
cput_nibble (*block);
if (--n == 0)
break;
i++;
if ((i & 7) == 0)
tty_putc (' ');
}
}
 
void
cput_number (int n)
{
char buf[20];
int i = 0;
if (n < 0)
{
tty_putc ('-');
n = -n;
}
while (n > 9)
{
buf[i++] = (n%10) + '0';
n /= 10;
}
buf[i++] = (n%10) + '0';
while (i > 0)
tty_putc (buf[--i]);
}
 
void
cprintf (const char *fmt, ...)
{
va_list v;
int i;
char *s;
 
va_start (v, fmt);
 
while (*fmt)
{
if (*fmt != '%')
tty_putc (*fmt);
else
switch (*++fmt)
{
case '%':
tty_putc ('%');
break;
case 'c':
i = va_arg (v, int);
tty_putc(i);
break;
case 'd':
i = va_arg (v, int);
cput_number(i);
break;
case 'b':
i = va_arg (v, int);
cput_hex_byte (i);
break;
case 'B':
i = va_arg (v, int);
cput_binary_byte (i);
break;
case 'w':
i = va_arg (v, int);
cput_hex_word (i);
break;
case 'l':
i = va_arg (v, int);
cput_hex_long (i);
break;
case 'x':
s = va_arg (v, char *);
i = va_arg (v, int);
cput_hex_block (s, i);
break;
case 'n':
s = va_arg (v, char *);
i = va_arg (v, int);
cput_nibble_block (s, i);
break;
case 's':
s = va_arg (v, char *);
tty_putc (s);
break;
}
fmt ++;
}
}
/hw_uart/omsp_system.h
76,7 → 76,8
//----------------------------------------------------------
// SPECIAL FUNCTION REGISTERS
//----------------------------------------------------------
#define IE1 (*(volatile unsigned char *) 0x0000)
#define IE1_set_wdtie() __asm__ __volatile__ ("bis.b #0x01, &0x0000")
//#define IE1 (*(volatile unsigned char *) 0x0000)
#define IFG1 (*(volatile unsigned char *) 0x0002)
 
#define CPU_ID_LO (*(volatile unsigned char *) 0x0004)
232,19 → 233,41
#define eint() __eint()
#define dint() __dint()
 
#define RESET_VECTOR (0x001E) // Vector 15 (0xFFFE) - Reset - [Highest Priority]
#define NMI_VECTOR (0x001C) // Vector 14 (0xFFFC) - Non-maskable -
#define UNUSED_13_VECTOR (0x001A) // Vector 13 (0xFFFA) - -
#define UNUSED_12_VECTOR (0x0018) // Vector 12 (0xFFF8) - -
#define UNUSED_11_VECTOR (0x0016) // Vector 11 (0xFFF6) - -
#define WDT_VECTOR (0x0014) // Vector 10 (0xFFF4) - Watchdog Timer -
#define TIMERA0_VECTOR (0x0012) // Vector 9 (0xFFF2) - Timer A CC0 -
#define TIMERA1_VECTOR (0x0010) // Vector 8 (0xFFF0) - Timer A CC1-2, TA -
#define UNUSED_07_VECTOR (0x000E) // Vector 7 (0xFFEE) - -
#define UNUSED_06_VECTOR (0x000C) // Vector 6 (0xFFEC) - -
#define UNUSED_05_VECTOR (0x000A) // Vector 5 (0xFFEA) - -
#define UNUSED_04_VECTOR (0x0008) // Vector 4 (0xFFE8) - -
#define UNUSED_03_VECTOR (0x0006) // Vector 3 (0xFFE6) - -
#define PORT1_VECTOR (0x0004) // Vector 2 (0xFFE4) - Port 1 -
#define UNUSED_01_VECTOR (0x0002) // Vector 1 (0xFFE2) - -
#define UNUSED_00_VECTOR (0x0000) // Vector 0 (0xFFE0) - - [Lowest Priority]
// Vector definition for RedHat/TI toolchain
#ifdef PFX_MSP430_ELF
#define RESET_VECTOR ("reset") // Vector 15 (0xFFFE) - Reset - [Highest Priority]
#define NMI_VECTOR (15) // Vector 14 (0xFFFC) - Non-maskable -
#define UNUSED_13_VECTOR (14) // Vector 13 (0xFFFA) - -
#define UNUSED_12_VECTOR (13) // Vector 12 (0xFFF8) - -
#define UNUSED_11_VECTOR (12) // Vector 11 (0xFFF6) - -
#define WDT_VECTOR (11) // Vector 10 (0xFFF4) - Watchdog Timer -
#define TIMERA0_VECTOR (10) // Vector 9 (0xFFF2) - Timer A CC0 -
#define TIMERA1_VECTOR (9) // Vector 8 (0xFFF0) - Timer A CC1-2, TA -
#define UNUSED_07_VECTOR (8) // Vector 7 (0xFFEE) - -
#define UNUSED_06_VECTOR (7) // Vector 6 (0xFFEC) - -
#define UNUSED_05_VECTOR (6) // Vector 5 (0xFFEA) - -
#define UNUSED_04_VECTOR (5) // Vector 4 (0xFFE8) - -
#define UNUSED_03_VECTOR (4) // Vector 3 (0xFFE6) - -
#define PORT1_VECTOR (3) // Vector 2 (0xFFE4) - Port 1 -
#define UNUSED_01_VECTOR (2) // Vector 1 (0xFFE2) - -
#define UNUSED_00_VECTOR (1) // Vector 0 (0xFFE0) - - [Lowest Priority]
 
// Vector definition for MSPGCC toolchain
#else
#define RESET_VECTOR (0x001E) // Vector 15 (0xFFFE) - Reset - [Highest Priority]
#define NMI_VECTOR (0x001C) // Vector 14 (0xFFFC) - Non-maskable -
#define UNUSED_13_VECTOR (0x001A) // Vector 13 (0xFFFA) - -
#define UNUSED_12_VECTOR (0x0018) // Vector 12 (0xFFF8) - -
#define UNUSED_11_VECTOR (0x0016) // Vector 11 (0xFFF6) - -
#define WDT_VECTOR (0x0014) // Vector 10 (0xFFF4) - Watchdog Timer -
#define TIMERA0_VECTOR (0x0012) // Vector 9 (0xFFF2) - Timer A CC0 -
#define TIMERA1_VECTOR (0x0010) // Vector 8 (0xFFF0) - Timer A CC1-2, TA -
#define UNUSED_07_VECTOR (0x000E) // Vector 7 (0xFFEE) - -
#define UNUSED_06_VECTOR (0x000C) // Vector 6 (0xFFEC) - -
#define UNUSED_05_VECTOR (0x000A) // Vector 5 (0xFFEA) - -
#define UNUSED_04_VECTOR (0x0008) // Vector 4 (0xFFE8) - -
#define UNUSED_03_VECTOR (0x0006) // Vector 3 (0xFFE6) - -
#define PORT1_VECTOR (0x0004) // Vector 2 (0xFFE4) - Port 1 -
#define UNUSED_01_VECTOR (0x0002) // Vector 1 (0xFFE2) - -
#define UNUSED_00_VECTOR (0x0000) // Vector 0 (0xFFE0) - - [Lowest Priority]
#endif
/hw_uart/cprintf.h
0,0 → 1,41
void cprintf(const char *, ...);
/hw_uart/makefile
1,43 → 1,59
# makfile configuration
NAME = hw_uart
OBJECTS = main.o
OBJECTS = main.o cprintf.o
 
CFLAGS = -O2 -Wall -g -mcpu=430 -mivcnt=16 -mmpy=16 # Uniarch flags
# Compiler performance option (-Os / -O2 / -O3)
PORT_CFLAGS = -O2
 
#switch the compiler (for the internal make rules)
CC = msp430-gcc
# Choose GCC toolchain prefix ('msp430' for MSPGCC / 'msp430-elf' for GCC RedHat/TI)
ifndef MSPGCC_PFX
MSPGCC_PFX = msp430-elf
endif
 
.PHONY: all FORCE clean download download-jtag download-bsl dist
# disable some warnings specific to the Dhrystone code
WARNINGS = -Wall
 
# Select flags depending on selected toolchain
ifeq ($(MSPGCC_PFX),msp430-elf)
INCDIR = -I /cad/ti/gcc/include
CFLAGS = -D PFX_MSP430_ELF $(INCDIR) $(PORT_CFLAGS) ${WARNINGS} -g -mcpu=msp430 -mhwmult=16bit
else
CFLAGS = -D PFX_MSP430 $(PORT_CFLAGS) ${WARNINGS} -g -mcpu=430 -mmpy=16 -mivcnt=16
endif
 
# Toolchain executables
CC = ${MSPGCC_PFX}-gcc
OBJCOPY = ${MSPGCC_PFX}-objcopy
OBJDUMP = ${MSPGCC_PFX}-objdump
OBJSIZE = ${MSPGCC_PFX}-size
 
 
.PHONY: all FORCE clean download dist
 
#all should be the first target. it's built when make is runwithout args
all: ${NAME}.elf ${NAME}.a43 ${NAME}.lst
all: ${NAME}.elf ${NAME}.a43 ${NAME}.lst ${NAME}.size
 
#confgigure the next line if you want to use the serial download
download: download-uart
#download: download-jtag
#download: download-bsl
 
#additional rules for files
${NAME}.elf: ${OBJECTS}
${CC} -Tlinker.x -o $@ ${OBJECTS}
${CC} ${CFLAGS} -T linker.${MSPGCC_PFX}.x -o $@ ${OBJECTS}
 
${NAME}.a43: ${NAME}.elf
msp430-objcopy -O ihex $^ $@
${OBJCOPY} -O ihex $^ $@
 
${NAME}.lst: ${NAME}.elf
msp430-objdump -dSt $^ > $@
${OBJDUMP} -dSt $^ >$@
 
download-jtag: all
msp430-jtag -e ${NAME}.elf
${NAME}.size: ${NAME}.elf
${OBJSIZE} $^ >$@
 
download-bsl: all
msp430-bsl -e ${NAME}.elf
 
download-uart: all
openmsp430-loader.tcl -device /dev/ttyUSB0 -baudrate 115200 ${NAME}.elf
 
clean:
rm -f ${NAME} ${NAME}.a43 ${NAME}.lst *.o
rm -f ${NAME}.elf ${NAME}.a43 ${NAME}.lst ${NAME}.size *.o
 
#backup archive
dist:
48,3 → 64,4
 
#project dependencies
main.o: main.c hardware.h
cprintf.o: cprintf.c cprintf.h

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.