URL
https://opencores.org/ocsvn/openmsp430/openmsp430/trunk
Subversion Repositories openmsp430
Compare Revisions
- This comparison shows the changes necessary to convert path
/openmsp430/trunk
- from Rev 140 to Rev 141
- ↔ Reverse comparison
Rev 140 → Rev 141
/core/sim/rtl_sim/src/sing-op_sxt.s43
34,34 → 34,7
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_209, (__data_start+0x09) |
.set DMEM_20A, (__data_start+0x0A) |
.set DMEM_20B, (__data_start+0x0B) |
.set DMEM_20C, (__data_start+0x0C) |
.set DMEM_20D, (__data_start+0x0D) |
.set DMEM_20E, (__data_start+0x0E) |
.set DMEM_20F, (__data_start+0x0F) |
.set DMEM_210, (__data_start+0x10) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_214, (__data_start+0x14) |
.set DMEM_216, (__data_start+0x16) |
.set DMEM_218, (__data_start+0x18) |
.set DMEM_219, (__data_start+0x19) |
.set DMEM_21A, (__data_start+0x1A) |
.set DMEM_21B, (__data_start+0x1B) |
.set DMEM_21C, (__data_start+0x1C) |
.set DMEM_21D, (__data_start+0x1D) |
.set DMEM_21E, (__data_start+0x1E) |
.set DMEM_21F, (__data_start+0x1F) |
.set DMEM_220, (__data_start+0x20) |
.set DMEM_222, (__data_start+0x22) |
.set DMEM_224, (__data_start+0x24) |
.include "pmem_defs.asm" |
|
.global main |
|
155,13 → 128,13
mov #0x0100, r2 ;# Test 1 |
mov #0x7524, &DMEM_218 |
mov #0xaaaa, &DMEM_21A |
sxt EDE_218 ;# SXT (mem0c=0x7524 => {mem0c=0x0024) |
sxt EDE_218+PMEM_LENGTH ;# SXT (mem0c=0x7524 => {mem0c=0x0024) |
mov r2, r5 |
|
mov #0x0100, r2 ;# Test 2 |
mov #0x1cb6, &DMEM_21A |
mov #0xaaaa, &DMEM_21C |
sxt EDE_21A ;# SXT (mem0d=0x1cb6 => {mem0d=0xffb6) |
sxt EDE_21A+PMEM_LENGTH ;# SXT (mem0d=0x1cb6 => {mem0d=0xffb6) |
mov r2, r7 |
|
mov #0x5000, r15 |
/core/sim/rtl_sim/src/two-op_mov-b.s43
34,88 → 34,7
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_201, (__data_start+0x01) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_203, (__data_start+0x03) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_205, (__data_start+0x05) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_207, (__data_start+0x07) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_209, (__data_start+0x09) |
.set DMEM_20A, (__data_start+0x0A) |
.set DMEM_20B, (__data_start+0x0B) |
.set DMEM_20C, (__data_start+0x0C) |
.set DMEM_20D, (__data_start+0x0D) |
.set DMEM_20E, (__data_start+0x0E) |
.set DMEM_20F, (__data_start+0x0F) |
.set DMEM_210, (__data_start+0x10) |
.set DMEM_211, (__data_start+0x11) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_213, (__data_start+0x13) |
.set DMEM_214, (__data_start+0x14) |
.set DMEM_215, (__data_start+0x15) |
.set DMEM_216, (__data_start+0x16) |
.set DMEM_217, (__data_start+0x17) |
.set DMEM_218, (__data_start+0x18) |
.set DMEM_219, (__data_start+0x19) |
.set DMEM_21A, (__data_start+0x1A) |
.set DMEM_21B, (__data_start+0x1B) |
.set DMEM_21C, (__data_start+0x1C) |
.set DMEM_21D, (__data_start+0x1D) |
.set DMEM_21E, (__data_start+0x1E) |
.set DMEM_21F, (__data_start+0x1F) |
.set DMEM_220, (__data_start+0x20) |
.set DMEM_221, (__data_start+0x21) |
.set DMEM_222, (__data_start+0x22) |
.set DMEM_223, (__data_start+0x23) |
.set DMEM_224, (__data_start+0x24) |
.set DMEM_225, (__data_start+0x25) |
.set DMEM_226, (__data_start+0x26) |
.set DMEM_227, (__data_start+0x27) |
.set DMEM_228, (__data_start+0x28) |
.set DMEM_229, (__data_start+0x29) |
.set DMEM_22A, (__data_start+0x2A) |
.set DMEM_22B, (__data_start+0x2B) |
.set DMEM_22C, (__data_start+0x2C) |
.set DMEM_22D, (__data_start+0x2D) |
.set DMEM_22E, (__data_start+0x2E) |
.set DMEM_22F, (__data_start+0x2F) |
.set DMEM_230, (__data_start+0x30) |
|
.set DMEM_232, (__data_start+0x32) |
.set DMEM_234, (__data_start+0x34) |
.set DMEM_236, (__data_start+0x36) |
.set DMEM_238, (__data_start+0x38) |
.set DMEM_23A, (__data_start+0x3A) |
.set DMEM_23C, (__data_start+0x3C) |
.set DMEM_23D, (__data_start+0x3D) |
.set DMEM_23E, (__data_start+0x3E) |
.set DMEM_23F, (__data_start+0x3F) |
.set DMEM_240, (__data_start+0x40) |
.set DMEM_241, (__data_start+0x41) |
.set DMEM_242, (__data_start+0x42) |
.set DMEM_243, (__data_start+0x43) |
.set DMEM_244, (__data_start+0x44) |
.set DMEM_245, (__data_start+0x45) |
.set DMEM_246, (__data_start+0x46) |
.set DMEM_247, (__data_start+0x47) |
|
.set DMEM_250, (__data_start+0x50) |
.set DMEM_252, (__data_start+0x52) |
.set DMEM_254, (__data_start+0x54) |
.set DMEM_256, (__data_start+0x56) |
.set DMEM_258, (__data_start+0x58) |
.set DMEM_25A, (__data_start+0x5A) |
.set DMEM_25D, (__data_start+0x5D) |
.set DMEM_25F, (__data_start+0x5F) |
.set DMEM_261, (__data_start+0x61) |
.set DMEM_263, (__data_start+0x63) |
.set DMEM_265, (__data_start+0x65) |
.set DMEM_267, (__data_start+0x67) |
|
.include "pmem_defs.asm" |
|
.global main |
|
156,10 → 75,10
|
mov #0x1111, &DMEM_214 |
mov #0xabcd, r7 |
mov.b r7, Rn_EDEL ;# Write 0xcd to memory @0x0214 |
mov.b r7, Rn_EDEL+PMEM_LENGTH ;# Write 0xcd to memory @0x0214 |
mov #0x9999, &DMEM_216 |
mov #0xef12, r7 |
mov.b r7, Rn_EDEH ;# Write 0x12 to memory @0x0217 |
mov.b r7, Rn_EDEH+PMEM_LENGTH ;# Write 0x12 to memory @0x0217 |
|
mov #0x7777, &DMEM_218 |
mov #0x1f2e, r8 |
221,13 → 140,13
mov #0xe1e1, &DMEM_21E |
|
mov #DMEM_200, r8 |
mov.b @r8, aRn_EDE_218 ;# Move memory @0x200 (0xaa) to memory @0x218 |
mov.b @r8, aRn_EDE_218+PMEM_LENGTH ;# Move memory @0x200 (0xaa) to memory @0x218 |
mov #DMEM_202, r8 |
mov.b @r8, aRn_EDE_21B ;# Move memory @0x202 (0xcc) to memory @0x21B |
mov.b @r8, aRn_EDE_21B+PMEM_LENGTH ;# Move memory @0x202 (0xcc) to memory @0x21B |
mov #DMEM_205, r8 |
mov.b @r8, aRn_EDE_21C ;# Move memory @0x205 (0xdd) to memory @0x21C |
mov.b @r8, aRn_EDE_21C+PMEM_LENGTH ;# Move memory @0x205 (0xdd) to memory @0x21C |
mov #DMEM_207, r8 |
mov.b @r8, aRn_EDE_21F ;# Move memory @0x207 (0xff) to memory @0x21F |
mov.b @r8, aRn_EDE_21F+PMEM_LENGTH ;# Move memory @0x207 (0xff) to memory @0x21F |
|
mov #0x2233, &DMEM_200 |
mov #0x4455, &DMEM_202 |
300,13 → 219,13
mov #0xe1e1, &DMEM_21E |
|
mov #DMEM_200, r10 |
mov.b @r10+, aRni_EDE_218 ;# Move memory @0x200 (0xaa) to memory @0x218 |
mov.b @r10+, aRni_EDE_218+PMEM_LENGTH ;# Move memory @0x200 (0xaa) to memory @0x218 |
mov.b @r10+, r11 |
mov.b @r10+, aRni_EDE_21B ;# Move memory @0x202 (0xcc) to memory @0x21B |
mov.b @r10+, aRni_EDE_21B+PMEM_LENGTH ;# Move memory @0x202 (0xcc) to memory @0x21B |
mov @r10+, r11 |
mov.b @r10+, aRni_EDE_21C ;# Move memory @0x205 (0xdd) to memory @0x21C |
mov.b @r10+, aRni_EDE_21C+PMEM_LENGTH ;# Move memory @0x205 (0xdd) to memory @0x21C |
mov.b @r10+, r11 |
mov.b @r10+, aRni_EDE_21F ;# Move memory @0x207 (0xff) to memory @0x21F |
mov.b @r10+, aRni_EDE_21F+PMEM_LENGTH ;# Move memory @0x207 (0xff) to memory @0x21F |
|
mov #0x2233, &DMEM_200 |
mov #0x4455, &DMEM_202 |
359,10 → 278,10
mov #0xeeee, &DMEM_21A |
mov #0x1e1e, &DMEM_21C |
mov #0xe1e1, &DMEM_21E |
mov.b #0x99aa, N_EDE_218 ;# Move value 0xaa to memory @0x218 |
mov.b #0xbbcc, N_EDE_21B ;# Move value 0xcc to memory @0x21B |
mov.b #0xddee, N_EDE_21C ;# Move value 0xee to memory @0x21C |
mov.b #0xff11, N_EDE_21F ;# Move value 0x11 to memory @0x21F |
mov.b #0x99aa, N_EDE_218+PMEM_LENGTH ;# Move value 0xaa to memory @0x218 |
mov.b #0xbbcc, N_EDE_21B+PMEM_LENGTH ;# Move value 0xcc to memory @0x21B |
mov.b #0xddee, N_EDE_21C+PMEM_LENGTH ;# Move value 0xee to memory @0x21C |
mov.b #0xff11, N_EDE_21F+PMEM_LENGTH ;# Move value 0x11 to memory @0x21F |
|
mov #0xaaaa, &DMEM_220 |
mov #0xeeee, &DMEM_222 |
422,10 → 341,10
mov #0xe1e1, &DMEM_21E |
|
mov #DMEM_200, r8 |
mov.b 2(r8), xRn_EDE_218 ;# Move memory @0x202 (0xaa) to memory @0x218 |
mov.b 4(r8), xRn_EDE_21B ;# Move memory @0x204 (0xcc) to memory @0x21B |
mov.b 7(r8), xRn_EDE_21C ;# Move memory @0x207 (0xdd) to memory @0x21C |
mov.b 9(r8), xRn_EDE_21F ;# Move memory @0x209 (0xff) to memory @0x21F |
mov.b 2(r8), xRn_EDE_218+PMEM_LENGTH ;# Move memory @0x202 (0xaa) to memory @0x218 |
mov.b 4(r8), xRn_EDE_21B+PMEM_LENGTH ;# Move memory @0x204 (0xcc) to memory @0x21B |
mov.b 7(r8), xRn_EDE_21C+PMEM_LENGTH ;# Move memory @0x207 (0xdd) to memory @0x21C |
mov.b 9(r8), xRn_EDE_21F+PMEM_LENGTH ;# Move memory @0x209 (0xff) to memory @0x21F |
|
mov #0x2233, &DMEM_202 |
mov #0x4455, &DMEM_204 |
465,10 → 384,10
|
mov #0x2233, &DMEM_210 |
mov #0xffff, r5 |
mov.b EDE_EDE_210, r5 ;# r5 takes @0x0210 value: 0x0033 |
mov.b EDE_EDE_210+PMEM_LENGTH, r5 ;# r5 takes @0x0210 value: 0x0033 |
mov #0x4455, &DMEM_212 |
mov #0xffff, r6 |
mov.b EDE_EDE_213, r6 ;# r6 takes @0x0213 value: 0x0044 |
mov.b EDE_EDE_213+PMEM_LENGTH, r6 ;# r6 takes @0x0213 value: 0x0044 |
|
mov #0x1122, &DMEM_202 |
mov #0x3344, &DMEM_204 |
480,10 → 399,10
mov #0x5a5a, &DMEM_214 |
mov #0xa5a5, &DMEM_216 |
|
mov.b EDE_EDE_202, 16(r7) ;# Move memory @0x202 (0x22) to memory @0x210 |
mov.b EDE_EDE_204, 19(r7) ;# Move memory @0x204 (0x44) to memory @0x213 |
mov.b EDE_EDE_207, 20(r7) ;# Move memory @0x207 (0x55) to memory @0x214 |
mov.b EDE_EDE_209, 23(r7) ;# Move memory @0x209 (0x77) to memory @0x217 |
mov.b EDE_EDE_202+PMEM_LENGTH, 16(r7) ;# Move memory @0x202 (0x22) to memory @0x210 |
mov.b EDE_EDE_204+PMEM_LENGTH, 19(r7) ;# Move memory @0x204 (0x44) to memory @0x213 |
mov.b EDE_EDE_207+PMEM_LENGTH, 20(r7) ;# Move memory @0x207 (0x55) to memory @0x214 |
mov.b EDE_EDE_209+PMEM_LENGTH, 23(r7) ;# Move memory @0x209 (0x77) to memory @0x217 |
|
mov #0x99aa, &DMEM_202 |
mov #0xbbcc, &DMEM_204 |
494,10 → 413,10
mov #0x1e1e, &DMEM_21C |
mov #0xe1e1, &DMEM_21E |
|
mov.b EDE_EDE_202, EDE_EDE_218 ;# Move memory @0x202 (0xaa) to memory @0x218 |
mov.b EDE_EDE_204, EDE_EDE_21B ;# Move memory @0x204 (0xcc) to memory @0x21B |
mov.b EDE_EDE_207, EDE_EDE_21C ;# Move memory @0x207 (0xdd) to memory @0x21C |
mov.b EDE_EDE_209, EDE_EDE_21F ;# Move memory @0x209 (0xff) to memory @0x21F |
mov.b EDE_EDE_202+PMEM_LENGTH, EDE_EDE_218+PMEM_LENGTH ;# Move memory @0x202 (0xaa) to memory @0x218 |
mov.b EDE_EDE_204+PMEM_LENGTH, EDE_EDE_21B+PMEM_LENGTH ;# Move memory @0x204 (0xcc) to memory @0x21B |
mov.b EDE_EDE_207+PMEM_LENGTH, EDE_EDE_21C+PMEM_LENGTH ;# Move memory @0x207 (0xdd) to memory @0x21C |
mov.b EDE_EDE_209+PMEM_LENGTH, EDE_EDE_21F+PMEM_LENGTH ;# Move memory @0x209 (0xff) to memory @0x21F |
|
mov #0x2233, &DMEM_202 |
mov #0x4455, &DMEM_204 |
508,10 → 427,10
mov #0x2d2d, &DMEM_224 |
mov #0xd2d2, &DMEM_226 |
|
mov.b EDE_EDE_202, &EDE_TONY_220 ;# Move memory @0x202 (0x33) to memory @0x220 |
mov.b EDE_EDE_204, &EDE_TONY_223 ;# Move memory @0x204 (0x55) to memory @0x223 |
mov.b EDE_EDE_207, &EDE_TONY_224 ;# Move memory @0x207 (0x66) to memory @0x224 |
mov.b EDE_EDE_209, &EDE_TONY_227 ;# Move memory @0x209 (0x88) to memory @0x227 |
mov.b EDE_EDE_202+PMEM_LENGTH, &EDE_TONY_220 ;# Move memory @0x202 (0x33) to memory @0x220 |
mov.b EDE_EDE_204+PMEM_LENGTH, &EDE_TONY_223 ;# Move memory @0x204 (0x55) to memory @0x223 |
mov.b EDE_EDE_207+PMEM_LENGTH, &EDE_TONY_224 ;# Move memory @0x207 (0x66) to memory @0x224 |
mov.b EDE_EDE_209+PMEM_LENGTH, &EDE_TONY_227 ;# Move memory @0x209 (0x88) to memory @0x227 |
|
mov #0x7000, r15 |
|
560,10 → 479,10
mov #0x1e1e, &DMEM_21C |
mov #0xe1e1, &DMEM_21E |
|
mov.b &DMEM_202, aEDE_EDE_218 ;# Move memory @0x202 (0xaa) to memory @0x218 |
mov.b &DMEM_204, aEDE_EDE_21B ;# Move memory @0x204 (0xcc) to memory @0x21B |
mov.b &DMEM_207, aEDE_EDE_21C ;# Move memory @0x207 (0xdd) to memory @0x21C |
mov.b &DMEM_209, aEDE_EDE_21F ;# Move memory @0x209 (0xff) to memory @0x21F |
mov.b &DMEM_202, aEDE_EDE_218+PMEM_LENGTH ;# Move memory @0x202 (0xaa) to memory @0x218 |
mov.b &DMEM_204, aEDE_EDE_21B+PMEM_LENGTH ;# Move memory @0x204 (0xcc) to memory @0x21B |
mov.b &DMEM_207, aEDE_EDE_21C+PMEM_LENGTH ;# Move memory @0x207 (0xdd) to memory @0x21C |
mov.b &DMEM_209, aEDE_EDE_21F+PMEM_LENGTH ;# Move memory @0x209 (0xff) to memory @0x21F |
|
mov #0x2233, &DMEM_202 |
mov #0x4455, &DMEM_204 |
665,18 → 584,18
mov #0xeeee, &DMEM_244 |
mov #0x3333, &DMEM_246 |
|
mov.b #0x0000, CONSTL_EDE0 ;# Move +0 to memory @0x230 |
mov.b #0x0001, CONSTL_EDE1 ;# Move +1 to memory @0x232 |
mov.b #0x0002, CONSTL_EDE2 ;# Move +2 to memory @0x234 |
mov.b #0x0004, CONSTL_EDE4 ;# Move +4 to memory @0x236 |
mov.b #0x0008, CONSTL_EDE8 ;# Move +8 to memory @0x238 |
mov.b #0xffff, CONSTL_EDEm1 ;# Move -1 to memory @0x23A |
mov.b #0x0000, CONSTH_EDE0 ;# Move +0 to memory @0x23D |
mov.b #0x0001, CONSTH_EDE1 ;# Move +1 to memory @0x23F |
mov.b #0x0002, CONSTH_EDE2 ;# Move +2 to memory @0x241 |
mov.b #0x0004, CONSTH_EDE4 ;# Move +4 to memory @0x243 |
mov.b #0x0008, CONSTH_EDE8 ;# Move +8 to memory @0x245 |
mov.b #0xffff, CONSTH_EDEm1 ;# Move -1 to memory @0x247 |
mov.b #0x0000, CONSTL_EDE0+PMEM_LENGTH ;# Move +0 to memory @0x230 |
mov.b #0x0001, CONSTL_EDE1+PMEM_LENGTH ;# Move +1 to memory @0x232 |
mov.b #0x0002, CONSTL_EDE2+PMEM_LENGTH ;# Move +2 to memory @0x234 |
mov.b #0x0004, CONSTL_EDE4+PMEM_LENGTH ;# Move +4 to memory @0x236 |
mov.b #0x0008, CONSTL_EDE8+PMEM_LENGTH ;# Move +8 to memory @0x238 |
mov.b #0xffff, CONSTL_EDEm1+PMEM_LENGTH ;# Move -1 to memory @0x23A |
mov.b #0x0000, CONSTH_EDE0+PMEM_LENGTH ;# Move +0 to memory @0x23D |
mov.b #0x0001, CONSTH_EDE1+PMEM_LENGTH ;# Move +1 to memory @0x23F |
mov.b #0x0002, CONSTH_EDE2+PMEM_LENGTH ;# Move +2 to memory @0x241 |
mov.b #0x0004, CONSTH_EDE4+PMEM_LENGTH ;# Move +4 to memory @0x243 |
mov.b #0x0008, CONSTH_EDE8+PMEM_LENGTH ;# Move +8 to memory @0x245 |
mov.b #0xffff, CONSTH_EDEm1+PMEM_LENGTH ;# Move -1 to memory @0x247 |
|
|
# |
/core/sim/rtl_sim/src/tA_capture.s43
35,26 → 35,10
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_250, (__data_start+0x50) |
|
.set TACTL, 0x0160 |
.set TAR, 0x0170 |
.set TACCTL0, 0x0162 |
.set TACCR0, 0x0172 |
.set TACCTL1, 0x0164 |
.set TACCR1, 0x0174 |
.set TACCTL2, 0x0166 |
.set TACCR2, 0x0176 |
.set TAIV, 0x012E |
|
|
WAIT_FUNC: |
dec r14 |
jnz WAIT_FUNC |
/core/sim/rtl_sim/src/dbg_uart.s43
37,9 → 37,7
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
.include "pmem_defs.asm" |
|
.global main |
|
/core/sim/rtl_sim/src/two-op_autoincr.s43
34,25 → 34,7
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_20A, (__data_start+0x0A) |
.set DMEM_20C, (__data_start+0x0C) |
.set DMEM_20E, (__data_start+0x0E) |
.set DMEM_210, (__data_start+0x10) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_214, (__data_start+0x14) |
.set DMEM_216, (__data_start+0x16) |
.set DMEM_218, (__data_start+0x18) |
.set DMEM_21A, (__data_start+0x1A) |
.set DMEM_21C, (__data_start+0x1C) |
.set DMEM_21E, (__data_start+0x1E) |
.set DMEM_220, (__data_start+0x20) |
.set DMEM_222, (__data_start+0x22) |
.include "pmem_defs.asm" |
|
.global main |
|
/core/sim/rtl_sim/src/dbg_mem.s43
38,11 → 38,7
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_210, (__data_start+0x10) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_250, (__data_start+0x50) |
.include "pmem_defs.asm" |
|
.global main |
|
/core/sim/rtl_sim/src/tA_modes.s43
37,60 → 37,10
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_20A, (__data_start+0x0A) |
.set DMEM_20C, (__data_start+0x0C) |
.set DMEM_20E, (__data_start+0x0E) |
.set DMEM_210, (__data_start+0x10) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_214, (__data_start+0x14) |
.set DMEM_216, (__data_start+0x16) |
.set DMEM_218, (__data_start+0x18) |
.set DMEM_21A, (__data_start+0x1A) |
.set DMEM_21E, (__data_start+0x1E) |
.set DMEM_220, (__data_start+0x20) |
.set DMEM_222, (__data_start+0x22) |
.set DMEM_224, (__data_start+0x24) |
.set DMEM_226, (__data_start+0x26) |
.set DMEM_228, (__data_start+0x28) |
.set DMEM_22A, (__data_start+0x2A) |
.set DMEM_230, (__data_start+0x30) |
.set DMEM_232, (__data_start+0x32) |
.set DMEM_234, (__data_start+0x34) |
.set DMEM_236, (__data_start+0x36) |
.set DMEM_238, (__data_start+0x38) |
.set DMEM_23A, (__data_start+0x3A) |
.set DMEM_240, (__data_start+0x40) |
.set DMEM_242, (__data_start+0x42) |
.set DMEM_244, (__data_start+0x44) |
.set DMEM_246, (__data_start+0x46) |
.set DMEM_248, (__data_start+0x48) |
.set DMEM_24A, (__data_start+0x4A) |
.set DMEM_250, (__data_start+0x50) |
.set DMEM_254, (__data_start+0x54) |
.set DMEM_256, (__data_start+0x56) |
.set DMEM_262, (__data_start+0x62) |
.set DMEM_296, (__data_start+0x96) |
.set DMEM_2D6, (__data_start+0xD6) |
|
.set TACTL, 0x0160 |
.set TAR, 0x0170 |
.set TACCTL0, 0x0162 |
.set TACCR0, 0x0172 |
.set TACCTL1, 0x0164 |
.set TACCR1, 0x0174 |
.set TACCTL2, 0x0166 |
.set TACCR2, 0x0176 |
.set TAIV, 0x012E |
|
|
WAIT_FUNC: |
dec r14 |
jnz WAIT_FUNC |
/core/sim/rtl_sim/src/gpio_rdwr.s43
36,109 → 36,10
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_201, (__data_start+0x01) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_203, (__data_start+0x03) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_205, (__data_start+0x05) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_207, (__data_start+0x07) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_209, (__data_start+0x09) |
.set DMEM_20A, (__data_start+0x0A) |
.set DMEM_20B, (__data_start+0x0B) |
.set DMEM_20C, (__data_start+0x0C) |
.set DMEM_20D, (__data_start+0x0D) |
.set DMEM_20E, (__data_start+0x0E) |
.set DMEM_20F, (__data_start+0x0F) |
.set DMEM_210, (__data_start+0x10) |
.set DMEM_211, (__data_start+0x11) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_213, (__data_start+0x13) |
.set DMEM_214, (__data_start+0x14) |
.set DMEM_215, (__data_start+0x15) |
.set DMEM_216, (__data_start+0x16) |
.set DMEM_217, (__data_start+0x17) |
.set DMEM_218, (__data_start+0x18) |
.set DMEM_219, (__data_start+0x19) |
.set DMEM_21A, (__data_start+0x1A) |
.set DMEM_21B, (__data_start+0x1B) |
.set DMEM_21C, (__data_start+0x1C) |
.set DMEM_21D, (__data_start+0x1D) |
.set DMEM_21E, (__data_start+0x1E) |
.set DMEM_21F, (__data_start+0x1F) |
.set DMEM_220, (__data_start+0x20) |
.set DMEM_221, (__data_start+0x21) |
.set DMEM_222, (__data_start+0x22) |
.set DMEM_223, (__data_start+0x23) |
.set DMEM_224, (__data_start+0x24) |
.set DMEM_225, (__data_start+0x25) |
.set DMEM_226, (__data_start+0x26) |
.set DMEM_227, (__data_start+0x27) |
.set DMEM_228, (__data_start+0x28) |
.set DMEM_230, (__data_start+0x30) |
.set DMEM_231, (__data_start+0x31) |
.set DMEM_232, (__data_start+0x32) |
.set DMEM_233, (__data_start+0x33) |
.set DMEM_234, (__data_start+0x34) |
.set DMEM_235, (__data_start+0x35) |
.set DMEM_236, (__data_start+0x36) |
.set DMEM_237, (__data_start+0x37) |
.set DMEM_238, (__data_start+0x38) |
.set DMEM_240, (__data_start+0x40) |
.set DMEM_241, (__data_start+0x41) |
.set DMEM_242, (__data_start+0x42) |
.set DMEM_243, (__data_start+0x43) |
.set DMEM_244, (__data_start+0x44) |
.set DMEM_245, (__data_start+0x45) |
.set DMEM_246, (__data_start+0x46) |
.set DMEM_247, (__data_start+0x47) |
.set DMEM_248, (__data_start+0x48) |
.set DMEM_250, (__data_start+0x50) |
.set DMEM_251, (__data_start+0x51) |
.set DMEM_252, (__data_start+0x52) |
.set DMEM_253, (__data_start+0x53) |
.set DMEM_254, (__data_start+0x54) |
.set DMEM_255, (__data_start+0x55) |
.set DMEM_256, (__data_start+0x56) |
.set DMEM_257, (__data_start+0x57) |
.set DMEM_258, (__data_start+0x58) |
|
.set P1IN, 0x0020 |
.set P1OUT, 0x0021 |
.set P1DIR, 0x0022 |
.set P1IFG, 0x0023 |
.set P1IES, 0x0024 |
.set P1IE, 0x0025 |
.set P1SEL, 0x0026 |
.set P2IN, 0x0028 |
.set P2OUT, 0x0029 |
.set P2DIR, 0x002A |
.set P2IFG, 0x002B |
.set P2IES, 0x002C |
.set P2IE, 0x002D |
.set P2SEL, 0x002E |
.set P3IN, 0x0018 |
.set P3OUT, 0x0019 |
.set P3DIR, 0x001A |
.set P3SEL, 0x001B |
.set P4IN, 0x001C |
.set P4OUT, 0x001D |
.set P4DIR, 0x001E |
.set P4SEL, 0x001F |
.set P5IN, 0x0030 |
.set P5OUT, 0x0031 |
.set P5DIR, 0x0032 |
.set P5SEL, 0x0033 |
.set P6IN, 0x0034 |
.set P6OUT, 0x0035 |
.set P6DIR, 0x0036 |
.set P6SEL, 0x0037 |
|
main: |
/* -------------- PORT 1: TEST RD/WR REGISTER ACCESS --------------- */ |
|
/core/sim/rtl_sim/src/sing-op_reti.s43
34,11 → 34,7
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
.set DMEM_252, (__data_start+0x52) |
.set DMEM_300, (__data_start+0x100) |
.include "pmem_defs.asm" |
|
.global main |
|
/core/sim/rtl_sim/src/lp_modes_asic.s43
45,15 → 45,10
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
|
.set BCSCTL1, 0x0057 |
.set BCSCTL2, 0x0058 |
|
.macro LPM0 |
bis #0x0010, r2 |
.endm |
/core/sim/rtl_sim/src/op_modes_asic.s43
38,16 → 38,10
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
|
.set BCSCTL1, 0x0057 |
.set BCSCTL2, 0x0058 |
|
|
WAIT_FUNC: |
dec r14 |
jnz WAIT_FUNC |
/core/sim/rtl_sim/src/op_modes.s43
37,31 → 37,10
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
|
.set P1IN, 0x0020 |
.set P1OUT, 0x0021 |
.set P1DIR, 0x0022 |
.set P1IFG, 0x0023 |
.set P1IES, 0x0024 |
.set P1IE, 0x0025 |
.set P1SEL, 0x0026 |
.set P2IN, 0x0028 |
.set P2OUT, 0x0029 |
.set P2DIR, 0x002A |
.set P2IFG, 0x002B |
.set P2IES, 0x002C |
.set P2IE, 0x002D |
.set P2SEL, 0x002E |
|
.set BCSCTL1, 0x0057 |
.set BCSCTL2, 0x0058 |
|
|
WAIT_FUNC: |
dec r14 |
jnz WAIT_FUNC |
/core/sim/rtl_sim/src/mpy_basic.s43
38,18 → 38,10
/* $LastChangedDate: 2009-08-04 23:44:12 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set MPY, 0x0130 |
.set MPYS, 0x0132 |
.set MAC, 0x0134 |
.set MACS, 0x0136 |
.set OP2, 0x0138 |
.set RESLO, 0x013A |
.set RESHI, 0x013C |
.set SUMEXT, 0x013E |
|
|
main: |
|
/* -------------- UNSIGNED MULTIPLICATION --------------- */ |
/core/sim/rtl_sim/src/tA_clkmux.s43
35,29 → 35,10
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_250, (__data_start+0x50) |
|
.set BCSCTL1, 0x0057 |
.set BCSCTL2, 0x0058 |
|
.set TACTL, 0x0160 |
.set TAR, 0x0170 |
.set TACCTL0, 0x0162 |
.set TACCR0, 0x0172 |
.set TACCTL1, 0x0164 |
.set TACCR1, 0x0174 |
.set TACCTL2, 0x0166 |
.set TACCR2, 0x0176 |
.set TAIV, 0x012E |
|
|
WAIT_FUNC: |
dec r14 |
jnz WAIT_FUNC |
/core/sim/rtl_sim/src/mpy_mpy.s43
35,20 → 35,10
/* $LastChangedDate: 2009-08-04 23:44:12 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set WDTCTL, 0x0120 |
|
.set MPY, 0x0130 |
.set MPYS, 0x0132 |
.set MAC, 0x0134 |
.set MACS, 0x0136 |
.set OP2, 0x0138 |
.set RESLO, 0x013A |
.set RESHI, 0x013C |
.set SUMEXT, 0x013E |
|
|
main: |
|
/* -------------- UNSIGNED MULTIPLICATION --------------- */ |
/core/sim/rtl_sim/src/clock_module_asic_mclk.s43
35,16 → 35,10
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
|
.set BCSCTL1, 0x0057 |
.set BCSCTL2, 0x0058 |
|
|
WAIT_FUNC: |
dec r14 |
jnz WAIT_FUNC |
/core/sim/rtl_sim/src/cpu_startup_asic.s43
36,16 → 36,10
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
|
.set BCSCTL1, 0x0057 |
.set BCSCTL2, 0x0058 |
|
|
WAIT_FUNC: |
dec r14 |
jnz WAIT_FUNC |
/core/sim/rtl_sim/src/two-op_autoincr-b.s43
34,25 → 34,7
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_20A, (__data_start+0x0A) |
.set DMEM_20C, (__data_start+0x0C) |
.set DMEM_20E, (__data_start+0x0E) |
.set DMEM_210, (__data_start+0x10) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_214, (__data_start+0x14) |
.set DMEM_216, (__data_start+0x16) |
.set DMEM_218, (__data_start+0x18) |
.set DMEM_21A, (__data_start+0x1A) |
.set DMEM_21C, (__data_start+0x1C) |
.set DMEM_21E, (__data_start+0x1E) |
.set DMEM_220, (__data_start+0x20) |
.set DMEM_222, (__data_start+0x22) |
.include "pmem_defs.asm" |
|
.global main |
|
/core/sim/rtl_sim/src/gpio_irq.s43
35,38 → 35,10
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_210, (__data_start+0x10) |
.set DMEM_218, (__data_start+0x18) |
.set DMEM_220, (__data_start+0x20) |
.set DMEM_228, (__data_start+0x28) |
.set DMEM_230, (__data_start+0x30) |
.set DMEM_238, (__data_start+0x38) |
.set DMEM_240, (__data_start+0x40) |
.set DMEM_248, (__data_start+0x48) |
.set DMEM_250, (__data_start+0x50) |
.set DMEM_258, (__data_start+0x58) |
.set DMEM_260, (__data_start+0x60) |
|
.set P1IN, 0x0020 |
.set P1OUT, 0x0021 |
.set P1DIR, 0x0022 |
.set P1IFG, 0x0023 |
.set P1IES, 0x0024 |
.set P1IE, 0x0025 |
.set P1SEL, 0x0026 |
.set P2IN, 0x0028 |
.set P2OUT, 0x0029 |
.set P2DIR, 0x002A |
.set P2IFG, 0x002B |
.set P2IES, 0x002C |
.set P2IE, 0x002D |
.set P2SEL, 0x002E |
|
main: |
; Disable interrupts |
dint |
/core/sim/rtl_sim/src/tA_compare.s43
35,35 → 35,10
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_214, (__data_start+0x14) |
.set DMEM_216, (__data_start+0x16) |
.set DMEM_218, (__data_start+0x18) |
.set DMEM_222, (__data_start+0x22) |
.set DMEM_224, (__data_start+0x24) |
.set DMEM_226, (__data_start+0x26) |
.set DMEM_228, (__data_start+0x28) |
.set DMEM_250, (__data_start+0x50) |
|
.set TACTL, 0x0160 |
.set TAR, 0x0170 |
.set TACCTL0, 0x0162 |
.set TACCR0, 0x0172 |
.set TACCTL1, 0x0164 |
.set TACCR1, 0x0174 |
.set TACCTL2, 0x0166 |
.set TACCR2, 0x0176 |
.set TAIV, 0x012E |
|
|
WAIT_FUNC: |
dec r14 |
jnz WAIT_FUNC |
/core/sim/rtl_sim/src/sing-op_push.s43
34,28 → 34,7
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_214, (__data_start+0x14) |
.set DMEM_215, (__data_start+0x15) |
.set DMEM_216, (__data_start+0x16) |
.set DMEM_218, (__data_start+0x18) |
.set DMEM_21A, (__data_start+0x1A) |
.set DMEM_21C, (__data_start+0x1C) |
.set DMEM_21E, (__data_start+0x1E) |
.set DMEM_220, (__data_start+0x20) |
.set DMEM_221, (__data_start+0x21) |
.set DMEM_222, (__data_start+0x22) |
.set DMEM_224, (__data_start+0x24) |
.set DMEM_225, (__data_start+0x25) |
.set DMEM_228, (__data_start+0x28) |
.set DMEM_22A, (__data_start+0x2A) |
.set DMEM_22C, (__data_start+0x2C) |
.set DMEM_22E, (__data_start+0x2E) |
.set DMEM_250, (__data_start+0x50) |
.set DMEM_252, (__data_start+0x52) |
.set DMEM_300, (__data_start+0x100) |
.include "pmem_defs.asm" |
|
.global main |
|
148,11 → 127,11
mov #DMEM_200, r4 |
mov #0x8765, &DMEM_21E |
mov #0x5555, &DMEM_300 |
push EDE_21E ;# PUSH (0x8765 => @=0x0240) |
push EDE_21E+PMEM_LENGTH ;# PUSH (0x8765 => @=0x0240) |
|
mov #0x4321, &DMEM_220 |
mov #0x5555, &DMEM_300 |
push EDE_220 ;# PUSH (0x4321 => @=0x023E) |
push EDE_220+PMEM_LENGTH ;# PUSH (0x4321 => @=0x023E) |
|
mov #0x6000, r15 |
|
263,11 → 242,11
mov #DMEM_200, r4 |
mov #0xd10e, &DMEM_21E |
mov #0x5555, &DMEM_300 |
push.b EDE_B_21E ;# PUSH (0x0e => @=0x0240) |
push.b EDE_B_21E+PMEM_LENGTH ;# PUSH (0x0e => @=0x0240) |
|
mov #0xfed0, &DMEM_220 |
mov #0x5555, &DMEM_300 |
push.b EDE_B_221 ;# PUSH (0xfe => @=0x023E) |
push.b EDE_B_221+PMEM_LENGTH ;# PUSH (0xfe => @=0x023E) |
|
mov #0xD000, r15 |
|
/core/sim/rtl_sim/src/wdt_clkmux.s43
35,19 → 35,10
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
|
.set BCSCTL1, 0x0057 |
.set BCSCTL2, 0x0058 |
|
.set IE1, 0x0000 |
.set IFG1, 0x0002 |
.set WDTCTL, 0x0120 |
|
WAIT_FUNC: |
dec r14 |
jnz WAIT_FUNC |
/core/sim/rtl_sim/src/sing-op_call.s43
34,16 → 34,7
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_216, (__data_start+0x16) |
.set DMEM_21A, (__data_start+0x1A) |
.set DMEM_21E, (__data_start+0x1E) |
.set DMEM_220, (__data_start+0x20) |
.set DMEM_250, (__data_start+0x50) |
.set DMEM_252, (__data_start+0x52) |
.set DMEM_300, (__data_start+0x100) |
.include "pmem_defs.asm" |
|
.global main |
|
124,7 → 115,7
mov #0x0000, r5 |
mov #TEST_ROUTINE_EDE, &DMEM_21E |
mov #0x5555, &DMEM_300 |
call EDE_21E ;# CALL TEST_ROUTINE_EDE |
call EDE_21E+PMEM_LENGTH ;# CALL TEST_ROUTINE_EDE |
|
mov #0x7000, r15 |
|
/core/sim/rtl_sim/src/mpy_macs.s43
35,20 → 35,10
/* $LastChangedDate: 2009-08-04 23:44:12 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set WDTCTL, 0x0120 |
|
.set MPY, 0x0130 |
.set MPYS, 0x0132 |
.set MAC, 0x0134 |
.set MACS, 0x0136 |
.set OP2, 0x0138 |
.set RESLO, 0x013A |
.set RESHI, 0x013C |
.set SUMEXT, 0x013E |
|
|
main: |
|
/* -------------- SIGNED MULTIPLY ACCUMULATE --------------- */ |
/core/sim/rtl_sim/src/dbg_hwbrk0.s43
35,13 → 35,7
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_250, (__data_start+0x50) |
.include "pmem_defs.asm" |
|
.global main |
|
/core/sim/rtl_sim/src/dbg_hwbrk2.s43
35,13 → 35,7
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_250, (__data_start+0x50) |
.include "pmem_defs.asm" |
|
.global main |
|
/core/sim/rtl_sim/src/sing-op_call_rom-rd.s43
35,16 → 35,7
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_216, (__data_start+0x16) |
.set DMEM_21A, (__data_start+0x1A) |
.set DMEM_21E, (__data_start+0x1E) |
.set DMEM_220, (__data_start+0x20) |
.set DMEM_250, (__data_start+0x50) |
.set DMEM_252, (__data_start+0x52) |
.set DMEM_300, (__data_start+0x100) |
.include "pmem_defs.asm" |
|
.global main |
|
/core/sim/rtl_sim/src/template_periph_16b.s43
35,22 → 35,10
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_20A, (__data_start+0x0A) |
.set DMEM_20C, (__data_start+0x0C) |
.set DMEM_20E, (__data_start+0x0E) |
.set DMEM_210, (__data_start+0x10) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_214, (__data_start+0x14) |
.set DMEM_216, (__data_start+0x16) |
|
.set UNUSED_0, (DMEM_BASE-0x0070-0x0002) |
.set CNTRL1, (DMEM_BASE-0x0070+0x0000) |
.set CNTRL2, (DMEM_BASE-0x0070+0x0002) |
/core/sim/rtl_sim/src/dbg_cpu.s43
35,9 → 35,7
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
.include "pmem_defs.asm" |
|
.global main |
|
/core/sim/rtl_sim/src/sing-op_swpb.s43
34,34 → 34,7
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_209, (__data_start+0x09) |
.set DMEM_20A, (__data_start+0x0A) |
.set DMEM_20B, (__data_start+0x0B) |
.set DMEM_20C, (__data_start+0x0C) |
.set DMEM_20D, (__data_start+0x0D) |
.set DMEM_20E, (__data_start+0x0E) |
.set DMEM_20F, (__data_start+0x0F) |
.set DMEM_210, (__data_start+0x10) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_214, (__data_start+0x14) |
.set DMEM_216, (__data_start+0x16) |
.set DMEM_218, (__data_start+0x18) |
.set DMEM_219, (__data_start+0x19) |
.set DMEM_21A, (__data_start+0x1A) |
.set DMEM_21B, (__data_start+0x1B) |
.set DMEM_21C, (__data_start+0x1C) |
.set DMEM_21D, (__data_start+0x1D) |
.set DMEM_21E, (__data_start+0x1E) |
.set DMEM_21F, (__data_start+0x1F) |
.set DMEM_220, (__data_start+0x20) |
.set DMEM_222, (__data_start+0x22) |
.set DMEM_224, (__data_start+0x24) |
.include "pmem_defs.asm" |
|
.global main |
|
155,13 → 128,13
mov #0x0102, r2 ;# Test 1 |
mov #0x7524, &DMEM_218 |
mov #0xaaaa, &DMEM_21A |
swpb EDE_218 ;# SWPB (mem0c=0x7524 => {mem0c=0x2475) |
swpb EDE_218+PMEM_LENGTH ;# SWPB (mem0c=0x7524 => {mem0c=0x2475) |
mov r2, r5 |
|
mov #0x0005, r2 ;# Test 2 |
mov #0x1cb6, &DMEM_21A |
mov #0xaaaa, &DMEM_21C |
swpb EDE_21A ;# SWPB (mem0d=0x1cb6 => {mem0d=0xb61c) |
swpb EDE_21A+PMEM_LENGTH ;# SWPB (mem0d=0x1cb6 => {mem0d=0xb61c) |
mov r2, r7 |
|
mov #0x5000, r15 |
/core/sim/rtl_sim/src/template_periph_8b.s43
35,18 → 35,10
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_201, (__data_start+0x01) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_203, (__data_start+0x03) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_205, (__data_start+0x05) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_207, (__data_start+0x07) |
|
.set CNTRL1, 0x0090 |
.set CNTRL2, 0x0091 |
.set CNTRL3, 0x0092 |
/core/sim/rtl_sim/src/lp_modes_dbg_asic.s43
45,15 → 45,10
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
|
.set BCSCTL1, 0x0057 |
.set BCSCTL2, 0x0058 |
|
.macro LPM0 |
bis #0x0010, r2 |
.endm |
/core/sim/rtl_sim/src/mpy_mpys.s43
35,20 → 35,10
/* $LastChangedDate: 2009-08-04 23:44:12 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set WDTCTL, 0x0120 |
|
.set MPY, 0x0130 |
.set MPYS, 0x0132 |
.set MAC, 0x0134 |
.set MACS, 0x0136 |
.set OP2, 0x0138 |
.set RESLO, 0x013A |
.set RESHI, 0x013C |
.set SUMEXT, 0x013E |
|
|
main: |
|
/* -------------- SIGNED MULTIPLICATION --------------- */ |
/core/sim/rtl_sim/src/dbg_onoff_asic.s43
35,10 → 35,9
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_250, (__data_start+0x50) |
|
main: |
mov #DMEM_250, r1 ; Initialize stack |
/core/sim/rtl_sim/src/clock_module_asic_smclk.s43
35,16 → 35,10
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
|
.set BCSCTL1, 0x0057 |
.set BCSCTL2, 0x0058 |
|
|
WAIT_FUNC: |
dec r14 |
jnz WAIT_FUNC |
/core/sim/rtl_sim/src/two-op_add.s43
34,58 → 34,7
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_20A, (__data_start+0x0A) |
.set DMEM_20C, (__data_start+0x0C) |
.set DMEM_20E, (__data_start+0x0E) |
.set DMEM_210, (__data_start+0x10) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_214, (__data_start+0x14) |
.set DMEM_216, (__data_start+0x16) |
.set DMEM_218, (__data_start+0x18) |
.set DMEM_21A, (__data_start+0x1A) |
.set DMEM_21C, (__data_start+0x1C) |
.set DMEM_21E, (__data_start+0x1E) |
.set DMEM_220, (__data_start+0x20) |
.set DMEM_222, (__data_start+0x22) |
.set DMEM_224, (__data_start+0x24) |
.set DMEM_226, (__data_start+0x26) |
.set DMEM_228, (__data_start+0x28) |
.set DMEM_22A, (__data_start+0x2A) |
.set DMEM_22C, (__data_start+0x2C) |
.set DMEM_22E, (__data_start+0x2E) |
.set DMEM_230, (__data_start+0x30) |
.set DMEM_232, (__data_start+0x32) |
.set DMEM_234, (__data_start+0x34) |
.set DMEM_236, (__data_start+0x36) |
.set DMEM_238, (__data_start+0x38) |
.set DMEM_23A, (__data_start+0x3A) |
.set DMEM_23C, (__data_start+0x3C) |
.set DMEM_23E, (__data_start+0x3E) |
.set DMEM_240, (__data_start+0x40) |
.set DMEM_250, (__data_start+0x50) |
.set DMEM_252, (__data_start+0x52) |
.set DMEM_254, (__data_start+0x54) |
.set DMEM_256, (__data_start+0x56) |
.set DMEM_258, (__data_start+0x58) |
.set DMEM_25A, (__data_start+0x5A) |
.set DMEM_25C, (__data_start+0x5C) |
.set DMEM_25D, (__data_start+0x5D) |
.set DMEM_25E, (__data_start+0x5E) |
.set DMEM_25F, (__data_start+0x5F) |
.set DMEM_260, (__data_start+0x60) |
.set DMEM_261, (__data_start+0x61) |
.set DMEM_262, (__data_start+0x62) |
.set DMEM_263, (__data_start+0x63) |
.set DMEM_264, (__data_start+0x64) |
.set DMEM_265, (__data_start+0x65) |
.set DMEM_266, (__data_start+0x66) |
.set DMEM_267, (__data_start+0x67) |
.include "pmem_defs.asm" |
|
.global main |
|
131,7 → 80,7
|
mov #0x4444, &DMEM_212 |
mov #0x5678, r7 |
add r7, Rn_EDE ;# Write 0x4444+0x5678=0x9abc to memory @0x0212 |
add r7, Rn_EDE+PMEM_LENGTH ;# Write 0x4444+0x5678=0x9abc to memory @0x0212 |
|
mov #0x5555, &DMEM_214 |
mov #0x1234, r8 |
167,7 → 116,7
mov #0x5f12, &DMEM_200 |
mov #0x8e1c, &DMEM_212 |
mov #DMEM_200, r7 |
add @r7, aRn_EDE ;# Write 0x5f12+0x8e1c=0xed2e to memory @0x0212 |
add @r7, aRn_EDE+PMEM_LENGTH ;# Write 0x5f12+0x8e1c=0xed2e to memory @0x0212 |
|
mov #0x3112, &DMEM_202 |
mov #0x1541, &DMEM_214 |
205,7 → 154,7
mov #0x5f12, &DMEM_206 |
mov #0x8e1c, &DMEM_212 |
mov #DMEM_206, r8 |
add @r8+, aRni_EDE ;# Write 0x5f12+0x8e1c=0xed2e to memory @0x0212 |
add @r8+, aRni_EDE+PMEM_LENGTH ;# Write 0x5f12+0x8e1c=0xed2e to memory @0x0212 |
|
mov #0x3112, &DMEM_202 |
mov #0x1541, &DMEM_214 |
236,7 → 185,7
add #0x5a5a, 48(r6) ;# Write 0x5432+0x5a5a=0xae8c to memory @0x0230 |
|
mov #0x4325, &DMEM_210 |
add #0x1a2b, N_EDE ;# Write 0x4325+0x1a2b=0x5d50 to memory @0x0210 |
add #0x1a2b, N_EDE+PMEM_LENGTH ;# Write 0x4325+0x1a2b=0x5d50 to memory @0x0210 |
|
mov #0x3254, &DMEM_206 |
add #0x3c4d, &N_TONY ;# Write 0x3254+0x3c4d=0x6ea1 to memory @0x0206 |
273,7 → 222,7
mov #0x7238, &DMEM_204 |
mov #0x2143, &DMEM_220 |
mov #DMEM_200, r7 |
add 4(r7), xRn_EDE ;# Write 0x7238+0x2143=0x937b to memory @0x220 |
add 4(r7), xRn_EDE+PMEM_LENGTH ;# Write 0x7238+0x2143=0x937b to memory @0x220 |
|
mov #0x98b2, &DMEM_216 |
mov #0x1432, &DMEM_208 |
296,12 → 245,12
mov #0xc3d6, &DMEM_200 |
mov #0x1234, &DMEM_204 |
mov #0x4321, r4 |
add EDE_200, r4 ;# Write 0xc3d6+0x4321=0x06f7 to R4 |
add EDE_200+PMEM_LENGTH, r4 ;# Write 0xc3d6+0x4321=0x06f7 to R4 |
|
mov #0x000a, &DMEM_202 |
mov #0x1234, &DMEM_204 |
mov #0x3456, r6 |
add EDE_202, r0 |
add EDE_202+PMEM_LENGTH, r0 |
nop |
nop |
nop |
313,17 → 262,17
mov #0xf712, &DMEM_204 |
mov #0x1234, &DMEM_214 |
mov #0x0000, &DMEM_208 |
add EDE_204, 18(r8) ;# Write 0xf712+0x1234=0x0946 to memory @0x214 |
add EDE_204+PMEM_LENGTH, 18(r8) ;# Write 0xf712+0x1234=0x0946 to memory @0x214 |
|
mov #0xb3a9, &DMEM_206 |
mov #0x058a, &DMEM_216 |
mov #0x1234, &DMEM_208 |
add EDE_206, EDE_EDE ;# Write 0xb3a9+0x058a=0xb933 to memory @0x216 |
add EDE_206+PMEM_LENGTH, EDE_EDE+PMEM_LENGTH ;# Write 0xb3a9+0x058a=0xb933 to memory @0x216 |
|
mov #0x837A, &DMEM_208 |
mov #0xA738, &DMEM_212 |
mov #0x1234, &DMEM_20A |
add EDE_208, &EDE_TONY ;# Write 0x837A+0xA738=0x2ab2 to memory @0x212 |
add EDE_208+PMEM_LENGTH, &EDE_TONY ;# Write 0x837A+0xA738=0x2ab2 to memory @0x212 |
|
mov #0x7000, r15 |
|
358,7 → 307,7
mov #0x5c1f, &DMEM_206 |
mov #0x6e2f, &DMEM_218 |
mov #0x1234, &DMEM_208 |
add &DMEM_206, aEDE_EDE ;# Write 0x5c1f+0x6e2f=0xca4e to memory @0x218 |
add &DMEM_206, aEDE_EDE+PMEM_LENGTH ;# Write 0x5c1f+0x6e2f=0xca4e to memory @0x218 |
|
mov #0xc16e, &DMEM_208 |
mov #0x51ca, &DMEM_202 |
427,12 → 376,12
mov #0x7777, &DMEM_226 |
mov #0x8888, &DMEM_228 |
mov #0x9999, &DMEM_22A |
add #0x0000, CONST_EDE0 ;# Move 0x4444+0 to memory @0x220 |
add #0x0001, CONST_EDE1 ;# Move 0x5555+1 to memory @0x222 |
add #0x0002, CONST_EDE2 ;# Move 0x6666+2 to memory @0x224 |
add #0x0004, CONST_EDE4 ;# Move 0x7777+4 to memory @0x226 |
add #0x0008, CONST_EDE8 ;# Move 0x8888+8 to memory @0x228 |
add #0xffff, CONST_EDEm1 ;# Move 0x9999-1 to memory @0x22A |
add #0x0000, CONST_EDE0+PMEM_LENGTH ;# Move 0x4444+0 to memory @0x220 |
add #0x0001, CONST_EDE1+PMEM_LENGTH ;# Move 0x5555+1 to memory @0x222 |
add #0x0002, CONST_EDE2+PMEM_LENGTH ;# Move 0x6666+2 to memory @0x224 |
add #0x0004, CONST_EDE4+PMEM_LENGTH ;# Move 0x7777+4 to memory @0x226 |
add #0x0008, CONST_EDE8+PMEM_LENGTH ;# Move 0x8888+8 to memory @0x228 |
add #0xffff, CONST_EDEm1+PMEM_LENGTH ;# Move 0x9999-1 to memory @0x22A |
|
mov #0x4444, &DMEM_230 ;# Initialize Memory |
mov #0x5555, &DMEM_232 |
/core/sim/rtl_sim/src/clock_module_asic.s43
35,18 → 35,10
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
|
.set BCSCTL1, 0x0057 |
.set BCSCTL2, 0x0058 |
|
.set WDTCTL, 0x0120 |
|
|
WAIT_FUNC: |
dec r14 |
jnz WAIT_FUNC |
/core/sim/rtl_sim/src/wdt_wkup.s43
50,16 → 50,10
/* */ |
/*---------------------------------------------------------------------------*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
|
.set IE1, 0x0000 |
.set IFG1, 0x0002 |
.set WDTCTL, 0x0120 |
|
.macro LPM0 |
bis #0x0010, r2 |
.endm |
/core/sim/rtl_sim/src/two-op_mov.s43
34,58 → 34,7
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_20A, (__data_start+0x0A) |
.set DMEM_20C, (__data_start+0x0C) |
.set DMEM_20E, (__data_start+0x0E) |
.set DMEM_210, (__data_start+0x10) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_214, (__data_start+0x14) |
.set DMEM_216, (__data_start+0x16) |
.set DMEM_218, (__data_start+0x18) |
.set DMEM_21A, (__data_start+0x1A) |
.set DMEM_21C, (__data_start+0x1C) |
.set DMEM_21E, (__data_start+0x1E) |
.set DMEM_220, (__data_start+0x20) |
.set DMEM_222, (__data_start+0x22) |
.set DMEM_224, (__data_start+0x24) |
.set DMEM_226, (__data_start+0x26) |
.set DMEM_228, (__data_start+0x28) |
.set DMEM_22A, (__data_start+0x2A) |
.set DMEM_22C, (__data_start+0x2C) |
.set DMEM_22E, (__data_start+0x2E) |
.set DMEM_230, (__data_start+0x30) |
.set DMEM_232, (__data_start+0x32) |
.set DMEM_234, (__data_start+0x34) |
.set DMEM_236, (__data_start+0x36) |
.set DMEM_238, (__data_start+0x38) |
.set DMEM_23A, (__data_start+0x3A) |
.set DMEM_23C, (__data_start+0x3C) |
.set DMEM_23E, (__data_start+0x3E) |
.set DMEM_240, (__data_start+0x40) |
.set DMEM_250, (__data_start+0x50) |
.set DMEM_252, (__data_start+0x52) |
.set DMEM_254, (__data_start+0x54) |
.set DMEM_256, (__data_start+0x56) |
.set DMEM_258, (__data_start+0x58) |
.set DMEM_25A, (__data_start+0x5A) |
.set DMEM_25C, (__data_start+0x5C) |
.set DMEM_25D, (__data_start+0x5D) |
.set DMEM_25E, (__data_start+0x5E) |
.set DMEM_25F, (__data_start+0x5F) |
.set DMEM_260, (__data_start+0x60) |
.set DMEM_261, (__data_start+0x61) |
.set DMEM_262, (__data_start+0x62) |
.set DMEM_263, (__data_start+0x63) |
.set DMEM_264, (__data_start+0x64) |
.set DMEM_265, (__data_start+0x65) |
.set DMEM_266, (__data_start+0x66) |
.set DMEM_267, (__data_start+0x67) |
.include "pmem_defs.asm" |
|
.global main |
|
125,7 → 74,7
mov #0x1234, r6 |
mov r6, 16(r5) ;# Write 0x1234 to memory @0x0210 |
mov #0x5678, r7 |
mov r7, Rn_EDE ;# Write 0x5678 to memory @0x0200 |
mov r7, Rn_EDE+PMEM_LENGTH ;# Write 0x5678 to memory @0x0200 |
mov #0x9abc, r8 |
mov r8, &Rn_TONY ;# Write 0x9abc to memory @0x0204 |
|
153,7 → 102,7
mov @r6, 16(r5) ;# Move memory @0x204 (0x9abc) to memory @0x210 |
mov #0xfedc, &DMEM_202 |
mov #DMEM_202, r6 |
mov @r6, aRn_EDE ;# Move memory @0x202 (0xfedc) to memory @0x200 |
mov @r6, aRn_EDE+PMEM_LENGTH ;# Move memory @0x202 (0xfedc) to memory @0x200 |
mov #0xf1d2, &DMEM_202 |
mov #DMEM_202, r6 |
mov @r6, &aRn_TONY ;# Move memory @0x202 (0xf1d2) to memory @0x204 |
188,7 → 137,7
mov @r7+, 16(r8) ;# Move memory @0x216 (0xdef0) to memory @0x220 |
|
mov #DMEM_212, r8 |
mov @r8+, aRni_EDE ;# Move memory @0x212 (0x5678) to memory @0x200 |
mov @r8+, aRni_EDE+PMEM_LENGTH ;# Move memory @0x212 (0x5678) to memory @0x200 |
|
mov #DMEM_210, r9 |
mov @r9+, &aRni_TONY ;# Move memory @0x210 (0x1234) to memory @0x214 |
212,7 → 161,7
test_N_PC: |
mov #DMEM_200, r6 |
mov #0x5a5a, 48(r6) ;# Move memory 0x5a5a to memory @0x230 |
mov #0x1a2b, N_EDE ;# Move memory 0x1a2b to memory @0x210 |
mov #0x1a2b, N_EDE+PMEM_LENGTH ;# Move memory 0x1a2b to memory @0x210 |
mov #0x3c4d, &N_TONY ;# Move memory 0x3c4d to memory @0x206 |
|
mov #0x5000, r15 |
247,7 → 196,7
mov #0x7238, &DMEM_204 |
mov #0x1234, &DMEM_200 |
mov #DMEM_200, r7 |
mov 4(r7), xRn_EDE ;# Move memory @0x204 (0x7238) to memory @0x220 |
mov 4(r7), xRn_EDE+PMEM_LENGTH ;# Move memory @0x204 (0x7238) to memory @0x220 |
mov #0x98b2, &DMEM_216 |
mov #0x1234, &DMEM_200 |
mov #DMEM_200, r7 |
270,12 → 219,12
mov #0xc3d6, &DMEM_200 |
mov #0x1234, &DMEM_202 |
mov #0x4321, r4 |
mov EDE_200, r4 ;# Write 0xc3d6 to R4 |
mov EDE_200+PMEM_LENGTH, r4 ;# Write 0xc3d6 to R4 |
|
mov #test_EDE_PC, &DMEM_202 |
mov #0x1234, &DMEM_204 |
mov #0x3456, r6 |
br EDE_202 |
br EDE_202+PMEM_LENGTH |
nop |
nop |
nop |
286,15 → 235,15
mov #DMEM_202, r8 |
mov #0xf712, &DMEM_204 |
mov #0x1234, &DMEM_206 |
mov EDE_204, 18(r8) ;# Move memory @0x204 (0xf712) to memory @0x214 |
mov EDE_204+PMEM_LENGTH, 18(r8) ;# Move memory @0x204 (0xf712) to memory @0x214 |
|
mov #0xb3a9, &DMEM_206 |
mov #0x1234, &DMEM_208 |
mov EDE_206, EDE_EDE ;# Move memory @0x206 (0xb3a9) to memory @0x216 |
mov EDE_206+PMEM_LENGTH, EDE_EDE+PMEM_LENGTH ;# Move memory @0x206 (0xb3a9) to memory @0x216 |
|
mov #0x837A, &DMEM_208 |
mov #0x1234, &DMEM_20A |
mov EDE_208, &EDE_TONY ;# Move memory @0x208 (0x837A) to memory @0x212 |
mov EDE_208+PMEM_LENGTH, &EDE_TONY ;# Move memory @0x208 (0x837A) to memory @0x212 |
|
mov #0x7000, r15 |
|
327,7 → 276,7
|
mov #0x5c1f, &DMEM_206 |
mov #0x1234, &DMEM_208 |
mov &DMEM_206, aEDE_EDE ;# Move memory @0x206 (0x5c1f) to memory @0x218 |
mov &DMEM_206, aEDE_EDE+PMEM_LENGTH ;# Move memory @0x206 (0x5c1f) to memory @0x218 |
|
mov #0xc16e, &DMEM_208 |
mov #0x1234, &DMEM_20A |
376,12 → 325,12
mov #0x0008, 22(r10) ;# Move +8 to memory @0x218 |
mov #0xffff, 24(r10) ;# Move -1 to memory @0x21A |
|
mov #0x0000, CONST_EDE0 ;# Move +0 to memory @0x220 |
mov #0x0001, CONST_EDE1 ;# Move +1 to memory @0x222 |
mov #0x0002, CONST_EDE2 ;# Move +2 to memory @0x224 |
mov #0x0004, CONST_EDE4 ;# Move +4 to memory @0x226 |
mov #0x0008, CONST_EDE8 ;# Move +8 to memory @0x228 |
mov #0xffff, CONST_EDEm1 ;# Move -1 to memory @0x22A |
mov #0x0000, CONST_EDE0+PMEM_LENGTH ;# Move +0 to memory @0x220 |
mov #0x0001, CONST_EDE1+PMEM_LENGTH ;# Move +1 to memory @0x222 |
mov #0x0002, CONST_EDE2+PMEM_LENGTH ;# Move +2 to memory @0x224 |
mov #0x0004, CONST_EDE4+PMEM_LENGTH ;# Move +4 to memory @0x226 |
mov #0x0008, CONST_EDE8+PMEM_LENGTH ;# Move +8 to memory @0x228 |
mov #0xffff, CONST_EDEm1+PMEM_LENGTH ;# Move -1 to memory @0x22A |
|
mov #0x0000, &CONST_TONY0 ;# Move +0 to memory @0x230 |
mov #0x0001, &CONST_TONY1 ;# Move +1 to memory @0x232 |
/core/sim/rtl_sim/src/dbg_halt_irq.s43
35,20 → 35,10
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
|
.set P1IN, 0x0020 |
.set P1OUT, 0x0021 |
.set P1DIR, 0x0022 |
.set P1IFG, 0x0023 |
.set P1IES, 0x0024 |
.set P1IE, 0x0025 |
.set P1SEL, 0x0026 |
|
main: |
; Disable interrupts |
dint |
/core/sim/rtl_sim/src/mpy_mac.s43
35,20 → 35,10
/* $LastChangedDate: 2009-08-04 23:44:12 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set WDTCTL, 0x0120 |
|
.set MPY, 0x0130 |
.set MPYS, 0x0132 |
.set MAC, 0x0134 |
.set MACS, 0x0136 |
.set OP2, 0x0138 |
.set RESLO, 0x013A |
.set RESHI, 0x013C |
.set SUMEXT, 0x013E |
|
|
main: |
|
/* -------------- UNSIGNED MULTIPLY ACCUMULATE --------------- */ |
/core/sim/rtl_sim/src/clock_module_asic_lfxt.s43
35,15 → 35,10
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
|
.set BCSCTL1, 0x0057 |
.set BCSCTL2, 0x0058 |
|
.macro LPM_CUSTOM ; # Stop CPU and LFXT oscillator |
bis #0x0030, r2 |
.endm |
/core/sim/rtl_sim/src/sandbox.s43
35,12 → 35,10
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set BCSCTL1, 0x0057 |
.set BCSCTL2, 0x0058 |
|
|
WAIT_FUNC: |
dec r14 |
jnz WAIT_FUNC |
/core/sim/rtl_sim/src/clock_module.s43
35,16 → 35,10
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
|
.set BCSCTL1, 0x0057 |
.set BCSCTL2, 0x0058 |
|
|
WAIT_FUNC: |
dec r14 |
jnz WAIT_FUNC |
/core/sim/rtl_sim/src/two-op_add-b.s43
34,88 → 34,8
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_201, (__data_start+0x01) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_203, (__data_start+0x03) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_205, (__data_start+0x05) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_207, (__data_start+0x07) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_209, (__data_start+0x09) |
.set DMEM_20A, (__data_start+0x0A) |
.set DMEM_20B, (__data_start+0x0B) |
.set DMEM_20C, (__data_start+0x0C) |
.set DMEM_20D, (__data_start+0x0D) |
.set DMEM_20E, (__data_start+0x0E) |
.set DMEM_20F, (__data_start+0x0F) |
.set DMEM_210, (__data_start+0x10) |
.set DMEM_211, (__data_start+0x11) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_213, (__data_start+0x13) |
.set DMEM_214, (__data_start+0x14) |
.set DMEM_215, (__data_start+0x15) |
.set DMEM_216, (__data_start+0x16) |
.set DMEM_217, (__data_start+0x17) |
.set DMEM_218, (__data_start+0x18) |
.set DMEM_219, (__data_start+0x19) |
.set DMEM_21A, (__data_start+0x1A) |
.set DMEM_21B, (__data_start+0x1B) |
.set DMEM_21C, (__data_start+0x1C) |
.set DMEM_21D, (__data_start+0x1D) |
.set DMEM_21E, (__data_start+0x1E) |
.set DMEM_21F, (__data_start+0x1F) |
.set DMEM_220, (__data_start+0x20) |
.set DMEM_221, (__data_start+0x21) |
.set DMEM_222, (__data_start+0x22) |
.set DMEM_223, (__data_start+0x23) |
.set DMEM_224, (__data_start+0x24) |
.set DMEM_225, (__data_start+0x25) |
.set DMEM_226, (__data_start+0x26) |
.set DMEM_227, (__data_start+0x27) |
.set DMEM_228, (__data_start+0x28) |
.set DMEM_229, (__data_start+0x29) |
.set DMEM_22A, (__data_start+0x2A) |
.set DMEM_22B, (__data_start+0x2B) |
.set DMEM_22C, (__data_start+0x2C) |
.set DMEM_22D, (__data_start+0x2D) |
.set DMEM_22E, (__data_start+0x2E) |
.set DMEM_22F, (__data_start+0x2F) |
.set DMEM_230, (__data_start+0x30) |
.include "pmem_defs.asm" |
|
.set DMEM_232, (__data_start+0x32) |
.set DMEM_234, (__data_start+0x34) |
.set DMEM_236, (__data_start+0x36) |
.set DMEM_238, (__data_start+0x38) |
.set DMEM_23A, (__data_start+0x3A) |
.set DMEM_23C, (__data_start+0x3C) |
.set DMEM_23D, (__data_start+0x3D) |
.set DMEM_23E, (__data_start+0x3E) |
.set DMEM_23F, (__data_start+0x3F) |
.set DMEM_240, (__data_start+0x40) |
.set DMEM_241, (__data_start+0x41) |
.set DMEM_242, (__data_start+0x42) |
.set DMEM_243, (__data_start+0x43) |
.set DMEM_244, (__data_start+0x44) |
.set DMEM_245, (__data_start+0x45) |
.set DMEM_246, (__data_start+0x46) |
.set DMEM_247, (__data_start+0x47) |
|
.set DMEM_250, (__data_start+0x50) |
.set DMEM_252, (__data_start+0x52) |
.set DMEM_254, (__data_start+0x54) |
.set DMEM_256, (__data_start+0x56) |
.set DMEM_258, (__data_start+0x58) |
.set DMEM_25A, (__data_start+0x5A) |
.set DMEM_25D, (__data_start+0x5D) |
.set DMEM_25F, (__data_start+0x5F) |
.set DMEM_261, (__data_start+0x61) |
.set DMEM_263, (__data_start+0x63) |
.set DMEM_265, (__data_start+0x65) |
.set DMEM_267, (__data_start+0x67) |
|
.global main |
|
main: |
157,10 → 77,10
|
mov #0x1122, &DMEM_214 |
mov #0xabcd, r7 |
add.b r7, Rn_EDEL ;# Write 0x22+0xcd=0xef to memory @0x0214 |
add.b r7, Rn_EDEL+PMEM_LENGTH ;# Write 0x22+0xcd=0xef to memory @0x0214 |
mov #0x99aa, &DMEM_216 |
mov #0xef12, r7 |
add.b r7, Rn_EDEH ;# Write 0x99+0x12=0xab to memory @0x0217 |
add.b r7, Rn_EDEH+PMEM_LENGTH ;# Write 0x99+0x12=0xab to memory @0x0217 |
|
mov #0x7788, &DMEM_218 |
mov #0x1f2e, r8 |
222,13 → 142,13
mov #0xd12e, &DMEM_21E |
|
mov #DMEM_200, r8 |
add.b @r8, aRn_EDE_218 ;# Write 0xaa+0xee=0x98 to memory @0x218 |
add.b @r8, aRn_EDE_218+PMEM_LENGTH ;# Write 0xaa+0xee=0x98 to memory @0x218 |
mov #DMEM_202, r8 |
add.b @r8, aRn_EDE_21B ;# Write 0xcc+0x22=0xee to memory @0x21B |
add.b @r8, aRn_EDE_21B+PMEM_LENGTH ;# Write 0xcc+0x22=0xee to memory @0x21B |
mov #DMEM_205, r8 |
add.b @r8, aRn_EDE_21C ;# Write 0xdd+0xe2=0xbf to memory @0x21C |
add.b @r8, aRn_EDE_21C+PMEM_LENGTH ;# Write 0xdd+0xe2=0xbf to memory @0x21C |
mov #DMEM_207, r8 |
add.b @r8, aRn_EDE_21F ;# Write 0xff+0xd1=0xd0 to memory @0x21F |
add.b @r8, aRn_EDE_21F+PMEM_LENGTH ;# Write 0xff+0xd1=0xd0 to memory @0x21F |
|
mov #0x2233, &DMEM_200 |
mov #0x4455, &DMEM_202 |
302,13 → 222,13
mov #0xe1f2, &DMEM_21E |
|
mov #DMEM_200, r10 |
add.b @r10+, aRni_EDE_218 ;# Write 0xaa+0x22=0xcc to memory @0x218 |
add.b @r10+, aRni_EDE_218+PMEM_LENGTH ;# Write 0xaa+0x22=0xcc to memory @0x218 |
mov.b @r10+, r11 |
add.b @r10+, aRni_EDE_21B ;# Write 0xcc+0xee=0xba to memory @0x21B |
add.b @r10+, aRni_EDE_21B+PMEM_LENGTH ;# Write 0xcc+0xee=0xba to memory @0x21B |
mov @r10+, r11 |
add.b @r10+, aRni_EDE_21C ;# Write 0xdd+0x2f=0x0c to memory @0x21C |
add.b @r10+, aRni_EDE_21C+PMEM_LENGTH ;# Write 0xdd+0x2f=0x0c to memory @0x21C |
mov.b @r10+, r11 |
add.b @r10+, aRni_EDE_21F ;# Write 0xff+0xe1=0xe0 to memory @0x21F |
add.b @r10+, aRni_EDE_21F+PMEM_LENGTH ;# Write 0xff+0xe1=0xe0 to memory @0x21F |
|
mov #0x2233, &DMEM_200 |
mov #0x4455, &DMEM_202 |
361,10 → 281,10
mov #0xeecc, &DMEM_21A |
mov #0x1e2c, &DMEM_21C |
mov #0xe1c2, &DMEM_21E |
add.b #0x99aa, N_EDE_218 ;# Write 0xaa+0x22=0xcc to memory @0x218 |
add.b #0xbbcc, N_EDE_21B ;# Write 0xcc+0xee=0xba to memory @0x21B |
add.b #0xddee, N_EDE_21C ;# Write 0xee+0x2c=0x1a to memory @0x21C |
add.b #0xff11, N_EDE_21F ;# Write 0x11+0xe1=0xf2 to memory @0x21F |
add.b #0x99aa, N_EDE_218+PMEM_LENGTH ;# Write 0xaa+0x22=0xcc to memory @0x218 |
add.b #0xbbcc, N_EDE_21B+PMEM_LENGTH ;# Write 0xcc+0xee=0xba to memory @0x21B |
add.b #0xddee, N_EDE_21C+PMEM_LENGTH ;# Write 0xee+0x2c=0x1a to memory @0x21C |
add.b #0xff11, N_EDE_21F+PMEM_LENGTH ;# Write 0x11+0xe1=0xf2 to memory @0x21F |
|
mov #0xaa88, &DMEM_220 |
mov #0x22ee, &DMEM_222 |
425,10 → 345,10
mov #0x73c4, &DMEM_21E |
|
mov #DMEM_200, r8 |
add.b 2(r8), xRn_EDE_218 ;# Write 0xaa+0x44=0xee to memory @0x218 |
add.b 4(r8), xRn_EDE_21B ;# Write 0xcc+0x77=0x43 to memory @0x21B |
add.b 7(r8), xRn_EDE_21C ;# Write 0xdd+0x4c=0x29 to memory @0x21C |
add.b 9(r8), xRn_EDE_21F ;# Write 0xff+0x73=0x72 to memory @0x21F |
add.b 2(r8), xRn_EDE_218+PMEM_LENGTH ;# Write 0xaa+0x44=0xee to memory @0x218 |
add.b 4(r8), xRn_EDE_21B+PMEM_LENGTH ;# Write 0xcc+0x77=0x43 to memory @0x21B |
add.b 7(r8), xRn_EDE_21C+PMEM_LENGTH ;# Write 0xdd+0x4c=0x29 to memory @0x21C |
add.b 9(r8), xRn_EDE_21F+PMEM_LENGTH ;# Write 0xff+0x73=0x72 to memory @0x21F |
|
mov #0x2233, &DMEM_202 |
mov #0x4455, &DMEM_204 |
469,10 → 389,10
|
mov #0x2233, &DMEM_210 |
mov #0xcb43, r5 |
add.b EDE_EDE_210, r5 ;# Write 0x33+0x43=0x76 to r5 |
add.b EDE_EDE_210+PMEM_LENGTH, r5 ;# Write 0x33+0x43=0x76 to r5 |
mov #0x4455, &DMEM_212 |
mov #0x32a5, r6 |
add.b EDE_EDE_213, r6 ;# Write 0x44+0xa5=0xe9 to r6 |
add.b EDE_EDE_213+PMEM_LENGTH, r6 ;# Write 0x44+0xa5=0xe9 to r6 |
|
mov #0x1122, &DMEM_202 |
mov #0x3344, &DMEM_204 |
484,10 → 404,10
mov #0xa6b5, &DMEM_214 |
mov #0x6a5b, &DMEM_216 |
|
add.b EDE_EDE_202, 16(r7) ;# Write 0x22+0xbb=0xdd to memory @0x210 |
add.b EDE_EDE_204, 19(r7) ;# Write 0x44+0x66=0xaa to memory @0x213 |
add.b EDE_EDE_207, 20(r7) ;# Write 0x55+0xb5=0x0a to memory @0x214 |
add.b EDE_EDE_209, 23(r7) ;# Write 0x77+0x6a=0xe1 to memory @0x217 |
add.b EDE_EDE_202+PMEM_LENGTH, 16(r7) ;# Write 0x22+0xbb=0xdd to memory @0x210 |
add.b EDE_EDE_204+PMEM_LENGTH, 19(r7) ;# Write 0x44+0x66=0xaa to memory @0x213 |
add.b EDE_EDE_207+PMEM_LENGTH, 20(r7) ;# Write 0x55+0xb5=0x0a to memory @0x214 |
add.b EDE_EDE_209+PMEM_LENGTH, 23(r7) ;# Write 0x77+0x6a=0xe1 to memory @0x217 |
|
mov #0x99aa, &DMEM_202 |
mov #0xbbcc, &DMEM_204 |
498,10 → 418,10
mov #0x1e2f, &DMEM_21C |
mov #0xe1f2, &DMEM_21E |
|
add.b EDE_EDE_202, EDE_EDE_218 ;# Write 0xaa+0x22=0xcc to memory @0x218 |
add.b EDE_EDE_204, EDE_EDE_21B ;# Write 0xcc+0xee=0xba to memory @0x21B |
add.b EDE_EDE_207, EDE_EDE_21C ;# Write 0xdd+0x2f=0x0c to memory @0x21C |
add.b EDE_EDE_209, EDE_EDE_21F ;# Write 0xff+0xe1=0xe0 to memory @0x21F |
add.b EDE_EDE_202+PMEM_LENGTH, EDE_EDE_218+PMEM_LENGTH ;# Write 0xaa+0x22=0xcc to memory @0x218 |
add.b EDE_EDE_204+PMEM_LENGTH, EDE_EDE_21B+PMEM_LENGTH ;# Write 0xcc+0xee=0xba to memory @0x21B |
add.b EDE_EDE_207+PMEM_LENGTH, EDE_EDE_21C+PMEM_LENGTH ;# Write 0xdd+0x2f=0x0c to memory @0x21C |
add.b EDE_EDE_209+PMEM_LENGTH, EDE_EDE_21F+PMEM_LENGTH ;# Write 0xff+0xe1=0xe0 to memory @0x21F |
|
mov #0x2233, &DMEM_202 |
mov #0x4455, &DMEM_204 |
513,10 → 433,10
mov #0x2c3d, &DMEM_224 |
mov #0xc2d3, &DMEM_226 |
|
add.b EDE_EDE_202, &EDE_TONY_220 ;# Write 0x33+0x07=0x3a to memory @0x220 |
add.b EDE_EDE_204, &EDE_TONY_223 ;# Write 0x55+0xcc=0x21 to memory @0x223 |
add.b EDE_EDE_207, &EDE_TONY_224 ;# Write 0x66+0x3d=0xa3 to memory @0x224 |
add.b EDE_EDE_209, &EDE_TONY_227 ;# Write 0x88+0xc2=0x4a to memory @0x227 |
add.b EDE_EDE_202+PMEM_LENGTH, &EDE_TONY_220 ;# Write 0x33+0x07=0x3a to memory @0x220 |
add.b EDE_EDE_204+PMEM_LENGTH, &EDE_TONY_223 ;# Write 0x55+0xcc=0x21 to memory @0x223 |
add.b EDE_EDE_207+PMEM_LENGTH, &EDE_TONY_224 ;# Write 0x66+0x3d=0xa3 to memory @0x224 |
add.b EDE_EDE_209+PMEM_LENGTH, &EDE_TONY_227 ;# Write 0x88+0xc2=0x4a to memory @0x227 |
|
mov #0x7000, r15 |
|
564,10 → 484,10
mov #0x1627, &DMEM_21C |
mov #0x6172, &DMEM_21E |
|
add.b &DMEM_202, aEDE_EDE_218 ;# Write 0xaa+0x22=0xcc to memory @0x218 |
add.b &DMEM_204, aEDE_EDE_21B ;# Write 0xcc+0x66=0x32 to memory @0x21B |
add.b &DMEM_207, aEDE_EDE_21C ;# Write 0xdd+0x27=0x04 to memory @0x21C |
add.b &DMEM_209, aEDE_EDE_21F ;# Write 0xff+0x61=0x60 to memory @0x21F |
add.b &DMEM_202, aEDE_EDE_218+PMEM_LENGTH ;# Write 0xaa+0x22=0xcc to memory @0x218 |
add.b &DMEM_204, aEDE_EDE_21B+PMEM_LENGTH ;# Write 0xcc+0x66=0x32 to memory @0x21B |
add.b &DMEM_207, aEDE_EDE_21C+PMEM_LENGTH ;# Write 0xdd+0x27=0x04 to memory @0x21C |
add.b &DMEM_209, aEDE_EDE_21F+PMEM_LENGTH ;# Write 0xff+0x61=0x60 to memory @0x21F |
|
mov #0x2233, &DMEM_202 |
mov #0x4455, &DMEM_204 |
669,18 → 589,18
mov #0xee55, &DMEM_244 |
mov #0x3355, &DMEM_246 |
|
add.b #0x0000, CONSTL_EDE0 ;# Move +0 to memory @0x230 |
add.b #0x0001, CONSTL_EDE1 ;# Move +1 to memory @0x232 |
add.b #0x0002, CONSTL_EDE2 ;# Move +2 to memory @0x234 |
add.b #0x0004, CONSTL_EDE4 ;# Move +4 to memory @0x236 |
add.b #0x0008, CONSTL_EDE8 ;# Move +8 to memory @0x238 |
add.b #0xffff, CONSTL_EDEm1 ;# Move -1 to memory @0x23A |
add.b #0x0000, CONSTH_EDE0 ;# Move +0 to memory @0x23D |
add.b #0x0001, CONSTH_EDE1 ;# Move +1 to memory @0x23F |
add.b #0x0002, CONSTH_EDE2 ;# Move +2 to memory @0x241 |
add.b #0x0004, CONSTH_EDE4 ;# Move +4 to memory @0x243 |
add.b #0x0008, CONSTH_EDE8 ;# Move +8 to memory @0x245 |
add.b #0xffff, CONSTH_EDEm1 ;# Move -1 to memory @0x247 |
add.b #0x0000, CONSTL_EDE0+PMEM_LENGTH ;# Move +0 to memory @0x230 |
add.b #0x0001, CONSTL_EDE1+PMEM_LENGTH ;# Move +1 to memory @0x232 |
add.b #0x0002, CONSTL_EDE2+PMEM_LENGTH ;# Move +2 to memory @0x234 |
add.b #0x0004, CONSTL_EDE4+PMEM_LENGTH ;# Move +4 to memory @0x236 |
add.b #0x0008, CONSTL_EDE8+PMEM_LENGTH ;# Move +8 to memory @0x238 |
add.b #0xffff, CONSTL_EDEm1+PMEM_LENGTH ;# Move -1 to memory @0x23A |
add.b #0x0000, CONSTH_EDE0+PMEM_LENGTH ;# Move +0 to memory @0x23D |
add.b #0x0001, CONSTH_EDE1+PMEM_LENGTH ;# Move +1 to memory @0x23F |
add.b #0x0002, CONSTH_EDE2+PMEM_LENGTH ;# Move +2 to memory @0x241 |
add.b #0x0004, CONSTH_EDE4+PMEM_LENGTH ;# Move +4 to memory @0x243 |
add.b #0x0008, CONSTH_EDE8+PMEM_LENGTH ;# Move +8 to memory @0x245 |
add.b #0xffff, CONSTH_EDEm1+PMEM_LENGTH ;# Move -1 to memory @0x247 |
|
|
# |
/core/sim/rtl_sim/src/dbg_uart_sync.s43
36,9 → 36,7
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
.include "pmem_defs.asm" |
|
.global main |
|
/core/sim/rtl_sim/src/dbg_onoff.s43
35,11 → 35,10
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_250, (__data_start+0x50) |
|
main: |
mov #DMEM_250, r1 ; Initialize stack |
mov #0x0000, r15 |
/core/sim/rtl_sim/src/sfr.s43
34,20 → 34,10
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
|
.set IE1, 0x0000 |
.set IE1_HI, 0x0001 |
.set IFG1, 0x0002 |
.set IFG1_HI, 0x0003 |
.set CPU_ID_LO, 0x0004 |
.set CPU_ID_HI, 0x0006 |
.set WDTCTL, 0x0120 |
|
main: |
|
/* ------- NMI ------ */ |
/core/sim/rtl_sim/src/dbg_rdwr.s43
36,9 → 36,7
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
.include "pmem_defs.asm" |
|
.global main |
|
/core/sim/rtl_sim/src/sing-op_push_rom-rd.s43
35,22 → 35,8
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_216, (__data_start+0x16) |
.set DMEM_21A, (__data_start+0x1A) |
.set DMEM_21E, (__data_start+0x1E) |
.set DMEM_220, (__data_start+0x20) |
.set DMEM_222, (__data_start+0x22) |
.set DMEM_224, (__data_start+0x24) |
.set DMEM_230, (__data_start+0x30) |
.set DMEM_240, (__data_start+0x40) |
.set DMEM_250, (__data_start+0x50) |
.set DMEM_252, (__data_start+0x52) |
.set DMEM_300, (__data_start+0x100) |
.include "pmem_defs.asm" |
|
|
.global main |
|
main: |
/core/sim/rtl_sim/src/dbg_hwbrk1.s43
35,13 → 35,7
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_250, (__data_start+0x50) |
.include "pmem_defs.asm" |
|
.global main |
|
/core/sim/rtl_sim/src/dbg_hwbrk3.s43
35,13 → 35,7
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_250, (__data_start+0x50) |
.include "pmem_defs.asm" |
|
.global main |
|
/core/sim/rtl_sim/src/two-op_add_rom-rd.s43
35,25 → 35,7
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_20A, (__data_start+0x0A) |
.set DMEM_20C, (__data_start+0x0C) |
.set DMEM_20E, (__data_start+0x0E) |
.set DMEM_210, (__data_start+0x10) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_214, (__data_start+0x14) |
.set DMEM_216, (__data_start+0x16) |
.set DMEM_218, (__data_start+0x18) |
.set DMEM_21A, (__data_start+0x1A) |
.set DMEM_21C, (__data_start+0x1C) |
.set DMEM_21E, (__data_start+0x1E) |
.set DMEM_220, (__data_start+0x20) |
|
.include "pmem_defs.asm" |
|
.global main |
|
82,7 → 64,7
|
mov #0x8e1c, &DMEM_212 |
mov #data_aRn_0x5f12, r7 |
add @r7, aRn_EDE ;# Write 0x5f12+0x8e1c=0xed2e to memory @0x0212 |
add @r7, aRn_EDE+PMEM_LENGTH ;# Write 0x5f12+0x8e1c=0xed2e to memory @0x0212 |
|
mov #0x1541, &DMEM_214 |
mov #data_aRn_0x3112, r8 |
126,8 → 108,8
|
mov #0x8e1c, &DMEM_212 |
mov #data_aRni_0x5f12, r8 |
add @r8+, aRni_EDE ;# Write 0x5f12+0x8e1c=0xed2e to memory @0x0212 |
add @r8+, aRni_EDE ;# Write 0x6345+0xed2e=0x5073 to memory @0x0212 |
add @r8+, aRni_EDE+PMEM_LENGTH ;# Write 0x5f12+0x8e1c=0xed2e to memory @0x0212 |
add @r8+, aRni_EDE+PMEM_LENGTH ;# Write 0x6345+0xed2e=0x5073 to memory @0x0212 |
|
mov #0x1541, &DMEM_214 |
mov #data_aRni_0x3112, r9 |
162,7 → 144,7
|
mov #0x2143, &DMEM_220 |
mov #data_xRn_0x7238, r7 |
add 4(r7), xRn_EDE ;# Write 0x7238+0x2143=0x937b to memory @0x220 |
add 4(r7), xRn_EDE+PMEM_LENGTH ;# Write 0x7238+0x2143=0x937b to memory @0x220 |
|
mov #0x1432, &DMEM_208 |
mov #data_xRn_0x98b2, r4 |
195,7 → 177,7
|
mov #0x058a, &DMEM_216 |
mov #0x1234, &DMEM_208 |
add data_EDE_0xb3a9, EDE_EDE ;# Write 0xb3a9+0x058a=0xb933 to memory @0x216 |
add data_EDE_0xb3a9, EDE_EDE+PMEM_LENGTH ;# Write 0xb3a9+0x058a=0xb933 to memory @0x216 |
|
mov #0xA738, &DMEM_212 |
mov #0x1234, &DMEM_20A |
228,7 → 210,7
|
mov #0x6e2f, &DMEM_218 |
mov #0x1234, &DMEM_208 |
add &data_aEDE_0x5c1f, aEDE_EDE ;# Write 0x5c1f+0x6e2f=0xca4e to memory @0x218 |
add &data_aEDE_0x5c1f, aEDE_EDE+PMEM_LENGTH ;# Write 0x5c1f+0x6e2f=0xca4e to memory @0x218 |
|
mov #0x51ca, &DMEM_202 |
mov #0x1234, &DMEM_20A |
/core/sim/rtl_sim/src/wdt_watchdog.s43
35,21 → 35,10
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_250, (__data_start+0x50) |
|
.set IE1, 0x0000 |
.set IFG1, 0x0002 |
.set WDTCTL, 0x0120 |
|
|
main: |
|
/* -------------- WATCHDOG TEST: STARTUP SEQUENCE --------------- */ |
/core/sim/rtl_sim/src/sing-op_rra.s43
34,64 → 34,7
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_209, (__data_start+0x09) |
.set DMEM_20A, (__data_start+0x0A) |
.set DMEM_20B, (__data_start+0x0B) |
.set DMEM_20C, (__data_start+0x0C) |
.set DMEM_20D, (__data_start+0x0D) |
.set DMEM_20E, (__data_start+0x0E) |
.set DMEM_20F, (__data_start+0x0F) |
.set DMEM_210, (__data_start+0x10) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_214, (__data_start+0x14) |
.set DMEM_216, (__data_start+0x16) |
.set DMEM_218, (__data_start+0x18) |
.set DMEM_219, (__data_start+0x19) |
.set DMEM_21A, (__data_start+0x1A) |
.set DMEM_21B, (__data_start+0x1B) |
.set DMEM_21C, (__data_start+0x1C) |
.set DMEM_21D, (__data_start+0x1D) |
.set DMEM_21E, (__data_start+0x1E) |
.set DMEM_21F, (__data_start+0x1F) |
.set DMEM_220, (__data_start+0x20) |
.set DMEM_222, (__data_start+0x22) |
.set DMEM_224, (__data_start+0x24) |
.set DMEM_226, (__data_start+0x26) |
.set DMEM_228, (__data_start+0x28) |
.set DMEM_22A, (__data_start+0x2A) |
.set DMEM_22C, (__data_start+0x2C) |
.set DMEM_22E, (__data_start+0x2E) |
.set DMEM_230, (__data_start+0x30) |
.set DMEM_232, (__data_start+0x32) |
.set DMEM_234, (__data_start+0x34) |
.set DMEM_236, (__data_start+0x36) |
.set DMEM_238, (__data_start+0x38) |
.set DMEM_239, (__data_start+0x39) |
.set DMEM_23A, (__data_start+0x3A) |
.set DMEM_23B, (__data_start+0x3B) |
.set DMEM_23C, (__data_start+0x3C) |
.set DMEM_23D, (__data_start+0x3D) |
.set DMEM_23E, (__data_start+0x3E) |
.set DMEM_23F, (__data_start+0x3F) |
.set DMEM_240, (__data_start+0x40) |
.set DMEM_242, (__data_start+0x42) |
.set DMEM_244, (__data_start+0x44) |
.set DMEM_246, (__data_start+0x46) |
.set DMEM_248, (__data_start+0x48) |
.set DMEM_249, (__data_start+0x49) |
.set DMEM_24A, (__data_start+0x4A) |
.set DMEM_24B, (__data_start+0x4B) |
.set DMEM_24C, (__data_start+0x4C) |
.set DMEM_24D, (__data_start+0x4D) |
.set DMEM_24E, (__data_start+0x4E) |
.set DMEM_24F, (__data_start+0x4F) |
.set DMEM_250, (__data_start+0x50) |
.include "pmem_defs.asm" |
|
.global main |
|
237,25 → 180,25
mov #0x0001, r2 ;# Test 1 |
mov #0x7332, &DMEM_218 |
mov #0xaaaa, &DMEM_21A |
rra EDE_218 ;# RRA ({mem0c=0x7332} => {mem0c=0x3999, C=0}) |
rra EDE_218+PMEM_LENGTH ;# RRA ({mem0c=0x7332} => {mem0c=0x3999, C=0}) |
mov r2, r5 |
|
mov #0x0001, r2 ;# Test 2 |
mov #0x7333, &DMEM_21A |
mov #0xaaaa, &DMEM_21C |
rra EDE_21A ;# RRA ({mem0d=0x7333} => {mem0d=0x3999, C=1}) |
rra EDE_21A+PMEM_LENGTH ;# RRA ({mem0d=0x7333} => {mem0d=0x3999, C=1}) |
mov r2, r7 |
|
mov #0x0000, r2 ;# Test 3 |
mov #0x8332, &DMEM_21C |
mov #0xaaaa, &DMEM_21E |
rra EDE_21C ;# RRA ({mem0e=0x8332} => {mem0e=0xc199, C=0}) |
rra EDE_21C+PMEM_LENGTH ;# RRA ({mem0e=0x8332} => {mem0e=0xc199, C=0}) |
mov r2, r9 |
|
mov #0x0000, r2 ;# Test 4 |
mov #0x8333, &DMEM_21E |
mov #0xaaaa, &DMEM_220 |
rra EDE_21E ;# RRA ({mem0f=0x8333} => {mem0f=0xc199, C=1}) |
rra EDE_21E+PMEM_LENGTH ;# RRA ({mem0f=0x8333} => {mem0f=0xc199, C=1}) |
mov r2, r11 |
|
mov #0x5000, r15 |
546,25 → 489,25
mov #0x0001, r2 ;# Test 1 |
mov #0x2572, &DMEM_230 |
mov #0xaaaa, &DMEM_232 |
rra.b EDE_230 ;# RRA ({mem18=0x2572} => {mem18=0x2539, C=0}) |
rra.b EDE_230+PMEM_LENGTH ;# RRA ({mem18=0x2572} => {mem18=0x2539, C=0}) |
mov r2, r5 |
|
mov #0x0001, r2 ;# Test 2 |
mov #0x2573, &DMEM_232 |
mov #0xaaaa, &DMEM_234 |
rra.b EDE_232 ;# RRA ({mem19=0x2573} => {mem19=0x2539, C=1}) |
rra.b EDE_232+PMEM_LENGTH ;# RRA ({mem19=0x2573} => {mem19=0x2539, C=1}) |
mov r2, r7 |
|
mov #0x0000, r2 ;# Test 3 |
mov #0x2582, &DMEM_234 |
mov #0xaaaa, &DMEM_236 |
rra.b EDE_234 ;# RRA ({mem1a=0x2582} => {mem1a=0x25c1, C=0}) |
rra.b EDE_234+PMEM_LENGTH ;# RRA ({mem1a=0x2582} => {mem1a=0x25c1, C=0}) |
mov r2, r9 |
|
mov #0x0000, r2 ;# Test 4 |
mov #0x2583, &DMEM_236 |
mov #0xaaaa, &DMEM_238 |
rra.b EDE_236 ;# RRA ({mem1b=0x2583} => {mem1b=0x25c1, C=1}) |
rra.b EDE_236+PMEM_LENGTH ;# RRA ({mem1b=0x2583} => {mem1b=0x25c1, C=1}) |
mov r2, r11 |
|
mov #0xC000, r15 |
579,25 → 522,25
mov #0x0001, r2 ;# Test 1 |
mov #0x7225, &DMEM_238 |
mov #0xaaaa, &DMEM_23A |
rra.b EDE_239 ;# RRA ({mem1c=0x7225} => {mem1c=0x3925, C=0}) |
rra.b EDE_239+PMEM_LENGTH ;# RRA ({mem1c=0x7225} => {mem1c=0x3925, C=0}) |
mov r2, r5 |
|
mov #0x0001, r2 ;# Test 2 |
mov #0x7325, &DMEM_23A |
mov #0xaaaa, &DMEM_23C |
rra.b EDE_23B ;# RRA ({mem1d=0x7325} => {mem1d=0x3925, C=1}) |
rra.b EDE_23B+PMEM_LENGTH ;# RRA ({mem1d=0x7325} => {mem1d=0x3925, C=1}) |
mov r2, r7 |
|
mov #0x0000, r2 ;# Test 3 |
mov #0x8225, &DMEM_23C |
mov #0xaaaa, &DMEM_23E |
rra.b EDE_23D ;# RRA ({mem1e=0x8225} => {mem1e=0xc125, C=0}) |
rra.b EDE_23D+PMEM_LENGTH ;# RRA ({mem1e=0x8225} => {mem1e=0xc125, C=0}) |
mov r2, r9 |
|
mov #0x0000, r2 ;# Test 4 |
mov #0x8325, &DMEM_23E |
mov #0xaaaa, &DMEM_240 |
rra.b EDE_23F ;# RRA ({mem1f=0x8325} => {mem1f=0xc125, C=1}) |
rra.b EDE_23F+PMEM_LENGTH ;# RRA ({mem1f=0x8325} => {mem1f=0xc125, C=1}) |
mov r2, r11 |
|
mov #0xC001, r15 |
/core/sim/rtl_sim/src/sing-op_rrc.s43
34,64 → 34,7
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_208, (__data_start+0x08) |
.set DMEM_209, (__data_start+0x09) |
.set DMEM_20A, (__data_start+0x0A) |
.set DMEM_20B, (__data_start+0x0B) |
.set DMEM_20C, (__data_start+0x0C) |
.set DMEM_20D, (__data_start+0x0D) |
.set DMEM_20E, (__data_start+0x0E) |
.set DMEM_20F, (__data_start+0x0F) |
.set DMEM_210, (__data_start+0x10) |
.set DMEM_212, (__data_start+0x12) |
.set DMEM_214, (__data_start+0x14) |
.set DMEM_216, (__data_start+0x16) |
.set DMEM_218, (__data_start+0x18) |
.set DMEM_219, (__data_start+0x19) |
.set DMEM_21A, (__data_start+0x1A) |
.set DMEM_21B, (__data_start+0x1B) |
.set DMEM_21C, (__data_start+0x1C) |
.set DMEM_21D, (__data_start+0x1D) |
.set DMEM_21E, (__data_start+0x1E) |
.set DMEM_21F, (__data_start+0x1F) |
.set DMEM_220, (__data_start+0x20) |
.set DMEM_222, (__data_start+0x22) |
.set DMEM_224, (__data_start+0x24) |
.set DMEM_226, (__data_start+0x26) |
.set DMEM_228, (__data_start+0x28) |
.set DMEM_22A, (__data_start+0x2A) |
.set DMEM_22C, (__data_start+0x2C) |
.set DMEM_22E, (__data_start+0x2E) |
.set DMEM_230, (__data_start+0x30) |
.set DMEM_232, (__data_start+0x32) |
.set DMEM_234, (__data_start+0x34) |
.set DMEM_236, (__data_start+0x36) |
.set DMEM_238, (__data_start+0x38) |
.set DMEM_239, (__data_start+0x39) |
.set DMEM_23A, (__data_start+0x3A) |
.set DMEM_23B, (__data_start+0x3B) |
.set DMEM_23C, (__data_start+0x3C) |
.set DMEM_23D, (__data_start+0x3D) |
.set DMEM_23E, (__data_start+0x3E) |
.set DMEM_23F, (__data_start+0x3F) |
.set DMEM_240, (__data_start+0x40) |
.set DMEM_242, (__data_start+0x42) |
.set DMEM_244, (__data_start+0x44) |
.set DMEM_246, (__data_start+0x46) |
.set DMEM_248, (__data_start+0x48) |
.set DMEM_249, (__data_start+0x49) |
.set DMEM_24A, (__data_start+0x4A) |
.set DMEM_24B, (__data_start+0x4B) |
.set DMEM_24C, (__data_start+0x4C) |
.set DMEM_24D, (__data_start+0x4D) |
.set DMEM_24E, (__data_start+0x4E) |
.set DMEM_24F, (__data_start+0x4F) |
.set DMEM_250, (__data_start+0x50) |
.include "pmem_defs.asm" |
|
.global main |
|
237,25 → 180,25
mov #0x0000, r2 ;# Test 1 |
mov #0x3332, &DMEM_218 |
mov #0xaaaa, &DMEM_21A |
rrc EDE_218 ;# RRC ({C=0, mem0c=0x3332} => {mem0c=0x1999, C=0}) |
rrc EDE_218+PMEM_LENGTH ;# RRC ({C=0, mem0c=0x3332} => {mem0c=0x1999, C=0}) |
mov r2, r5 |
|
mov #0x0000, r2 ;# Test 2 |
mov #0x3333, &DMEM_21A |
mov #0xaaaa, &DMEM_21C |
rrc EDE_21A ;# RRC ({C=0, mem0d=0x3333} => {mem0d=0x1999, C=1}) |
rrc EDE_21A+PMEM_LENGTH ;# RRC ({C=0, mem0d=0x3333} => {mem0d=0x1999, C=1}) |
mov r2, r7 |
|
mov #0x0001, r2 ;# Test 3 |
mov #0x3332, &DMEM_21C |
mov #0xaaaa, &DMEM_21E |
rrc EDE_21C ;# RRC ({C=1, mem0e=0x3332} => {mem0e=0x9999, C=0}) |
rrc EDE_21C+PMEM_LENGTH ;# RRC ({C=1, mem0e=0x3332} => {mem0e=0x9999, C=0}) |
mov r2, r9 |
|
mov #0x0001, r2 ;# Test 4 |
mov #0x3333, &DMEM_21E |
mov #0xaaaa, &DMEM_220 |
rrc EDE_21E ;# RRC ({C=1, mem0f=0x3333} => {mem0f=0x9999, C=1}) |
rrc EDE_21E+PMEM_LENGTH ;# RRC ({C=1, mem0f=0x3333} => {mem0f=0x9999, C=1}) |
mov r2, r11 |
|
mov #0x5000, r15 |
546,25 → 489,25
mov #0x0000, r2 ;# Test 1 |
mov #0x2532, &DMEM_230 |
mov #0xaaaa, &DMEM_232 |
rrc.b EDE_230 ;# RRC ({C=0, mem18=0x2532} => {mem18=0x2519, C=0}) |
rrc.b EDE_230+PMEM_LENGTH ;# RRC ({C=0, mem18=0x2532} => {mem18=0x2519, C=0}) |
mov r2, r5 |
|
mov #0x0000, r2 ;# Test 2 |
mov #0x2533, &DMEM_232 |
mov #0xaaaa, &DMEM_234 |
rrc.b EDE_232 ;# RRC ({C=0, mem19=0x2533} => {mem19=0x2519, C=1}) |
rrc.b EDE_232+PMEM_LENGTH ;# RRC ({C=0, mem19=0x2533} => {mem19=0x2519, C=1}) |
mov r2, r7 |
|
mov #0x0001, r2 ;# Test 3 |
mov #0x2532, &DMEM_234 |
mov #0xaaaa, &DMEM_236 |
rrc.b EDE_234 ;# RRC ({C=1, mem1a=0x2532} => {mem1a=0x2599, C=0}) |
rrc.b EDE_234+PMEM_LENGTH ;# RRC ({C=1, mem1a=0x2532} => {mem1a=0x2599, C=0}) |
mov r2, r9 |
|
mov #0x0001, r2 ;# Test 4 |
mov #0x2533, &DMEM_236 |
mov #0xaaaa, &DMEM_238 |
rrc.b EDE_236 ;# RRC ({C=1, mem1b=0x2533} => {mem1b=0x2599, C=1}) |
rrc.b EDE_236+PMEM_LENGTH ;# RRC ({C=1, mem1b=0x2533} => {mem1b=0x2599, C=1}) |
mov r2, r11 |
|
mov #0xC000, r15 |
579,25 → 522,25
mov #0x0000, r2 ;# Test 1 |
mov #0x3225, &DMEM_238 |
mov #0xaaaa, &DMEM_23A |
rrc.b EDE_239 ;# RRC ({C=0, mem1c=0x3225} => {mem1c=0x1925, C=0}) |
rrc.b EDE_239+PMEM_LENGTH ;# RRC ({C=0, mem1c=0x3225} => {mem1c=0x1925, C=0}) |
mov r2, r5 |
|
mov #0x0000, r2 ;# Test 2 |
mov #0x3325, &DMEM_23A |
mov #0xaaaa, &DMEM_23C |
rrc.b EDE_23B ;# RRC ({C=0, mem1d=0x3325} => {mem1d=0x1925, C=1}) |
rrc.b EDE_23B+PMEM_LENGTH ;# RRC ({C=0, mem1d=0x3325} => {mem1d=0x1925, C=1}) |
mov r2, r7 |
|
mov #0x0001, r2 ;# Test 3 |
mov #0x3225, &DMEM_23C |
mov #0xaaaa, &DMEM_23E |
rrc.b EDE_23D ;# RRC ({C=1, mem1e=0x3225} => {mem1e=0x9925, C=0}) |
rrc.b EDE_23D+PMEM_LENGTH ;# RRC ({C=1, mem1e=0x3225} => {mem1e=0x9925, C=0}) |
mov r2, r9 |
|
mov #0x0001, r2 ;# Test 4 |
mov #0x3325, &DMEM_23E |
mov #0xaaaa, &DMEM_240 |
rrc.b EDE_23F ;# RRC ({C=1, mem1f=0x3325} => {mem1f=0x9925, C=1}) |
rrc.b EDE_23F+PMEM_LENGTH ;# RRC ({C=1, mem1f=0x3325} => {mem1f=0x9925, C=1}) |
mov r2, r11 |
|
mov #0xC001, r15 |
/core/sim/rtl_sim/src/nmi.s43
34,16 → 34,8
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
.set DMEM_252, (__data_start+0x52) |
.set DMEM_300, (__data_start+0x100) |
.include "pmem_defs.asm" |
|
.set WDTCTL, 0x0120 |
.set IE1, 0x0000 |
.set IFG1, 0x0002 |
|
.global main |
|
.macro LPM4 |
/core/sim/rtl_sim/src/tA_output.s43
35,26 → 35,10
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_202, (__data_start+0x02) |
.set DMEM_204, (__data_start+0x04) |
.set DMEM_206, (__data_start+0x06) |
.set DMEM_250, (__data_start+0x50) |
|
.set TACTL, 0x0160 |
.set TAR, 0x0170 |
.set TACCTL0, 0x0162 |
.set TACCR0, 0x0172 |
.set TACCTL1, 0x0164 |
.set TACCR1, 0x0174 |
.set TACCTL2, 0x0166 |
.set TACCR2, 0x0176 |
.set TAIV, 0x012E |
|
|
WAIT_FUNC: |
dec r14 |
jnz WAIT_FUNC |
/core/sim/rtl_sim/src/wdt_interval.s43
35,17 → 35,10
/* $LastChangedDate$ */ |
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
.global main |
|
.set DMEM_BASE, (__data_start ) |
.set DMEM_200, (__data_start+0x00) |
.set DMEM_250, (__data_start+0x50) |
|
.set IE1, 0x0000 |
.set IFG1, 0x0002 |
.set WDTCTL, 0x0120 |
|
|
main: |
|
/* -------------- WATCHDOG TEST: RD/WR ACCESS --------------- */ |
/core/sim/rtl_sim/src-c/sandbox/periph.x
File deleted
core/sim/rtl_sim/src-c/sandbox/periph.x
Property changes :
Deleted: svn:eol-style
## -1 +0,0 ##
-native
\ No newline at end of property
Index: core/sim/rtl_sim/src-c/sandbox/main.c
===================================================================
--- core/sim/rtl_sim/src-c/sandbox/main.c (revision 140)
+++ core/sim/rtl_sim/src-c/sandbox/main.c (revision 141)
@@ -33,11 +33,8 @@
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */
/*===========================================================================*/
-#include
-#include // Needed for using interrupts with msp430-gcc
-//#include
+#include "omsp_system.h"
-
volatile char shift_direction = 0x01; // Global variable
int main(void) {
/core/sim/rtl_sim/src-c/sandbox/omsp_system.h
0,0 → 1,166
/*===========================================================================*/ |
/* Copyright (C) 2001 Authors */ |
/* */ |
/* This source file may be used and distributed without restriction provided */ |
/* that this copyright statement is not removed from the file and that any */ |
/* derivative work contains the original copyright notice and the associated */ |
/* disclaimer. */ |
/* */ |
/* This source file is free software; you can redistribute it and/or modify */ |
/* it under the terms of the GNU Lesser General Public License as published */ |
/* by the Free Software Foundation; either version 2.1 of the License, or */ |
/* (at your option) any later version. */ |
/* */ |
/* This source is distributed in the hope that it will be useful, but WITHOUT*/ |
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */ |
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */ |
/* License for more details. */ |
/* */ |
/* You should have received a copy of the GNU Lesser General Public License */ |
/* along with this source; if not, write to the Free Software Foundation, */ |
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */ |
/* */ |
/*===========================================================================*/ |
/* OMSP_SYSTEM HEADER FILE */ |
/*---------------------------------------------------------------------------*/ |
/* */ |
/* Author(s): */ |
/* - Olivier Girard, olgirard@gmail.com */ |
/* */ |
/*---------------------------------------------------------------------------*/ |
/* $Rev: 19 $ */ |
/* $LastChangedBy: olivier.girard $ */ |
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
//============================================================================= |
// PERIPHERALS REGISTER DEFINITIONS |
//============================================================================= |
|
//---------------------------------------------------------- |
// SPECIAL FUNCTION REGISTERS |
//---------------------------------------------------------- |
#define IE1 (*(volatile unsigned char *) 0x0000) |
#define IFG1 (*(volatile unsigned char *) 0x0002) |
|
#define CPU_ID_LO (*(volatile unsigned char *) 0x0004) |
#define CPU_ID_HI (*(volatile unsigned char *) 0x0006) |
|
|
//---------------------------------------------------------- |
// GPIOs |
//---------------------------------------------------------- |
#define P1IN (*(volatile unsigned char *) 0x0020) |
#define P1OUT (*(volatile unsigned char *) 0x0021) |
#define P1DIR (*(volatile unsigned char *) 0x0022) |
#define P1IFG (*(volatile unsigned char *) 0x0023) |
#define P1IES (*(volatile unsigned char *) 0x0024) |
#define P1IE (*(volatile unsigned char *) 0x0025) |
#define P1SEL (*(volatile unsigned char *) 0x0026) |
|
#define P2IN (*(volatile unsigned char *) 0x0028) |
#define P2OUT (*(volatile unsigned char *) 0x0029) |
#define P2DIR (*(volatile unsigned char *) 0x002A) |
#define P2IFG (*(volatile unsigned char *) 0x002B) |
#define P2IES (*(volatile unsigned char *) 0x002C) |
#define P2IE (*(volatile unsigned char *) 0x002D) |
#define P2SEL (*(volatile unsigned char *) 0x002E) |
|
#define P3IN (*(volatile unsigned char *) 0x0018) |
#define P3OUT (*(volatile unsigned char *) 0x0019) |
#define P3DIR (*(volatile unsigned char *) 0x001A) |
#define P3SEL (*(volatile unsigned char *) 0x001B) |
|
#define P4IN (*(volatile unsigned char *) 0x001C) |
#define P4OUT (*(volatile unsigned char *) 0x001D) |
#define P4DIR (*(volatile unsigned char *) 0x001E) |
#define P4SEL (*(volatile unsigned char *) 0x001F) |
|
#define P5IN (*(volatile unsigned char *) 0x0030) |
#define P5OUT (*(volatile unsigned char *) 0x0031) |
#define P5DIR (*(volatile unsigned char *) 0x0032) |
#define P5SEL (*(volatile unsigned char *) 0x0033) |
|
#define P6IN (*(volatile unsigned char *) 0x0034) |
#define P6OUT (*(volatile unsigned char *) 0x0035) |
#define P6DIR (*(volatile unsigned char *) 0x0036) |
#define P6SEL (*(volatile unsigned char *) 0x0037) |
|
|
//---------------------------------------------------------- |
// BASIC CLOCK MODULE |
//---------------------------------------------------------- |
#define BCSCTL1 (*(volatile unsigned char *) 0x0057) |
#define BCSCTL2 (*(volatile unsigned char *) 0x0058) |
|
|
//---------------------------------------------------------- |
// WATCHDOG TIMER |
//---------------------------------------------------------- |
|
// Addresses |
#define WDTCTL (*(volatile unsigned int *) 0x0120) |
|
// Bit masks |
#define WDTIS0 (0x0001) |
#define WDTIS1 (0x0002) |
#define WDTSSEL (0x0004) |
#define WDTCNTCL (0x0008) |
#define WDTTMSEL (0x0010) |
#define WDTNMI (0x0020) |
#define WDTNMIES (0x0040) |
#define WDTHOLD (0x0080) |
#define WDTPW (0x5A00) |
|
|
//---------------------------------------------------------- |
// HARDWARE MULTIPLIER |
//---------------------------------------------------------- |
#define OP1_MPY (*(volatile unsigned int *) 0x0130) |
#define OP1_MPYS (*(volatile unsigned int *) 0x0132) |
#define OP1_MAC (*(volatile unsigned int *) 0x0134) |
#define OP1_MACS (*(volatile unsigned int *) 0x0136) |
#define OP2 (*(volatile unsigned int *) 0x0138) |
|
#define RESLO (*(volatile unsigned int *) 0x013A) |
#define RESHI (*(volatile unsigned int *) 0x013C) |
#define SUMEXT (*(volatile unsigned int *) 0x013E) |
|
|
//---------------------------------------------------------- |
// TIMER A |
//---------------------------------------------------------- |
#define TACTL (*(volatile unsigned int *) 0x0160) |
#define TAR (*(volatile unsigned int *) 0x0170) |
#define TACCTL0 (*(volatile unsigned int *) 0x0162) |
#define TACCR0 (*(volatile unsigned int *) 0x0172) |
#define TACCTL1 (*(volatile unsigned int *) 0x0164) |
#define TACCR1 (*(volatile unsigned int *) 0x0174) |
#define TACCTL2 (*(volatile unsigned int *) 0x0166) |
#define TACCR2 (*(volatile unsigned int *) 0x0176) |
#define TAIV (*(volatile unsigned int *) 0x012E) |
|
|
//============================================================================= |
// INTERRUPT VECTORS |
//============================================================================= |
#define interrupt(x) void __attribute__((interrupt (x))) |
#define eint() __eint() |
#define dint() __dint() |
|
#define RESET_VECTOR (0x001E) // Vector 15 (0xFFFE) - Reset - [Highest Priority] |
#define NMI_VECTOR (0x001C) // Vector 14 (0xFFFC) - Non-maskable - |
#define UNUSED_13_VECTOR (0x001A) // Vector 13 (0xFFFA) - - |
#define UNUSED_12_VECTOR (0x0018) // Vector 12 (0xFFF8) - - |
#define UNUSED_11_VECTOR (0x0016) // Vector 11 (0xFFF6) - - |
#define WDT_VECTOR (0x0014) // Vector 10 (0xFFF4) - Watchdog Timer - |
#define TIMERA0_VECTOR (0x0012) // Vector 9 (0xFFF2) - Timer A CC0 - |
#define TIMERA1_VECTOR (0x0010) // Vector 8 (0xFFF0) - Timer A CC1-2, TA - |
#define UNUSED_07_VECTOR (0x000E) // Vector 7 (0xFFEE) - - |
#define UNUSED_06_VECTOR (0x000C) // Vector 6 (0xFFEC) - - |
#define UNUSED_05_VECTOR (0x000A) // Vector 5 (0xFFEA) - - |
#define UNUSED_04_VECTOR (0x0008) // Vector 4 (0xFFE8) - - |
#define PORT2_VECTOR (0x0006) // Vector 3 (0xFFE6) - Port 1 - |
#define PORT1_VECTOR (0x0004) // Vector 2 (0xFFE4) - Port 1 - |
#define UNUSED_01_VECTOR (0x0002) // Vector 1 (0xFFE2) - - |
#define UNUSED_00_VECTOR (0x0000) // Vector 0 (0xFFE0) - - [Lowest Priority] |
core/sim/rtl_sim/src-c/sandbox/omsp_system.h
Property changes :
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Index: core/sim/rtl_sim/src-c/sandbox/linker.x
===================================================================
--- core/sim/rtl_sim/src-c/sandbox/linker.x (revision 140)
+++ core/sim/rtl_sim/src-c/sandbox/linker.x (revision 141)
@@ -7,7 +7,7 @@
data (rwx) : ORIGIN = 0x0200, LENGTH = 0x080
vectors (rw) : ORIGIN = 0xffe0, LENGTH = 0x20
}
-/* INCLUDE periph.x */
+__WDTCTL = 0x0120;
SECTIONS
{
/* Read-only sections, merged into text segment. */
Index: core/sim/rtl_sim/src-c/sandbox/makefile
===================================================================
--- core/sim/rtl_sim/src-c/sandbox/makefile (revision 140)
+++ core/sim/rtl_sim/src-c/sandbox/makefile (revision 141)
@@ -1,10 +1,9 @@
# makfile configuration
NAME = sandbox
OBJECTS = main.o
-#CPU = msp430x1111
-#CFLAGS = -mmcu=${CPU} -O2 -Wall -g
-CFLAGS = -O2 -Wall -g
+#CFLAGS = -O2 -Wall -g # Old flags
+CFLAGS = -O2 -Wall -g -mcpu=430 -mivcnt=16 -mmpy=none # Uniarch flags
#switch the compiler (for the internal make rules)
CC = msp430-gcc
/core/sim/rtl_sim/bin/msp430sim
65,6 → 65,7
verfile=../src/$1.v; |
incfile=../../../rtl/verilog/openMSP430_defines.v; |
linkfile=../bin/template.x; |
headfile=../bin/template_defs.asm; |
submitfile=../src/submit.f; |
if [ $OMSP_SIMULATOR == "isim" ]; then |
submitfile=../src/submit.prj; |
86,6 → 87,10
echo "Linker definition file template doesn't exist: $linkfile" |
exit 1 |
fi |
if [ ! -e $headfile ]; then |
echo "Assembler definition file template doesn't exist: $headfile" |
exit 1 |
fi |
|
|
############################################################################### |
96,7 → 101,7
rm -rf *.vpd |
rm -rf *.trn |
rm -rf *.dsn |
rm -rf pmem.* |
rm -rf pmem* |
rm -rf stimulus.v |
|
|
150,7 → 155,7
|
# Compile assembler code |
echo "Compile, link & generate IHEX file (Program Memory: $pmemsize B, Data Memory: $dmemsize B, Peripheral Space: $persize B)..." |
../bin/asm2ihex.sh pmem pmem.s43 $linkfile $pmemsize $dmemsize $persize |
../bin/asm2ihex.sh pmem pmem.s43 $linkfile $headfile $pmemsize $dmemsize $persize |
|
# Generate Program memory file |
echo "Convert IHEX file to Verilog MEMH format..." |
/core/sim/rtl_sim/bin/msp430sim_c
92,7 → 92,7
rm -rf *.vpd |
rm -rf *.trn |
rm -rf *.dsn |
rm -rf pmem.* |
rm -rf pmem* |
rm -rf stimulus.v |
|
|
/core/sim/rtl_sim/bin/asm2ihex.sh
37,11 → 37,11
############################################################################### |
# Parameter Check # |
############################################################################### |
EXPECTED_ARGS=6 |
EXPECTED_ARGS=7 |
if [ $# -ne $EXPECTED_ARGS ]; then |
echo "ERROR : wrong number of arguments" |
echo "USAGE : asm2ihex.sh <test name> <test assembler file> <linker script> <prog mem size> <data mem size> <peripheral addr space size>" |
echo "Example : asm2ihex.sh c-jump_jge ../src/c-jump_jge.s43 ../bin/template.x 2048 128 512" |
echo "USAGE : asm2ihex.sh <test name> <test assembler file> <linker script> <assembler define> <prog mem size> <data mem size> <peripheral addr space size>" |
echo "Example : asm2ihex.sh c-jump_jge ../src/c-jump_jge.s43 ../bin/template.x ../bin/pmem.h 2048 128 512" |
exit 1 |
fi |
|
58,6 → 58,10
echo "Linker definition file template doesn't exist: $3" |
exit 1 |
fi |
if [ ! -e $4 ]; then |
echo "Assembler definition file template doesn't exist: $4" |
exit 1 |
fi |
|
|
############################################################################### |
64,13 → 68,14
# Generate the linker definition file # |
############################################################################### |
|
PER_SIZE=$6 |
DMEM_SIZE=$5 |
PMEM_SIZE=$4 |
PER_SIZE=$7 |
DMEM_SIZE=$6 |
PMEM_SIZE=$5 |
PMEM_BASE=$((0x10000-$PMEM_SIZE)) |
STACK_INIT=$((PER_SIZE+0x0080)) |
|
cp $3 ./pmem.x |
cp $4 ./pmem_defs.asm |
sed -i "s/PMEM_BASE/$PMEM_BASE/g" pmem.x |
sed -i "s/PMEM_SIZE/$PMEM_SIZE/g" pmem.x |
sed -i "s/DMEM_SIZE/$DMEM_SIZE/g" pmem.x |
77,7 → 82,10
sed -i "s/PER_SIZE/$PER_SIZE/g" pmem.x |
sed -i "s/STACK_INIT/$STACK_INIT/g" pmem.x |
|
sed -i "s/PER_SIZE/$PER_SIZE/g" pmem_defs.asm |
sed -i "s/PMEM_SIZE/$PMEM_SIZE/g" pmem_defs.asm |
|
|
############################################################################### |
# Compile, link & generate IHEX file # |
############################################################################### |
/core/sim/rtl_sim/bin/template_defs.asm
0,0 → 1,250
/*===========================================================================*/ |
/* Copyright (C) 2001 Authors */ |
/* */ |
/* This source file may be used and distributed without restriction provided */ |
/* that this copyright statement is not removed from the file and that any */ |
/* derivative work contains the original copyright notice and the associated */ |
/* disclaimer. */ |
/* */ |
/* This source file is free software; you can redistribute it and/or modify */ |
/* it under the terms of the GNU Lesser General Public License as published */ |
/* by the Free Software Foundation; either version 2.1 of the License, or */ |
/* (at your option) any later version. */ |
/* */ |
/* This source is distributed in the hope that it will be useful, but WITHOUT*/ |
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */ |
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */ |
/* License for more details. */ |
/* */ |
/* You should have received a copy of the GNU Lesser General Public License */ |
/* along with this source; if not, write to the Free Software Foundation, */ |
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */ |
/* */ |
/*===========================================================================*/ |
/* MEMORY DEFINITION FILE */ |
/*---------------------------------------------------------------------------*/ |
/* */ |
/* Author(s): */ |
/* - Olivier Girard, olgirard@gmail.com */ |
/* */ |
/*---------------------------------------------------------------------------*/ |
/* $Rev: 19 $ */ |
/* $LastChangedBy: olivier.girard $ */ |
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */ |
/*===========================================================================*/ |
|
/*---------------------------------------------------------------------------*/ |
/* SFR */ |
/*---------------------------------------------------------------------------*/ |
.set IE1, 0x0000 |
.set IE1_HI, 0x0001 |
.set IFG1, 0x0002 |
.set IFG1_HI, 0x0003 |
.set CPU_ID_LO, 0x0004 |
.set CPU_ID_HI, 0x0006 |
|
/*---------------------------------------------------------------------------*/ |
/* GPIOs */ |
/*---------------------------------------------------------------------------*/ |
.set P1IN, 0x0020 |
.set P1OUT, 0x0021 |
.set P1DIR, 0x0022 |
.set P1IFG, 0x0023 |
.set P1IES, 0x0024 |
.set P1IE, 0x0025 |
.set P1SEL, 0x0026 |
|
.set P2IN, 0x0028 |
.set P2OUT, 0x0029 |
.set P2DIR, 0x002A |
.set P2IFG, 0x002B |
.set P2IES, 0x002C |
.set P2IE, 0x002D |
.set P2SEL, 0x002E |
|
.set P3IN, 0x0018 |
.set P3OUT, 0x0019 |
.set P3DIR, 0x001A |
.set P3SEL, 0x001B |
|
.set P4IN, 0x001C |
.set P4OUT, 0x001D |
.set P4DIR, 0x001E |
.set P4SEL, 0x001F |
|
.set P5IN, 0x0030 |
.set P5OUT, 0x0031 |
.set P5DIR, 0x0032 |
.set P5SEL, 0x0033 |
|
.set P6IN, 0x0034 |
.set P6OUT, 0x0035 |
.set P6DIR, 0x0036 |
.set P6SEL, 0x0037 |
|
/*---------------------------------------------------------------------------*/ |
/* BASIC CLOCK MODULE */ |
/*---------------------------------------------------------------------------*/ |
.set BCSCTL1, 0x0057 |
.set BCSCTL2, 0x0058 |
|
/*---------------------------------------------------------------------------*/ |
/* WATCHDOG TIMER */ |
/*---------------------------------------------------------------------------*/ |
.set WDTCTL, 0x0120 |
|
/*---------------------------------------------------------------------------*/ |
/* HARDWARE MULTIPLIER */ |
/*---------------------------------------------------------------------------*/ |
.set MPY, 0x0130 |
.set MPYS, 0x0132 |
.set MAC, 0x0134 |
.set MACS, 0x0136 |
.set OP2, 0x0138 |
.set RESLO, 0x013A |
.set RESHI, 0x013C |
.set SUMEXT, 0x013E |
|
/*---------------------------------------------------------------------------*/ |
/* TIMER A */ |
/*---------------------------------------------------------------------------*/ |
.set TACTL, 0x0160 |
.set TAR, 0x0170 |
.set TACCTL0, 0x0162 |
.set TACCR0, 0x0172 |
.set TACCTL1, 0x0164 |
.set TACCR1, 0x0174 |
.set TACCTL2, 0x0166 |
.set TACCR2, 0x0176 |
.set TAIV, 0x012E |
|
/*---------------------------------------------------------------------------*/ |
/* DATA MEMORY MAPPING */ |
/*---------------------------------------------------------------------------*/ |
.set DMEM_BASE, PER_SIZE |
|
.set DMEM_200, (DMEM_BASE+0x00) |
.set DMEM_201, (DMEM_BASE+0x01) |
.set DMEM_202, (DMEM_BASE+0x02) |
.set DMEM_203, (DMEM_BASE+0x03) |
.set DMEM_204, (DMEM_BASE+0x04) |
.set DMEM_205, (DMEM_BASE+0x05) |
.set DMEM_206, (DMEM_BASE+0x06) |
.set DMEM_207, (DMEM_BASE+0x07) |
.set DMEM_208, (DMEM_BASE+0x08) |
.set DMEM_209, (DMEM_BASE+0x09) |
.set DMEM_20A, (DMEM_BASE+0x0A) |
.set DMEM_20B, (DMEM_BASE+0x0B) |
.set DMEM_20C, (DMEM_BASE+0x0C) |
.set DMEM_20D, (DMEM_BASE+0x0D) |
.set DMEM_20E, (DMEM_BASE+0x0E) |
.set DMEM_20F, (DMEM_BASE+0x0F) |
|
.set DMEM_210, (DMEM_BASE+0x10) |
.set DMEM_211, (DMEM_BASE+0x11) |
.set DMEM_212, (DMEM_BASE+0x12) |
.set DMEM_213, (DMEM_BASE+0x13) |
.set DMEM_214, (DMEM_BASE+0x14) |
.set DMEM_215, (DMEM_BASE+0x15) |
.set DMEM_216, (DMEM_BASE+0x16) |
.set DMEM_217, (DMEM_BASE+0x17) |
.set DMEM_218, (DMEM_BASE+0x18) |
.set DMEM_219, (DMEM_BASE+0x19) |
.set DMEM_21A, (DMEM_BASE+0x1A) |
.set DMEM_21B, (DMEM_BASE+0x1B) |
.set DMEM_21C, (DMEM_BASE+0x1C) |
.set DMEM_21D, (DMEM_BASE+0x1D) |
.set DMEM_21E, (DMEM_BASE+0x1E) |
.set DMEM_21F, (DMEM_BASE+0x1F) |
|
.set DMEM_220, (DMEM_BASE+0x20) |
.set DMEM_221, (DMEM_BASE+0x21) |
.set DMEM_222, (DMEM_BASE+0x22) |
.set DMEM_223, (DMEM_BASE+0x23) |
.set DMEM_224, (DMEM_BASE+0x24) |
.set DMEM_225, (DMEM_BASE+0x25) |
.set DMEM_226, (DMEM_BASE+0x26) |
.set DMEM_227, (DMEM_BASE+0x27) |
.set DMEM_228, (DMEM_BASE+0x28) |
.set DMEM_229, (DMEM_BASE+0x29) |
.set DMEM_22A, (DMEM_BASE+0x2A) |
.set DMEM_22B, (DMEM_BASE+0x2B) |
.set DMEM_22C, (DMEM_BASE+0x2C) |
.set DMEM_22D, (DMEM_BASE+0x2D) |
.set DMEM_22E, (DMEM_BASE+0x2E) |
.set DMEM_22F, (DMEM_BASE+0x2F) |
|
.set DMEM_230, (DMEM_BASE+0x30) |
.set DMEM_231, (DMEM_BASE+0x31) |
.set DMEM_232, (DMEM_BASE+0x32) |
.set DMEM_233, (DMEM_BASE+0x33) |
.set DMEM_234, (DMEM_BASE+0x34) |
.set DMEM_235, (DMEM_BASE+0x35) |
.set DMEM_236, (DMEM_BASE+0x36) |
.set DMEM_237, (DMEM_BASE+0x37) |
.set DMEM_238, (DMEM_BASE+0x38) |
.set DMEM_239, (DMEM_BASE+0x39) |
.set DMEM_23A, (DMEM_BASE+0x3A) |
.set DMEM_23B, (DMEM_BASE+0x3B) |
.set DMEM_23C, (DMEM_BASE+0x3C) |
.set DMEM_23D, (DMEM_BASE+0x3D) |
.set DMEM_23E, (DMEM_BASE+0x3E) |
.set DMEM_23F, (DMEM_BASE+0x3F) |
|
.set DMEM_240, (DMEM_BASE+0x40) |
.set DMEM_241, (DMEM_BASE+0x41) |
.set DMEM_242, (DMEM_BASE+0x42) |
.set DMEM_243, (DMEM_BASE+0x43) |
.set DMEM_244, (DMEM_BASE+0x44) |
.set DMEM_245, (DMEM_BASE+0x45) |
.set DMEM_246, (DMEM_BASE+0x46) |
.set DMEM_247, (DMEM_BASE+0x47) |
.set DMEM_248, (DMEM_BASE+0x48) |
.set DMEM_249, (DMEM_BASE+0x49) |
.set DMEM_24A, (DMEM_BASE+0x4A) |
.set DMEM_24B, (DMEM_BASE+0x4B) |
.set DMEM_24C, (DMEM_BASE+0x4C) |
.set DMEM_24D, (DMEM_BASE+0x4D) |
.set DMEM_24E, (DMEM_BASE+0x4E) |
.set DMEM_24F, (DMEM_BASE+0x4F) |
|
.set DMEM_250, (DMEM_BASE+0x50) |
.set DMEM_251, (DMEM_BASE+0x51) |
.set DMEM_252, (DMEM_BASE+0x52) |
.set DMEM_253, (DMEM_BASE+0x53) |
.set DMEM_254, (DMEM_BASE+0x54) |
.set DMEM_255, (DMEM_BASE+0x55) |
.set DMEM_256, (DMEM_BASE+0x56) |
.set DMEM_257, (DMEM_BASE+0x57) |
.set DMEM_258, (DMEM_BASE+0x58) |
.set DMEM_259, (DMEM_BASE+0x59) |
.set DMEM_25A, (DMEM_BASE+0x5A) |
.set DMEM_25B, (DMEM_BASE+0x5B) |
.set DMEM_25C, (DMEM_BASE+0x5C) |
.set DMEM_25D, (DMEM_BASE+0x5D) |
.set DMEM_25E, (DMEM_BASE+0x5E) |
.set DMEM_25F, (DMEM_BASE+0x5F) |
|
.set DMEM_260, (DMEM_BASE+0x60) |
.set DMEM_261, (DMEM_BASE+0x61) |
.set DMEM_262, (DMEM_BASE+0x62) |
.set DMEM_263, (DMEM_BASE+0x63) |
.set DMEM_264, (DMEM_BASE+0x64) |
.set DMEM_265, (DMEM_BASE+0x65) |
.set DMEM_266, (DMEM_BASE+0x66) |
.set DMEM_267, (DMEM_BASE+0x67) |
.set DMEM_268, (DMEM_BASE+0x68) |
.set DMEM_269, (DMEM_BASE+0x69) |
.set DMEM_26A, (DMEM_BASE+0x6A) |
.set DMEM_26B, (DMEM_BASE+0x6B) |
.set DMEM_26C, (DMEM_BASE+0x6C) |
.set DMEM_26D, (DMEM_BASE+0x6D) |
.set DMEM_26E, (DMEM_BASE+0x6E) |
.set DMEM_26F, (DMEM_BASE+0x6F) |
|
.set DMEM_300, (DMEM_BASE+0x100) |
|
/*---------------------------------------------------------------------------*/ |
/* PROGRAM MEMORY MAPPING */ |
/*---------------------------------------------------------------------------*/ |
.set PMEM_LENGTH, PMEM_SIZE |
core/sim/rtl_sim/bin/template_defs.asm
Property changes :
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property