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- This comparison shows the changes necessary to convert path
/openrisc/tags/gnu-dev/fsf-gcc-snapshot-1-mar-12/or1k-gcc/libjava/sysdep/s390
- from Rev 764 to Rev 783
- ↔ Reverse comparison
Rev 764 → Rev 783
/locks.h
0,0 → 1,77
// locks.h - Thread synchronization primitives. S/390 implementation. |
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/* Copyright (C) 2002 Free Software Foundation |
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This file is part of libgcj. |
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This software is copyrighted work licensed under the terms of the |
Libgcj License. Please consult the file "LIBGCJ_LICENSE" for |
details. */ |
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#ifndef __SYSDEP_LOCKS_H__ |
#define __SYSDEP_LOCKS_H__ |
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typedef size_t obj_addr_t; /* Integer type big enough for object */ |
/* address. */ |
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// Atomically replace *addr by new_val if it was initially equal to old. |
// Return true if the comparison succeeded. |
// Assumed to have acquire semantics, i.e. later memory operations |
// cannot execute before the compare_and_swap finishes. |
inline static bool |
compare_and_swap(volatile obj_addr_t *addr, |
obj_addr_t old, obj_addr_t new_val) |
{ |
int result; |
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__asm__ __volatile__ ( |
#ifndef __s390x__ |
" cs %1,%2,0(%3)\n" |
#else |
" csg %1,%2,0(%3)\n" |
#endif |
" ipm %0\n" |
" srl %0,28\n" |
: "=&d" (result), "+d" (old) |
: "d" (new_val), "a" (addr) |
: "cc", "memory"); |
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return result == 0; |
} |
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// Set *addr to new_val with release semantics, i.e. making sure |
// that prior loads and stores complete before this |
// assignment. |
inline static void |
release_set(volatile obj_addr_t *addr, obj_addr_t new_val) |
{ |
__asm__ __volatile__("bcr 15,0" : : : "memory"); |
*(addr) = new_val; |
} |
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// Compare_and_swap with release semantics instead of acquire semantics. |
// On many architecture, the operation makes both guarantees, so the |
// implementation can be the same. |
inline static bool |
compare_and_swap_release(volatile obj_addr_t *addr, |
obj_addr_t old, obj_addr_t new_val) |
{ |
return compare_and_swap(addr, old, new_val); |
} |
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// Ensure that subsequent instructions do not execute on stale |
// data that was loaded from memory before the barrier. |
inline static void |
read_barrier() |
{ |
__asm__ __volatile__("bcr 15,0" : : : "memory"); |
} |
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// Ensure that prior stores to memory are completed with respect to other |
// processors. |
inline static void |
write_barrier() |
{ |
__asm__ __volatile__("bcr 15,0" : : : "memory"); |
} |
#endif |