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- This comparison shows the changes necessary to convert path
/openrisc/tags/gnu-src/gcc-4.5.1/gcc-4.5.1-or32-1.0rc1/gcc/testsuite/g++.dg/ext/arm-fp16
- from Rev 301 to Rev 338
- ↔ Reverse comparison
Rev 301 → Rev 338
/fp16-overload-1.C
0,0 → 1,16
/* { dg-do compile { target arm*-*-* } } */ |
/* { dg-options "-mfp16-format=ieee" } */ |
|
/* __fp16 values are autoconverted to float and should therefore be treated |
* just like float for overloading purposes. */ |
|
extern int frobnify (float x); |
extern int frobnify (double x); |
|
int g (void) |
{ |
return frobnify ((__fp16)1.0); |
} |
|
/* { dg-final { scan-assembler "_Z8frobnifyf" } } */ |
/* { dg-final { scan-assembler-not " _Z8frobnifyd" } } */ |
fp16-overload-1.C
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Index: arm-fp16-ops-1.C
===================================================================
--- arm-fp16-ops-1.C (nonexistent)
+++ arm-fp16-ops-1.C (revision 338)
@@ -0,0 +1,5 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands. */
+/* { dg-do run { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+#include "arm-fp16-ops.h"
arm-fp16-ops-1.C
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Index: arm-fp16-ops-2.C
===================================================================
--- arm-fp16-ops-2.C (nonexistent)
+++ arm-fp16-ops-2.C (revision 338)
@@ -0,0 +1,5 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands. */
+/* { dg-do run { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=ieee -ffast-math" } */
+
+#include "arm-fp16-ops.h"
arm-fp16-ops-2.C
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Index: fp16-return-1.C
===================================================================
--- fp16-return-1.C (nonexistent)
+++ fp16-return-1.C (revision 338)
@@ -0,0 +1,10 @@
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+/* Functions cannot return type __fp16. */
+extern __fp16 f (void); /* { dg-error "cannot return __fp16" } */
+extern __fp16 (*pf) (void); /* { dg-error "cannot return __fp16" } */
+
+/* These should be OK. */
+extern __fp16 *g (void);
+extern __fp16 *(*pg) (void);
fp16-return-1.C
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Index: arm-fp16-ops-3.C
===================================================================
--- arm-fp16-ops-3.C (nonexistent)
+++ arm-fp16-ops-3.C (revision 338)
@@ -0,0 +1,5 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands. */
+/* { dg-do run { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=alternative" } */
+
+#include "arm-fp16-ops.h"
arm-fp16-ops-3.C
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Index: fp16-param-1.C
===================================================================
--- fp16-param-1.C (nonexistent)
+++ fp16-param-1.C (revision 338)
@@ -0,0 +1,10 @@
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+/* Functions cannot have parameters of type __fp16. */
+extern void f (__fp16); /* { dg-error "parameters cannot have __fp16 type" } */
+extern void (*pf) (__fp16); /* { dg-error "parameters cannot have __fp16 type" } */
+
+/* These should be OK. */
+extern void g (__fp16 *);
+extern void (*pg) (__fp16 *);
fp16-param-1.C
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Index: arm-fp16-ops-4.C
===================================================================
--- arm-fp16-ops-4.C (nonexistent)
+++ arm-fp16-ops-4.C (revision 338)
@@ -0,0 +1,5 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands. */
+/* { dg-do run { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=alternative -ffast-math" } */
+
+#include "arm-fp16-ops.h"
arm-fp16-ops-4.C
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Index: arm-fp16-ops-5.C
===================================================================
--- arm-fp16-ops-5.C (nonexistent)
+++ arm-fp16-ops-5.C (revision 338)
@@ -0,0 +1,14 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands. */
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-mfp16-format=ieee -mfpu=neon-fp16 -mfloat-abi=softfp" } */
+
+#include "arm-fp16-ops.h"
+
+/* We've specified options for hardware float, including fp16 support, so
+ we should not see any calls to libfuncs here. */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf2" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf3" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_h\[a-z\]*_ieee" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_h2f_ieee" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_f2h_ieee" } } */
arm-fp16-ops-5.C
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Index: arm-fp16-ops-6.C
===================================================================
--- arm-fp16-ops-6.C (nonexistent)
+++ arm-fp16-ops-6.C (revision 338)
@@ -0,0 +1,14 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands. */
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-mfp16-format=ieee -ffast-math -mfpu=neon-fp16 -mfloat-abi=softfp" } */
+
+#include "arm-fp16-ops.h"
+
+/* We've specified options for hardware float, including fp16 support, so
+ we should not see any calls to libfuncs here. */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf2" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf3" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_h\[a-z\]*_ieee" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_h2f_ieee" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_f2h_ieee" } } */
arm-fp16-ops-6.C
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Index: fp16-mangle-1.C
===================================================================
--- fp16-mangle-1.C (nonexistent)
+++ fp16-mangle-1.C (revision 338)
@@ -0,0 +1,14 @@
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+/* Test mangling */
+
+/* { dg-final { scan-assembler "\t.global\t_Z1fPDh" } } */
+void f (__fp16 *x) { }
+
+/* { dg-final { scan-assembler "\t.global\t_Z1gPDhS_" } } */
+void g (__fp16 *x, __fp16 *y) { }
+
+/* { dg-final { scan-assembler "\t.global\t_ZN1SIDhDhE1iE" } } */
+template struct S { static int i; };
+template <> int S<__fp16, __fp16>::i = 3;
fp16-mangle-1.C
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Index: arm-fp16-ops-7.C
===================================================================
--- arm-fp16-ops-7.C (nonexistent)
+++ arm-fp16-ops-7.C (revision 338)
@@ -0,0 +1,12 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands. */
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-mfp16-format=ieee -mfpu=neon -mfloat-abi=softfp" } */
+
+#include "arm-fp16-ops.h"
+
+/* We've specified options for hardware float, so we should not see any
+ calls to libfuncs here except for those to the conversion functions. */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf2" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf3" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_h\[a-z\]*_ieee" } } */
arm-fp16-ops-7.C
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Index: arm-fp16-ops-8.C
===================================================================
--- arm-fp16-ops-8.C (nonexistent)
+++ arm-fp16-ops-8.C (revision 338)
@@ -0,0 +1,12 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands. */
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-mfp16-format=ieee -ffast-math -mfpu=neon -mfloat-abi=softfp" } */
+
+#include "arm-fp16-ops.h"
+
+/* We've specified options for hardware float, so we should not see any
+ calls to libfuncs here except for those to the conversion functions. */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf2" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf3" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_h\[a-z\]*_ieee" } } */
arm-fp16-ops-8.C
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Index: arm-fp16-ops.h
===================================================================
--- arm-fp16-ops.h (nonexistent)
+++ arm-fp16-ops.h (revision 338)
@@ -0,0 +1,135 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands. */
+
+#include
+
+#define CHECK(e,r) assert ((e) == r)
+#define CHECK2(e,r) (assert ((e) == r), temp = (e), assert (temp == r))
+#define TEST(e) assert (e)
+#define TESTNOT(e) assert (!(e))
+
+volatile __fp16 h0 = 0.0;
+volatile __fp16 h1 = 1.0;
+volatile __fp16 h42 = 42.0;
+volatile __fp16 hm2 = -2.0;
+volatile __fp16 temp;
+
+volatile float f0 = 0.0;
+volatile float f1 = 1.0;
+volatile float f42 = 42.0;
+volatile float fm2 = -2.0;
+
+int main (void)
+{
+ TEST (h1);
+ TESTNOT (h0);
+ TEST (!h0);
+ TESTNOT (!h1);
+
+ CHECK2 (-h1, -1.0);
+ CHECK2 (+h1, 1.0);
+
+ CHECK (h1++, 1.0);
+ CHECK (h1, 2.0);
+ CHECK (++h1, 3.0);
+ CHECK (h1, 3.0);
+
+ CHECK (--h1, 2.0);
+ CHECK (h1, 2.0);
+ CHECK (h1--, 2.0);
+ CHECK (h1, 1.0);
+
+ CHECK2 (h42 * hm2, -84.0);
+ CHECK2 (h42 * (__fp16) -2.0, -84.0);
+ CHECK2 (h42 * fm2, -84.0);
+ CHECK2 (f42 * hm2, -84.0);
+
+ CHECK2 (h42 / hm2, -21.0);
+ CHECK2 (h42 / (__fp16) -2.0, -21.0);
+ CHECK2 (h42 / fm2, -21.0);
+ CHECK2 (f42 / hm2, -21.0);
+
+ CHECK2 (hm2 + h42, 40.0);
+ CHECK2 ((__fp16)-2.0 + h42, 40.0);
+ CHECK2 (hm2 + f42, 40.0);
+ CHECK2 (fm2 + h42, 40.0);
+
+ CHECK2 (hm2 - h42, -44.0);
+ CHECK2 ((__fp16)-2.0 - h42, -44.0);
+ CHECK2 (hm2 - f42, -44.0);
+ CHECK2 (fm2 - h42, -44.0);
+
+ TEST (hm2 < h42);
+ TEST (hm2 < (__fp16)42.0);
+ TEST (hm2 < f42);
+ TEST (fm2 < h42);
+
+ TEST (h42 > hm2);
+ TEST ((__fp16)42.0 > hm2);
+ TEST (h42 > fm2);
+ TEST (f42 > hm2);
+
+ TEST (hm2 <= h42);
+ TEST (hm2 <= (__fp16)42.0);
+ TEST (hm2 <= f42);
+ TEST (fm2 <= h42);
+
+ TEST (h42 >= hm2);
+ TEST (h42 >= (__fp16)-2.0);
+ TEST (h42 >= fm2);
+ TEST (f42 >= hm2);
+
+ TESTNOT (h1 == hm2);
+ TEST (h1 == h1);
+ TEST (h1 == (__fp16)1.0);
+ TEST (h1 == f1);
+ TEST (f1 == h1);
+
+ TEST (h1 != hm2);
+ TESTNOT (h1 != h1);
+ TESTNOT (h1 != (__fp16)1.0);
+ TESTNOT (h1 != f1);
+ TESTNOT (f1 != h1);
+
+ CHECK2 ((h1 ? hm2 : h42), -2.0);
+ CHECK2 ((h0 ? hm2 : h42), 42.0);
+
+ CHECK (h0 = h42, 42.0);
+ CHECK (h0, 42.0);
+ CHECK (h0 = (__fp16)-2.0, -2.0);
+ CHECK (h0, -2.0);
+ CHECK (h0 = f0, 0.0);
+ CHECK (h0, 0.0);
+
+ CHECK (h0 += h1, 1.0);
+ CHECK (h0, 1.0);
+ CHECK (h0 += (__fp16)1.0, 2.0);
+ CHECK (h0, 2.0);
+ CHECK (h0 += fm2, 0.0);
+ CHECK (h0, 0.0);
+
+ CHECK (h0 -= h1, -1.0);
+ CHECK (h0, -1.0);
+ CHECK (h0 -= (__fp16)1.0, -2.0);
+ CHECK (h0, -2.0);
+ CHECK (h0 -= fm2, 0.0);
+ CHECK (h0, 0.0);
+
+ h0 = hm2;
+ CHECK (h0 *= hm2, 4.0);
+ CHECK (h0, 4.0);
+ CHECK (h0 *= (__fp16)-2.0, -8.0);
+ CHECK (h0, -8.0);
+ CHECK (h0 *= fm2, 16.0);
+ CHECK (h0, 16.0);
+
+ CHECK (h0 /= hm2, -8.0);
+ CHECK (h0, -8.0);
+ CHECK (h0 /= (__fp16)-2.0, 4.0);
+ CHECK (h0, 4.0);
+ CHECK (h0 /= fm2, -2.0);
+ CHECK (h0, -2.0);
+
+ CHECK ((h0, h1), 1.0);
+
+ return 0;
+}
arm-fp16-ops.h
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