URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
Compare Revisions
- This comparison shows the changes necessary to convert path
/openrisc/tags/or1200/rel2/or1200
- from Rev 137 to Rev 138
- ↔ Reverse comparison
Rev 137 → Rev 138
/bench/README
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/rtl/verilog/or1200_pic.v
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/rtl/verilog/or1200_pm.v
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/rtl/verilog/or1200_ic_top.v
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/rtl/verilog/or1200_freeze.v
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/rtl/verilog/or1200_dc_tag.v
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/rtl/verilog/or1200_dc_ram.v
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/rtl/verilog/or1200_spram_64x14.v
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/rtl/verilog/or1200_immu_top.v
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/rtl/verilog/or1200_dc_fsm.v
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/rtl/verilog/or1200_dpram_256x32.v
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/rtl/verilog/or1200_genpc.v
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/rtl/verilog/or1200_reg2mem.v
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/rtl/verilog/or1200_if.v
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/rtl/verilog/or1200_rfram_generic.v
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/rtl/verilog/or1200_lsu.v
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/rtl/verilog/or1200_dc_top.v
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/rtl/verilog/or1200_spram_256x21.v
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/rtl/verilog/or1200_spram_128x32.v
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/rtl/verilog/or1200_operandmuxes.v
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/rtl/verilog/or1200_spram_1024x32_bw.v
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/rtl/verilog/or1200_defines.v
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/rtl/verilog/or1200_spram_2048x8.v
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/rtl/verilog/or1200_iwb_biu.v
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/rtl/verilog/or1200_alu.v
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/rtl/verilog/or1200_spram_32x24.v
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/rtl/verilog/or1200_dmmu_top.v
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/rtl/verilog/or1200_amultp2_32x32.v
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/rtl/verilog/or1200_spram_1024x32.v
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/rtl/verilog/or1200_ic_tag.v
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/rtl/verilog/or1200_spram_64x22.v
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/rtl/verilog/or1200_cpu.v
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/rtl/verilog/or1200_xcv_ram32x8d.v
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/rtl/verilog/or1200_spram_64x24.v
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/rtl/verilog/or1200_ic_ram.v
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/rtl/verilog/or1200_gmultp2_32x32.v
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/rtl/verilog/or1200_spram_2048x32.v
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/rtl/verilog/or1200_ic_fsm.v
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/rtl/verilog/or1200_wbmux.v
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/rtl/verilog/or1200_spram_512x20.v
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/rtl/verilog/or1200_dmmu_tlb.v
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/rtl/verilog/timescale.v
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/rtl/verilog/or1200_ctrl.v
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/rtl/verilog/or1200_dpram_32x32.v
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/rtl/verilog/or1200_rf.v
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/rtl/verilog/or1200_wb_biu.v
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/rtl/verilog/or1200_sb_fifo.v
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/rtl/verilog/or1200_spram_1024x8.v
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/rtl/verilog/or1200_du.v
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/lint/log/README
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/lint/run/README
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/lint/bin/README
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/doc/openrisc1200_spec.doc
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doc/openrisc1200_spec.doc
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