URL
https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
Subversion Repositories openrisc_me
Compare Revisions
- This comparison shows the changes necessary to convert path
/openrisc/tags/or1ksim/or1ksim-0.4.0/testsuite/test-code-or1k/except-test
- from Rev 121 to Rev 135
- ↔ Reverse comparison
Rev 121 → Rev 135
/Makefile.in
0,0 → 1,529
# Makefile.in generated by automake 1.11.1 from Makefile.am. |
# @configure_input@ |
|
# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, |
# 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, |
# Inc. |
# This Makefile.in is free software; the Free Software Foundation |
# gives unlimited permission to copy and/or distribute it, |
# with or without modifications, as long as this notice is preserved. |
|
# This program is distributed in the hope that it will be useful, |
# but WITHOUT ANY WARRANTY, to the extent permitted by law; without |
# even the implied warranty of MERCHANTABILITY or FITNESS FOR A |
# PARTICULAR PURPOSE. |
|
@SET_MAKE@ |
|
# Makefile.am for or1ksim testsuite CPU test program: except-test |
|
# Copyright (C) Embecosm Limited, 2010 |
|
# Contributor Jeremy Bennett <jeremy.bennett@embecosm.com> |
|
# This file is part of OpenRISC 1000 Architectural Simulator. |
|
# This program is free software; you can redistribute it and/or modify it |
# under the terms of the GNU General Public License as published by the Free |
# Software Foundation; either version 3 of the License, or (at your option) |
# any later version. |
|
# This program is distributed in the hope that it will be useful, but WITHOUT |
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
# more details. |
|
# You should have received a copy of the GNU General Public License along |
# with this program. If not, see <http:#www.gnu.org/licenses/>. */ |
|
# ----------------------------------------------------------------------------- |
# This code is commented throughout for use with Doxygen. |
# ----------------------------------------------------------------------------- |
VPATH = @srcdir@ |
pkgdatadir = $(datadir)/@PACKAGE@ |
pkgincludedir = $(includedir)/@PACKAGE@ |
pkglibdir = $(libdir)/@PACKAGE@ |
pkglibexecdir = $(libexecdir)/@PACKAGE@ |
am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd |
install_sh_DATA = $(install_sh) -c -m 644 |
install_sh_PROGRAM = $(install_sh) -c |
install_sh_SCRIPT = $(install_sh) -c |
INSTALL_HEADER = $(INSTALL_DATA) |
transform = $(program_transform_name) |
NORMAL_INSTALL = : |
PRE_INSTALL = : |
POST_INSTALL = : |
NORMAL_UNINSTALL = : |
PRE_UNINSTALL = : |
POST_UNINSTALL = : |
build_triplet = @build@ |
host_triplet = @host@ |
check_PROGRAMS = except-test$(EXEEXT) |
subdir = except-test |
DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in |
ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 |
am__aclocal_m4_deps = $(top_srcdir)/m4/libtool.m4 \ |
$(top_srcdir)/m4/ltoptions.m4 $(top_srcdir)/m4/ltsugar.m4 \ |
$(top_srcdir)/m4/ltversion.m4 $(top_srcdir)/m4/lt~obsolete.m4 \ |
$(top_srcdir)/configure.ac |
am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \ |
$(ACLOCAL_M4) |
mkinstalldirs = $(SHELL) $(top_srcdir)/../../mkinstalldirs |
CONFIG_HEADER = $(top_builddir)/config.h |
CONFIG_CLEAN_FILES = |
CONFIG_CLEAN_VPATH_FILES = |
am_except_test_OBJECTS = except-test.$(OBJEXT) except-test-s.$(OBJEXT) |
except_test_OBJECTS = $(am_except_test_OBJECTS) |
except_test_DEPENDENCIES = ../support/libsupport.la |
except_test_LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) \ |
$(LIBTOOLFLAGS) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ |
$(except_test_LDFLAGS) $(LDFLAGS) -o $@ |
DEFAULT_INCLUDES = -I.@am__isrc@ -I$(top_builddir) |
depcomp = $(SHELL) $(top_srcdir)/../../depcomp |
am__depfiles_maybe = depfiles |
am__mv = mv -f |
CPPASCOMPILE = $(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) \ |
$(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CCASFLAGS) $(CCASFLAGS) |
LTCPPASCOMPILE = $(LIBTOOL) $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \ |
--mode=compile $(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) \ |
$(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CCASFLAGS) $(CCASFLAGS) |
COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \ |
$(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) |
LTCOMPILE = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \ |
--mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) \ |
$(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) |
CCLD = $(CC) |
LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \ |
--mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \ |
$(LDFLAGS) -o $@ |
SOURCES = $(except_test_SOURCES) |
DIST_SOURCES = $(except_test_SOURCES) |
ETAGS = etags |
CTAGS = ctags |
DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) |
ACLOCAL = @ACLOCAL@ |
AMTAR = @AMTAR@ |
AR = @AR@ |
AUTOCONF = @AUTOCONF@ |
AUTOHEADER = @AUTOHEADER@ |
AUTOMAKE = @AUTOMAKE@ |
AWK = @AWK@ |
CC = @CC@ |
CCAS = @CCAS@ |
CCASDEPMODE = @CCASDEPMODE@ |
CCASFLAGS = @CCASFLAGS@ |
CCDEPMODE = @CCDEPMODE@ |
CFLAGS = @CFLAGS@ |
CPP = @CPP@ |
CPPFLAGS = @CPPFLAGS@ |
CYGPATH_W = @CYGPATH_W@ |
DEFS = @DEFS@ |
DEPDIR = @DEPDIR@ |
DSYMUTIL = @DSYMUTIL@ |
DUMPBIN = @DUMPBIN@ |
ECHO_C = @ECHO_C@ |
ECHO_N = @ECHO_N@ |
ECHO_T = @ECHO_T@ |
EGREP = @EGREP@ |
EXEEXT = @EXEEXT@ |
FGREP = @FGREP@ |
GREP = @GREP@ |
INSTALL = @INSTALL@ |
INSTALL_DATA = @INSTALL_DATA@ |
INSTALL_PROGRAM = @INSTALL_PROGRAM@ |
INSTALL_SCRIPT = @INSTALL_SCRIPT@ |
INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@ |
LD = @LD@ |
LDFLAGS = @LDFLAGS@ |
LIBOBJS = @LIBOBJS@ |
LIBS = @LIBS@ |
LIBTOOL = @LIBTOOL@ |
LIPO = @LIPO@ |
LN_S = @LN_S@ |
LTLIBOBJS = @LTLIBOBJS@ |
MAKEINFO = @MAKEINFO@ |
MKDIR_P = @MKDIR_P@ |
NM = @NM@ |
NMEDIT = @NMEDIT@ |
OBJDUMP = @OBJDUMP@ |
OBJEXT = @OBJEXT@ |
OTOOL = @OTOOL@ |
OTOOL64 = @OTOOL64@ |
PACKAGE = @PACKAGE@ |
PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@ |
PACKAGE_NAME = @PACKAGE_NAME@ |
PACKAGE_STRING = @PACKAGE_STRING@ |
PACKAGE_TARNAME = @PACKAGE_TARNAME@ |
PACKAGE_VERSION = @PACKAGE_VERSION@ |
PATH_SEPARATOR = @PATH_SEPARATOR@ |
RANLIB = @RANLIB@ |
SED = @SED@ |
SET_MAKE = @SET_MAKE@ |
SHELL = @SHELL@ |
SIM = @SIM@ |
STRIP = @STRIP@ |
VERSION = @VERSION@ |
abs_builddir = @abs_builddir@ |
abs_srcdir = @abs_srcdir@ |
abs_top_builddir = @abs_top_builddir@ |
abs_top_srcdir = @abs_top_srcdir@ |
ac_ct_CC = @ac_ct_CC@ |
ac_ct_DUMPBIN = @ac_ct_DUMPBIN@ |
am__include = @am__include@ |
am__leading_dot = @am__leading_dot@ |
am__quote = @am__quote@ |
am__tar = @am__tar@ |
am__untar = @am__untar@ |
bindir = @bindir@ |
build = @build@ |
build_alias = @build_alias@ |
build_cpu = @build_cpu@ |
build_os = @build_os@ |
build_vendor = @build_vendor@ |
builddir = @builddir@ |
datadir = @datadir@ |
datarootdir = @datarootdir@ |
docdir = @docdir@ |
dvidir = @dvidir@ |
exec_prefix = @exec_prefix@ |
host = @host@ |
host_alias = @host_alias@ |
host_cpu = @host_cpu@ |
host_os = @host_os@ |
host_vendor = @host_vendor@ |
htmldir = @htmldir@ |
includedir = @includedir@ |
infodir = @infodir@ |
install_sh = @install_sh@ |
libdir = @libdir@ |
libexecdir = @libexecdir@ |
localedir = @localedir@ |
localstatedir = @localstatedir@ |
lt_ECHO = @lt_ECHO@ |
mandir = @mandir@ |
mkdir_p = @mkdir_p@ |
oldincludedir = @oldincludedir@ |
pdfdir = @pdfdir@ |
prefix = @prefix@ |
program_transform_name = @program_transform_name@ |
psdir = @psdir@ |
sbindir = @sbindir@ |
sharedstatedir = @sharedstatedir@ |
srcdir = @srcdir@ |
sysconfdir = @sysconfdir@ |
target_alias = @target_alias@ |
top_build_prefix = @top_build_prefix@ |
top_builddir = @top_builddir@ |
top_srcdir = @top_srcdir@ |
except_test_SOURCES = except-test.c \ |
except-test-s.S |
|
except_test_LDFLAGS = -T$(srcdir)/../default.ld |
except_test_LDADD = ../support/libsupport.la |
all: all-am |
|
.SUFFIXES: |
.SUFFIXES: .S .c .lo .o .obj |
$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(am__configure_deps) |
@for dep in $?; do \ |
case '$(am__configure_deps)' in \ |
*$$dep*) \ |
( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \ |
&& { if test -f $@; then exit 0; else break; fi; }; \ |
exit 1;; \ |
esac; \ |
done; \ |
echo ' cd $(top_srcdir) && $(AUTOMAKE) --gnu except-test/Makefile'; \ |
$(am__cd) $(top_srcdir) && \ |
$(AUTOMAKE) --gnu except-test/Makefile |
.PRECIOUS: Makefile |
Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status |
@case '$?' in \ |
*config.status*) \ |
cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \ |
*) \ |
echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \ |
cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \ |
esac; |
|
$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) |
cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh |
|
$(top_srcdir)/configure: $(am__configure_deps) |
cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh |
$(ACLOCAL_M4): $(am__aclocal_m4_deps) |
cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh |
$(am__aclocal_m4_deps): |
|
clean-checkPROGRAMS: |
@list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \ |
echo " rm -f" $$list; \ |
rm -f $$list || exit $$?; \ |
test -n "$(EXEEXT)" || exit 0; \ |
list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \ |
echo " rm -f" $$list; \ |
rm -f $$list |
except-test$(EXEEXT): $(except_test_OBJECTS) $(except_test_DEPENDENCIES) |
@rm -f except-test$(EXEEXT) |
$(except_test_LINK) $(except_test_OBJECTS) $(except_test_LDADD) $(LIBS) |
|
mostlyclean-compile: |
-rm -f *.$(OBJEXT) |
|
distclean-compile: |
-rm -f *.tab.c |
|
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/except-test-s.Po@am__quote@ |
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/except-test.Po@am__quote@ |
|
.S.o: |
@am__fastdepCCAS_TRUE@ $(CPPASCOMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $< |
@am__fastdepCCAS_TRUE@ $(am__mv) $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po |
@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@ |
@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@ |
@am__fastdepCCAS_FALSE@ $(CPPASCOMPILE) -c -o $@ $< |
|
.S.obj: |
@am__fastdepCCAS_TRUE@ $(CPPASCOMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'` |
@am__fastdepCCAS_TRUE@ $(am__mv) $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po |
@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@ |
@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@ |
@am__fastdepCCAS_FALSE@ $(CPPASCOMPILE) -c -o $@ `$(CYGPATH_W) '$<'` |
|
.S.lo: |
@am__fastdepCCAS_TRUE@ $(LTCPPASCOMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $< |
@am__fastdepCCAS_TRUE@ $(am__mv) $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Plo |
@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ source='$<' object='$@' libtool=yes @AMDEPBACKSLASH@ |
@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@ |
@am__fastdepCCAS_FALSE@ $(LTCPPASCOMPILE) -c -o $@ $< |
|
.c.o: |
@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $< |
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po |
@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@ |
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ |
@am__fastdepCC_FALSE@ $(COMPILE) -c $< |
|
.c.obj: |
@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'` |
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po |
@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@ |
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ |
@am__fastdepCC_FALSE@ $(COMPILE) -c `$(CYGPATH_W) '$<'` |
|
.c.lo: |
@am__fastdepCC_TRUE@ $(LTCOMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $< |
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Plo |
@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='$<' object='$@' libtool=yes @AMDEPBACKSLASH@ |
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ |
@am__fastdepCC_FALSE@ $(LTCOMPILE) -c -o $@ $< |
|
mostlyclean-libtool: |
-rm -f *.lo |
|
clean-libtool: |
-rm -rf .libs _libs |
|
ID: $(HEADERS) $(SOURCES) $(LISP) $(TAGS_FILES) |
list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \ |
unique=`for i in $$list; do \ |
if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \ |
done | \ |
$(AWK) '{ files[$$0] = 1; nonempty = 1; } \ |
END { if (nonempty) { for (i in files) print i; }; }'`; \ |
mkid -fID $$unique |
tags: TAGS |
|
TAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \ |
$(TAGS_FILES) $(LISP) |
set x; \ |
here=`pwd`; \ |
list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \ |
unique=`for i in $$list; do \ |
if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \ |
done | \ |
$(AWK) '{ files[$$0] = 1; nonempty = 1; } \ |
END { if (nonempty) { for (i in files) print i; }; }'`; \ |
shift; \ |
if test -z "$(ETAGS_ARGS)$$*$$unique"; then :; else \ |
test -n "$$unique" || unique=$$empty_fix; \ |
if test $$# -gt 0; then \ |
$(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \ |
"$$@" $$unique; \ |
else \ |
$(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \ |
$$unique; \ |
fi; \ |
fi |
ctags: CTAGS |
CTAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \ |
$(TAGS_FILES) $(LISP) |
list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \ |
unique=`for i in $$list; do \ |
if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \ |
done | \ |
$(AWK) '{ files[$$0] = 1; nonempty = 1; } \ |
END { if (nonempty) { for (i in files) print i; }; }'`; \ |
test -z "$(CTAGS_ARGS)$$unique" \ |
|| $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \ |
$$unique |
|
GTAGS: |
here=`$(am__cd) $(top_builddir) && pwd` \ |
&& $(am__cd) $(top_srcdir) \ |
&& gtags -i $(GTAGS_ARGS) "$$here" |
|
distclean-tags: |
-rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags |
|
distdir: $(DISTFILES) |
@srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ |
topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ |
list='$(DISTFILES)'; \ |
dist_files=`for file in $$list; do echo $$file; done | \ |
sed -e "s|^$$srcdirstrip/||;t" \ |
-e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \ |
case $$dist_files in \ |
*/*) $(MKDIR_P) `echo "$$dist_files" | \ |
sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \ |
sort -u` ;; \ |
esac; \ |
for file in $$dist_files; do \ |
if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \ |
if test -d $$d/$$file; then \ |
dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \ |
if test -d "$(distdir)/$$file"; then \ |
find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ |
fi; \ |
if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \ |
cp -fpR $(srcdir)/$$file "$(distdir)$$dir" || exit 1; \ |
find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ |
fi; \ |
cp -fpR $$d/$$file "$(distdir)$$dir" || exit 1; \ |
else \ |
test -f "$(distdir)/$$file" \ |
|| cp -p $$d/$$file "$(distdir)/$$file" \ |
|| exit 1; \ |
fi; \ |
done |
check-am: all-am |
$(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS) |
check: check-am |
all-am: Makefile |
installdirs: |
install: install-am |
install-exec: install-exec-am |
install-data: install-data-am |
uninstall: uninstall-am |
|
install-am: all-am |
@$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am |
|
installcheck: installcheck-am |
install-strip: |
$(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ |
install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \ |
`test -z '$(STRIP)' || \ |
echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install |
mostlyclean-generic: |
|
clean-generic: |
|
distclean-generic: |
-test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES) |
-test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES) |
|
maintainer-clean-generic: |
@echo "This command is intended for maintainers to use" |
@echo "it deletes files that may require special tools to rebuild." |
clean: clean-am |
|
clean-am: clean-checkPROGRAMS clean-generic clean-libtool \ |
mostlyclean-am |
|
distclean: distclean-am |
-rm -rf ./$(DEPDIR) |
-rm -f Makefile |
distclean-am: clean-am distclean-compile distclean-generic \ |
distclean-tags |
|
dvi: dvi-am |
|
dvi-am: |
|
html: html-am |
|
html-am: |
|
info: info-am |
|
info-am: |
|
install-data-am: |
|
install-dvi: install-dvi-am |
|
install-dvi-am: |
|
install-exec-am: |
|
install-html: install-html-am |
|
install-html-am: |
|
install-info: install-info-am |
|
install-info-am: |
|
install-man: |
|
install-pdf: install-pdf-am |
|
install-pdf-am: |
|
install-ps: install-ps-am |
|
install-ps-am: |
|
installcheck-am: |
|
maintainer-clean: maintainer-clean-am |
-rm -rf ./$(DEPDIR) |
-rm -f Makefile |
maintainer-clean-am: distclean-am maintainer-clean-generic |
|
mostlyclean: mostlyclean-am |
|
mostlyclean-am: mostlyclean-compile mostlyclean-generic \ |
mostlyclean-libtool |
|
pdf: pdf-am |
|
pdf-am: |
|
ps: ps-am |
|
ps-am: |
|
uninstall-am: |
|
.MAKE: check-am install-am install-strip |
|
.PHONY: CTAGS GTAGS all all-am check check-am clean \ |
clean-checkPROGRAMS clean-generic clean-libtool ctags \ |
distclean distclean-compile distclean-generic \ |
distclean-libtool distclean-tags distdir dvi dvi-am html \ |
html-am info info-am install install-am install-data \ |
install-data-am install-dvi install-dvi-am install-exec \ |
install-exec-am install-html install-html-am install-info \ |
install-info-am install-man install-pdf install-pdf-am \ |
install-ps install-ps-am install-strip installcheck \ |
installcheck-am installdirs maintainer-clean \ |
maintainer-clean-generic mostlyclean mostlyclean-compile \ |
mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \ |
tags uninstall uninstall-am |
|
|
# Tell versions [3.59,3.63) of GNU make to not export all variables. |
# Otherwise a system limit (for SysV at least) may be exceeded. |
.NOEXPORT: |
/except-test.c
0,0 → 1,1184
/* except-test.c. Test of Or1ksim exception handling |
|
Copyright (C) 1999-2006 OpenCores |
Copyright (C) 2010 Embecosm Limited |
|
Contributors various OpenCores participants |
Contributor Jeremy Bennett <jeremy.bennett@embecosm.com> |
|
This file is part of OpenRISC 1000 Architectural Simulator. |
|
This program is free software; you can redistribute it and/or modify it |
under the terms of the GNU General Public License as published by the Free |
Software Foundation; either version 3 of the License, or (at your option) |
any later version. |
|
This program is distributed in the hope that it will be useful, but WITHOUT |
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
more details. |
|
You should have received a copy of the GNU General Public License along |
with this program. If not, see <http: www.gnu.org/licenses/>. */ |
|
/* ---------------------------------------------------------------------------- |
This code is commented throughout for use with Doxygen. |
--------------------------------------------------------------------------*/ |
|
#include "spr-defs.h" |
#include "support.h" |
#include "int.h" |
|
/* Define RAM physical location and size |
Bottom half will be used for this program, the rest |
will be used for testing */ |
#define FLASH_START 0xf0000000 |
#define FLASH_SIZE 0x00200000 |
#define RAM_START 0x00000000 |
#define RAM_SIZE 0x04000000 |
|
#define TEST_BASE 0xa5000000 |
|
/* MMU page size */ |
#define PAGE_SIZE 8192 |
|
/* Number of DTLB sets used (power of 2, max is 256) */ |
#define DTLB_SETS 32 |
|
/* Number of DTLB ways (2, 2, 3 etc., max is 4). */ |
#define DTLB_WAYS 1 |
|
/* Number of ITLB sets used (power of 2, max is 256) */ |
#define ITLB_SETS 32 |
|
/* Number of ITLB ways (1, 2, 3 etc., max is 4). */ |
#define ITLB_WAYS 1 |
|
/* TLB mode codes */ |
#define TLB_CODE_ONE_TO_ONE 0x00000000 |
#define TLB_CODE_PLUS_ONE_PAGE 0x10000000 |
#define TLB_CODE_MINUS_ONE_PAGE 0x20000000 |
|
#define TLB_TEXT_SET_NB 6 |
#define TLB_DATA_SET_NB 2 |
|
#define TLB_CODE_MASK 0xfffff000 |
#define TLB_PR_MASK 0x00000fff |
#define DTLB_PR_NOLIMIT ( SPR_DTLBTR_CI | \ |
SPR_DTLBTR_URE | \ |
SPR_DTLBTR_UWE | \ |
SPR_DTLBTR_SRE | \ |
SPR_DTLBTR_SWE ) |
|
#define ITLB_PR_NOLIMIT ( SPR_ITLBTR_CI | \ |
SPR_ITLBTR_SXE | \ |
SPR_ITLBTR_UXE ) |
|
/* fails if x is false */ |
#define ASSERT(x) ((x)?1: fail (__FUNCTION__, __LINE__)) |
|
/* Exception vectors */ |
#define V_RESET 1 |
#define V_BERR 2 |
#define V_DPF 3 |
#define V_IPF 4 |
#define V_TICK 5 |
#define V_ALIGN 6 |
#define V_ILLINSN 7 |
#define V_INT 8 |
#define V_DTLB_MISS 9 |
#define V_ITLB_MISS 10 |
#define V_RANGE 11 |
#define V_SYS 12 |
#define V_TRAP 14 |
|
#define debug printf |
|
/* Extern functions */ |
extern void lo_dmmu_en (void); |
extern void lo_immu_en (void); |
extern unsigned long call (unsigned long add, unsigned long val); |
extern unsigned long call_with_int (unsigned long add, unsigned long val); |
extern void trap (void); |
extern void b_trap (void); |
extern void range (void); |
extern void b_range (void); |
extern int except_basic (void); |
extern void (*test)(void); |
extern int load_acc_32 (unsigned long add); |
extern int load_acc_16 (unsigned long add); |
extern int store_acc_32 (unsigned long add); |
extern int store_acc_16 (unsigned long add); |
extern int load_b_acc_32 (unsigned long add); |
extern int int_trigger (void); |
extern int int_loop (void); |
extern int jump_back (void); |
|
/* Local functions prototypes */ |
void dmmu_disable (void); |
void immu_disable (void); |
|
/* DTLB mode status */ |
volatile unsigned long dtlb_val; |
|
/* ITLB mode status */ |
volatile unsigned long itlb_val; |
|
/* Exception counter */ |
volatile int except_count; |
|
/* Exception mask */ |
volatile unsigned long except_mask; |
|
/* Exception efective address */ |
volatile unsigned long except_ea; |
|
/* Eception PC */ |
volatile unsigned long except_pc; |
|
unsigned long excpt_buserr; |
unsigned long excpt_dpfault; |
unsigned long excpt_ipfault; |
unsigned long excpt_tick; |
unsigned long excpt_align; |
unsigned long excpt_illinsn; |
unsigned long excpt_int; |
unsigned long excpt_dtlbmiss; |
unsigned long excpt_itlbmiss; |
unsigned long excpt_range; |
unsigned long excpt_syscall; |
unsigned long excpt_break; |
unsigned long excpt_trap; |
|
|
void fail (char *func, int line) |
{ |
#ifndef __FUNCTION__ |
#define __FUNCTION__ "?" |
#endif |
|
immu_disable (); |
dmmu_disable (); |
|
debug("Test failed in %s:%i\n", func, line); |
report (0xeeeeeeee); |
exit (1); |
} |
|
void test_dummy (void) |
{ |
asm("_test:"); |
asm("l.addi\t\tr3,r3,1") ; |
asm("l.nop" : :); |
} |
|
void copy_test (unsigned long phy_add) |
{ |
memcpy((void *)phy_add, (void *)&test, 8); |
} |
|
/* Bus error handler */ |
void bus_err_handler (void) |
{ |
|
except_mask |= 1 << V_BERR; |
except_count++; |
} |
|
/* Illegal insn handler */ |
void ill_insn_handler (void) |
{ |
except_mask |= 1 << V_ILLINSN; |
except_count++; |
} |
|
/* Low priority interrupt handler */ |
void tick_handler (void) |
{ |
|
/* Disable interrupt recognition */ |
mtspr(SPR_ESR_BASE, mfspr(SPR_ESR_BASE) & ~SPR_SR_TEE); |
|
except_mask |= 1 << V_TICK; |
except_count++; |
} |
|
/* High priority interrupt handler */ |
void int_handler (void) |
{ |
|
/* Disable interrupt recognition */ |
mtspr(SPR_ESR_BASE, mfspr(SPR_ESR_BASE) & ~SPR_SR_IEE); |
|
except_mask |= 1 << V_INT; |
except_count++; |
} |
|
/* Trap handler */ |
void trap_handler (void) |
{ |
|
except_mask |= 1 << V_TRAP; |
except_count++; |
} |
|
/* Align handler */ |
void align_handler (void) |
{ |
|
except_mask |= 1 << V_ALIGN; |
except_count++; |
} |
|
/* Range handler */ |
void range_handler (void) |
{ |
/* Disable range exception */ |
mtspr (SPR_ESR_BASE, mfspr (SPR_ESR_BASE) & ~SPR_SR_OVE); |
|
except_mask |= 1 << V_RANGE; |
except_count++; |
} |
|
/* DTLB miss exception handler */ |
void dtlb_miss_handler (void) |
{ |
unsigned long ea; |
int set, way = 0; |
int i; |
|
/* Get EA that cause the exception */ |
ea = mfspr (SPR_EEAR_BASE); |
|
/* Find TLB set and LRU way */ |
set = (ea / PAGE_SIZE) % DTLB_SETS; |
for (i = 0; i < DTLB_WAYS; i++) { |
if ((mfspr (SPR_DTLBMR_BASE(i) + set) & SPR_DTLBMR_LRU) == 0) { |
way = i; |
break; |
} |
} |
|
mtspr (SPR_DTLBMR_BASE(way) + set, (ea & SPR_DTLBMR_VPN) | SPR_DTLBMR_V); |
mtspr (SPR_DTLBTR_BASE(way) + set, (ea & SPR_DTLBTR_PPN) | dtlb_val); |
|
except_mask |= 1 << V_DTLB_MISS; |
except_count++; |
} |
|
/* ITLB miss exception handler */ |
void itlb_miss_handler (void) |
{ |
unsigned long ea; |
int set, way = 0; |
int i; |
|
/* Get EA that cause the exception */ |
ea = mfspr (SPR_EEAR_BASE); |
|
/* Find TLB set and LRU way */ |
set = (ea / PAGE_SIZE) % ITLB_SETS; |
for (i = 0; i < ITLB_WAYS; i++) { |
if ((mfspr (SPR_ITLBMR_BASE(i) + set) & SPR_ITLBMR_LRU) == 0) { |
way = i; |
break; |
} |
} |
|
mtspr (SPR_ITLBMR_BASE(way) + set, (ea & SPR_ITLBMR_VPN) | SPR_ITLBMR_V); |
mtspr (SPR_ITLBTR_BASE(way) + set, (ea & SPR_ITLBTR_PPN) | itlb_val); |
except_mask |= 1 << V_ITLB_MISS; |
except_count++; |
} |
|
/* Data page fault exception handler */ |
void dpage_fault_handler (void) |
{ |
unsigned long ea; |
int set, way = 0; |
int i; |
|
/* Get EA that cause the exception */ |
ea = mfspr (SPR_EEAR_BASE); |
|
/* Find TLB set and way */ |
set = (ea / PAGE_SIZE) % DTLB_SETS; |
for (i = 0; i < DTLB_WAYS; i++) { |
if ((mfspr (SPR_DTLBMR_BASE(i) + set) & SPR_DTLBMR_VPN) == (ea & SPR_DTLBMR_VPN)) { |
way = i; |
break; |
} |
} |
|
/* Give permission */ |
mtspr (SPR_DTLBTR_BASE(way) + set, (mfspr (SPR_DTLBTR_BASE(way) + set) & ~DTLB_PR_NOLIMIT) | dtlb_val); |
|
except_mask |= 1 << V_DPF; |
except_count++; |
} |
|
/* Intstruction page fault exception handler */ |
void ipage_fault_handler (void) |
{ |
unsigned long ea; |
int set, way = 0; |
int i; |
|
/* Get EA that cause the exception */ |
ea = mfspr (SPR_EEAR_BASE); |
|
/* Find TLB set and way */ |
set = (ea / PAGE_SIZE) % ITLB_SETS; |
for (i = 0; i < ITLB_WAYS; i++) { |
if ((mfspr (SPR_ITLBMR_BASE(i) + set) & SPR_ITLBMR_VPN) == (ea & SPR_ITLBMR_VPN)) { |
way = i; |
break; |
} |
} |
|
/* Give permission */ |
mtspr (SPR_ITLBTR_BASE(way) + set, (mfspr (SPR_ITLBTR_BASE(way) + set) & ~ITLB_PR_NOLIMIT) | itlb_val); |
|
except_mask |= 1 << V_IPF; |
except_count++; |
} |
|
/*Enable DMMU */ |
void dmmu_enable (void) |
{ |
/* Enable DMMU */ |
lo_dmmu_en (); |
} |
|
/* Disable DMMU */ |
void dmmu_disable (void) |
{ |
mtspr (SPR_SR, mfspr (SPR_SR) & ~SPR_SR_DME); |
} |
|
/* Enable IMMU */ |
void immu_enable (void) |
{ |
/* Enable IMMU */ |
lo_immu_en (); |
} |
|
/* Disable IMMU */ |
void immu_disable (void) |
{ |
mtspr (SPR_SR, mfspr (SPR_SR) & ~SPR_SR_IME); |
} |
|
/* Tick timer init */ |
void tick_init (int period, int hp_int) |
{ |
/* Disable tick timer exception recognition */ |
mtspr(SPR_SR, mfspr(SPR_SR) & ~SPR_SR_TEE); |
|
/* Set period of one cycle, restartable mode */ |
mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (period & SPR_TTMR_PERIOD)); |
|
/* Reset counter */ |
mtspr(SPR_TTCR, 0); |
} |
|
/* Interrupt test */ |
int interrupt_test (void) |
{ |
unsigned long ret; |
int i; |
|
/* Init tick timer */ |
tick_init (1, 1); |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Test normal high priority interrupt trigger */ |
ret = call ((unsigned long)&int_trigger, 0); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_TICK)); |
ASSERT(ret == 0); |
ASSERT(except_pc == (unsigned long)int_trigger + 16); |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Test inetrrupt in delay slot */ |
tick_init (100, 1); |
|
/* Hopefully we will have interrupt recognition between branch insn and delay slot */ |
except_pc = (unsigned long)&int_loop; |
for (i = 0; i < 10; i++) { |
call_with_int (except_pc, RAM_START); |
ASSERT(except_pc == (unsigned long)&int_loop); |
} |
|
return 0; |
} |
|
/* ITLB miss test */ |
int itlb_test (void) |
{ |
int i, j, ret; |
unsigned long ea, ta; |
|
/* Invalidate all entries in ITLB */ |
for (i = 0; i < ITLB_WAYS; i++) { |
for (j = 0; j < ITLB_SETS; j++) { |
mtspr (SPR_ITLBMR_BASE(i) + j, 0); |
mtspr (SPR_ITLBTR_BASE(i) + j, 0); |
} |
} |
|
/* Set one to one translation for the use of this program */ |
for (i = 0; i < TLB_TEXT_SET_NB; i++) { |
ea = FLASH_START + (i*PAGE_SIZE); |
ta = FLASH_START + (i*PAGE_SIZE); |
mtspr (SPR_ITLBMR_BASE(0) + i, ea | SPR_ITLBMR_V); |
mtspr (SPR_ITLBTR_BASE(0) + i, ta | ITLB_PR_NOLIMIT); |
} |
|
/* Set dtlb no permisions */ |
itlb_val = SPR_ITLBTR_CI; |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Enable IMMU */ |
immu_enable (); |
|
/* Copy jump instruction to last location of a page */ |
ea = RAM_START + (RAM_SIZE/2) + ((TLB_TEXT_SET_NB + 1)*PAGE_SIZE) - 8; |
memcpy((void *)ea, (void *)&jump_back, 12); |
|
/* Check if there was ITLB miss exception */ |
ret = call (ea, 0); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_ITLB_MISS)); |
ASSERT(except_pc == ea); |
ASSERT(ret == 0); |
|
/* Set dtlb no permisions */ |
itlb_val = SPR_ITLBTR_CI | SPR_ITLBTR_SXE; |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Check if there was IPF miss exception */ |
ret = call (ea, 0); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_IPF)); |
ASSERT(except_pc == ea); |
ASSERT(ret == 0); |
|
/* Set dtlb no permisions */ |
itlb_val = SPR_ITLBTR_CI; |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Check if there was ITLB miss exception */ |
ret = call (ea, 0); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_ITLB_MISS)); |
ASSERT(except_pc == ea + 4); |
ASSERT(ret == 0); |
|
/* Set dtlb no permisions */ |
itlb_val = SPR_ITLBTR_CI | SPR_ITLBTR_SXE; |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Check if there was IPF exception */ |
ret = call (ea, 0); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_IPF)); |
ASSERT(except_pc == ea + 4); |
ASSERT(ret == 0); |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
ret = call (ea, 0); |
ASSERT(except_count == 0); |
ASSERT(ret == 1); |
|
/* Disable IMMU */ |
immu_disable (); |
|
return 0; |
} |
|
/* DTLB miss test */ |
int dtlb_test (void) |
{ |
int i, j, ret; |
unsigned long ea, ta; |
|
/* Invalidate all entries in DTLB */ |
for (i = 0; i < DTLB_WAYS; i++) { |
for (j = 0; j < DTLB_SETS; j++) { |
mtspr (SPR_DTLBMR_BASE(i) + j, 0); |
mtspr (SPR_DTLBTR_BASE(i) + j, 0); |
} |
} |
|
/* Set one to one translation for the use of this program */ |
for (i = 0; i < TLB_DATA_SET_NB; i++) { |
ea = RAM_START + (i*PAGE_SIZE); |
ta = RAM_START + (i*PAGE_SIZE); |
mtspr (SPR_DTLBMR_BASE(0) + i, ea | SPR_ITLBMR_V); |
mtspr (SPR_DTLBTR_BASE(0) + i, ta | DTLB_PR_NOLIMIT); |
} |
|
/* Set dtlb no permisions */ |
dtlb_val = SPR_DTLBTR_CI; |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Set pattern */ |
ea = RAM_START + (RAM_SIZE/2) + ((TLB_DATA_SET_NB)*PAGE_SIZE); |
REG32(ea) = 0x87654321; |
|
/* Enable DMMU */ |
dmmu_enable (); |
|
/* Check if there was DTLB miss exception */ |
ret = call ((unsigned long)&load_b_acc_32, ea); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_DTLB_MISS)); |
ASSERT(except_pc == (unsigned long)load_b_acc_32 + 8); |
ASSERT(except_ea == ea); |
ASSERT(ret == 0x12345678); |
|
/* Set dtlb no permisions */ |
dtlb_val = SPR_DTLBTR_CI | SPR_DTLBTR_SRE; |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Check if there was DPF miss exception */ |
ret = call ((unsigned long)&load_b_acc_32, ea); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_DPF)); |
ASSERT(except_pc == (unsigned long)load_b_acc_32 + 8); |
ASSERT(except_ea == ea); |
ASSERT(ret == 0x12345678); |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
ret = call ((unsigned long)&load_b_acc_32, ea); |
ASSERT(except_count == 0); |
ASSERT(ret == 0x87654321); |
|
/* Disable DMMU */ |
dmmu_disable (); |
|
return 0; |
} |
|
/* Bus error test */ |
int buserr_test (void) |
{ |
int i, j, ret; |
unsigned long ea, ta; |
|
/* Invalidate all entries in ITLB */ |
for (i = 0; i < ITLB_WAYS; i++) { |
for (j = 0; j < ITLB_SETS; j++) { |
mtspr (SPR_ITLBMR_BASE(i) + j, 0); |
mtspr (SPR_ITLBTR_BASE(i) + j, 0); |
} |
} |
|
/* Set one to one translation for the use of this program */ |
for (i = 0; i < TLB_TEXT_SET_NB; i++) { |
ea = FLASH_START + (i*PAGE_SIZE); |
ta = FLASH_START + (i*PAGE_SIZE); |
mtspr (SPR_ITLBMR_BASE(0) + i, ea | SPR_ITLBMR_V); |
mtspr (SPR_ITLBTR_BASE(0) + i, ta | ITLB_PR_NOLIMIT); |
} |
|
/* Invalidate all entries in DTLB */ |
for (i = 0; i < DTLB_WAYS; i++) { |
for (j = 0; j < DTLB_SETS; j++) { |
mtspr (SPR_DTLBMR_BASE(i) + j, 0); |
mtspr (SPR_DTLBTR_BASE(i) + j, 0); |
} |
} |
|
/* Set one to one translation for the use of this program */ |
for (i = 0; i < TLB_DATA_SET_NB; i++) { |
ea = RAM_START + (i*PAGE_SIZE); |
ta = RAM_START + (i*PAGE_SIZE); |
mtspr (SPR_DTLBMR_BASE(0) + i, ea | SPR_ITLBMR_V); |
mtspr (SPR_DTLBTR_BASE(0) + i, ta | DTLB_PR_NOLIMIT); |
} |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Set IMMU translation */ |
ea = RAM_START + (RAM_SIZE) + ((TLB_TEXT_SET_NB)*PAGE_SIZE); |
itlb_val = SPR_ITLBTR_CI | SPR_ITLBTR_SXE; |
mtspr (SPR_ITLBMR_BASE(0) + TLB_TEXT_SET_NB, (ea & SPR_ITLBMR_VPN) | SPR_ITLBMR_V); |
mtspr (SPR_ITLBTR_BASE(0) + TLB_TEXT_SET_NB, ((ea + PAGE_SIZE) & SPR_ITLBTR_PPN) | itlb_val); |
|
/* Enable IMMU */ |
immu_enable (); |
|
/* Check if there was bus error exception */ |
ret = call (ea, 0); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_BERR)); |
ASSERT(except_pc == ea); |
ASSERT(except_ea == ea); |
|
/* Disable IMMU */ |
immu_disable (); |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Copy jump instruction to last location of RAM */ |
ea = RAM_START + RAM_SIZE - 8; |
memcpy((void *)ea, (void *)&jump_back, 8); |
|
/* Check if there was bus error exception */ |
ret = call (ea, 0); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_BERR)); |
ASSERT(except_pc == ea + 4); |
ASSERT(except_ea == ea + 8); |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Set DMMU translation */ |
ea = RAM_START + (RAM_SIZE) + ((TLB_DATA_SET_NB)*PAGE_SIZE); |
dtlb_val = SPR_DTLBTR_CI | SPR_DTLBTR_SRE; |
mtspr (SPR_DTLBMR_BASE(0) + TLB_DATA_SET_NB, (ea & SPR_DTLBMR_VPN) | SPR_DTLBMR_V); |
mtspr (SPR_DTLBTR_BASE(0) + TLB_DATA_SET_NB, ((ea + PAGE_SIZE) & SPR_DTLBTR_PPN) | dtlb_val); |
|
/* Enable DMMU */ |
dmmu_enable (); |
|
/* Check if there was bus error exception */ |
ret = call ((unsigned long)&load_acc_32, ea ); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_BERR)); |
ASSERT(except_pc == (unsigned long)load_acc_32 + 8); |
ASSERT(except_ea == ea); |
ASSERT(ret == 0x12345678); |
|
/* Disable DMMU */ |
dmmu_disable (); |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Check if there was bus error exception */ |
ret = call ((unsigned long)&load_acc_32, ea ); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_BERR)); |
ASSERT(except_pc == (unsigned long)load_acc_32 + 8); |
ASSERT(except_ea == ea); |
ASSERT(ret == 0x12345678); |
|
return 0; |
} |
|
/* Illegal instruction test */ |
int illegal_insn_test (void) |
{ |
int ret; |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Set illegal insn code. |
|
Original code had two bugs. First it jumped to the illegal instruction, |
rather than the immediately preceding l.jr r9 (allowing us to |
recover). Secondly it used 0xffffffff as an illegal instruction. Except |
it isn't - it's l.cust8 0x3ffffff. |
|
Fixed by a) jumping to the correct location and b) really using an |
illegal instruction. */ |
REG32(RAM_START + (RAM_SIZE/2)) = REG32((unsigned long)jump_back + 4); |
REG32(RAM_START + (RAM_SIZE/2) + 4) = 0xe5dfffff; |
|
/* Check if there was illegal insn exception. Note that if an illegal |
instruction occurs in a delay slot (like this one), then the exception |
PC is the address of the hump instruction. */ |
ret = call (RAM_START + (RAM_SIZE/2), 0 ); /* JPB */ |
|
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_ILLINSN)); |
ASSERT(except_pc == (RAM_START + (RAM_SIZE/2))); |
|
return 0; |
} |
|
/* Align test */ |
int align_test (void) |
{ |
int ret; |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Check if there was alignment exception on read insn */ |
ret = call ((unsigned long)&load_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 1); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_ALIGN)); |
ASSERT(ret == 0x12345678); |
ASSERT(except_pc == ((unsigned long)(load_acc_32) + 8)); |
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 1))); |
|
ret = call ((unsigned long)&load_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 2); |
ASSERT(except_count == 2); |
ASSERT(except_mask == (1 << V_ALIGN)); |
ASSERT(ret == 0x12345678); |
ASSERT(except_pc == ((unsigned long)(load_acc_32) + 8)); |
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 2))); |
|
ret = call ((unsigned long)&load_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 3); |
ASSERT(except_count == 3); |
ASSERT(except_mask == (1 << V_ALIGN)); |
ASSERT(ret == 0x12345678); |
ASSERT(except_pc == ((unsigned long)(load_acc_32) + 8)); |
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 3))); |
|
ret = call ((unsigned long)&load_acc_16, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 1); |
ASSERT(except_count == 4); |
ASSERT(except_mask == (1 << V_ALIGN)); |
ASSERT(ret == 0x12345678); |
ASSERT(except_pc == ((unsigned long)(load_acc_16) + 8)); |
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 1))); |
|
/* Check alignment exception on write insn */ |
call ((unsigned long)&store_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 1); |
ASSERT(except_count == 5); |
ASSERT(except_mask == (1 << V_ALIGN)); |
ASSERT(except_pc == ((unsigned long)(store_acc_32) + 8)); |
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 1))); |
|
call ((unsigned long)&store_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 2); |
ASSERT(except_count == 6); |
ASSERT(except_mask == (1 << V_ALIGN)); |
ASSERT(except_pc == ((unsigned long)(store_acc_32) + 8)); |
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 2))); |
|
call ((unsigned long)&store_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 3); |
ASSERT(except_count == 7); |
ASSERT(except_mask == (1 << V_ALIGN)); |
ASSERT(except_pc == ((unsigned long)(store_acc_32) + 8)); |
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 3))); |
|
call ((unsigned long)&store_acc_16, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 1); |
ASSERT(except_count == 8); |
ASSERT(except_mask == (1 << V_ALIGN)); |
ASSERT(except_pc == ((unsigned long)(store_acc_16) + 8)); |
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 1))); |
|
|
ret = call ((unsigned long)&load_b_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 1); |
ASSERT(except_count == 9); |
ASSERT(except_mask == (1 << V_ALIGN)); |
ASSERT(ret == 0x12345678); |
ASSERT(except_pc == ((unsigned long)(load_b_acc_32) + 8)); |
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 1))); |
|
|
return 0; |
} |
|
/* Trap test */ |
int trap_test (void) |
{ |
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Check if there was trap exception */ |
call ((unsigned long)&trap, 0); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_TRAP)); |
ASSERT(except_pc == (unsigned long)(trap)); |
|
/* Check if there was trap exception */ |
call ((unsigned long)&b_trap, 0); |
ASSERT(except_count == 2); |
ASSERT(except_mask == (1 << V_TRAP)); |
ASSERT(except_pc == (unsigned long)(b_trap)); |
|
return 0; |
} |
|
/* Range test */ |
int range_test (void) |
{ |
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Check if there was range exception */ |
mtspr (SPR_SR, mfspr (SPR_SR) | SPR_SR_OVE); |
call ((unsigned long)&range, 0); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_RANGE)); |
ASSERT(except_pc == (unsigned long)(range)); |
ASSERT(except_ea == 0); |
|
/* Check if there was range exception */ |
mtspr (SPR_SR, mfspr (SPR_SR) | SPR_SR_OVE); |
call ((unsigned long)&b_range, 0); |
ASSERT(except_count == 2); |
ASSERT(except_mask == (1 << V_RANGE)); |
ASSERT(except_pc == (unsigned long)(b_range)); |
|
return 0; |
} |
|
/* Exception priority test */ |
void except_priority_test (void) |
{ |
int i, j; |
unsigned long ea, ta, ret; |
|
/* Invalidate all entries in ITLB */ |
for (i = 0; i < ITLB_WAYS; i++) { |
for (j = 0; j < ITLB_SETS; j++) { |
mtspr (SPR_ITLBMR_BASE(i) + j, 0); |
mtspr (SPR_ITLBTR_BASE(i) + j, 0); |
} |
} |
|
/* Set one to one translation for the use of this program */ |
for (i = 0; i < TLB_TEXT_SET_NB; i++) { |
ea = FLASH_START + (i*PAGE_SIZE); |
ta = FLASH_START + (i*PAGE_SIZE); |
mtspr (SPR_ITLBMR_BASE(0) + i, ea | SPR_ITLBMR_V); |
mtspr (SPR_ITLBTR_BASE(0) + i, ta | ITLB_PR_NOLIMIT); |
} |
|
/* Set dtlb no permisions */ |
itlb_val = SPR_ITLBTR_CI; |
|
/* Invalidate all entries in DTLB */ |
for (i = 0; i < DTLB_WAYS; i++) { |
for (j = 0; j < DTLB_SETS; j++) { |
mtspr (SPR_DTLBMR_BASE(i) + j, 0); |
mtspr (SPR_DTLBTR_BASE(i) + j, 0); |
} |
} |
|
/* Set one to one translation for the use of this program */ |
for (i = 0; i < TLB_DATA_SET_NB; i++) { |
ea = RAM_START + (i*PAGE_SIZE); |
ta = RAM_START + (i*PAGE_SIZE); |
mtspr (SPR_DTLBMR_BASE(0) + i, ea | SPR_ITLBMR_V); |
mtspr (SPR_DTLBTR_BASE(0) + i, ta | DTLB_PR_NOLIMIT); |
} |
|
/* Init tick timer */ |
tick_init (1, 1); |
|
/* Set dtlb no permisions */ |
dtlb_val = SPR_DTLBTR_CI; |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Enable IMMU */ |
immu_enable (); |
|
/* Check if there was INT exception */ |
call_with_int (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE), 0); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_TICK)); |
ASSERT(except_pc == (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE))); |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Check if there was ITLB exception */ |
call (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE), 0); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_ITLB_MISS)); |
ASSERT(except_pc == (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE))); |
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE))); |
|
/* Set dtlb permisions */ |
itlb_val |= SPR_ITLBTR_SXE; |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Check if there was IPF exception */ |
call (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE), 0); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_IPF)); |
ASSERT(except_pc == (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE))); |
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE))); |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Check if there was bus error exception */ |
call (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE), 0); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_BERR)); |
ASSERT(except_pc == (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE))); |
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE))); |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Disable MMU */ |
immu_disable (); |
|
/* Set illegal instruction. JPB. Use a really illegal instruction, not |
l.cust8 0x3ffffff. */ |
REG32(RAM_START + (RAM_SIZE/2) + (TLB_TEXT_SET_NB*PAGE_SIZE) + 0) = 0x00000000; |
REG32(RAM_START + (RAM_SIZE/2) + (TLB_TEXT_SET_NB*PAGE_SIZE) + 4) = 0xe5dfffff; |
REG32(RAM_START + (RAM_SIZE/2) + (TLB_TEXT_SET_NB*PAGE_SIZE) + 8) = 0x00000000; |
|
/* Check if there was illegal insn exception */ |
call (RAM_START + (RAM_SIZE/2) + (TLB_TEXT_SET_NB*PAGE_SIZE) + 4, 0); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_ILLINSN)); |
ASSERT(except_pc == (RAM_START + (RAM_SIZE/2) + (TLB_TEXT_SET_NB*PAGE_SIZE) + 4)); |
ASSERT(except_ea == (RAM_START + (RAM_SIZE/2) + (TLB_TEXT_SET_NB*PAGE_SIZE) + 4 )); |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Enable DMMU */ |
dmmu_enable (); |
|
/* Check if there was alignment exception on read insn */ |
ret = call ((unsigned long)&load_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 1); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_ALIGN)); |
ASSERT(ret == 0x12345678); |
ASSERT(except_pc == ((unsigned long)(load_acc_32) + 8)); |
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 1))); |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Check if there was DTLB exception */ |
ret = call ((unsigned long)&load_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE)); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_DTLB_MISS)); |
ASSERT(ret == 0x12345678); |
ASSERT(except_pc == ((unsigned long)(load_acc_32) + 8)); |
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE))); |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Set dtlb permisions */ |
dtlb_val |= SPR_DTLBTR_SRE; |
|
/* Check if there was DPF exception */ |
ret = call ((unsigned long)&load_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE)); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_DPF)); |
ASSERT(ret == 0x12345678); |
ASSERT(except_pc == ((unsigned long)(load_acc_32) + 8)); |
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE))); |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Check if there was bus error exception */ |
ret = call ((unsigned long)&load_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE)); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_BERR)); |
ASSERT(ret == 0x12345678); |
ASSERT(except_pc == ((unsigned long)(load_acc_32) + 8)); |
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE))); |
|
/* Reset except counter */ |
except_count = 0; |
except_mask = 0; |
except_pc = 0; |
except_ea = 0; |
|
/* Check if there was trap exception */ |
call ((unsigned long)&trap, 0); |
ASSERT(except_count == 1); |
ASSERT(except_mask == (1 << V_TRAP)); |
ASSERT(except_pc == (unsigned long)(trap)); |
|
} |
|
int main (void) |
{ |
int ret; |
|
printf("except_test\n"); |
|
/* Register bus error handler */ |
excpt_buserr = (unsigned long)bus_err_handler; |
|
/* Register illegal insn handler */ |
excpt_illinsn = (unsigned long)ill_insn_handler; |
|
/* Register tick timer exception handler */ |
excpt_tick = (unsigned long)tick_handler; |
|
/* Register external interrupt handler */ |
excpt_int = (unsigned long)int_handler; |
|
/* Register ITLB miss handler */ |
excpt_itlbmiss = (unsigned long)itlb_miss_handler; |
|
/* Register instruction page fault handler */ |
excpt_ipfault = (unsigned long)ipage_fault_handler; |
|
/* Register DTLB miss handler */ |
excpt_dtlbmiss = (unsigned long)dtlb_miss_handler; |
|
/* Register data page fault handler */ |
excpt_dpfault = (unsigned long)dpage_fault_handler; |
|
/* Register trap handler */ |
excpt_trap = (unsigned long)trap_handler; |
|
/* Register align handler */ |
excpt_align = (unsigned long)align_handler; |
|
/* Register range handler */ |
excpt_range = (unsigned long)range_handler; |
|
/* Exception basic test */ |
ret = except_basic (); |
ASSERT(ret == 0); |
|
/* Interrupt exception test */ |
interrupt_test (); |
|
/* ITLB exception test */ |
itlb_test (); |
|
printf("dtlb_test\n"); |
/* DTLB exception test */ |
dtlb_test (); |
|
printf("buserr_test\n"); |
/* Bus error exception test */ |
buserr_test (); |
|
printf("illegal_insn_test\n"); |
/* Bus error exception test */ |
/* Illegal insn test */ |
illegal_insn_test (); |
|
printf("align_test\n"); |
/* Alignment test */ |
align_test (); |
|
printf("trap_test\n"); |
/* Trap test */ |
trap_test (); |
|
printf("except_priority_test\n"); |
/* Range test */ |
// range_test (); |
|
/* Exception priority test */ |
except_priority_test (); |
|
report (0xdeaddead); |
exit (0); |
|
return 0; |
} |
|
except-test.c
Property changes :
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+Id
\ No newline at end of property
Index: except-test-s.S
===================================================================
--- except-test-s.S (nonexistent)
+++ except-test-s.S (revision 135)
@@ -0,0 +1,671 @@
+/* except-test-s.S. Machine code support for test of Or1ksim exception handling
+
+ Copyright (C) 1999-2006 OpenCores
+ Copyright (C) 2010 Embecosm Limited
+
+ Contributors various OpenCores participants
+ Contributor Jeremy Bennett
+
+ This file is part of OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see . */
+
+/* ----------------------------------------------------------------------------
+ This code is commented throughout for use with Doxygen.
+ --------------------------------------------------------------------------*/
+
+#include "spr-defs.h"
+#include "board.h"
+
+#define reset _main
+
+#define MC_CSR (0x00)
+#define MC_POC (0x04)
+#define MC_BA_MASK (0x08)
+#define MC_CSC(i) (0x10 + (i) * 8)
+#define MC_TMS(i) (0x14 + (i) * 8)
+
+ .global _except_basic
+ .global _lo_dmmu_en
+ .global _lo_immu_en
+ .global _call
+ .global _call_with_int
+ .global _load_acc_32
+ .global _load_acc_16
+ .global _store_acc_32
+ .global _store_acc_16
+ .global _load_b_acc_32
+ .global _trap
+ .global _b_trap
+ .global _range
+ .global _b_range
+ .global _int_trigger
+ .global _int_loop
+ .global _jump_back
+
+ .section .stack
+ .space 0x1000
+_stack:
+
+ .extern _reset_support
+ .extern _c_reset
+ .extern _excpt_buserr
+ .extern _excpt_dpfault
+ .extern _excpt_ipfault
+ .extern _excpt_tick
+ .extern _excpt_align
+ .extern _excpt_illinsn
+ .extern _excpt_int
+ .extern _excpt_dtlbmiss
+ .extern _excpt_itlbmiss
+ .extern _excpt_range
+ .extern _excpt_syscall
+ .extern _excpt_break
+ .extern _excpt_trap
+
+ .section .except, "ax"
+
+_buserr_vector:
+ l.addi r1,r1,-120
+ l.sw 0x1c(r1),r9
+ l.sw 0x20(r1),r10
+ l.movhi r9,hi(store_regs)
+ l.ori r9,r9,lo(store_regs)
+ l.movhi r10,hi(_excpt_buserr)
+ l.ori r10,r10,lo(_excpt_buserr)
+ l.jr r9
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+
+_dpfault_vector:
+ l.addi r1,r1,-120
+ l.sw 0x1c(r1),r9
+ l.sw 0x20(r1),r10
+ l.movhi r9,hi(store_regs)
+ l.ori r9,r9,lo(store_regs)
+ l.movhi r10,hi(_excpt_dpfault)
+ l.ori r10,r10,lo(_excpt_dpfault)
+ l.jr r9
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+
+_ipfault_vector:
+ l.addi r1,r1,-120
+ l.sw 0x1c(r1),r9
+ l.sw 0x20(r1),r10
+ l.movhi r9,hi(store_regs)
+ l.ori r9,r9,lo(store_regs)
+ l.movhi r10,hi(_excpt_ipfault)
+ l.ori r10,r10,lo(_excpt_ipfault)
+ l.jr r9
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+
+_tick_vector:
+ l.addi r1,r1,-120
+ l.sw 0x1c(r1),r9
+ l.sw 0x20(r1),r10
+ l.movhi r9,hi(store_regs)
+ l.ori r9,r9,lo(store_regs)
+ l.movhi r10,hi(_excpt_tick)
+ l.ori r10,r10,lo(_excpt_tick)
+ l.jr r9
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+
+_align_vector:
+ l.addi r1,r1,-120
+ l.sw 0x1c(r1),r9
+ l.sw 0x20(r1),r10
+ l.movhi r9,hi(store_regs)
+ l.ori r9,r9,lo(store_regs)
+ l.movhi r10,hi(_excpt_align)
+ l.ori r10,r10,lo(_excpt_align)
+ l.jr r9
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+
+_illinsn_vector:
+ l.addi r1,r1,-120
+ l.sw 0x1c(r1),r9
+ l.sw 0x20(r1),r10
+ l.movhi r9,hi(store_regs)
+ l.ori r9,r9,lo(store_regs)
+ l.movhi r10,hi(_excpt_illinsn)
+ l.ori r10,r10,lo(_excpt_illinsn)
+ l.jr r9
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+
+_int_vector:
+ l.addi r1,r1,-120
+ l.sw 0x1c(r1),r9
+ l.sw 0x20(r1),r10
+ l.movhi r9,hi(store_regs)
+ l.ori r9,r9,lo(store_regs)
+ l.movhi r10,hi(_excpt_int)
+ l.ori r10,r10,lo(_excpt_int)
+ l.jr r9
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+
+_dtlbmiss_vector:
+ l.addi r1,r1,-120
+ l.sw 0x1c(r1),r9
+ l.sw 0x20(r1),r10
+ l.movhi r9,hi(store_regs)
+ l.ori r9,r9,lo(store_regs)
+ l.movhi r10,hi(_excpt_dtlbmiss)
+ l.ori r10,r10,lo(_excpt_dtlbmiss)
+ l.jr r9
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+
+_itlbmiss_vector:
+ l.addi r1,r1,-120
+ l.sw 0x1c(r1),r9
+ l.sw 0x20(r1),r10
+ l.movhi r9,hi(store_regs)
+ l.ori r9,r9,lo(store_regs)
+ l.movhi r10,hi(_excpt_itlbmiss)
+ l.ori r10,r10,lo(_excpt_itlbmiss)
+ l.jr r9
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+
+_range_vector:
+ l.addi r1,r1,-120
+ l.sw 0x1c(r1),r9
+ l.sw 0x20(r1),r10
+ l.movhi r9,hi(store_regs)
+ l.ori r9,r9,lo(store_regs)
+ l.movhi r10,hi(_excpt_range)
+ l.ori r10,r10,lo(_excpt_range)
+ l.jr r9
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+
+_syscall_vector:
+ l.addi r3,r3,4
+
+ l.mfspr r4,r0,SPR_SR
+ l.andi r4,r4,7
+ l.add r6,r0,r4
+
+ l.mfspr r4,r0,SPR_EPCR_BASE
+ l.movhi r5,hi(_sys1)
+ l.ori r5,r5,lo(_sys1)
+ l.sub r5,r4,r5
+
+ l.mfspr r4,r0,SPR_ESR_BASE /* ESR - set supvisor mode */
+ l.ori r4,r4,SPR_SR_SM
+ l.mtspr r0,r4,SPR_ESR_BASE
+
+ l.movhi r4,hi(_sys2)
+ l.ori r4,r4,lo(_sys2)
+ l.mtspr r0,r4,SPR_EPCR_BASE
+
+ l.rfe
+ l.addi r3,r3,8
+
+_break_vector:
+ l.addi r1,r1,-120
+ l.sw 0x1c(r1),r9
+ l.sw 0x20(r1),r10
+ l.movhi r9,hi(store_regs)
+ l.ori r9,r9,lo(store_regs)
+ l.movhi r10,hi(_excpt_break)
+ l.ori r10,r10,lo(_excpt_break)
+ l.jr r9
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+
+_trap_vector:
+ l.addi r1,r1,-120
+ l.sw 0x1c(r1),r9
+ l.sw 0x20(r1),r10
+ l.movhi r9,hi(store_regs)
+ l.ori r9,r9,lo(store_regs)
+ l.movhi r10,hi(_excpt_trap)
+ l.ori r10,r10,lo(_excpt_trap)
+ l.jr r9
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+
+ /* Our special text section is used to guarantee this code goes first
+ when linking. */
+ .section .except-text
+
+ .org 0x100
+_reset_vector:
+ l.nop
+ l.nop
+ l.addi r2,r0,0x0
+ l.addi r3,r0,0x0
+ l.addi r4,r0,0x0
+ l.addi r5,r0,0x0
+ l.addi r6,r0,0x0
+ l.addi r7,r0,0x0
+ l.addi r8,r0,0x0
+ l.addi r9,r0,0x0
+ l.addi r10,r0,0x0
+ l.addi r11,r0,0x0
+ l.addi r12,r0,0x0
+ l.addi r13,r0,0x0
+ l.addi r14,r0,0x0
+ l.addi r15,r0,0x0
+ l.addi r16,r0,0x0
+ l.addi r17,r0,0x0
+ l.addi r18,r0,0x0
+ l.addi r19,r0,0x0
+ l.addi r20,r0,0x0
+ l.addi r21,r0,0x0
+ l.addi r22,r0,0x0
+ l.addi r23,r0,0x0
+ l.addi r24,r0,0x0
+ l.addi r25,r0,0x0
+ l.addi r26,r0,0x0
+ l.addi r27,r0,0x0
+ l.addi r28,r0,0x0
+ l.addi r29,r0,0x0
+ l.addi r30,r0,0x0
+ l.addi r31,r0,0x0
+
+ l.movhi r3,hi(start)
+ l.ori r3,r3,lo(start)
+ l.jr r3
+ l.nop
+start:
+ l.jal _init_mc
+ l.nop
+
+ l.movhi r1,hi(_stack)
+ l.ori r1,r1,lo(_stack)
+
+ /* Setup exception wrappers */
+ l.movhi r3,hi(_src_beg)
+ l.ori r3,r3,lo(_src_beg)
+ l.addi r7,r0,0x100
+
+1: l.addi r7,r7,0x100
+ l.sfeqi r7,0xf00
+ l.bf 1f
+ l.nop
+ l.addi r4,r7,0
+ l.addi r5,r0,0
+2:
+ l.lwz r6,0(r3)
+ l.sw 0(r4),r6
+ l.addi r3,r3,4
+ l.addi r4,r4,4
+ l.addi r5,r5,1
+ l.sfeqi r5,16
+ l.bf 1b
+ l.nop
+ l.j 2b
+ l.nop
+1:
+ /* Copy data section */
+ l.movhi r4,hi(_dst_beg)
+ l.ori r4,r4,lo(_dst_beg)
+ l.movhi r5,hi(_dst_end)
+ l.ori r5,r5,lo(_dst_end)
+ l.sub r5,r5,r4
+ l.sfeqi r5,0
+ l.bf 2f
+ l.nop
+1: l.lwz r6,0(r3)
+ l.sw 0(r4),r6
+ l.addi r3,r3,4
+ l.addi r4,r4,4
+ l.addi r5,r5,-4
+ l.sfgtsi r5,0
+ l.bf 1b
+ l.nop
+
+2:
+
+ l.movhi r2,hi(reset)
+ l.ori r2,r2,lo(reset)
+ l.jr r2
+ l.nop
+
+_init_mc:
+
+ l.movhi r3,hi(MC_BASE_ADDR)
+ l.ori r3,r3,lo(MC_BASE_ADDR)
+
+ l.addi r4,r3,MC_CSC(0)
+ l.movhi r5,hi(FLASH_BASE_ADDR)
+ l.srai r5,r5,6
+ l.ori r5,r5,0x0025
+ l.sw 0(r4),r5
+
+ l.addi r4,r3,MC_TMS(0)
+ l.movhi r5,hi(FLASH_TMS_VAL)
+ l.ori r5,r5,lo(FLASH_TMS_VAL)
+ l.sw 0(r4),r5
+
+ l.addi r4,r3,MC_BA_MASK
+ l.addi r5,r0,MC_MASK_VAL
+ l.sw 0(r4),r5
+
+ l.addi r4,r3,MC_CSR
+ l.movhi r5,hi(MC_CSR_VAL)
+ l.ori r5,r5,lo(MC_CSR_VAL)
+ l.sw 0(r4),r5
+
+ l.addi r4,r3,MC_TMS(1)
+ l.movhi r5,hi(SDRAM_TMS_VAL)
+ l.ori r5,r5,lo(SDRAM_TMS_VAL)
+ l.sw 0(r4),r5
+
+ l.addi r4,r3,MC_CSC(1)
+ l.movhi r5,hi(SDRAM_BASE_ADDR)
+ l.srai r5,r5,6
+ l.ori r5,r5,0x0411
+ l.sw 0(r4),r5
+
+ l.jr r9
+ l.nop
+
+store_regs:
+ l.sw 0x00(r1),r2
+ l.sw 0x04(r1),r3
+ l.sw 0x08(r1),r4
+ l.sw 0x0c(r1),r5
+ l.sw 0x10(r1),r6
+ l.sw 0x14(r1),r7
+ l.sw 0x18(r1),r8
+ l.sw 0x24(r1),r11
+ l.sw 0x28(r1),r12
+ l.sw 0x2c(r1),r13
+ l.sw 0x30(r1),r14
+ l.sw 0x34(r1),r15
+ l.sw 0x38(r1),r16
+ l.sw 0x3c(r1),r17
+ l.sw 0x40(r1),r18
+ l.sw 0x44(r1),r19
+ l.sw 0x48(r1),r20
+ l.sw 0x4c(r1),r21
+ l.sw 0x50(r1),r22
+ l.sw 0x54(r1),r23
+ l.sw 0x58(r1),r24
+ l.sw 0x5c(r1),r25
+ l.sw 0x60(r1),r26
+ l.sw 0x64(r1),r27
+ l.sw 0x68(r1),r28
+ l.sw 0x6c(r1),r29
+ l.sw 0x70(r1),r30
+ l.sw 0x74(r1),r31
+
+ l.mfspr r3,r0,SPR_EPCR_BASE
+ l.movhi r4,hi(_except_pc)
+ l.ori r4,r4,lo(_except_pc)
+ l.sw 0(r4),r3
+
+ l.mfspr r3,r0,SPR_EEAR_BASE
+ l.movhi r4,hi(_except_ea)
+ l.ori r4,r4,lo(_except_ea)
+ l.sw 0(r4),r3
+
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+end_except:
+ l.lwz r2,0x00(r1)
+ l.lwz r3,0x04(r1)
+ l.lwz r4,0x08(r1)
+ l.lwz r5,0x0c(r1)
+ l.lwz r6,0x10(r1)
+ l.lwz r7,0x14(r1)
+ l.lwz r8,0x18(r1)
+ l.lwz r9,0x1c(r1)
+ l.lwz r10,0x20(r1)
+ l.lwz r11,0x24(r1)
+ l.lwz r12,0x28(r1)
+ l.lwz r13,0x2c(r1)
+ l.lwz r14,0x30(r1)
+ l.lwz r15,0x34(r1)
+ l.lwz r16,0x38(r1)
+ l.lwz r17,0x3c(r1)
+ l.lwz r18,0x40(r1)
+ l.lwz r19,0x44(r1)
+ l.lwz r20,0x48(r1)
+ l.lwz r21,0x4c(r1)
+ l.lwz r22,0x50(r1)
+ l.lwz r23,0x54(r1)
+ l.lwz r24,0x58(r1)
+ l.lwz r25,0x5c(r1)
+ l.lwz r26,0x60(r1)
+ l.lwz r27,0x64(r1)
+ l.lwz r28,0x68(r1)
+ l.lwz r29,0x6c(r1)
+ l.lwz r30,0x70(r1)
+ l.lwz r31,0x74(r1)
+ l.addi r1,r1,120
+ l.mtspr r0,r9,SPR_EPCR_BASE
+ l.rfe
+ l.nop
+
+ .section .text
+
+_except_basic:
+_sys1:
+ l.addi r3,r0,-2 /* Enable exceptiom recognition and external interrupt,set user mode */
+ l.mfspr r4,r0,SPR_SR
+ l.and r4,r4,r3
+ l.ori r4,r4,(SPR_SR_IEE|SPR_SR_TEE)
+ l.mtspr r0,r4,SPR_SR
+
+ l.addi r3,r0,0
+ l.sys 1
+ l.addi r3,r3,2
+
+_sys2:
+ l.addi r11,r0,0
+
+ l.mfspr r4,r0,SPR_SR /* Check SR */
+ l.andi r4,r4,(SPR_SR_IEE|SPR_SR_TEE|SPR_SR_SM)
+ l.sfeqi r4,(SPR_SR_IEE|SPR_SR_TEE|SPR_SR_SM)
+ l.bf 1f
+ l.nop
+ l.addi r11,r11,1
+1:
+ l.sfeqi r3,4 /* Check if l.sys or l.rfe has delay slot */
+ l.bf 1f
+ l.nop
+ l.addi r11,r11,2
+1:
+ l.sfeqi r5,0x1c /* Check the EPCR */
+ l.bf 1f
+ l.nop
+ l.addi r11,r11,4
+1:
+ l.sfeqi r6,SPR_SR_SM /* Check the SR when exception is taken */
+ l.bf 1f
+ l.nop
+ l.addi r11,r11,8
+1:
+ l.jr r9
+ l.nop
+
+_lo_dmmu_en:
+ l.mfspr r3,r0,SPR_SR
+ l.ori r3,r3,SPR_SR_DME
+ l.mtspr r0,r3,SPR_ESR_BASE
+ l.mtspr r0,r9,SPR_EPCR_BASE
+ l.rfe
+ l.nop
+
+_lo_immu_en:
+ l.mfspr r3,r0,SPR_SR
+ l.ori r3,r3,SPR_SR_IME
+ l.mtspr r0,r3,SPR_ESR_BASE
+ l.mtspr r0,r9,SPR_EPCR_BASE
+ l.rfe
+ l.nop
+
+_call:
+ l.addi r11,r0,0
+ l.jr r3
+ l.nop
+
+_call_with_int:
+ l.mfspr r8,r0,SPR_SR
+ l.ori r8,r8,SPR_SR_TEE
+ l.mtspr r0,r8,SPR_ESR_BASE
+ l.mtspr r0,r3,SPR_EPCR_BASE
+ l.rfe
+
+_load_acc_32:
+ l.movhi r11,hi(0x12345678)
+ l.ori r11,r11,lo(0x12345678)
+ l.lwz r11,0(r4)
+ l.jr r9
+ l.nop
+
+_load_acc_16:
+ l.movhi r11,hi(0x12345678)
+ l.ori r11,r11,lo(0x12345678)
+ l.lhz r11,0(r4)
+ l.jr r9
+ l.nop
+
+_store_acc_32:
+ l.movhi r3,hi(0x12345678)
+ l.ori r3,r3,lo(0x12345678)
+ l.sw 0(r4),r3
+ l.jr r9
+ l.nop
+
+_store_acc_16:
+ l.movhi r3,hi(0x12345678)
+ l.ori r3,r3,lo(0x12345678)
+ l.sh 0(r4),r3
+ l.jr r9
+ l.nop
+
+_load_b_acc_32:
+ l.movhi r11,hi(0x12345678)
+ l.ori r11,r11,lo(0x12345678)
+ l.jr r9
+ l.lwz r11,0(r4)
+
+_b_trap:
+ l.jr r9
+_trap:
+ l.trap 1
+ l.jr r9
+ l.nop
+
+_b_range:
+ l.jr r9
+_range:
+ l.addi r3,r0,-1
+ l.jr r9
+ l.nop
+
+_int_trigger:
+ l.addi r11,r0,0
+ l.mfspr r3,r0,SPR_SR
+ l.ori r3,r3,SPR_SR_TEE
+ l.mtspr r0,r3,SPR_SR
+ l.addi r11,r11,1
+
+_int_loop:
+ l.j _int_loop
+ l.lwz r5,0(r4);
+
+_jump_back:
+ l.addi r11,r0,0
+ l.jr r9
+ l.addi r11,r11,1
+
except-test-s.S
Property changes :
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+Id
\ No newline at end of property
Index: Makefile.am
===================================================================
--- Makefile.am (nonexistent)
+++ Makefile.am (revision 135)
@@ -0,0 +1,35 @@
+# Makefile.am for or1ksim testsuite CPU test program: except-test
+
+# Copyright (C) Embecosm Limited, 2010
+
+# Contributor Jeremy Bennett
+
+# This file is part of OpenRISC 1000 Architectural Simulator.
+
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3 of the License, or (at your option)
+# any later version.
+
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program. If not, see . */
+
+# -----------------------------------------------------------------------------
+# This code is commented throughout for use with Doxygen.
+# -----------------------------------------------------------------------------
+
+
+# A test program of exception handling
+check_PROGRAMS = except-test
+
+except_test_SOURCES = except-test.c \
+ except-test-s.S
+
+except_test_LDFLAGS = -T$(srcdir)/../default.ld
+
+except_test_LDADD = ../support/libsupport.la
Makefile.am
Property changes :
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+Id
\ No newline at end of property