URL
https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Subversion Repositories openrisc_2011-10-31
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- This comparison shows the changes necessary to convert path
/openrisc/tags/or1ksim/or1ksim-0.4.0rc1/testsuite/test-code-or1k/mc-sync
- from Rev 101 to Rev 105
- ↔ Reverse comparison
Rev 101 → Rev 105
/Makefile.in
0,0 → 1,525
# Makefile.in generated by automake 1.11.1 from Makefile.am. |
# @configure_input@ |
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# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, |
# 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, |
# Inc. |
# This Makefile.in is free software; the Free Software Foundation |
# gives unlimited permission to copy and/or distribute it, |
# with or without modifications, as long as this notice is preserved. |
|
# This program is distributed in the hope that it will be useful, |
# but WITHOUT ANY WARRANTY, to the extent permitted by law; without |
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@SET_MAKE@ |
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# Makefile.am for or1ksim testsuite CPU test program: mc-sync |
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# Copyright (C) Embecosm Limited, 2010 |
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# Contributor Jeremy Bennett <jeremy.bennett@embecosm.com> |
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# This file is part of OpenRISC 1000 Architectural Simulator. |
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# This program is free software; you can redistribute it and/or modify it |
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# Tell versions [3.59,3.63) of GNU make to not export all variables. |
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/mc-sync.h
0,0 → 1,83
/* mc_sync.h - Memory Controller testbench SYNCdevices defines |
|
Copyright (C) 2001 Ivan Guzvinec |
Copyright (C) 2010 Embecosm Limited |
|
Contributor Ivan Guzvinec <ivang@opencores.org> |
Contributor Jeremy Bennett <jeremy.bennett@embecosm.com> |
|
This file is part of OpenRISC 1000 Architectural Simulator. |
|
This program is free software; you can redistribute it and/or modify it |
under the terms of the GNU General Public License as published by the Free |
Software Foundation; either version 3 of the License, or (at your option) |
any later version. |
|
This program is distributed in the hope that it will be useful, but WITHOUT |
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
more details. |
|
You should have received a copy of the GNU General Public License along |
with this program. If not, see <http: www.gnu.org/licenses/>. */ |
|
/* ---------------------------------------------------------------------------- |
This code is commented throughout for use with Doxygen. |
--------------------------------------------------------------------------*/ |
|
#ifndef __MC_SYNC_H |
#define __MC_SYNC_H |
|
/* should configuration be read from MC? */ |
#define MC_READ_CONF |
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/* TEMPLATE SELECTION */ |
/* change #undef to #define */ |
#define _MC_TEST_TEMPLATE1 |
#undef _MC_TEST_TEMPLATE2 |
#undef _MC_TEST_TEMPLATE3 |
/* ------------------------ */ |
|
/* memory configuration that must reflect mcmem.cfg */ |
#define MC_SYNC_CSMASK 0xFE /* 8 bit mask for 8 chip selects. 1 ASYNC at CS, 0 something else at CS */ |
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typedef struct MC_SYNC_CS |
{ |
unsigned long M; |
} MC_SYNC_CS; |
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MC_SYNC_CS mc_sync_cs[8] = { |
{ 0x02 /* SELect mask */ |
}, |
{ 0x04 }, |
{ 0x06 }, |
{ 0x08 }, |
{ 0x0A }, |
{ 0x0C }, |
{ 0x0E }, |
{ 0x10 } }; |
|
|
#define MC_SYNC_TEST0 0x00000001LU /* no parity, bank after column, write enable */ |
#define MC_SYNC_TEST1 0x00000002LU /* parity */ |
#define MC_SYNC_TEST2 0x00000004LU /* bank after row */ |
#define MC_SYNC_TEST3 0x00000008LU /* RO */ |
#define MC_SYNC_TEST4 0x00000010LU /* - NOT DEFINED - */ |
|
#ifdef _MC_TEST_TEMPLATE1 |
#define MC_SYNC_FLAGS 0x000002B4LU /* MC_TEST_ flags... see mc_common.h */ |
#define MC_SYNC_TESTS 0x00000005LU |
#endif |
|
#ifdef _MC_TEST_TEMPLATE2 |
#define MC_SYNC_FLAGS 0x00000128LU /* MC_TEST_ flags... see mc_common.h */ |
#define MC_SYNC_TESTS 0x00000008LU |
#endif |
|
#ifdef _MC_TEST_TEMPLATE3 |
#define MC_SYNC_FLAGS 0x000007FFLU /* MC_TEST_ flags... see mc_common.h */ |
#define MC_SYNC_TESTS 0x0000000FLU |
#endif |
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|
#endif |
mc-sync.h
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Index: Makefile.am
===================================================================
--- Makefile.am (nonexistent)
+++ Makefile.am (revision 105)
@@ -0,0 +1,43 @@
+# Makefile.am for or1ksim testsuite CPU test program: mc-sync
+
+# Copyright (C) Embecosm Limited, 2010
+
+# Contributor Jeremy Bennett
+
+# This file is part of OpenRISC 1000 Architectural Simulator.
+
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3 of the License, or (at your option)
+# any later version.
+
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program. If not, see . */
+
+# -----------------------------------------------------------------------------
+# This code is commented throughout for use with Doxygen.
+# -----------------------------------------------------------------------------
+
+
+# A test of memory control of synchronous memory. This code currently does
+# not work.
+check_PROGRAMS = mc-sync
+
+mc_sync_SOURCES = mc-sync.c \
+ mc-sync.h
+
+mc_sync_CPPFLAGS = -I$(srcdir)/../../../peripheral \
+ -I$(srcdir)/../../../cpu/common \
+ -I$(srcdir)/../../../cpu/or1k \
+ -I$(srcdir)/../../../port
+
+mc_sync_LDFLAGS = -T$(srcdir)/../except-mc.ld
+
+mc_sync_LDADD = ../mc-common/except-mc.lo \
+ ../mc-common/libmc-common.la \
+ ../support/libsupport.la
Makefile.am
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Index: mc-sync.c
===================================================================
--- mc-sync.c (nonexistent)
+++ mc-sync.c (revision 105)
@@ -0,0 +1,188 @@
+/* mc_sync.c - Memory Controller testbench SYNCdevice test
+
+ Copyright (C) 2001 Ivan Guzvinec
+ Copyright (C) 2010 Embecosm Limited
+
+ Contributor Ivan Guzvinec
+ Contributor Jeremy Bennett
+
+ This file is part of OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see . */
+
+/* ----------------------------------------------------------------------------
+ This code is commented throughout for use with Doxygen.
+ --------------------------------------------------------------------------*/
+
+#include "support.h"
+
+#include "mc-common.h"
+#include "mc-sync.h"
+
+#include "config.h"
+#include "mc.h"
+#include "gpio.h"
+#include "fields.h"
+
+typedef volatile unsigned long *REGISTER;
+
+REGISTER mc_poc = (unsigned long*)(MC_BASE + MC_POC);
+REGISTER mc_csr = (unsigned long*)(MC_BASE + MC_CSR);
+REGISTER mc_ba_mask = (unsigned long*)(MC_BASE + MC_BA_MASK);
+
+REGISTER rgpio_out = (unsigned long*)(GPIO_BASE + RGPIO_OUT);
+REGISTER rgpio_in = (unsigned long*)(GPIO_BASE + RGPIO_IN);
+
+unsigned long lpoc;
+unsigned char mc_cs;
+
+unsigned long set_config()
+{
+ REGISTER mc_csc;
+ unsigned char ch;
+
+ lpoc = *mc_poc;
+
+ for (ch=0; ch<8; ch++) {
+ if (MC_SYNC_CSMASK & (0x01 << ch) ) {
+ mc_csc = (unsigned long*)(MC_BASE + MC_CSC(ch));
+ SET_FIELD(*mc_csc, MC_CSC, SEL, mc_sync_cs[ch].M);
+ SET_FIELD(*mc_csc, MC_CSC, BW, 2);
+ SET_FLAG(*mc_csc, MC_CSC, EN);
+ printf ("Channel Config %d - CSC = 0x%08lX\n", ch, *mc_csc);
+ }
+ }
+
+ return 0;
+}
+
+unsigned long get_config()
+{
+ REGISTER mc_csc;
+ REGISTER mc_tms;
+ unsigned char ch;
+
+ mc_cs = 0;
+ for (ch=0; ch<8; ch++) {
+ mc_csc = (unsigned long*)(MC_BASE + MC_CSC(ch));
+ mc_tms = (unsigned long*)(MC_BASE + MC_TMS(ch));
+ if ( (GET_FIELD(*mc_csc, MC_CSC, MEMTYPE) == 3) &&
+ (TEST_FLAG(*mc_csc, MC_CSC, EN) == 1 ) ) {
+ mc_sync_cs[ch].M = GET_FIELD(*mc_csc, MC_CSC, SEL);
+ mc_cs |= (1 << ch);
+
+ printf("get_config(%d) : M=0x%0lx\n", ch,
+ mc_sync_cs[ch].M);
+ }
+ }
+ printf("get_config() : cs=0x%0x\n", mc_cs);
+ return 0;
+}
+
+int main()
+{
+ unsigned long ret;
+ unsigned char ch;
+
+ unsigned long test;
+ unsigned long gpio_pat = 0;
+
+ unsigned long nAddress;
+ unsigned long nMemSize;
+ unsigned long mc_sel;
+ REGISTER mc_tms;
+ REGISTER mc_csc;
+
+ *rgpio_out = 0xFFFFFFFF;
+
+#ifdef MC_READ_CONF
+ if (get_config()) {
+ printf("Error reading MC configuration.\n");
+ report(1);
+ return(1);
+ }
+#else
+ mc_cs = MC_ASYNC_CSMASK;
+#endif
+
+ *rgpio_out = 0;
+ for (ch=0; ch<8; ch++) {
+ if (MC_SYNC_CSMASK & (0x01 << ch) ) {
+ printf ("--- Begin Test on CS%d ---\n", ch);
+
+ mc_csc = (unsigned long*)(MC_BASE + MC_CSC(ch));
+ mc_tms = (unsigned long*)(MC_BASE + MC_TMS(ch));
+ mc_sel = GET_FIELD(*mc_csc, MC_CSC, SEL);
+
+ printf ("CS configuration : CSC - 0x%08lX, TMS - 0x%08lXu\n",
+ *mc_csc, *mc_tms);
+
+ for (test=0; test<4; test++) {
+ /* configure MC*/
+ CLEAR_FLAG(*mc_csc, MC_CSC, PEN); /* no parity */
+ CLEAR_FLAG(*mc_csc, MC_CSC, BAS); /* bank after column */
+ CLEAR_FLAG(*mc_csc, MC_CSC, WP); /* write enable */
+
+ switch (test) {
+ case 0:
+ if ((MC_SYNC_TESTS & MC_SYNC_TEST0) != MC_SYNC_TEST0)
+ continue;
+ break;
+ case 1:
+ if ((MC_SYNC_TESTS & MC_SYNC_TEST1) != MC_SYNC_TEST1)
+ continue;
+ SET_FLAG(*mc_csc, MC_CSC, PEN); /* parity */
+ break;
+ case 2:
+ if ((MC_SYNC_TESTS & MC_SYNC_TEST2) != MC_SYNC_TEST2)
+ continue;
+ SET_FLAG(*mc_csc, MC_CSC, BAS); /* bank after row */
+ break;
+ case 3:
+ if ((MC_SYNC_TESTS & MC_SYNC_TEST3) != MC_SYNC_TEST3)
+ continue;
+ SET_FLAG(*mc_csc, MC_CSC, WP); /* RO */
+ break;
+ } /*switch test*/
+
+ printf ("Begin TEST %lu : CSC - 0x%08lX, TMS - 0x%08lX\n", test, *mc_csc, *mc_tms);
+
+ nAddress = mc_sel << 21;
+ nAddress |= MC_MEM_BASE;
+ nMemSize = ( ((*mc_ba_mask & 0x000000FF) + 1) << 21);
+
+ gpio_pat ^= 0x00000008;
+ *rgpio_out = gpio_pat;
+ ret = mc_test_row(nAddress, nAddress + nMemSize, MC_SYNC_FLAGS);
+
+ printf("\trow tested: nAddress = 0x%08lX, ret = 0x%08lX\n", nAddress, ret);
+
+ if (ret) {
+ gpio_pat ^= 0x00000080;
+ *rgpio_out = gpio_pat;
+ report(ret);
+ return ret;
+ }
+
+ } /*for test*/
+ } /*if*/
+ } /*for CS*/
+ printf("--- End SYNC tests ---\n");
+ report(0xDEADDEAD);
+
+ gpio_pat ^= 0x00000020;
+ *rgpio_out = gpio_pat;
+
+ return 0;
+} /* main */
mc-sync.c
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