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Rev 121 → Rev 128
/Makefile.in
0,0 → 1,525
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# @configure_input@ |
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# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, |
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# Inc. |
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# Makefile.am for or1ksim testsuite CPU test program: mc-async |
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# Copyright (C) Embecosm Limited, 2010 |
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# Contributor Jeremy Bennett <jeremy.bennett@embecosm.com> |
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# This file is part of OpenRISC 1000 Architectural Simulator. |
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/mc-async.c
0,0 → 1,188
/* mc_async.c - Memory Controller testbench ASYNCdevice test |
|
Copyright (C) 2001 Ivan Guzvinec |
Copyright (C) 2010 Embecosm Limited |
|
Contributor Ivan Guzvinec <ivang@opencores.org> |
Contributor Jeremy Bennett <jeremy.bennett@embecosm.com> |
|
This file is part of OpenRISC 1000 Architectural Simulator. |
|
This program is free software; you can redistribute it and/or modify it |
under the terms of the GNU General Public License as published by the Free |
Software Foundation; either version 3 of the License, or (at your option) |
any later version. |
|
This program is distributed in the hope that it will be useful, but WITHOUT |
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
more details. |
|
You should have received a copy of the GNU General Public License along |
with this program. If not, see <http: www.gnu.org/licenses/>. */ |
|
/* ---------------------------------------------------------------------------- |
This code is commented throughout for use with Doxygen. |
--------------------------------------------------------------------------*/ |
|
#include "support.h" |
|
#include "mc-common.h" |
#include "mc-async.h" |
|
#include "config.h" |
#include "mc-defines.h" |
#include "gpio.h" |
#include "fields.h" |
|
typedef volatile unsigned long *REGISTER; |
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REGISTER mc_poc = (unsigned long*)(MC_BASE + MC_POC); |
REGISTER mc_csr = (unsigned long*)(MC_BASE + MC_CSR); |
REGISTER mc_ba_mask = (unsigned long*)(MC_BASE + MC_BA_MASK); |
|
REGISTER rgpio_out = (unsigned long*)(GPIO_BASE + RGPIO_OUT); |
REGISTER rgpio_in = (unsigned long*)(GPIO_BASE + RGPIO_IN); |
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unsigned long lpoc; |
unsigned char mc_cs; |
|
unsigned long set_config() |
{ |
REGISTER mc_csc; |
unsigned char ch; |
|
lpoc = *mc_poc; |
|
for (ch=0; ch<8; ch++) { |
if (MC_ASYNC_CSMASK & (0x01 << ch) ) { |
mc_csc = (unsigned long*)(MC_BASE + MC_CSC(ch)); |
SET_FIELD(*mc_csc, MC_CSC, SEL, mc_async_cs[ch].M); |
SET_FIELD(*mc_csc, MC_CSC, BW, mc_async_cs[ch].BW); |
SET_FLAG(*mc_csc, MC_CSC, EN); |
printf ("Channel Config %d - CSC = 0x%08lX\n", ch, *mc_csc); |
} |
} |
|
return 0; |
} |
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unsigned long get_config() |
{ |
REGISTER mc_csc; |
REGISTER mc_tms; |
unsigned char ch; |
|
mc_cs = 0; |
for (ch=0; ch<8; ch++) { |
mc_csc = (unsigned long*)(MC_BASE + MC_CSC(ch)); |
mc_tms = (unsigned long*)(MC_BASE + MC_TMS(ch)); |
if ( (GET_FIELD(*mc_csc, MC_CSC, MEMTYPE) == 2) && |
(TEST_FLAG(*mc_csc, MC_CSC, EN) == 1 ) ) { |
mc_async_cs[ch].BW = GET_FIELD(*mc_csc, MC_CSC, BW); |
mc_async_cs[ch].M = GET_FIELD(*mc_csc, MC_CSC, SEL); |
mc_cs |= (1 << ch); |
|
printf("get_config(%d) : BW=0x%0lx, M=0x%0lx\n", ch, |
mc_async_cs[ch].BW, |
mc_async_cs[ch].M); |
} |
} |
printf("get_config() : cs=0x%0x\n", mc_cs); |
return 0; |
} |
|
int main() |
{ |
unsigned long ret; |
unsigned char ch; |
|
unsigned long test; |
unsigned long gpio_pat = 0; |
|
unsigned long nAddress; |
unsigned long nMemSize; |
unsigned long mc_sel; |
REGISTER mc_tms; |
REGISTER mc_csc; |
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*rgpio_out = 0xFFFFFFFF; |
#ifdef MC_READ_CONF |
if (get_config()) { |
printf("Error reading MC configuration.\n"); |
report(1); |
return(1); |
} |
#else |
mc_cs = MC_ASYNC_CSMASK; |
#endif |
|
for (ch=0; ch<8; ch++) { |
if (mc_cs & (0x01 << ch) ) { |
printf ("--- Begin Test on CS%d ---\n", ch); |
|
mc_csc = (unsigned long*)(MC_BASE + MC_CSC(ch)); |
mc_tms = (unsigned long*)(MC_BASE + MC_TMS(ch)); |
mc_sel = GET_FIELD(*mc_csc, MC_CSC, SEL); |
|
printf ("CS configuration : CSC - 0x%08lX, TMS - 0x%08lXu\n", |
*mc_csc, *mc_tms); |
|
for (test=0; test<4; test++) { |
/* configure MC*/ |
CLEAR_FLAG(*mc_csc, MC_CSC, PEN); /* no parity */ |
CLEAR_FLAG(*mc_csc, MC_CSC, BAS); /* bank after column */ |
CLEAR_FLAG(*mc_csc, MC_CSC, WP); /* write enable */ |
|
switch (test) { |
case 0: |
if ((MC_ASYNC_TESTS & MC_ASYNC_TEST0) != MC_ASYNC_TEST0) |
continue; |
break; |
case 1: |
if ((MC_ASYNC_TESTS & MC_ASYNC_TEST1) != MC_ASYNC_TEST1) |
continue; |
SET_FLAG(*mc_csc, MC_CSC, PEN); /* parity */ |
break; |
case 2: |
if ((MC_ASYNC_TESTS & MC_ASYNC_TEST2) != MC_ASYNC_TEST2) |
continue; |
SET_FLAG(*mc_csc, MC_CSC, BAS); /* bank after row */ |
break; |
case 3: |
if ((MC_ASYNC_TESTS & MC_ASYNC_TEST3) != MC_ASYNC_TEST3) |
continue; |
SET_FLAG(*mc_csc, MC_CSC, WP); /* RO */ |
break; |
} /*switch test*/ |
|
printf ("Begin TEST %lu : CSC - 0x%08lX, TMS - 0x%08lX\n", test, *mc_csc, *mc_tms); |
|
nAddress = mc_sel << 21; |
nAddress |= MC_MEM_BASE; |
nMemSize = ( ((*mc_ba_mask & 0x000000FF) + 1) << 21); |
|
gpio_pat ^= 0x00000008; |
*rgpio_out = gpio_pat; |
ret = mc_test_row(nAddress, nAddress + nMemSize, MC_ASYNC_FLAGS); |
|
printf("\trow tested: nAddress = 0x%08lX, ret = 0x%08lX\n", nAddress, ret); |
|
if (ret) { |
gpio_pat ^= 0x00000080; |
*rgpio_out = gpio_pat; |
report(ret); |
return ret; |
} |
|
} /*for test*/ |
} /*if*/ |
} /*for CS*/ |
printf("--- End ASYNC tests ---\n"); |
report(0xDEADDEAD); |
|
gpio_pat ^= 0x00000020; |
*rgpio_out = gpio_pat; |
|
return 0; |
} /* main */ |
mc-async.c
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Index: mc-async.h
===================================================================
--- mc-async.h (nonexistent)
+++ mc-async.h (revision 128)
@@ -0,0 +1,83 @@
+/* mc_async.h - Memory Controller testbench ASYNCdevices defines
+
+ Copyright (C) 2001 Ivan Guzvinec
+ Copyright (C) 2010 Embecosm Limited
+
+ Contributor Ivan Guzvinec
+ Contributor Jeremy Bennett
+
+ This file is part of OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see . */
+
+/* ----------------------------------------------------------------------------
+ This code is commented throughout for use with Doxygen.
+ --------------------------------------------------------------------------*/
+
+#ifndef __MC_ASYNC_H
+#define __MC_ASYNC_H
+
+/* should configuration be readm from MC? */
+#define MC_READ_CONF
+
+/* TEMPLATE SELECTION */
+/* change #undef to #define */
+#define _MC_TEST_TEMPLATE1
+#undef _MC_TEST_TEMPLATE2
+#undef _MC_TEST_TEMPLATE3
+/* ------------------------ */
+
+/* memory configuration that must reflect mcmem.cfg */
+#define MC_ASYNC_CSMASK 0xFE /* 8 bit mask for 8 chip selects. 1 ASYNC at CS, 0 something else at CS */
+
+typedef struct MC_ASYNC_CS
+{
+ unsigned long BW;
+ unsigned long M;
+} MC_ASYNC_CS;
+
+MC_ASYNC_CS mc_async_cs[8] = {
+ { 2, /* Bus Width : 0 - 8bit, 1 - 16bit, 2 - 32bit */
+ 0x02 /* SELect mask */
+ },
+ { 2, 0x04 },
+ { 2, 0x06 },
+ { 2, 0x08 },
+ { 2, 0x0A },
+ { 2, 0x0C },
+ { 2, 0x0E },
+ { 2, 0x10 } };
+
+#define MC_ASYNC_TEST0 0x00000001LU /* no parity, bank after column, write enable */
+#define MC_ASYNC_TEST1 0x00000002LU /* parity */
+#define MC_ASYNC_TEST2 0x00000004LU /* bank after row */
+#define MC_ASYNC_TEST3 0x00000008LU /* RO */
+#define MC_ASYNC_TEST4 0x00000010LU /* - NOT DEFINED - */
+
+#ifdef _MC_TEST_TEMPLATE1
+ #define MC_ASYNC_FLAGS 0x000002B4LU /* MC_TEST_ flags... see mc_common.h */
+ #define MC_ASYNC_TESTS 0x0000000FLU
+#endif
+
+#ifdef _MC_TEST_TEMPLATE2
+ #define MC_ASYNC_FLAGS 0x00000128LU /* MC_TEST_ flags... see mc_common.h */
+ #define MC_ASYNC_TESTS 0x00000008LU
+#endif
+
+#ifdef _MC_TEST_TEMPLATE3
+ #define MC_ASYNC_FLAGS 0x000007FFLU /* MC_TEST_ flags... see mc_common.h */
+ #define MC_ASYNC_TESTS 0x0000000FLU
+#endif
+
+#endif
mc-async.h
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Index: Makefile.am
===================================================================
--- Makefile.am (nonexistent)
+++ Makefile.am (revision 128)
@@ -0,0 +1,43 @@
+# Makefile.am for or1ksim testsuite CPU test program: mc-async
+
+# Copyright (C) Embecosm Limited, 2010
+
+# Contributor Jeremy Bennett
+
+# This file is part of OpenRISC 1000 Architectural Simulator.
+
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3 of the License, or (at your option)
+# any later version.
+
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program. If not, see . */
+
+# -----------------------------------------------------------------------------
+# This code is commented throughout for use with Doxygen.
+# -----------------------------------------------------------------------------
+
+
+# A test of memory control of asynchronous memory. This code currently does
+# not work.
+check_PROGRAMS = mc-async
+
+mc_async_SOURCES = mc-async.c \
+ mc-async.h
+
+mc_async_CPPFLAGS = -I$(srcdir)/../../../peripheral \
+ -I$(srcdir)/../../../cpu/common \
+ -I$(srcdir)/../../../cpu/or1k \
+ -I$(srcdir)/../../../port
+
+mc_async_LDFLAGS = -T$(srcdir)/../except-mc.ld
+
+mc_async_LDADD = ../mc-common/except-mc.lo \
+ ../mc-common/libmc-common.la \
+ ../support/libsupport.la
Makefile.am
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