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0,0 → 1,606
# Makefile.in generated by automake 1.11.1 from Makefile.am. |
# @configure_input@ |
|
# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, |
# 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, |
# Inc. |
# This Makefile.in is free software; the Free Software Foundation |
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@SET_MAKE@ |
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# Makefile.am for or1ksim testsuite test-code |
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# Copyright (C) Embecosm Limited, 2010 |
|
# Contributor Jeremy Bennett <jeremy.bennett@embecosm.com> |
|
# This file is part of OpenRISC 1000 Architectural Simulator. |
|
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uninstall uninstall-am |
|
|
# Tell versions [3.59,3.63) of GNU make to not export all variables. |
# Otherwise a system limit (for SysV at least) may be exceeded. |
.NOEXPORT: |
/lib-iftest/Makefile.in
0,0 → 1,519
# Makefile.in generated by automake 1.11.1 from Makefile.am. |
# @configure_input@ |
|
# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, |
# 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, |
# Inc. |
# This Makefile.in is free software; the Free Software Foundation |
# gives unlimited permission to copy and/or distribute it, |
# with or without modifications, as long as this notice is preserved. |
|
# This program is distributed in the hope that it will be useful, |
# but WITHOUT ANY WARRANTY, to the extent permitted by law; without |
# even the implied warranty of MERCHANTABILITY or FITNESS FOR A |
# PARTICULAR PURPOSE. |
|
@SET_MAKE@ |
|
# Makefile.am for libor1ksim test program: lib-iftest |
|
# Copyright (C) Embecosm Limited, 2010 |
|
# Contributor Jeremy Bennett <jeremy.bennett@embecosm.com> |
|
# This file is part of OpenRISC 1000 Architectural Simulator. |
|
# This program is free software; you can redistribute it and/or modify it |
# under the terms of the GNU General Public License as published by the Free |
# Software Foundation; either version 3 of the License, or (at your option) |
# any later version. |
|
# This program is distributed in the hope that it will be useful, but WITHOUT |
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
# more details. |
|
# You should have received a copy of the GNU General Public License along |
# with this program. If not, see <http:#www.gnu.org/licenses/>. */ |
|
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# Tell versions [3.59,3.63) of GNU make to not export all variables. |
# Otherwise a system limit (for SysV at least) may be exceeded. |
.NOEXPORT: |
/lib-iftest/lib-iftest.c
0,0 → 1,158
/* lib-iftest.c. Test of Or1ksim library interface functions. |
|
Copyright (C) 1999-2006 OpenCores |
Copyright (C) 2010 Embecosm Limited |
|
Contributors various OpenCores participants |
Contributor Jeremy Bennett <jeremy.bennett@embecosm.com> |
|
This file is part of OpenRISC 1000 Architectural Simulator. |
|
This program is free software; you can redistribute it and/or modify it |
under the terms of the GNU General Public License as published by the Free |
Software Foundation; either version 3 of the License, or (at your option) |
any later version. |
|
This program is distributed in the hope that it will be useful, but WITHOUT |
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
more details. |
|
You should have received a copy of the GNU General Public License along |
with this program. If not, see <http: www.gnu.org/licenses/>. */ |
|
/* ---------------------------------------------------------------------------- |
This code is commented throughout for use with Doxygen. |
--------------------------------------------------------------------------*/ |
|
#include <math.h> |
#include <stdlib.h> |
#include <stdio.h> |
|
#include "or1ksim.h" |
|
|
/* --------------------------------------------------------------------------*/ |
/*!Main program |
|
Build an or1ksim program using the library which loads a program and config |
from the command line. Usage: |
|
lib-iftest <config-file> <image> <duration_ms> |
|
Run that test for a <duration_ms> milliseconds of simulated time. The test |
the various interface functions. |
|
@param[in] argc Number of elements in argv |
@param[in] argv Vector of program name and arguments |
|
@return Return code for the program. */ |
/* --------------------------------------------------------------------------*/ |
int |
main (int argc, |
char *argv[]) |
{ |
/* Parse args */ |
if (4 != argc) |
{ |
fprintf (stderr, |
"usage: lib-iftest <config-file> <image> <duration_ms>\n"); |
return 1; |
} |
|
int duration_ms = atoi (argv[3]); |
double duration = (double) duration_ms / 1.0e3; |
|
if (duration_ms <= 0) |
{ |
fprintf (stderr, "ERROR. Duration must be positive number of ms\n"); |
return 1; |
} |
|
/* Dummy argv array to pass arguments to or1ksim_init. Varies depending on |
whether an image file is specified. */ |
int dummy_argc; |
char *dummy_argv[5]; |
|
dummy_argv[0] = "libsim"; |
dummy_argv[1] = "-q"; |
dummy_argv[2] = "-f"; |
dummy_argv[3] = argv[1]; |
dummy_argv[4] = argv[2]; |
|
dummy_argc = 5; |
|
/* Put the initialization message afterwards, or it will get swamped by the |
Or1ksim header. */ |
if (0 == or1ksim_init (dummy_argc, dummy_argv, NULL, NULL, NULL)) |
{ |
printf ("Initalization succeeded.\n"); |
} |
else |
{ |
printf ("Initalization failed.\n"); |
return 1; |
} |
|
/* Test of running */ |
printf ("Running code..."); |
switch (or1ksim_run (duration)) |
{ |
case OR1KSIM_RC_OK: printf ("done.\n"); break; |
case OR1KSIM_RC_BRKPT: printf ("hit breakpoint.\n"); break; |
default: printf ("failed.\n"); return 1; |
} |
|
|
/* Test of timing. Set a time point, run for the duration, then check the |
timing matches. */ |
or1ksim_set_time_point (); |
printf ("Set time point.\n"); |
printf ("Running code..."); |
switch (or1ksim_run (duration)) |
{ |
case OR1KSIM_RC_OK: printf ("done.\n"); break; |
case OR1KSIM_RC_BRKPT: printf ("hit breakpoint.\n"); break; |
default: printf ("failed.\n"); return 1; |
} |
/* All done OK (within 1ps) */ |
double measured_duration = or1ksim_get_time_period (); |
|
if (fabs (duration - measured_duration) < 1e-12) |
{ |
printf ("Measured time period correctly.\n"); |
} |
else |
{ |
printf ("Failed. Requested period %.12f, but measured %.12f\n", duration, |
measured_duration); |
return 1; |
} |
|
/* Test endianness */ |
if (or1ksim_is_le ()) |
{ |
printf ("Little endian architecture.\n"); |
} |
else |
{ |
printf ("Big endian architecture.\n"); |
} |
|
/* Check for clock rate */ |
unsigned long int clock_rate = or1ksim_clock_rate (); |
|
if (clock_rate > 0) |
{ |
printf ("Clock rate %ld Hz.\n", clock_rate); |
} |
else |
{ |
printf ("Invalid clock rate %ld Hz.\n", clock_rate); |
return 1; |
} |
|
printf ("Test completed successfully.\n"); |
return 0; |
|
} /* main () */ |
lib-iftest/lib-iftest.c
Property changes :
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+Id
\ No newline at end of property
Index: lib-iftest/Makefile.am
===================================================================
--- lib-iftest/Makefile.am (nonexistent)
+++ lib-iftest/Makefile.am (revision 388)
@@ -0,0 +1,34 @@
+# Makefile.am for libor1ksim test program: lib-iftest
+
+# Copyright (C) Embecosm Limited, 2010
+
+# Contributor Jeremy Bennett
+
+# This file is part of OpenRISC 1000 Architectural Simulator.
+
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3 of the License, or (at your option)
+# any later version.
+
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program. If not, see
lib-iftest/Makefile.am
Property changes :
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+Id
\ No newline at end of property
Index: lib-upcalls/Makefile.in
===================================================================
--- lib-upcalls/Makefile.in (nonexistent)
+++ lib-upcalls/Makefile.in (revision 388)
@@ -0,0 +1,517 @@
+# Makefile.in generated by automake 1.11.1 from Makefile.am.
+# @configure_input@
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation,
+# Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+@SET_MAKE@
+
+# Makefile.am for libor1ksim test program: lib-upcalls
+
+# Copyright (C) Embecosm Limited, 2010
+
+# Contributor Jeremy Bennett
+
+# This file is part of OpenRISC 1000 Architectural Simulator.
+
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3 of the License, or (at your option)
+# any later version.
+
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program. If not, see
+
+ This file is part of OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see
+#include
+#include
+#include
+#include
+
+#include "or1ksim.h"
+
+
+/*! Memory mapped register memory */
+static unsigned char *regv;
+
+/*! Number of bytes of register memory */
+static int regc;
+
+/*! Number of times each upcall has been called */
+static int upcall_count;
+
+
+/* --------------------------------------------------------------------------*/
+/*!Read upcall
+
+ Upcall from Or1ksim to read a word from an external peripheral. Read the
+ specified bytes from the peripheral if available.
+
+ We only ever expect to get 4 byte reads here (modeling Wishbone).
+
+ @note We receive the full address, since there is a single upcall routine,
+ and this allows us to decode between potentially multiple devices.
+
+ @todo We assume that the register memory size is a power of 2, making
+ address shortening a simple modulo exercise. We should use a more
+ generic solution.
+
+ @note The mask is a byte mask. Since this is testing, we warn if any byte
+ is not either 0xff or 0x00.
+
+ @param[in] class_ptr A handle pass back from the initalization. Intended
+ for C++ callers, not used here.
+ @param[in] addr Address to read from.
+ @param[in] mask Byte mask for the read.
+ @param[out] rdata Buffer for the data read.
+ @param[in] data_len Number of bytes in mask and rdata.
+
+ @return Zero on success, non-zero on failure. */
+/* --------------------------------------------------------------------------*/
+static int
+read_upcall (void *class_ptr,
+ unsigned long int addr,
+ unsigned char mask[],
+ unsigned char rdata[],
+ int data_len)
+{
+ unsigned long int devaddr = addr % regc;
+
+ upcall_count--; /* One less upcall to do */
+
+ if (4 != data_len)
+ {
+ printf ("Warning: 4-byte reads only supported for this device.\n");
+ return -1;
+ }
+
+ if (devaddr > regc - data_len)
+ {
+ printf ("Warning: read from 0x%08lx out of range: zero result.\n",
+ devaddr);
+ return -1;
+ }
+
+ /* Read the data */
+ int i;
+
+ for (i = 0; i < 4; i++)
+ {
+ switch (mask[i])
+ {
+ case 0x00: rdata[i] = 0; break;
+ case 0xff: rdata[i] = regv[devaddr + i]; break;
+
+ default:
+ printf ("Warning: invalid mask byte %d for read 0x%02x: "
+ "treated as 0xff.\n", i, mask[i]);
+ rdata[i] = regv[devaddr + i];
+ break;
+ }
+ }
+
+ /* printf ("Read from 0x%08lx: vector [%02x %02x %02x %02x ], " */
+ /* "mask [%02x %02x %02x %02x ].\n", devaddr, rdata[0], rdata[1], */
+ /* rdata[2], rdata[3], mask[0], mask[1], mask[2], mask[3]); */
+
+ return 0; /* Success */
+
+} /* read_upcall () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Write upcall
+
+ Upcall from Or1ksim to write a word to an external peripheral. Read the
+ specified bytes from the peripheral if available.
+
+ We only ever expect to get 4 byte reads here (modeling Wishbone).
+
+ @note We receive the full address, since there is a single upcall routine,
+ and this allows us to decode between potentially multiple devices.
+
+ @todo We assume that the register memory size is a power of 2, making
+ address shortening a simple modulo exercise. We should use a more
+ generic solution.
+
+ @note The mask is a byte mask. Since this is testing, we warn if any byte
+ is not either 0xff or 0x00.
+
+ @param[in] class_ptr A handle pass back from the initalization. Intended
+ for C++ callers, not used here.
+ @param[in] addr Address to write to.
+ @param[in] mask Byte mask for the write.
+ @param[in] wdata The data to write.
+ @param[in] data_len Number of bytes in mask and rdata.
+
+ @return Zero on success, non-zero on failure. */
+/* --------------------------------------------------------------------------*/
+static int
+write_upcall (void *class_ptr,
+ unsigned long int addr,
+ unsigned char mask[],
+ unsigned char wdata[],
+ int data_len)
+{
+ unsigned long int devaddr = addr % regc;
+
+ upcall_count--; /* One less upcall to do */
+
+ if (4 != data_len)
+ {
+ printf ("Warning: 4-byte writes only supported for this device.\n");
+ return -1;
+ }
+
+ if (devaddr > regc - data_len)
+ {
+ printf ("Warning: write to 0x%08lx out of range: ignored.\n",
+ devaddr);
+ return -1;
+ }
+
+ /* printf ("Write to 0x%08lx: vector [%02x %02x %02x %02x ], " */
+ /* "mask [%02x %02x %02x %02x ].\n", devaddr, wdata[0], wdata[1], */
+ /* wdata[2], wdata[3], mask[0], mask[1], mask[2], mask[3]); */
+
+ /* Write the data */
+ int i;
+
+ for (i = 0; i < 4; i++)
+ {
+ switch (mask[i])
+ {
+ case 0x00: break;
+ case 0xff: regv[devaddr + i] = wdata[i]; break;
+
+ default:
+ printf ("Warning: invalid mask byte %d for write 0x%02x: "
+ "treated as 0xff.\n", i, mask[i]);
+ regv[devaddr + i] = wdata[i];
+ break;
+ }
+ }
+
+ return 0; /* Success */
+
+} /* write_upcall () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Main program
+
+ Build an or1ksim program using the library which loads a program and config
+ from the command line which will drive upcalls.
+
+ lib-upcalls []
+
+ A register memory of bytes is initalized from if
+ present, or zeroed if not. is run continuously, making upcalls,
+ which are satisfied using the register memory. The program exits
+ successfully when upcalls have been made.
+
+ @param[in] argc Number of elements in argv
+ @param[in] argv Vector of program name and arguments
+
+ @return Return code for the program. */
+/* --------------------------------------------------------------------------*/
+int
+main (int argc,
+ char *argv[])
+{
+ char *reg_file;
+
+ /* Parse args */
+ switch (argc)
+ {
+ case 5:
+ reg_file = NULL;
+ break;
+
+ case 6:
+ reg_file = argv[5];
+ break;
+
+ default:
+ printf ("usage: lib-upcalls "
+ " []\n");
+ return 1;
+ }
+
+ upcall_count = atoi (argv[3]);
+
+ if (upcall_count <= 0)
+ {
+ printf ("ERROR: Upcall count must be positive\n");
+ return 1;
+ }
+
+ regc = atoi (argv[4]);
+
+ if (regc < 0)
+ {
+ printf ("ERROR: Register memory size must be positive\n");
+ return 1;
+ }
+
+ /* Read the register file if provided. */
+ regv = malloc (regc * sizeof (unsigned char));
+
+ if (NULL == regv)
+ {
+ printf ("ERROR: Failed to allocate register memory\n");
+ return 1;
+ }
+
+ int next_free_byte = 0;
+
+ if (NULL != reg_file)
+ {
+ FILE *fd = fopen (reg_file, "r");
+
+ if (NULL == fd)
+ {
+ printf ("ERROR: Failed to open register file: %s\n",
+ strerror (errno));
+ free (regv);
+ return 1;
+ }
+
+ for (; next_free_byte < regc; next_free_byte++)
+ {
+ unsigned char byte;
+
+ if (1 == fscanf (fd, "%2hhx ", &byte))
+ {
+ regv[next_free_byte] = byte;
+ }
+ else
+ {
+ break;
+ }
+ }
+
+ /* Should have read the whole file successfully. */
+ if (ferror (fd))
+ {
+ printf ("ERROR: Reading register file: %s\n", strerror (errno));
+ free (regv);
+ return 1;
+ }
+
+ if (!feof (fd))
+ {
+ printf ("Warning: additional register file data ignored.\n");
+ }
+
+ if (0 != fclose (fd))
+ {
+ printf ("ERROR: Failed to close register file: %s\n",
+ strerror (errno));
+ free (regv);
+ return 1;
+ }
+ }
+
+ /* Fill in any remaining bytes with zero */
+ if (next_free_byte < regc)
+ {
+ (void)memset (&(regv[next_free_byte]), 0, regc - next_free_byte);
+ }
+
+ /* Dummy argv array to pass arguments to or1ksim_init. Varies depending on
+ whether an image file is specified. */
+ int dummy_argc;
+ char *dummy_argv[5];
+
+ dummy_argv[0] = "libsim";
+ dummy_argv[1] = "-q";
+ dummy_argv[2] = "-f";
+ dummy_argv[3] = argv[1];
+ dummy_argv[4] = argv[2];
+
+ dummy_argc = 5;
+
+ /* Initialize the program. Put the initialization message afterwards, or it
+ will get swamped by the Or1ksim header. */
+ if (0 == or1ksim_init (dummy_argc, dummy_argv, NULL, &read_upcall,
+ &write_upcall))
+ {
+ printf ("Initalization succeeded.\n");
+ }
+ else
+ {
+ printf ("Initalization failed.\n");
+ return 1;
+ }
+
+ /* Run repeatedly for 1 millisecond until we hit a breakpoint or all upcalls
+ are done. */
+ do
+ {
+ switch (or1ksim_run (1.0e-3))
+ {
+ case OR1KSIM_RC_OK:
+ break;
+
+ case OR1KSIM_RC_BRKPT:
+ printf ("Test completed successfully: hit breakpoint.\n");
+ return 0;
+
+ default:
+ printf ("ERROR: run failed\n");
+ return 1;
+ }
+ }
+ while (upcall_count > 0);
+
+ /* A little longer to allow response to last upcall to be handled. */
+ switch (or1ksim_run (1.0e-3))
+ {
+ case OR1KSIM_RC_OK:
+ printf ("Test completed successfully: All upcalls processed.\n");
+ return 0;
+
+ case OR1KSIM_RC_BRKPT:
+ printf ("Test completed successfully: hit breakpoint.\n");
+ return 0;
+
+ default:
+ printf ("ERROR: run failed\n");
+ return 1;
+ }
+} /* main () */
lib-upcalls/lib-upcalls.c
Property changes :
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+Id
\ No newline at end of property
Index: lib-upcalls/Makefile.am
===================================================================
--- lib-upcalls/Makefile.am (nonexistent)
+++ lib-upcalls/Makefile.am (revision 388)
@@ -0,0 +1,33 @@
+# Makefile.am for libor1ksim test program: lib-upcalls
+
+# Copyright (C) Embecosm Limited, 2010
+
+# Contributor Jeremy Bennett
+
+# This file is part of OpenRISC 1000 Architectural Simulator.
+
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3 of the License, or (at your option)
+# any later version.
+
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program. If not, see
lib-upcalls/Makefile.am
Property changes :
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+Id
\ No newline at end of property
Index: lib-jtag/Makefile.in
===================================================================
--- lib-jtag/Makefile.in (nonexistent)
+++ lib-jtag/Makefile.in (revision 388)
@@ -0,0 +1,528 @@
+# Makefile.in generated by automake 1.11.1 from Makefile.am.
+# @configure_input@
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation,
+# Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+@SET_MAKE@
+
+# Makefile.am for libor1ksim test programs for JTAG
+
+# Copyright (C) Embecosm Limited, 2010
+
+# Contributor Jeremy Bennett
+
+# This file is part of OpenRISC 1000 Architectural Simulator.
+
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3 of the License, or (at your option)
+# any later version.
+
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program. If not, see
+
+ This file is part of OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see
+#include
+#include
+#include
+#include
+
+#include "or1ksim.h"
+
+
+/* --------------------------------------------------------------------------*/
+/*!Compute a IEEE 802.3 CRC-32.
+
+ Print an error message if we get a duff argument, but we really should
+ not.
+
+ @param[in] value The value to shift into the CRC
+ @param[in] num_bits The number of bits in the value.
+ @param[in] crc_in The existing CRC
+
+ @return The computed CRC. */
+/* --------------------------------------------------------------------------*/
+static unsigned long int
+crc32 (unsigned long long int value,
+ int num_bits,
+ unsigned long int crc_in)
+{
+ if ((1 > num_bits) || (num_bits > 64))
+ {
+ printf ("ERROR: Max 64 bits of CRC can be computed. Ignored\n");
+ return crc_in;
+ }
+
+ static const unsigned long int CRC32_POLY = 0x04c11db7;
+ int i;
+
+ /* Compute the CRC, MS bit first */
+ for (i = num_bits - 1; i >= 0; i--)
+ {
+ unsigned long int d;
+ unsigned long int t;
+
+ d = (1 == ((value >> i) & 1)) ? 0xfffffff : 0x0000000;
+ t = (1 == ((crc_in >> 31) & 1)) ? 0xfffffff : 0x0000000;
+
+ crc_in <<= 1;
+ crc_in ^= (d ^ t) & CRC32_POLY;
+ }
+
+ return crc_in;
+
+} /* crc32 () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Reverse a value's bits
+
+ @param[in] val The value to reverse (up to 64 bits).
+ @param[in] len The number of bits to reverse.
+
+ @return The reversed value */
+/* --------------------------------------------------------------------------*/
+static unsigned long long
+reverse_bits (unsigned long long val,
+ int len)
+{
+ if ((1 > len) || (len > 64))
+ {
+ printf ("ERROR: Cannot reverse %d bits. Returning zero\n", len);
+ return 0;
+ }
+
+ /* Reverse the string */
+ val = (((val & 0xaaaaaaaaaaaaaaaaULL) >> 1) |
+ ((val & 0x5555555555555555ULL) << 1));
+ val = (((val & 0xccccccccccccccccULL) >> 2) |
+ ((val & 0x3333333333333333ULL) << 2));
+ val = (((val & 0xf0f0f0f0f0f0f0f0ULL) >> 4) |
+ ((val & 0x0f0f0f0f0f0f0f0fULL) << 4));
+ val = (((val & 0xff00ff00ff00ff00ULL) >> 8) |
+ ((val & 0x00ff00ff00ff00ffULL) << 8));
+ val = (((val & 0xffff0000ffff0000ULL) >> 16) |
+ ((val & 0x0000ffff0000ffffULL) << 16));
+
+ return ((val >> 32) | (val << 32)) >> (64 - len);
+
+} /* reverse_bits () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Dump a JTAG register
+
+ Prefix with the supplied string and add a newline afterwards.
+
+ @param[in] prefix Prefix string to print out
+ @param[in] jreg The JTAG register
+ @param[in] num_bytes The number of bytes in the register */
+/* --------------------------------------------------------------------------*/
+static void
+dump_jreg (const char *prefix,
+ unsigned char *jreg,
+ int num_bytes)
+{
+ int i;
+
+ printf ("%s: 0x", prefix);
+
+ /* Dump each byte in turn */
+ for (i = num_bytes - 1; i >=0; i--)
+ {
+ printf ("%02x", jreg[i]);
+ }
+
+ printf ("\n");
+
+} /* dump_jreg () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Process a JTAG instruction register
+
+ Usage:
+
+ INSTRUCTION
+
+ The single argument is a single hex digit, specifying the instruction
+ value.
+
+ Like all the JTAG instructions, it must be reversed, so it is shifted MS
+ bit first.
+
+ @param[in] next_jreg Offset into argv of the next JTAG register hex
+ string.
+ @param[in] argc argc from the main program (for checking next_jreg).
+ @param[in] argv argv from the main program.
+
+ @return 1 (TRUE) on success, 0 (FALSE) on failure. */
+/* --------------------------------------------------------------------------*/
+static int
+process_instruction (int next_jreg,
+ int argc,
+ char *argv[])
+{
+ printf ("Shifting instruction.\n");
+
+ /* Do we have the arg? */
+ if (next_jreg >= argc)
+ {
+ printf ("ERROR: no instruction register value found.\n");
+ return 0;
+ }
+
+ /* Is the argument in range? */
+ unsigned long int ival = strtoul (argv[next_jreg], NULL, 16);
+
+ if (ival > 0xf)
+ {
+ printf ("ERROR: instruction value 0x%lx too large\n", ival);
+ return 0;
+ }
+
+ /* Reverse the bits of the value */
+ ival = reverse_bits (ival, 4);
+
+ /* Allocate space and populate the register */
+ unsigned char *jreg = malloc (1);
+
+ if (NULL == jreg)
+ {
+ printf ("ERROR: malloc for instruction register failed.\n");
+ return 0;
+ }
+
+ jreg[0] = ival;
+
+ dump_jreg (" shifting in", jreg, 1);
+
+ double t = or1ksim_jtag_shift_ir (jreg, 4);
+
+ dump_jreg (" shifted out", jreg, 1);
+ printf (" time taken: %.12fs\n", t);
+
+ free (jreg);
+ return 1; /* Completed successfully */
+
+} /* process_instruction () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Process a JTAG SELECT_MODULE debug data register
+
+ Usage:
+
+ SELECT_MODULE
+
+ The one argument is a single hex digit, specifying the module value.
+
+ Like all the JTAG fields, it must be reversed, so it is shifted MS
+ bit first. It also requires a 32-bit CRC.
+
+ On return we get a status register and CRC.
+
+ @param[in] next_jreg Offset into argv of the next JTAG register hex
+ string.
+ @param[in] argc argc from the main program (for checking next_jreg).
+ @param[in] argv argv from the main program.
+
+ @return 1 (TRUE) on success, 0 (FALSE) on failure. */
+/* --------------------------------------------------------------------------*/
+static int
+process_select_module (int next_jreg,
+ int argc,
+ char *argv[])
+{
+ printf ("Selecting module.\n");
+
+ /* Do we have the arg? */
+ if (next_jreg >= argc)
+ {
+ printf ("ERROR: no module specified.\n");
+ return 0;
+ }
+
+ /* Is the argument in range? */
+ unsigned long int module_id = strtoul (argv[next_jreg], NULL, 16);
+
+ if (module_id > 0xf)
+ {
+ printf ("ERROR: module value 0x%lx too large\n", module_id);
+ return 0;
+ }
+
+ /* Compute the CRC */
+ unsigned long int crc_in;
+
+ crc_in = crc32 (1, 1, 0xffffffff);
+ crc_in = crc32 (module_id, 4, crc_in);
+
+ /* Reverse the fields */
+ module_id = reverse_bits (module_id, 4);
+ crc_in = reverse_bits (crc_in, 32);
+
+ /* Allocate space and initialize the register
+ - 1 indicator bit
+ - 4 module bits in
+ - 32 bit CRC in
+ - 4 bits status out
+ - 32 bits CRC out
+
+ Total 73 bits = 10 bytes */
+ int num_bytes = 10;
+ unsigned char *jreg = malloc (num_bytes);
+
+ if (NULL == jreg)
+ {
+ printf ("ERROR: malloc for SELECT_MODULE register failed.\n");
+ return 0;
+ }
+
+ memset (jreg, 0, num_bytes);
+
+ jreg[0] = 0x01;
+ jreg[0] |= module_id << 1;
+ jreg[0] |= crc_in << 5;
+ jreg[1] = crc_in >> 3;
+ jreg[2] = crc_in >> 11;
+ jreg[3] = crc_in >> 19;
+ jreg[4] = crc_in >> 27;
+
+ /* Note what we are shifting in and shift it. */
+ dump_jreg (" shifting in", jreg, num_bytes);
+ double t = or1ksim_jtag_shift_dr (jreg, 32 + 4 + 32 + 4 + 1);
+
+ /* Diagnose what we are shifting out. */
+ dump_jreg (" shifted out", jreg, num_bytes);
+
+ /* Break out fields */
+ unsigned char status;
+ unsigned long int crc_out;
+
+ status = ((jreg[4] >> 5) | (jreg[5] << 3)) & 0xf ;
+
+ crc_out = ((unsigned long int) jreg[5] >> 1) |
+ ((unsigned long int) jreg[6] << 7) |
+ ((unsigned long int) jreg[7] << 15) |
+ ((unsigned long int) jreg[8] << 23) |
+ ((unsigned long int) jreg[9] << 31);
+
+ /* Reverse the fields */
+ status = reverse_bits (status, 4);
+ crc_out = reverse_bits (crc_out, 32);
+
+ /* Compute our own CRC */
+ unsigned long int crc_computed = crc32 (status, 4, 0xffffffff);
+
+ /* Log the results */
+ printf (" status: 0x%01x\n", status);
+
+ if (crc_out != crc_computed)
+ {
+ printf (" CRC mismatch\n");
+ printf (" CRC out: 0x%08lx\n", crc_out);
+ printf (" CRC computed: 0x%08lx\n", crc_computed);
+ }
+
+ printf (" time taken: %.12fs\n", t);
+
+ free (jreg);
+ return 1; /* Completed successfully */
+
+} /* process_select_module () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Process a JTAG WRITE_COMMAND debug data register
+
+ Usage:
+
+ WRITE_COMMAND
+
+ The argumens are all hex values:
+ - access_type Access type - 4 bits
+ - address 32-bit address
+ - length number of bytes to transer up to 2^16.
+
+ Like all the JTAG fields these must be reversed, so they are shifted MS bit
+ first. They also require a 32-bit CRC.
+
+ On return we get a status register and CRC.
+
+ @param[in] next_jreg Offset into argv of the next JTAG register hex
+ string.
+ @param[in] argc argc from the main program (for checking next_jreg).
+ @param[in] argv argv from the main program.
+
+ @return 1 (TRUE) on success, 0 (FALSE) on failure. */
+/* --------------------------------------------------------------------------*/
+static int
+process_write_command (int next_jreg,
+ int argc,
+ char *argv[])
+{
+ printf ("Processing WRITE_COMMAND.\n");
+
+ /* Do we have the args */
+ if (next_jreg + 3 > argc)
+ {
+ printf ("WRITE_COMMAND usage: WRITE_COMMAND "
+ "\n");
+ return 0;
+ }
+
+ /* Are the arguments in range? Remember the length we actually put in has 1
+ subtracted. */
+ unsigned long int cmd = 2; /* WRITE_COMMAND */
+
+ unsigned long int access_type = strtoul (argv[next_jreg ], NULL, 16);
+ unsigned long int addr = strtoul (argv[next_jreg + 1], NULL, 16);
+ unsigned long int len = strtoul (argv[next_jreg + 2], NULL, 16) - 1;
+
+ if (access_type > 0xf)
+ {
+ printf ("ERROR: WRITE_COMMAND access type 0x%lx too large\n",
+ access_type);
+ return 0;
+ }
+
+ if (addr > 0xffffffff)
+ {
+ printf ("ERROR: WRITE_COMMAND address 0x%lx too large\n", addr);
+ return 0;
+ }
+
+ if ((len + 1) < 0x1)
+ {
+ printf ("ERROR: WRITE_COMMAND length 0x%lx too small\n", len + 1);
+ return 0;
+ }
+ else if ((len + 1) > 0x10000)
+ {
+ printf ("ERROR: WRITE_COMMAND length 0x%lx too large\n", len + 1);
+ return 0;
+ }
+
+ /* Compute the CRC */
+ unsigned long int crc_in;
+
+ crc_in = crc32 (0, 1, 0xffffffff);
+ crc_in = crc32 (cmd, 4, crc_in);
+ crc_in = crc32 (access_type, 4, crc_in);
+ crc_in = crc32 (addr, 32, crc_in);
+ crc_in = crc32 (len, 16, crc_in);
+
+ /* Reverse the fields */
+ cmd = reverse_bits (cmd, 4);
+ access_type = reverse_bits (access_type, 4);
+ addr = reverse_bits (addr, 32);
+ len = reverse_bits (len, 16);
+ crc_in = reverse_bits (crc_in, 32);
+
+ /* Allocate space and initialize the register
+ - 1 indicator bit
+ - 4 bits command in
+ - 4 bits access type in
+ - 32 bits address in
+ - 16 bits length in
+ - 32 bits CRC in
+ - 4 bits status out
+ - 32 bits CRC out
+
+ Total 125 bits = 16 bytes */
+ int num_bytes = 16;
+ unsigned char *jreg = malloc (num_bytes);
+
+ if (NULL == jreg)
+ {
+ printf ("ERROR: malloc for WRITE_COMMAND register failed.\n");
+ return 0;
+ }
+
+ memset (jreg, 0, num_bytes);
+
+ jreg[ 0] = 0x0;
+
+ jreg[ 0] |= cmd << 1;
+
+ jreg[ 0] |= access_type << 5;
+ jreg[ 1] = access_type >> 3;
+
+ jreg[ 1] |= addr << 1;
+ jreg[ 2] = addr >> 7;
+ jreg[ 3] = addr >> 15;
+ jreg[ 4] = addr >> 23;
+ jreg[ 5] = addr >> 31;
+
+ jreg[ 5] |= len << 1;
+ jreg[ 6] = len >> 7;
+ jreg[ 7] = len >> 15;
+
+ jreg[ 7] |= crc_in << 1;
+ jreg[ 8] = crc_in >> 7;
+ jreg[ 9] = crc_in >> 15;
+ jreg[10] = crc_in >> 23;
+ jreg[11] = crc_in >> 31;
+
+ /* Note what we are shifting in and shift it. */
+ dump_jreg (" shifting in", jreg, num_bytes);
+ double t = or1ksim_jtag_shift_dr (jreg, 32 + 4 + 32 + 16 + 32 + 4 + 4 + 1);
+
+ /* Diagnose what we are shifting out. */
+ dump_jreg (" shifted out", jreg, num_bytes);
+
+ /* Break out fields */
+ unsigned char status;
+ unsigned long int crc_out;
+
+ status = (jreg[11] >> 1) & 0xf ;
+
+ crc_out = ((unsigned long int) jreg[11] >> 5) |
+ ((unsigned long int) jreg[12] << 3) |
+ ((unsigned long int) jreg[13] << 11) |
+ ((unsigned long int) jreg[14] << 19) |
+ ((unsigned long int) jreg[15] << 27);
+
+ /* Reverse the fields */
+ status = reverse_bits (status, 4);
+ crc_out = reverse_bits (crc_out, 32);
+
+ /* Compute our own CRC */
+ unsigned long int crc_computed = crc32 (status, 4, 0xffffffff);
+
+ /* Log the results */
+ printf (" status: 0x%01x\n", status);
+
+ if (crc_out != crc_computed)
+ {
+ printf (" CRC mismatch\n");
+ printf (" CRC out: 0x%08lx\n", crc_out);
+ printf (" CRC computed: 0x%08lx\n", crc_computed);
+ }
+
+ printf (" time taken: %.12fs\n", t);
+
+ free (jreg);
+ return 1; /* Completed successfully */
+
+} /* process_write_command () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Process a JTAG READ_COMMAND debug data register
+
+ Usage:
+
+ READ_COMMAND
+
+ There are no arguments. It is used to read back the values used in a prior
+ WRITE_COMMAND.
+
+ On return we get the access type, address, length, status register and CRC.
+
+ @param[in] next_jreg Offset into argv of the next JTAG register hex
+ string.
+ @param[in] argc argc from the main program (for checking next_jreg).
+ @param[in] argv argv from the main program.
+
+ @return 1 (TRUE) on success, 0 (FALSE) on failure. */
+/* --------------------------------------------------------------------------*/
+static int
+process_read_command (int next_jreg,
+ int argc,
+ char *argv[])
+{
+ printf ("Processing READ_COMMAND.\n");
+
+ /* The only value on input is the READ_COMMAND command */
+ unsigned long int cmd = 1; /* READ_COMMAND */
+
+ /* Compute the CRC */
+ unsigned long int crc_in;
+
+ crc_in = crc32 (0, 1, 0xffffffff);
+ crc_in = crc32 (cmd, 4, crc_in);
+
+ /* Reverse the fields */
+ cmd = reverse_bits (cmd, 4);
+ crc_in = reverse_bits (crc_in, 32);
+
+ /* Allocate space and initialize the register
+ - 1 indicator bit
+ - 4 bits command in
+ - 32 bits CRC in
+ - 4 bits access type out
+ - 32 bits address out
+ - 16 bits length out
+ - 4 bits status out
+ - 32 bits CRC out
+
+ Total 125 bits = 16 bytes */
+ int num_bytes = 16;
+ unsigned char *jreg = malloc (num_bytes);
+
+ if (NULL == jreg)
+ {
+ printf ("ERROR: malloc for READ_COMMAND register failed.\n");
+ return 0;
+ }
+
+ memset (jreg, 0, num_bytes);
+
+ jreg[ 0] = 0x0;
+
+ jreg[0] |= cmd << 1;
+
+ jreg[0] |= crc_in << 5;
+ jreg[1] = crc_in >> 3;
+ jreg[2] = crc_in >> 11;
+ jreg[3] = crc_in >> 19;
+ jreg[4] = crc_in >> 27;
+
+ /* Note what we are shifting in and shift it. */
+ dump_jreg (" shifting in", jreg, num_bytes);
+ double t = or1ksim_jtag_shift_dr (jreg, 32 + 4 + 16 + 32 + 4 + 32 + 4 + 1);
+
+ /* Diagnose what we are shifting out. */
+ dump_jreg (" shifted out", jreg, num_bytes);
+
+ /* Break out fields */
+ unsigned char access_type;
+ unsigned long int addr;
+ unsigned long int len;
+ unsigned char status;
+ unsigned long int crc_out;
+
+ access_type = ((jreg[4] >> 5) | (jreg[5] << 3)) & 0xf ;
+ addr = ((unsigned long int) jreg[ 5] >> 1) |
+ ((unsigned long int) jreg[ 6] << 7) |
+ ((unsigned long int) jreg[ 7] << 15) |
+ ((unsigned long int) jreg[ 8] << 23) |
+ ((unsigned long int) jreg[ 9] << 31);
+
+ len = ((unsigned long int) jreg[ 9] >> 1) |
+ ((unsigned long int) jreg[10] << 7) |
+ ((unsigned long int) (jreg[11] & 0x1) << 15);
+
+ status = (jreg[11] >> 1) & 0xf ;
+
+ crc_out = ((unsigned long int) jreg[11] >> 5) |
+ ((unsigned long int) jreg[12] << 3) |
+ ((unsigned long int) jreg[13] << 11) |
+ ((unsigned long int) jreg[14] << 19) |
+ ((unsigned long int) jreg[15] << 27);
+
+ /* Reverse the fields */
+
+ access_type = reverse_bits (access_type, 4);
+ addr = reverse_bits (addr, 32);
+ len = reverse_bits (len, 16);
+ status = reverse_bits (status, 4);
+ crc_out = reverse_bits (crc_out, 32);
+
+ /* Compute our own CRC */
+ unsigned long int crc_computed;
+
+ crc_computed = crc32 (access_type, 4, 0xffffffff);
+ crc_computed = crc32 (addr, 32, crc_computed);
+ crc_computed = crc32 (len, 16, crc_computed);
+ crc_computed = crc32 (status, 4, crc_computed);
+
+ /* Log the results. Remember the length is 1 greater than the value
+ returned. */
+ printf (" access_type: 0x%x\n", access_type);
+ printf (" address: 0x%lx\n", addr);
+ printf (" length: 0x%lx\n", len + 1);
+ printf (" status: 0x%x\n", status);
+
+ if (crc_out != crc_computed)
+ {
+ printf (" CRC mismatch\n");
+ printf (" CRC out: 0x%08lx\n", crc_out);
+ printf (" CRC computed: 0x%08lx\n", crc_computed);
+ }
+
+ printf (" time taken: %.12fs\n", t);
+
+ free (jreg);
+ return 1; /* Completed successfully */
+
+} /* process_read_command () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Process a JTAG GO_COMMAND_WRITE debug data register
+
+ Usage:
+
+ GO_COMMAND_WRITE
+
+ The one argument is a string of bytes to be written, LS byte first.
+
+ Like all the JTAG fields, each data byte must be reversed, so it is shifted
+ MS bit first. It also requires a 32-bit CRC.
+
+ On return we get a status register and CRC.
+
+ @param[in] next_jreg Offset into argv of the next JTAG register hex
+ string.
+ @param[in] argc argc from the main program (for checking next_jreg).
+ @param[in] argv argv from the main program.
+
+ @return 1 (TRUE) on success, 0 (FALSE) on failure. */
+/* --------------------------------------------------------------------------*/
+static int
+process_go_command_write (int next_jreg,
+ int argc,
+ char *argv[])
+{
+ printf ("Processing GO_COMMAND_WRITE.\n");
+
+ /* Do we have the arg */
+ if (next_jreg >= argc)
+ {
+ printf ("GO_COMMAND_WRITE usage: GO_COMMAND_WRITE .\n");
+ return 0;
+ }
+
+ /* Break out the fields, including the data string into a vector of bytes. */
+ unsigned long int cmd = 0; /* GO_COMMAND */
+
+ char *data_str = argv[next_jreg];
+ int data_len = strlen (data_str);
+ int data_bytes = data_len / 2;
+ unsigned char *data = malloc (data_bytes);
+
+ if (NULL == data)
+ {
+ printf ("ERROR: data malloc for GO_COMMAND_WRITE register failed.\n");
+ return 0;
+ }
+
+ if (1 == (data_len % 2))
+ {
+ printf ("Warning: GO_COMMAND_WRITE odd char ignored\n");
+ }
+
+ int i;
+
+ for (i = 0; i < data_bytes; i++)
+ {
+ int ch_off_ms = i * 2;
+ int ch_off_ls = i * 2 + 1;
+
+ /* Get each nybble in turn, remembering that we may not have a MS nybble
+ if the data string has an odd number of chars. */
+ data[i] = 0;
+
+ int j;
+
+ for (j = ch_off_ms; j <= ch_off_ls; j++)
+ {
+ char c = data_str[j];
+ int dig_val = (('0' <= c) && (c <= '9')) ? c - '0' :
+ (('a' <= c) && (c <= 'f')) ? c - 'a' + 10 :
+ (('A' <= c) && (c <= 'F')) ? c - 'A' + 10 : -1;
+
+ if (dig_val < 0)
+ {
+ printf ("ERROR: Non-hex digit in data: %c\n", c);
+ free (data);
+ return 0;
+ }
+
+ data[i] = (data[i] << 4) | dig_val;
+ }
+ }
+
+ /* Are the arguments in range? Remember the length we actually put in has 1
+ subtracted. */
+
+ /* Compute the CRC */
+ unsigned long int crc_in;
+
+ crc_in = crc32 (0, 1, 0xffffffff);
+ crc_in = crc32 (cmd, 4, crc_in);
+
+ for (i = 0; i < data_bytes; i++)
+ {
+ crc_in = crc32 (data[i], 8, crc_in);
+ }
+
+ /* Reverse the fields */
+ cmd = reverse_bits (cmd, 4);
+
+ for (i = 0; i < data_bytes; i++)
+ {
+ data[i] = reverse_bits (data[i], 8);
+ }
+
+ crc_in = reverse_bits (crc_in, 32);
+
+ /* Allocate space and initialize the register
+ - 1 indicator bit
+ - 4 bits command in
+ - data_bytes * 8 bits access type in
+ - 32 bits CRC in
+ - 4 bits status out
+ - 32 bits CRC out
+
+ Total 73 + data_bytes * 8 bits = 10 + data_bytes bytes */
+ int num_bytes = 10 + data_bytes;
+ unsigned char *jreg = malloc (num_bytes);
+
+ if (NULL == jreg)
+ {
+ printf ("ERROR: jreg malloc for GO_COMMAND_WRITE register failed.\n");
+ free (data);
+ return 0;
+ }
+
+ memset (jreg, 0, num_bytes);
+
+ jreg[ 0] = 0x0;
+ jreg[ 0] |= cmd << 1;
+
+ for (i = 0; i < data_bytes; i++)
+ {
+ jreg[i] |= data[i] << 5;
+ jreg[i + 1] = data[i] >> 3;
+ }
+
+ jreg[data_bytes ] |= crc_in << 5;
+ jreg[data_bytes + 1] = crc_in >> 3;
+ jreg[data_bytes + 2] = crc_in >> 11;
+ jreg[data_bytes + 3] = crc_in >> 19;
+ jreg[data_bytes + 4] = crc_in >> 27;
+
+ /* Note what we are shifting in and shift it. */
+ dump_jreg (" shifting in", jreg, num_bytes);
+ double t = or1ksim_jtag_shift_dr (jreg,
+ 32 + 4 + 32 + data_bytes * 8 + 4 + 1);
+
+ /* Diagnose what we are shifting out. */
+ dump_jreg (" shifted out", jreg, num_bytes);
+
+ /* Break out fields */
+ unsigned char status;
+ unsigned long int crc_out;
+
+ status = ((jreg[data_bytes + 4] >> 5) | (jreg[data_bytes + 5] << 3)) & 0xf ;
+
+ crc_out = ((unsigned long int) jreg[data_bytes + 5] >> 1) |
+ ((unsigned long int) jreg[data_bytes + 6] << 7) |
+ ((unsigned long int) jreg[data_bytes + 7] << 15) |
+ ((unsigned long int) jreg[data_bytes + 8] << 23) |
+ ((unsigned long int) jreg[data_bytes + 9] << 31);
+
+ /* Reverse the fields */
+ status = reverse_bits (status, 4);
+ crc_out = reverse_bits (crc_out, 32);
+
+ /* Compute our own CRC */
+ unsigned long int crc_computed = crc32 (status, 4, 0xffffffff);
+
+ /* Log the results */
+ printf (" status: 0x%01x\n", status);
+
+ if (crc_out != crc_computed)
+ {
+ printf (" CRC mismatch\n");
+ printf (" CRC out: 0x%08lx\n", crc_out);
+ printf (" CRC computed: 0x%08lx\n", crc_computed);
+ }
+
+ printf (" time taken: %.12fs\n", t);
+
+ free (data);
+ free (jreg);
+ return 1; /* Completed successfully */
+
+} /* process_go_command_write () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Process a JTAG GO_COMMAND_READ debug data register
+
+ Usage:
+
+ GO_COMMAND_READ
+
+ The one argument is a length in hex, specifying the number of bytes to be
+ read.
+
+ On return we get a status register and CRC.
+
+ Like all JTAG fields, the CRC shifted in, the data read back, the status
+ and CRC shifted out, must be reversed, since they are shifted in MS bit
+ first and out LS bit first.
+
+ @param[in] next_jreg Offset into argv of the next JTAG register hex
+ string.
+ @param[in] argc argc from the main program (for checking next_jreg).
+ @param[in] argv argv from the main program.
+
+ @return 1 (TRUE) on success, 0 (FALSE) on failure. */
+/* --------------------------------------------------------------------------*/
+static int
+process_go_command_read (int next_jreg,
+ int argc,
+ char *argv[])
+{
+ printf ("Processing GO_COMMAND_READ.\n");
+
+ /* Do we have the args */
+ if (next_jreg >= argc)
+ {
+ printf ("GO_COMMAND_READ usage: GO_COMMAND_READ \n");
+ return 0;
+ }
+
+ /* Is the argument in range? Remember the length we actually put in has 1
+ subtracted, so although it is a 16-bit field, it can be up to 2^16. */
+ unsigned long int cmd = 0; /* GO_COMMAND */
+ unsigned long int data_bytes = strtoul (argv[next_jreg], NULL, 16);
+
+ if (data_bytes < 0)
+ {
+ printf ("ERROR: GO_COMMAND_READ length 0x%lx too small\n", data_bytes);
+ return 0;
+ }
+ else if (data_bytes > 0x10000)
+ {
+ printf ("ERROR: GO_COMMAND_READ length 0x%lx too large\n", data_bytes);
+ return 0;
+ }
+
+ /* Compute the CRC */
+ unsigned long int crc_in;
+
+ crc_in = crc32 (0, 1, 0xffffffff);
+ crc_in = crc32 (cmd, 4, crc_in);
+
+ /* Reverse the fields */
+ cmd = reverse_bits (cmd, 4);
+ crc_in = reverse_bits (crc_in, 32);
+
+ /* Allocate space and initialize the register
+ - 1 indicator bit
+ - 4 bits command in
+ - 32 bits CRC in
+ - data_bytes * 8 bits access type out
+ - 4 bits status out
+ - 32 bits CRC out
+
+ Total 73 + data_bytes * 8 bits = 10 + data_bytes bytes */
+ int num_bytes = 10 + data_bytes;
+ unsigned char *jreg = malloc (num_bytes);
+
+ if (NULL == jreg)
+ {
+ printf ("ERROR: malloc forGO_COMMAND_READ register failed.\n");
+ return 0;
+ }
+
+ memset (jreg, 0, num_bytes);
+
+ jreg[0] = 0x0;
+ jreg[0] |= cmd << 1;
+
+ jreg[0] |= crc_in << 5;
+ jreg[1] = crc_in >> 3;
+ jreg[2] = crc_in >> 11;
+ jreg[3] = crc_in >> 19;
+ jreg[4] = crc_in >> 27;
+
+ /* Note what we are shifting in and shift it. */
+ dump_jreg (" shifting in", jreg, num_bytes);
+ double t = or1ksim_jtag_shift_dr (jreg,
+ 32 + 4 + data_bytes * 8 + 32 + 4 + 1);
+
+ /* Diagnose what we are shifting out. */
+ dump_jreg (" shifted out", jreg, num_bytes);
+
+ /* Break out fields */
+ unsigned char *data = malloc (data_bytes);
+ unsigned char status;
+ unsigned long int crc_out;
+
+ if (NULL == data)
+ {
+ printf ("ERROR: data malloc for GO_COMMAND_READ register failed.\n");
+ free (jreg);
+ return 0;
+ }
+
+ int i;
+
+ for (i = 0; i < data_bytes; i++)
+ {
+ data[i] = ((jreg[i + 4] >> 5) | (jreg[i + 5] << 3)) & 0xff;
+ }
+
+ status = ((jreg[data_bytes + 4] >> 5) | (jreg[data_bytes + 5] << 3)) & 0xf ;
+
+ crc_out = ((unsigned long int) jreg[data_bytes + 5] >> 1) |
+ ((unsigned long int) jreg[data_bytes + 6] << 7) |
+ ((unsigned long int) jreg[data_bytes + 7] << 15) |
+ ((unsigned long int) jreg[data_bytes + 8] << 23) |
+ ((unsigned long int) jreg[data_bytes + 9] << 31);
+
+ /* Reverse the fields */
+ for (i = 0; i < data_bytes; i++)
+ {
+ data[i] = reverse_bits (data[i], 8);
+ }
+
+ status = reverse_bits (status, 4);
+ crc_out = reverse_bits (crc_out, 32);
+
+ /* Compute our own CRC */
+ unsigned long int crc_computed = 0xffffffff;
+
+ for (i = 0; i < data_bytes; i++)
+ {
+ crc_computed = crc32 (data[i], 8, crc_computed);
+ }
+
+ crc_computed = crc32 (status, 4, crc_computed);
+
+ /* Log the results, remembering these are bytes, so endianness is not a
+ factor here. Since the OR1K is big endian, the lowest numbered byte will
+ be the least significant, and the first printed */
+ printf (" data: ");
+
+ for (i = 0; i < data_bytes; i++)
+ {
+ printf ("%02x", data[i]);
+ }
+
+ printf ("\n");
+ printf (" status: 0x%01x\n", status);
+
+ if (crc_out != crc_computed)
+ {
+ printf (" CRC mismatch\n");
+ printf (" CRC out: 0x%08lx\n", crc_out);
+ printf (" CRC computed: 0x%08lx\n", crc_computed);
+ }
+
+ printf (" time taken: %.12fs\n", t);
+
+ free (data);
+ free (jreg);
+ return 1; /* Completed successfully */
+
+} /* process_go_command_read () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Process a JTAG WRITE_CONTROL debug data register
+
+ Usage:
+
+ WRITE_CONTROL
+
+ The arguments should be either zero or one.
+
+ The arguments are used to construct the 52-bit CPU control register. Like
+ all JTAG fields, it must be reversed, so it is shifted MS bit first. It
+ also requires a 32-bit CRC.
+
+ On return we get a status register and CRC.
+
+ @param[in] next_jreg Offset into argv of the next JTAG register hex
+ string.
+ @param[in] argc argc from the main program (for checking next_jreg).
+ @param[in] argv argv from the main program.
+
+ @return 1 (TRUE) on success, 0 (FALSE) on failure. */
+/* --------------------------------------------------------------------------*/
+static int
+process_write_control (int next_jreg,
+ int argc,
+ char *argv[])
+{
+ printf ("Processing WRITE_CONTROL.\n");
+
+ /* Do we have the args */
+ if (next_jreg + 2 > argc)
+ {
+ printf ("WRITE_CONTROL usage: WRITE_CONTROL \n");
+ return 0;
+ }
+
+ /* Are the arguments in range? */
+ unsigned long int cmd = 4; /* WRITE_CONTROL */
+
+ unsigned long int reset = strtoul (argv[next_jreg ], NULL, 16);
+ unsigned long int stall = strtoul (argv[next_jreg + 1], NULL, 16);
+
+ if (reset > 0x1)
+ {
+ printf ("ERROR: invalid WRITE_CONTROL reset value 0x%lx.\n", reset);
+ return 0;
+ }
+
+ if (stall > 0x1)
+ {
+ printf ("ERROR: invalid WRITE_CONTROL stall value 0x%lx.\n", stall);
+ return 0;
+ }
+
+ /* Construct the control register */
+ unsigned long long int creg = ((unsigned long long int) reset << 51) |
+ ((unsigned long long int) stall << 50);
+
+ /* Compute the CRC */
+ unsigned long int crc_in;
+
+ crc_in = crc32 (0, 1, 0xffffffff);
+ crc_in = crc32 (cmd, 4, crc_in);
+ crc_in = crc32 (creg, 52, crc_in);
+
+ /* Reverse the fields */
+ cmd = reverse_bits (cmd, 4);
+ creg = reverse_bits (creg, 52);
+ crc_in = reverse_bits (crc_in, 32);
+
+ /* Allocate space and initialize the register
+ - 1 indicator bit
+ - 4 bits command in
+ - 52 bits control register
+ - 32 bits CRC in
+ - 4 bits status out
+ - 32 bits CRC out
+
+ Total 125 bits = 16 bytes */
+ int num_bytes = 16;
+ unsigned char *jreg = malloc (num_bytes);
+
+ if (NULL == jreg)
+ {
+ printf ("ERROR: malloc for WRITE_CONTROL register failed.\n");
+ return 0;
+ }
+
+ memset (jreg, 0, num_bytes);
+
+ jreg[ 0] = 0x0;
+
+ jreg[ 0] |= cmd << 1;
+
+ jreg[ 0] |= creg << 5;
+ jreg[ 1] = creg >> 3;
+ jreg[ 2] = creg >> 11;
+ jreg[ 3] = creg >> 19;
+ jreg[ 4] = creg >> 27;
+ jreg[ 5] = creg >> 35;
+ jreg[ 6] = creg >> 43;
+ jreg[ 7] = creg >> 51;
+
+ jreg[ 7] |= crc_in << 1;
+ jreg[ 8] = crc_in >> 7;
+ jreg[ 9] = crc_in >> 15;
+ jreg[10] = crc_in >> 23;
+ jreg[11] = crc_in >> 31;
+
+ /* Note what we are shifting in and shift it. */
+ dump_jreg (" shifting in", jreg, num_bytes);
+ double t = or1ksim_jtag_shift_dr (jreg, 32 + 4 + 32 + 52 + 4 + 1);
+
+ /* Diagnose what we are shifting out. */
+ dump_jreg (" shifted out", jreg, num_bytes);
+
+ /* Break out fields */
+ unsigned char status;
+ unsigned long int crc_out;
+
+ status = (jreg[11] >> 1) & 0xf ;
+
+ crc_out = ((unsigned long int) jreg[11] >> 5) |
+ ((unsigned long int) jreg[12] << 3) |
+ ((unsigned long int) jreg[13] << 11) |
+ ((unsigned long int) jreg[14] << 19) |
+ ((unsigned long int) jreg[15] << 27);
+
+ /* Reverse the fields */
+ status = reverse_bits (status, 4);
+ crc_out = reverse_bits (crc_out, 32);
+
+ /* Compute our own CRC */
+ unsigned long int crc_computed = crc32 (status, 4, 0xffffffff);
+
+ /* Log the results */
+ printf (" status: 0x%01x\n", status);
+
+ if (crc_out != crc_computed)
+ {
+ printf (" CRC mismatch\n");
+ printf (" CRC out: 0x%08lx\n", crc_out);
+ printf (" CRC computed: 0x%08lx\n", crc_computed);
+ }
+
+ printf (" time taken: %.12fs\n", t);
+
+ free (jreg);
+ return 1; /* Completed successfully */
+
+} /* process_write_control () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Process a JTAG READ_CONTROL debug data register
+
+ Usage:
+
+ READ_CONTROL
+
+ There are no arguments. It requires a 32-bit CRC.
+
+ On return we get the control register, status and CRC.
+
+ Like all the JTAG fields, they must be reversed, as resutl is shifted out
+ LS bit first.
+
+ @param[in] next_jreg Offset into argv of the next JTAG register hex
+ string.
+ @param[in] argc argc from the main program (for checking next_jreg).
+ @param[in] argv argv from the main program.
+
+ @return 1 (TRUE) on success, 0 (FALSE) on failure. */
+/* --------------------------------------------------------------------------*/
+static int
+process_read_control (int next_jreg,
+ int argc,
+ char *argv[])
+{
+ printf ("Processing READ_CONTROL.\n");
+
+ /* Only input field is cmd. */
+ unsigned long int cmd = 3; /* READ_CONTROL */
+
+ /* Compute the CRC */
+ unsigned long int crc_in;
+
+ crc_in = crc32 (0, 1, 0xffffffff);
+ crc_in = crc32 (cmd, 4, crc_in);
+
+ /* Reverse the fields */
+ cmd = reverse_bits (cmd, 4);
+ crc_in = reverse_bits (crc_in, 32);
+
+ /* Allocate space and initialize the register
+ - 1 indicator bit
+ - 4 bits command in
+ - 32 bits CRC in
+ - 52 bits control register out
+ - 4 bits status out
+ - 32 bits CRC out
+
+ Total 125 bits = 16 bytes */
+ int num_bytes = 16;
+ unsigned char *jreg = malloc (num_bytes);
+
+ if (NULL == jreg)
+ {
+ printf ("ERROR: malloc for READ_CONTROL register failed.\n");
+ return 0;
+ }
+
+ memset (jreg, 0, num_bytes);
+
+ jreg[0] = 0x0;
+
+ jreg[0] |= cmd << 1;
+
+ jreg[0] |= crc_in << 5;
+ jreg[1] = crc_in >> 3;
+ jreg[2] = crc_in >> 11;
+ jreg[3] = crc_in >> 19;
+ jreg[4] = crc_in >> 27;
+
+ /* Note what we are shifting in and shift it. */
+ dump_jreg (" shifting in", jreg, num_bytes);
+ double t = or1ksim_jtag_shift_dr (jreg, 32 + 4 + 52 + 32 + 4 + 1);
+
+ /* Diagnose what we are shifting out. */
+ dump_jreg (" shifted out", jreg, num_bytes);
+
+ /* Break out fields */
+ unsigned long long int creg;
+ unsigned char status;
+ unsigned long int crc_out;
+
+ creg = ((unsigned long long int) jreg[ 4] >> 5) |
+ ((unsigned long long int) jreg[ 5] << 3) |
+ ((unsigned long long int) jreg[ 6] << 11) |
+ ((unsigned long long int) jreg[ 7] << 19) |
+ ((unsigned long long int) jreg[ 8] << 27) |
+ ((unsigned long long int) jreg[ 9] << 35) |
+ ((unsigned long long int) jreg[10] << 43) |
+ ((unsigned long long int) (jreg[11] & 0x1) << 51);
+
+ status = (jreg[11] >> 1) & 0xf ;
+
+ crc_out = ((unsigned long int) jreg[11] >> 5) |
+ ((unsigned long int) jreg[12] << 3) |
+ ((unsigned long int) jreg[13] << 11) |
+ ((unsigned long int) jreg[14] << 19) |
+ ((unsigned long int) jreg[15] << 27);
+
+ /* Reverse the fields */
+ creg = reverse_bits (creg, 52);
+ status = reverse_bits (status, 4);
+ crc_out = reverse_bits (crc_out, 32);
+
+ /* Compute our own CRC */
+ unsigned long int crc_computed;
+
+ crc_computed = crc32 (creg, 52, 0xffffffff);
+ crc_computed = crc32 (status, 4, crc_computed);
+
+ const char *reset = (1 == ((creg >> 51) & 1)) ? "enabled" : "disabled";
+ const char *stall = (1 == ((creg >> 50) & 1)) ? "stalled" : "unstalled";
+
+ /* Log the results */
+ printf (" reset: %s\n", reset);
+ printf (" stall: %s\n", stall);
+ printf (" status: 0x%01x\n", status);
+
+ if (crc_out != crc_computed)
+ {
+ printf (" CRC mismatch\n");
+ printf (" CRC out: 0x%08lx\n", crc_out);
+ printf (" CRC computed: 0x%08lx\n", crc_computed);
+ }
+
+ printf (" time taken: %.12fs\n", t);
+
+ free (jreg);
+ return 1; /* Completed successfully */
+
+} /* process_read_control () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Main program
+
+ Build an or1ksim program using the library which loads a program and config
+ from the command line and then drives JTAG.
+
+ lib-jtag-full []
+ [ []] ...
+
+ - config-file An Or1ksim configuration file.
+ - image A OpenRISC binary image to load into Or1ksim
+ - jregtype One of RESET, INSTRUCTION, SELECT_MODULE, WRITE_COMMAND,
+ READ_COMMAND, GO_COMMAND_WRITE, GO_COMMAND_READ,
+ WRITE_CONTROL or READ_CONTROL.
+ - args Arguments required by the jregtype. RESET, READ_COMMAND and
+ READ_CONTROL require none.
+
+ The target program is run in bursts of 1ms execution, and the type of
+ return (OK, hit breakpoint) noted. Between each burst of execution, the
+ JTAG interface is reset (for RESET) or the next register is submitted to
+ the corresponding Or1ksim JTAG interface and the resulting register noted.
+
+ @param[in] argc Number of elements in argv
+ @param[in] argv Vector of program name and arguments
+
+ @return Return code for the program, zero on success. */
+/* --------------------------------------------------------------------------*/
+int
+main (int argc,
+ char *argv[])
+{
+ const double QUANTUM = 5.0e-3; /* Time in sec for each step. */
+
+ /* Check we have minimum number of args. */
+ if (argc < 4)
+ {
+ printf ("usage: lib-jtag [] "
+ "[ []] ...\n");
+ return 1;
+ }
+
+ /* Dummy argv array to pass arguments to or1ksim_init. Varies depending on
+ whether an image file is specified. */
+ int dummy_argc;
+ char *dummy_argv[5];
+
+ dummy_argv[0] = "libsim";
+ dummy_argv[1] = "-q";
+ dummy_argv[2] = "-f";
+ dummy_argv[3] = argv[1];
+ dummy_argv[4] = argv[2];
+
+ dummy_argc = 5;
+
+ /* Initialize the program. Put the initialization message afterwards, or it
+ will get swamped by the Or1ksim header. */
+ if (0 == or1ksim_init (dummy_argc, dummy_argv, NULL, NULL, NULL))
+ {
+ printf ("Initalization succeeded.\n");
+ }
+ else
+ {
+ printf ("Initalization failed.\n");
+ return 1;
+ }
+
+ /* Run repeatedly for 10 milliseconds until we have processed all JTAG
+ registers */
+ int next_jreg = 3; /* Offset to next JTAG register */
+
+ do
+ {
+ switch (or1ksim_run (QUANTUM))
+ {
+ case OR1KSIM_RC_OK:
+ printf ("Execution step completed OK.\n");
+ break;
+
+ case OR1KSIM_RC_BRKPT:
+ printf ("Execution step completed with breakpoint.\n");
+ break;
+
+ default:
+ printf ("ERROR: run failed.\n");
+ return 1;
+ }
+
+ /* Process the next register appropriately, skipping any args after
+ processing. */
+ char *jregtype = argv[next_jreg++];
+
+ if (0 == strcasecmp ("RESET", jregtype))
+ {
+ printf ("Resetting JTAG.\n");
+ or1ksim_jtag_reset ();
+ }
+ else if (0 == strcasecmp ("INSTRUCTION", jregtype))
+ {
+ if (process_instruction (next_jreg, argc, argv))
+ {
+ next_jreg++; /* succeeded */
+ }
+ else
+ {
+ return 1; /* failed */
+ }
+ }
+ else if (0 == strcasecmp ("SELECT_MODULE", jregtype))
+ {
+ if (process_select_module (next_jreg, argc, argv))
+ {
+ next_jreg++; /* succeeded */
+ }
+ else
+ {
+ return 1; /* failed */
+ }
+ }
+ else if (0 == strcasecmp ("WRITE_COMMAND", jregtype))
+ {
+ if (process_write_command (next_jreg, argc, argv))
+ {
+ next_jreg += 3; /* succeeded */
+ }
+ else
+ {
+ return 1; /* failed */
+ }
+ }
+ else if (0 == strcasecmp ("READ_COMMAND", jregtype))
+ {
+ if (process_read_command (next_jreg, argc, argv))
+ {
+ /* succeeded (no args) */
+ }
+ else
+ {
+ return 1; /* failed */
+ }
+ }
+ else if (0 == strcasecmp ("GO_COMMAND_WRITE", jregtype))
+ {
+ if (process_go_command_write (next_jreg, argc, argv))
+ {
+ next_jreg++; /* succeeded */
+ }
+ else
+ {
+ return 1; /* failed */
+ }
+ }
+ else if (0 == strcasecmp ("GO_COMMAND_READ", jregtype))
+ {
+ if (process_go_command_read (next_jreg, argc, argv))
+ {
+ next_jreg++; /* succeeded */
+ }
+ else
+ {
+ return 1; /* failed */
+ }
+ }
+ else if (0 == strcasecmp ("WRITE_CONTROL", jregtype))
+ {
+ if (process_write_control (next_jreg, argc, argv))
+ {
+ next_jreg += 2; /* succeeded */
+ }
+ else
+ {
+ return 1; /* failed */
+ }
+ }
+ else if (0 == strcasecmp ("READ_CONTROL", jregtype))
+ {
+ if (process_read_control (next_jreg, argc, argv))
+ {
+ /* succeeded (no args) */
+ }
+ else
+ {
+ return 1; /* failed */
+ }
+ }
+ else
+ {
+ printf ("ERROR: Unrecognized JTAG register '%s'.\n", jregtype);
+ return 1;
+ }
+ }
+ while (next_jreg < argc);
+
+ /* A little longer to allow response to last upcall to be handled. */
+ switch (or1ksim_run (QUANTUM))
+ {
+ case OR1KSIM_RC_OK:
+ printf ("Execution step completed OK.\n");
+ break;
+
+ case OR1KSIM_RC_BRKPT:
+ printf ("Execution step completed with breakpoint.\n");
+ break;
+
+ default:
+ printf ("ERROR: run failed.\n");
+ return 1;
+ }
+
+ printf ("Test completed successfully.\n");
+ return 0;
+
+} /* main () */
lib-jtag/lib-jtag-full.c
Property changes :
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+Id
\ No newline at end of property
Index: lib-jtag/lib-jtag.c
===================================================================
--- lib-jtag/lib-jtag.c (nonexistent)
+++ lib-jtag/lib-jtag.c (revision 388)
@@ -0,0 +1,357 @@
+/* lib-jtag.c. Basic test of Or1ksim library JTAG interface.
+
+ Copyright (C) 1999-2006 OpenCores
+ Copyright (C) 2010 Embecosm Limited
+
+ Contributors various OpenCores participants
+ Contributor Jeremy Bennett
+
+ This file is part of OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see
+#include
+#include
+#include
+#include
+
+#include "or1ksim.h"
+
+
+/* --------------------------------------------------------------------------*/
+/*!Dump a JTAG register
+
+ Prefix with the supplied string and add a newline afterwards.
+
+ @param[in] prefix Prefix string to print out
+ @param[in] jreg The JTAG register
+ @param[in] num_bytes The number of bytes in the register */
+/* --------------------------------------------------------------------------*/
+static void
+dump_jreg (const char *prefix,
+ unsigned char *jreg,
+ int num_bytes)
+{
+ int i;
+
+ printf ("%s: ", prefix);
+
+ /* Dump each byte in turn */
+ for (i = num_bytes - 1; i >=0; i--)
+ {
+ printf ("%02x", jreg[i]);
+ }
+
+ printf ("\n");
+
+} /* dump_jreg () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Convert a hex char into its value.
+
+ @param[in] c The char to convert
+
+ @return The value represented by the char, or -1 if it's not a valid
+ char. */
+/* --------------------------------------------------------------------------*/
+static int
+hexch2val (char c)
+{
+ switch (c)
+ {
+ case '0': return 0;
+ case '1': return 1;
+ case '2': return 2;
+ case '3': return 3;
+ case '4': return 4;
+ case '5': return 5;
+ case '6': return 6;
+ case '7': return 7;
+ case '8': return 8;
+ case '9': return 9;
+
+ case 'a': case 'A': return 10;
+ case 'b': case 'B': return 11;
+ case 'c': case 'C': return 12;
+ case 'd': case 'D': return 13;
+ case 'e': case 'E': return 14;
+ case 'f': case 'F': return 15;
+
+ default:
+ return -1;
+ }
+} /* hexch2val () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Shift a JTAG register.
+
+ Almost all this code is common between the instruction and data
+ registers. All that varies is the library function called and the error
+ message if anything goes wrong. So we common things up here.
+
+ @param[in] type 'D' if this is a data register, 'I' if an instruction
+ register.
+ @param[in] next_jreg Offset into argv of the next JTAG register length
+ field.
+ @param[in] argc argc from the main program (for checking next_jref).
+ @param[in] argv argv from the main program.
+
+ @return 1 (TRUE) on success, 0 (FALSE) on failure. */
+/* --------------------------------------------------------------------------*/
+static int
+process_jreg (const char type,
+ int next_jreg,
+ int argc,
+ char *argv[])
+{
+ const char *long_name = ('D' == type) ? "data" : "instruction";
+
+ /* Do we have the arg (length and value)? */
+ if ((next_jreg + 1) > argc)
+ {
+ printf ("ERROR: no %s register found.\n", long_name);
+ return 0;
+ }
+
+ /* Get the length field */
+ int bit_len = strtol (argv[next_jreg++], NULL, 0);
+
+ if (0 == bit_len)
+ {
+ printf ("ERROR: invalid register length\n");
+ return 0;
+ }
+
+ /* Is the reg an exact number of bytes? */
+ char *hex_str = argv[next_jreg];
+ int num_chars = strlen (hex_str);
+ int num_bytes = (bit_len + 7) / 8;
+
+ if (num_chars > (2 * num_bytes))
+ {
+ printf ("Warning: Too many digits for register: truncated.\n");
+ }
+
+ /* Allocate and clear space */
+ unsigned char *jreg = malloc (num_bytes);
+
+ if (NULL == jreg)
+ {
+ printf ("ERROR: malloc for %s register failed.\n", long_name);
+ return 0;
+ }
+
+ memset (jreg, 0, num_bytes);
+
+ /* Initialize the register. The hex presentation is MS byte of the string on
+ the left (i.e. at offset 0), but the internal representation is LS byte
+ at the lowest address. */
+ int i;
+
+ for (i = num_chars - 1; i >= 0; i--)
+ {
+ int dig_num = num_chars - 1 - i; /* Which digit */
+ int dig_val = hexch2val (hex_str[i]);
+
+ if (dig_val < 0)
+ {
+ printf ("ERROR: %c not valid hex digit.\n", hex_str[i]);
+ free (jreg);
+ return 0;
+ }
+
+ /* MS digits are the odd numbered ones */
+ jreg[dig_num / 2] |= (0 == (dig_num % 2)) ? dig_val : dig_val << 4;
+ }
+
+ /* Note what we are doing */
+ dump_jreg (" shifting in", jreg, num_bytes);
+
+ double t;
+
+ if ('D' == type)
+ {
+ t = or1ksim_jtag_shift_dr (jreg, bit_len);
+ }
+ else
+ {
+ t = or1ksim_jtag_shift_ir (jreg, bit_len);
+ }
+
+ dump_jreg (" shifted out", jreg, num_bytes);
+ printf (" time taken %.12fs\n", t);
+
+ free (jreg);
+ return 1; /* Completed successfully */
+
+} /* process_jreg () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Main program
+
+ Build an or1ksim program using the library which loads a program and config
+ from the command line which will drive JTAG.
+
+ lib-jtag [ ]
+ [ [ ]] ...
+
+ - config-file An Or1ksim configuration file.
+ - image A OpenRISC binary image to load into Or1ksim
+ - jtype One of 'R' (JTAG reset), 'I' (JTAG instruction register) or
+ 'D' (JTAG data register).
+ - bitlen If jtype is 'D' or 'I', the number of bits in the JTAG
+ register.
+ - reg If jtype is 'D' or 'I', a JTAG register specified in
+ hex. Specified LS digit on the right, and leading zeros may
+ be omitted.
+
+ The target program is run in bursts of 1ms execution, and the type of
+ return (OK, hit breakpoint) noted. Between each burst of execution, the
+ next register is submitted to the corresponding Or1ksim JTAG interface
+ function, and the resulting register (for 'I' and 'D') noted.
+
+ @param[in] argc Number of elements in argv
+ @param[in] argv Vector of program name and arguments
+
+ @return Return code for the program. */
+/* --------------------------------------------------------------------------*/
+int
+main (int argc,
+ char *argv[])
+{
+ /* Check we have minimum number of args. */
+ if (argc < 4)
+ {
+ printf ("usage: lib-jtag [ ] "
+ "[ [ ]] ...\n");
+ return 1;
+ }
+
+ /* Dummy argv array to pass arguments to or1ksim_init. Varies depending on
+ whether an image file is specified. */
+ int dummy_argc;
+ char *dummy_argv[5];
+
+ dummy_argv[0] = "libsim";
+ dummy_argv[1] = "-q";
+ dummy_argv[2] = "-f";
+ dummy_argv[3] = argv[1];
+ dummy_argv[4] = argv[2];
+
+ dummy_argc = 5;
+
+ /* Initialize the program. Put the initialization message afterwards, or it
+ will get swamped by the Or1ksim header. */
+ if (0 == or1ksim_init (dummy_argc, dummy_argv, NULL, NULL, NULL))
+ {
+ printf ("Initalization succeeded.\n");
+ }
+ else
+ {
+ printf ("Initalization failed.\n");
+ return 1;
+ }
+
+ /* Run repeatedly for 1 millisecond until we have processed all JTAG
+ registers */
+ int next_jreg = 3; /* Offset to next JTAG register */
+
+ do
+ {
+ switch (or1ksim_run (1.0e-3))
+ {
+ case OR1KSIM_RC_OK:
+ printf ("Execution step completed OK.\n");
+ break;
+
+ case OR1KSIM_RC_BRKPT:
+ printf ("Execution step completed with breakpoint.\n");
+ break;
+
+ default:
+ printf ("ERROR: run failed.\n");
+ return 1;
+ }
+
+ /* Process the next arg appropriately. */
+ switch (argv[next_jreg++][0])
+ {
+ case 'R':
+ printf ("Resetting JTAG.\n");
+ or1ksim_jtag_reset ();
+ break;
+
+ case 'I':
+ printf ("Shifting instruction register.\n");
+
+ if (process_jreg ('I', next_jreg, argc, argv))
+ {
+ next_jreg += 2;
+ }
+ else
+ {
+ return 1; /* Something went wrong */
+ }
+
+ break;
+
+ case 'D':
+ printf ("Shifting data register.\n");
+
+ if (process_jreg ('D', next_jreg, argc, argv))
+ {
+ next_jreg += 2;
+ }
+ else
+ {
+ return 1; /* Something went wrong */
+ }
+
+ break;
+
+ default:
+ printf ("ERROR: unknown JTAG request type.\n");
+ return 1;
+ }
+ }
+ while (next_jreg < argc);
+
+ /* A little longer to allow response to last upcall to be handled. */
+ switch (or1ksim_run (1.0e-3))
+ {
+ case OR1KSIM_RC_OK:
+ printf ("Execution step completed OK.\n");
+ break;
+
+ case OR1KSIM_RC_BRKPT:
+ printf ("Execution step completed with breakpoint.\n");
+ break;
+
+ default:
+ printf ("ERROR: run failed.\n");
+ return 1;
+ }
+
+ printf ("Test completed successfully.\n");
+ return 0;
+
+} /* main () */
lib-jtag/lib-jtag.c
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+native
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## -0,0 +1 ##
+Id
\ No newline at end of property
Index: lib-jtag/Makefile.am
===================================================================
--- lib-jtag/Makefile.am (nonexistent)
+++ lib-jtag/Makefile.am (revision 388)
@@ -0,0 +1,39 @@
+# Makefile.am for libor1ksim test programs for JTAG
+
+# Copyright (C) Embecosm Limited, 2010
+
+# Contributor Jeremy Bennett
+
+# This file is part of OpenRISC 1000 Architectural Simulator.
+
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3 of the License, or (at your option)
+# any later version.
+
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program. If not, see
lib-jtag/Makefile.am
Property changes :
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+Id
\ No newline at end of property
Index: lib-inttest/Makefile.in
===================================================================
--- lib-inttest/Makefile.in (nonexistent)
+++ lib-inttest/Makefile.in (revision 388)
@@ -0,0 +1,529 @@
+# Makefile.in generated by automake 1.11.1 from Makefile.am.
+# @configure_input@
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation,
+# Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+@SET_MAKE@
+
+# Makefile.am for libor1ksim test program: lib-inttest
+
+# Copyright (C) Embecosm Limited, 2010
+
+# Contributor Jeremy Bennett
+
+# This file is part of OpenRISC 1000 Architectural Simulator.
+
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3 of the License, or (at your option)
+# any later version.
+
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program. If not, see
+
+ This file is part of OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see
+#include
+
+#include "or1ksim.h"
+
+
+/*! Number of interrupts in PIC */
+#define NUM_INTS 32
+
+/*! Globally shared pointer to the interrupts */
+char **intv;
+
+/*! Number of interrupts to process */
+int intc;
+
+
+/* --------------------------------------------------------------------------*/
+/*!Trigger the next interrupt
+
+ Generate the next edge triggered interrupt. Put out a message if doing so,
+ and warn if the interrupt would be invalid.
+
+ @return 1 (true) if an interrupt was triggered, 0 (false) otherwise. */
+/* --------------------------------------------------------------------------*/
+static int
+do_next_int ()
+{
+ static int next_int = 0; /* Next interrupt to process */
+
+ while (next_int < intc)
+ {
+ int inum = atoi (intv[next_int++]);
+
+ if ((0 <= inum) && (inum < NUM_INTS))
+ {
+ printf ("Triggering interrupt %d\n", inum);
+ or1ksim_interrupt (inum);
+ return 1;
+ }
+ else
+ {
+ printf ("Warning: Invalid interrupt # %d - ignored\n", inum);
+ }
+ }
+
+ return 0; /* No more interrupts to trigger */
+
+} /* do_next_int () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Read upcall
+
+ Upcall from Or1ksim to read a word from an external peripheral. If called
+ this will trigger an interrupt.
+
+ @param[in] class_ptr A handle pass back from the initalization. Intended
+ for C++ callers, not used here.
+ @param[in] addr Address to read from. Ignored here.
+ @param[in] mask Byte mask for the read. Ignored here.
+ @param[out] rdata Buffer for the data read. Ignored here.
+ @param[in] data_len Number of bytes in mask and rdata.
+
+ @return Zero on success, non-zero on failure. Always zero here. */
+/* --------------------------------------------------------------------------*/
+static int
+read_upcall (void *class_ptr,
+ unsigned long int addr,
+ unsigned char mask[],
+ unsigned char rdata[],
+ int data_len)
+{
+ do_next_int ();
+
+ return 0; /* Success */
+
+} /* read_upcall () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Write upcall
+
+ Upcall from Or1ksim to write a word to an external peripheral. If called
+ this will trigger an interrupt.
+
+ @param[in] class_ptr A handle pass back from the initalization. Intended
+ for C++ callers, not used here.
+ @param[in] addr Address to write to. Ignored here.
+ @param[in] mask Byte mask for the write. Ignored here.
+ @param[in] wdata The data to write. Ignored here.
+ @param[in] data_len Number of bytes in mask and rdata.
+
+ @return Zero on success, non-zero on failure. Always zero here. */
+/* --------------------------------------------------------------------------*/
+static int
+write_upcall (void *class_ptr,
+ unsigned long int addr,
+ unsigned char mask[],
+ unsigned char wdata[],
+ int data_len)
+{
+ do_next_int ();
+
+ return 0; /* Success */
+
+} /* write_upcall () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Main program
+
+ Build an or1ksim program using the library which loads a program and config
+ from the command line, and then drives interrupts. Usage:
+
+ lib-inttest-edge ...
+
+ is run for repeated perios of , during which it
+ will make upcalls. Between each period and during each upcall an edge based
+ interrupt will be triggered, until all interrupts listed have been
+ triggered.
+
+ @param[in] argc Number of elements in argv
+ @param[in] argv Vector of program name and arguments
+
+ @return Return code for the program. */
+/* --------------------------------------------------------------------------*/
+int
+main (int argc,
+ char *argv[])
+{
+ /* Parse args */
+ if (argc < 5)
+ {
+ fprintf (stderr,
+ "usage: lib-inttest-edge "
+ " ...\n");
+ return 1;
+ }
+
+ int duration_ms = atoi (argv[3]);
+ double duration = (double) duration_ms / 1.0e3;
+
+ if (duration_ms <= 0)
+ {
+ fprintf (stderr, "ERROR. Duration must be positive number of ms\n");
+ return 1;
+ }
+
+ /* Dummy argv array to pass arguments to or1ksim_init. Varies depending on
+ whether an image file is specified. */
+ int dummy_argc;
+ char *dummy_argv[5];
+
+ dummy_argv[0] = "libsim";
+ dummy_argv[1] = "-q";
+ dummy_argv[2] = "-f";
+ dummy_argv[3] = argv[1];
+ dummy_argv[4] = argv[2];
+
+ dummy_argc = 5;
+
+ /* Initialize the program. Put the initialization message afterwards, or it
+ will get swamped by the Or1ksim header. */
+ if (0 == or1ksim_init (dummy_argc, dummy_argv, NULL, &read_upcall,
+ &write_upcall))
+ {
+ printf ("Initalization succeeded.\n");
+ }
+ else
+ {
+ printf ("Initalization failed.\n");
+ return 1;
+ }
+
+ /* Do each interrupt in turn. Set up the shared pointer to the interrupts
+ and counter. */
+ intv = &(argv[4]);
+ intc = argc - 4;
+
+ do
+ {
+ /* Run the code */
+ if (OR1KSIM_RC_OK != or1ksim_run (duration))
+ {
+ printf ("ERROR: run failed\n");
+ return 1;
+ }
+ }
+ while (do_next_int ());
+
+ /* One more run, to allow interrupt handler enough time to finish
+ processing. */
+ if (OR1KSIM_RC_OK != or1ksim_run (duration))
+ {
+ printf ("ERROR: run failed\n");
+ return 1;
+ }
+
+ /* All interrupts should have been handled. */
+ printf ("Test completed successfully.\n");
+ return 0;
+
+} /* main () */
lib-inttest/lib-inttest-edge.c
Property changes :
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+native
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+Id
\ No newline at end of property
Index: lib-inttest/lib-inttest-level.c
===================================================================
--- lib-inttest/lib-inttest-level.c (nonexistent)
+++ lib-inttest/lib-inttest-level.c (revision 388)
@@ -0,0 +1,309 @@
+/* lib-inttest-level.c. Test of Or1ksim library level triggered interrupt funcs.
+
+ Copyright (C) 1999-2006 OpenCores
+ Copyright (C) 2010 Embecosm Limited
+
+ Contributors various OpenCores participants
+ Contributor Jeremy Bennett
+
+ This file is part of OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see
+#include
+#include
+
+#include "or1ksim.h"
+
+
+/*! Number of interrupts in PIC */
+#define NUM_INTS 32
+
+/*! Vector of interrupts to be raised */
+static int *raisev;
+
+/*! Count of interrupts to be raised */
+static int raisec = 0;
+
+/*! Next interrupt to be raised */
+static int next_raise = 0;
+
+/*! Vector of interrupts to be cleared */
+static int *clearv;
+
+/*! Count of interrupts to be cleared */
+static int clearc = 0;
+
+/*! Next interrupt to be cleared */
+static int next_clear = 0;
+
+
+/* --------------------------------------------------------------------------*/
+/*!Read upcall
+
+ Upcall from Or1ksim to read a word from an external peripheral. If called
+ this will raise the next interrupt.
+
+ @param[in] class_ptr A handle pass back from the initalization. Intended
+ for C++ callers, not used here.
+ @param[in] addr Address to read from. Ignored here.
+ @param[in] mask Byte mask for the read. Ignored here.
+ @param[out] rdata Buffer for the data read. Ignored here.
+ @param[in] data_len Number of bytes in mask and rdata.
+
+ @return Zero on success, non-zero on failure. Always zero here. */
+/* --------------------------------------------------------------------------*/
+static int
+read_upcall (void *class_ptr,
+ unsigned long int addr,
+ unsigned char mask[],
+ unsigned char rdata[],
+ int data_len)
+{
+ /* Raise an interrupt if there is one left to raise. */
+ if ((NULL != raisev) && (next_raise < raisec))
+ {
+ printf ("Raising interrupt %d\n", raisev[next_raise]);
+ or1ksim_interrupt_set (raisev[next_raise++]);
+ }
+
+ return 0; /* Success */
+
+} /* read_upcall () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Write upcall
+
+ Upcall from Or1ksim to write a word to an external peripheral. If called
+ this will clear the next interrupt.
+
+ @param[in] class_ptr A handle pass back from the initalization. Intended
+ for C++ callers, not used here.
+ @param[in] addr Address to write to. Ignored here.
+ @param[in] mask Byte mask for the write. Ignored here.
+ @param[in] wdata The data to write. Ignored here.
+ @param[in] data_len Number of bytes in mask and rdata.
+
+ @return Zero on success, non-zero on failure. Always zero here. */
+/* --------------------------------------------------------------------------*/
+static int
+write_upcall (void *class_ptr,
+ unsigned long int addr,
+ unsigned char mask[],
+ unsigned char wdata[],
+ int data_len)
+{
+ /* Clear an interrupt if there is one left to clear. */
+ if ((NULL != clearv) && (next_clear < clearc))
+ {
+ printf ("Clearing interrupt %d\n", clearv[next_clear]);
+ or1ksim_interrupt_clear (clearv[next_clear++]);
+ }
+
+ return 0; /* Success */
+
+} /* write_upcall () */
+
+
+/* --------------------------------------------------------------------------*/
+/*!Main program
+
+ Build an or1ksim program using the library which loads a program and config
+ from the command line, and then drives interrupts. Usage:
+
+ lib-inttest-level +|- +|- ...
+
+ is run continuously. It requests that an interrupt be raised by a
+ read upcall and cleared by a write upcall. The sequence of interrupts is
+ specified to be raised (if preceded by '+') or cleared (if preceded by
+ '-'). This allows the program to test the effect of clearing the wrong
+ interrupt.
+
+ @param[in] argc Number of elements in argv
+ @param[in] argv Vector of program name and arguments
+
+ @return Return code for the program. */
+/* --------------------------------------------------------------------------*/
+int
+main (int argc,
+ char *argv[])
+{
+ /* Parse args */
+ if (argc < 4)
+ {
+ fprintf (stderr,
+ "usage: lib-inttest-level "
+ "+|- +|- ...\n");
+ return 1;
+ }
+
+ /* Get all the interrupts sorted out. Count them, then place them in a
+ vector. */
+ int i;
+
+ for (i = 3; i < argc; i++)
+ {
+ int inum;
+
+ switch (argv[i][0])
+ {
+ case '+':
+ inum = atoi (&(argv[i][1]));
+
+ if ((0 <= inum) && (inum < NUM_INTS))
+ {
+ raisec++;
+ }
+ else
+ {
+ printf ("Warning: Invalid interrupt # %d to raise.\n", inum);
+ }
+
+ break;
+
+ case '-':
+ inum = atoi (&(argv[i][1]));
+
+ if ((0 <= inum) && (inum < NUM_INTS))
+ {
+ clearc++;
+ }
+ else
+ {
+ printf ("Warning: Invalid interrupt # %d to clear.\n", inum);
+ }
+
+ break;
+
+
+ default:
+ printf ("Warning: No raise/clear specified - ignored\n");
+ break;
+ }
+ }
+
+ if ((0 == raisec) && (0 == clearc))
+ {
+ printf ("ERROR: No interrupts specified.\n");
+ return 1;
+ }
+
+ /* Allocate space and populate the vectors. */
+ raisev = (raisec > 0) ? calloc (raisec, sizeof (int)) : NULL;
+ clearv = (clearc > 0) ? calloc (clearc, sizeof (int)) : NULL;
+
+ raisec = 0;
+ clearc = 0;
+
+ for (i = 3; i < argc; i++)
+ {
+ int inum;
+
+ switch (argv[i][0])
+ {
+ case '+':
+ inum = atoi (&(argv[i][1]));
+
+ if ((0 <= inum) && (inum < NUM_INTS))
+ {
+ raisev[raisec++] = inum;
+ }
+
+ break;
+
+ case '-':
+ inum = atoi (&(argv[i][1]));
+
+ if ((0 <= inum) && (inum < NUM_INTS))
+ {
+ clearv[clearc++] = inum;
+ }
+
+ break;
+
+
+ default:
+ printf ("Warning: No raise/clear specified - ignored\n");
+ break;
+ }
+ }
+
+ /* Start the counts */
+ next_raise = 0;
+ next_clear = 0;
+
+ /* Dummy argv array to pass arguments to or1ksim_init. Varies depending on
+ whether an image file is specified. */
+ int dummy_argc;
+ char *dummy_argv[5];
+
+ dummy_argv[0] = "libsim";
+ dummy_argv[1] = "-q";
+ dummy_argv[2] = "-f";
+ dummy_argv[3] = argv[1];
+ dummy_argv[4] = argv[2];
+
+ dummy_argc = 5;
+
+ /* Initialize the program. Put the initialization message afterwards, or it
+ will get swamped by the Or1ksim header. */
+ if (0 == or1ksim_init (dummy_argc, dummy_argv, NULL, &read_upcall,
+ &write_upcall))
+ {
+ printf ("Initalization succeeded.\n");
+ }
+ else
+ {
+ printf ("Initalization failed.\n");
+ free (raisev);
+ free (clearv);
+ return 1;
+ }
+
+ /* Run in bursts of 1ms until all interrupts have been set and cleared. */
+ do
+ {
+ if (OR1KSIM_RC_OK != or1ksim_run (1.0e-3))
+ {
+ printf ("ERROR: run failed\n");
+ free (raisev);
+ free (clearv);
+ return 1;
+ }
+ }
+ while ((next_raise < raisec) || (next_clear < clearc));
+
+ /* One more burst to allow the device driver time to complete. */
+ if (OR1KSIM_RC_OK != or1ksim_run (1.0e-3))
+ {
+ printf ("ERROR: run failed\n");
+ free (raisev);
+ free (clearv);
+ return 1;
+ }
+
+ /* All interrupts should have been handled. */
+ free (raisev);
+ free (clearv);
+
+ printf ("Test completed successfully.\n");
+ return 0;
+
+} /* main () */
lib-inttest/lib-inttest-level.c
Property changes :
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+Id
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Index: lib-inttest/Makefile.am
===================================================================
--- lib-inttest/Makefile.am (nonexistent)
+++ lib-inttest/Makefile.am (revision 388)
@@ -0,0 +1,40 @@
+# Makefile.am for libor1ksim test program: lib-inttest
+
+# Copyright (C) Embecosm Limited, 2010
+
+# Contributor Jeremy Bennett
+
+# This file is part of OpenRISC 1000 Architectural Simulator.
+
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3 of the License, or (at your option)
+# any later version.
+
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program. If not, see
lib-inttest/Makefile.am
Property changes :
Added: svn:eol-style
## -0,0 +1 ##
+native
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## -0,0 +1 ##
+Id
\ No newline at end of property
Index: Makefile.am
===================================================================
--- Makefile.am (nonexistent)
+++ Makefile.am (revision 388)
@@ -0,0 +1,32 @@
+# Makefile.am for or1ksim testsuite test-code
+
+# Copyright (C) Embecosm Limited, 2010
+
+# Contributor Jeremy Bennett
+
+# This file is part of OpenRISC 1000 Architectural Simulator.
+
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3 of the License, or (at your option)
+# any later version.
+
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program. If not, see
Makefile.am
Property changes :
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+Id
\ No newline at end of property