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  • This comparison shows the changes necessary to convert path
    /openrisc/tags/or1ksim/or1ksim-0.5.0rc3/testsuite/test-code-or1k/eth
    from Rev 460 to Rev 509
    Reverse comparison

Rev 460 → Rev 509

/Makefile.in
0,0 → 1,512
# Makefile.in generated by automake 1.11.1 from Makefile.am.
# @configure_input@
 
# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
# 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation,
# Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
 
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
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@SET_MAKE@
 
# Makefile.am for or1ksim testsuite CPU test program: eth
 
# Copyright (C) Embecosm Limited, 2010
 
# Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
 
# This file is part of OpenRISC 1000 Architectural Simulator.
 
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
# Software Foundation; either version 3 of the License, or (at your option)
# any later version.
 
# This program is distributed in the hope that it will be useful, but WITHOUT
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# You should have received a copy of the GNU General Public License along
# with this program. If not, see <http:#www.gnu.org/licenses/>. */
 
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eth.h \
fields.h
 
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# For running the check, we'll need the Ethernet source test file copied to
# the build testsuite directory.
check-local:
cp $(top_srcdir)/../or1ksim.tests/eth0.rx $(top_builddir)/..
 
# Tell versions [3.59,3.63) of GNU make to not export all variables.
# Otherwise a system limit (for SysV at least) may be exceeded.
.NOEXPORT:
/eth.c
0,0 → 1,264
/* eth.c. Test of Or1ksim Ethernet
 
Copyright (C) 1999-2006, 2010 OpenCores
Copyright (C) 2010 Embecosm Limited
 
Contributors various OpenCores participants
Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
Contributor Julius Baxter <julius@opencores.org>
 
This file is part of OpenRISC 1000 Architectural Simulator.
 
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3 of the License, or (at your option)
any later version.
 
This program is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
 
You should have received a copy of the GNU General Public License along
with this program. If not, see <http: www.gnu.org/licenses/>. */
 
/* ----------------------------------------------------------------------------
This code is commented throughout for use with Doxygen.
--------------------------------------------------------------------------*/
 
/* TODO: Add loopback test.
*/
 
#include "spr-defs.h"
#include "support.h"
#include "board.h"
 
typedef long off_t;
 
#include "fields.h"
#include "eth.h"
 
typedef volatile unsigned long *REGISTER;
 
REGISTER
eth_moder = (unsigned long *)(ETH_BASE + ETH_MODER),
eth_int_source = (unsigned long *)(ETH_BASE + ETH_INT_SOURCE),
eth_int_mask = (unsigned long *)(ETH_BASE + ETH_INT_MASK),
eth_ipgt = (unsigned long *)(ETH_BASE + ETH_IPGT),
eth_ipgr1 = (unsigned long *)(ETH_BASE + ETH_IPGR1),
eth_ipgr2 = (unsigned long *)(ETH_BASE + ETH_IPGR2),
eth_packetlen = (unsigned long *)(ETH_BASE + ETH_PACKETLEN),
eth_collconf = (unsigned long *)(ETH_BASE + ETH_COLLCONF),
eth_tx_bd_num = (unsigned long *)(ETH_BASE + ETH_TX_BD_NUM),
eth_controlmoder = (unsigned long *)(ETH_BASE + ETH_CTRLMODER),
eth_miimoder = (unsigned long *)(ETH_BASE + ETH_MIIMODER),
eth_miicommand = (unsigned long *)(ETH_BASE + ETH_MIICOMMAND),
eth_miiaddress = (unsigned long *)(ETH_BASE + ETH_MIIADDRESS),
eth_miitx_data = (unsigned long *)(ETH_BASE + ETH_MIITX_DATA),
eth_miirx_data = (unsigned long *)(ETH_BASE + ETH_MIIRX_DATA),
eth_miistatus = (unsigned long *)(ETH_BASE + ETH_MIISTATUS),
eth_mac_addr0 = (unsigned long *)(ETH_BASE + ETH_MAC_ADDR0),
eth_mac_addr1 = (unsigned long *)(ETH_BASE + ETH_MAC_ADDR1),
eth_bd_base = (unsigned long *)(ETH_BASE + ETH_BD_BASE);
 
volatile unsigned int_happend;
#define R_PACKET_SIZE 2000
unsigned char r_packet[R_PACKET_SIZE];
#define S_PACKET_SIZE 1003
unsigned char s_packet[S_PACKET_SIZE];
unsigned tx_bindex;
unsigned rx_bindex;
 
void interrupt_handler()
{
unsigned i,len;
printf ("Int\n");
switch (*eth_int_source & 0x7f) {
case 0x2 :
printf ("Transmit Error.\n");
*eth_int_source = 0x2;
break;
case 0x8 :
printf ("Receive Error\n");
*eth_int_source = 0x8;
break;
case 0x4 :
printf ("Receive Frame\n");
*eth_int_source = 0x4;
 
CLEAR_FLAG(*eth_moder, ETH_MODER, RXEN);
len = GET_FIELD(eth_bd_base[(*eth_tx_bd_num << 1) + 2], ETH_RX_BD, LENGTH);
for (i=0; i<len; i++)
if (r_packet[i] != (unsigned char)i)
{
printf("Failed at byte %d. expect %d, received %d\n", i, i, r_packet[i]);
exit(1);
}
break;
case 0x10:
printf ("Busy\n");
*eth_int_source = 0x10;
break;
case 0x1 :
printf ("Transmit Frame.\n");
*eth_int_source = 0x1;
CLEAR_FLAG(*eth_moder, ETH_MODER, TXEN);
break;
default:
printf ("Invalid int @ %0x\n", (unsigned int)*eth_int_source & 0x7f);
*eth_int_source = 0x7f;
exit (1);
}
 
mtspr(SPR_PICSR, 0);
int_happend = 1;
}
 
static void set_mac( void )
{
*eth_mac_addr0 = 0x04030201LU;
*eth_mac_addr1 = 0x00000605LU;
}
 
static void transmit_one_packet( void )
{
unsigned i;
 
/* Initialize packet */
for ( i = 0; i < S_PACKET_SIZE; ++ i )
s_packet[i] = (unsigned char)i;
 
/* Set Ethernet BD */
SET_FIELD(eth_bd_base[tx_bindex], ETH_TX_BD, LENGTH, S_PACKET_SIZE);
eth_bd_base[tx_bindex + 1] = (unsigned long)s_packet;
 
/* Start Ethernet */
SET_FLAG(eth_bd_base[tx_bindex], ETH_TX_BD, READY);
SET_FLAG(*eth_moder, ETH_MODER, TXEN);
/* Now wait till sent */
while ( TEST_FLAG( eth_bd_base[tx_bindex], ETH_TX_BD, READY ) );
CLEAR_FLAG(*eth_moder, ETH_MODER, TXEN);
*eth_int_source = 0x7f;
}
 
static void transmit_one_packet_int( void )
{
unsigned i;
int_happend = 0;
/* Initialize packet */
printf("Init\n");
for ( i = 0; i < S_PACKET_SIZE; ++ i )
s_packet[i] = (unsigned char)i;
 
/* Set Ethernet BD */
printf("Set BD\n");
SET_FIELD(eth_bd_base[tx_bindex], ETH_TX_BD, LENGTH, S_PACKET_SIZE);
eth_bd_base[tx_bindex + 1] = (unsigned long)s_packet;
 
/* Start Ethernet */
printf("Set Flags\n");
SET_FLAG(eth_bd_base[tx_bindex], ETH_TX_BD, IRQ);
SET_FLAG(eth_bd_base[tx_bindex], ETH_TX_BD, READY);
SET_FLAG(*eth_moder, ETH_MODER, TXEN);
}
 
 
static void receive_one_packet(void)
{
unsigned int i;
unsigned int len;
eth_bd_base[rx_bindex + 1] = (unsigned long)r_packet;
SET_FLAG(eth_bd_base[rx_bindex], ETH_RX_BD, READY);
SET_FLAG(*eth_moder, ETH_MODER, RXEN);
 
while ( TEST_FLAG( eth_bd_base[rx_bindex], ETH_RX_BD, READY ) );
CLEAR_FLAG(*eth_moder, ETH_MODER, RXEN);
*eth_int_source = 0x7f;
 
len = GET_FIELD(eth_bd_base[rx_bindex], ETH_RX_BD, LENGTH);
for (i=0; i<len; i++)
if (r_packet[i] != (unsigned char)i)
{
printf("Failed at byte %d. expect %d, received %d\n", i, i, r_packet[i]);
exit(1);
}
}
 
static void receive_one_packet_int(void)
{
int_happend = 0;
printf("Set BD\n");
eth_bd_base[rx_bindex + 1] = (unsigned long)r_packet;
printf("SetFlags\n");
SET_FLAG(eth_bd_base[rx_bindex], ETH_RX_BD, IRQ);
SET_FLAG(eth_bd_base[rx_bindex], ETH_RX_BD, READY);
SET_FLAG(*eth_moder, ETH_MODER, RXEN);
}
 
int main()
{
printf( "Starting Ethernet test\n" );
 
/* Buffer descriptor indexes. These are not changed in between the
polling tests, as the RXEN and TXEN bits in the MODER are disabled
between tests, resetting the respective buffer descriptor indexes,
and so these should stay at their initial values. */
tx_bindex = 0;
rx_bindex = *eth_tx_bd_num << 1;
 
set_mac();
 
/* Set promiscuous mode */
*eth_moder |= (1 << ETH_MODER_PRO_OFFSET);
 
/*-------------------*/
/* non iterrupt test */
transmit_one_packet();
 
receive_one_packet();
 
transmit_one_packet();
 
receive_one_packet();
/*-------------------*/
/* interrupt test */
excpt_int = (unsigned long)interrupt_handler;
/* Enable interrup ts */
printf("enable ints\n");
mtspr (SPR_SR, mfspr(SPR_SR) | SPR_SR_IEE);
mtspr (SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << ETH_IRQ));
printf("set mask flags TX\n");
SET_FLAG(*eth_int_mask, ETH_INT_MASK, TXB_M);
transmit_one_packet_int();
tx_bindex += 2;
/* printf("waiting for int\n"); */
while (!int_happend);
CLEAR_FLAG(*eth_int_mask, ETH_INT_MASK, TXB_M);
printf("seting mask flag RX\n");
SET_FLAG(*eth_int_mask, ETH_INT_MASK, RXB_M);
receive_one_packet_int();
rx_bindex += 2;
/* printf("waiting for int\n"); */
while (!int_happend);
CLEAR_FLAG(*eth_int_mask, ETH_INT_MASK, RXB_M);
printf( "Ending Ethernet test\n" );
report (0xdeaddead);
exit(0);
}
 
 
eth.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: Makefile.am =================================================================== --- Makefile.am (nonexistent) +++ Makefile.am (revision 509) @@ -0,0 +1,42 @@ +# Makefile.am for or1ksim testsuite CPU test program: eth + +# Copyright (C) Embecosm Limited, 2010 + +# Contributor Jeremy Bennett + +# This file is part of OpenRISC 1000 Architectural Simulator. + +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 3 of the License, or (at your option) +# any later version. + +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. + +# You should have received a copy of the GNU General Public License along +# with this program. If not, see . */ + +# ----------------------------------------------------------------------------- +# This code is commented throughout for use with Doxygen. +# ----------------------------------------------------------------------------- + + +# A test program of the OR1K Ethernet +check_PROGRAMS = eth + +eth_SOURCES = eth.c \ + eth.h \ + fields.h + +eth_LDFLAGS = -T$(srcdir)/../default.ld + +eth_LDADD = ../except/except.lo \ + ../support/libsupport.la + +# For running the check, we'll need the Ethernet source test file copied to +# the build testsuite directory. +check-local: + cp $(top_srcdir)/../or1ksim.tests/eth0.rx $(top_builddir)/..
Makefile.am Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: fields.h =================================================================== --- fields.h (nonexistent) +++ fields.h (revision 509) @@ -0,0 +1,64 @@ +/* fields.h -- Some macros to help with bit field definitions + + Copyright (C) 2001 by Erez Volk, erez@opencores.org + Copyright (C) 2008 Embecosm Limited + + Contributor Jeremy Bennett + + This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator. + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along + with this program. If not, see . */ + +/* This program is commented throughout in a fashion suitable for processing + with Doxygen. */ + + +#ifndef FIELDS__H +#define FIELDS__H + + +/* Macros to get/set a field in a register + * Example: + * unsigned long done, priority, channel_csr; + * + * priority = GET_FIELD( channel_csr, DMA_CH_CSR, PRIORITY ); + * SET_FIELD( channel_csr, DMA_CH_CSR, PRIORITY, priority ); + * + * done = TEST_FLAG( channel_csr, DMA_CH_CSR, DONE ); + * SET_FLAG( channel_csr, DMA_CH_CSR, DONE ); + * CLEAR_FLAG( channel_csr, DMA_CH_CSR, DONE ); + * ASSIGN_FLAG( channel_csr, DMA_CH_CSR, done ); + * + * For each field, we then define e.g. + * #define DMA_CH_CSR_PRIORITY_OFFSET 13 + * #define DMA_CH_CSR_PRIORITY_WIDTH 3 // not needed for flags, which always have width = 1 + */ + +#define FLAG_SHIFT(reg_name,flag_name) (reg_name##_##flag_name##_OFFSET) +#define FLAG_MASK(reg_name,flag_name) (1LU << reg_name##_##flag_name##_OFFSET) + +#define TEST_FLAG(reg_value,reg_name,flag_name) (((reg_value ) >> reg_name##_##flag_name##_OFFSET) & 1LU) +#define SET_FLAG(reg_value,reg_name,flag_name) { (reg_value) |= 1LU << reg_name##_##flag_name##_OFFSET; } +#define CLEAR_FLAG(reg_value,reg_name,flag_name) { (reg_value) &= ~(1LU << reg_name##_##flag_name##_OFFSET); } +#define ASSIGN_FLAG(reg_value,reg_name,flag_name,flag_value) { \ + (reg_value) = flag_value ? ((reg_value) | (1LU << reg_name##_##flag_name##_OFFSET)) : ((reg_value) & ~(1LU << reg_name##_##flag_name##_OFFSET)); } + +#define FIELD_SHIFT(reg_name,field_name) (reg_name##_##field_name##_OFFSET) +#define FIELD_MASK(reg_name,field_name) ((~(~0LU << reg_name##_##field_name##_WIDTH)) << reg_name##_##field_name##_OFFSET) + +#define GET_FIELD(reg_value,reg_name,field_name) (((reg_value) >> reg_name##_##field_name##_OFFSET) & (~(~0LU << reg_name##_##field_name##_WIDTH))) +#define SET_FIELD(reg_value,reg_name,field_name,field_value) { \ + (reg_value) = ((reg_value) & ~((~(~0LU << reg_name##_##field_name##_WIDTH)) << reg_name##_##field_name##_OFFSET)) | ((field_value) << reg_name##_##field_name##_OFFSET); } + +#endif /* FIELDS__H */
fields.h Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: eth.h =================================================================== --- eth.h (nonexistent) +++ eth.h (revision 509) @@ -0,0 +1,170 @@ +/* eth.h -- OpenCores ethernet driver defines + + Copyright (C) 2001 Erez Volk, erez@mailandnews.comopencores.org + Copyright (C) 2008 Embecosm Limited + + Contributor Jeremy Bennett + + This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator. + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along + with this program. If not, see . */ + +/* This program is commented throughout in a fashion suitable for processing + with Doxygen. */ + +#ifndef ETH__H +#define ETH__H + +/* Relative Register Addresses */ +#define ETH_MODER (4 * 0x00) +#define ETH_INT_SOURCE (4 * 0x01) +#define ETH_INT_MASK (4 * 0x02) +#define ETH_IPGT (4 * 0x03) +#define ETH_IPGR1 (4 * 0x04) +#define ETH_IPGR2 (4 * 0x05) +#define ETH_PACKETLEN (4 * 0x06) +#define ETH_COLLCONF (4 * 0x07) +#define ETH_TX_BD_NUM (4 * 0x08) +#define ETH_CTRLMODER (4 * 0x09) +#define ETH_MIIMODER (4 * 0x0A) +#define ETH_MIICOMMAND (4 * 0x0B) +#define ETH_MIIADDRESS (4 * 0x0C) +#define ETH_MIITX_DATA (4 * 0x0D) +#define ETH_MIIRX_DATA (4 * 0x0E) +#define ETH_MIISTATUS (4 * 0x0F) +#define ETH_MAC_ADDR0 (4 * 0x10) +#define ETH_MAC_ADDR1 (4 * 0x11) +#define ETH_HASH0 (4 * 0x12) +#define ETH_HASH1 (4 * 0x13) + +/* Where BD's are stored */ +#define ETH_BD_BASE 0x400 +#define ETH_BD_COUNT 0x100 +#define ETH_BD_SPACE (4 * ETH_BD_COUNT) + +/* Where to point DMA to transmit/receive */ +#define ETH_DMA_RX_TX 0x800 + +/* Field definitions for MODER */ +#define ETH_MODER_DMAEN_OFFSET 17 +#define ETH_MODER_RECSMALL_OFFSET 16 +#define ETH_MODER_PAD_OFFSET 15 +#define ETH_MODER_HUGEN_OFFSET 14 +#define ETH_MODER_CRCEN_OFFSET 13 +#define ETH_MODER_DLYCRCEN_OFFSET 12 +#define ETH_MODER_RST_OFFSET 11 +#define ETH_MODER_FULLD_OFFSET 10 +#define ETH_MODER_EXDFREN_OFFSET 9 +#define ETH_MODER_NOBCKOF_OFFSET 8 +#define ETH_MODER_LOOPBCK_OFFSET 7 +#define ETH_MODER_IFG_OFFSET 6 +#define ETH_MODER_PRO_OFFSET 5 +#define ETH_MODER_IAM_OFFSET 4 +#define ETH_MODER_BRO_OFFSET 3 +#define ETH_MODER_NOPRE_OFFSET 2 +#define ETH_MODER_TXEN_OFFSET 1 +#define ETH_MODER_RXEN_OFFSET 0 + +/* Field definitions for INT_SOURCE */ +#define ETH_INT_SOURCE_RXC_OFFSET 6 +#define ETH_INT_SOURCE_TXC_OFFSET 5 +#define ETH_INT_SOURCE_BUSY_OFFSET 4 +#define ETH_INT_SOURCE_RXE_OFFSET 3 +#define ETH_INT_SOURCE_RXB_OFFSET 2 +#define ETH_INT_SOURCE_TXE_OFFSET 1 +#define ETH_INT_SOURCE_TXB_OFFSET 0 + +/* Field definitions for INT_MASK */ +#define ETH_INT_MASK_RXC_M_OFFSET 6 +#define ETH_INT_MASK_TXC_M_OFFSET 5 +#define ETH_INT_MASK_BUSY_M_OFFSET 4 +#define ETH_INT_MASK_RXE_M_OFFSET 3 +#define ETH_INT_MASK_RXB_M_OFFSET 2 +#define ETH_INT_MASK_TXE_M_OFFSET 1 +#define ETH_INT_MASK_TXB_M_OFFSET 0 + +/* Field definitions for PACKETLEN */ +#define ETH_PACKETLEN_MINFL_OFFSET 16 +#define ETH_PACKETLEN_MINFL_WIDTH 16 +#define ETH_PACKETLEN_MAXFL_OFFSET 0 +#define ETH_PACKETLEN_MAXFL_WIDTH 16 + +/* Field definitions for COLLCONF */ +#define ETH_COLLCONF_MAXRET_OFFSET 16 +#define ETH_COLLCONF_MAXRET_WIDTH 4 +#define ETH_COLLCONF_COLLVALID_OFFSET 0 +#define ETH_COLLCONF_COLLVALID_WIDTH 6 + +/* Field definitions for CTRLMODER */ +#define ETH_CMODER_TXFLOW_OFFSET 2 +#define ETH_CMODER_RXFLOW_OFFSET 1 +#define ETH_CMODER_PASSALL_OFFSET 0 + +/* Field definitions for MIIMODER */ +#define ETH_MIIMODER_MRST_OFFSET 9 +#define ETH_MIIMODER_NOPRE_OFFSET 8 +#define ETH_MIIMODER_CLKDIV_OFFSET 0 +#define ETH_MIIMODER_CLKDIV_WIDTH 8 + +/* Field definitions for MIICOMMAND */ +#define ETH_MIICOMM_WCDATA_OFFSET 2 +#define ETH_MIICOMM_RSTAT_OFFSET 1 +#define ETH_MIICOMM_SCANS_OFFSET 0 + +/* Field definitions for MIIADDRESS */ +#define ETH_MIIADDR_RGAD_OFFSET 8 +#define ETH_MIIADDR_RGAD_WIDTH 5 +#define ETH_MIIADDR_FIAD_OFFSET 0 +#define ETH_MIIADDR_FIAD_WIDTH 5 + +/* Field definitions for MIISTATUS */ +#define ETH_MIISTAT_NVALID_OFFSET 1 +#define ETH_MIISTAT_BUSY_OFFSET 1 +#define ETH_MIISTAT_FAIL_OFFSET 0 + +/* Field definitions for TX buffer descriptors */ +#define ETH_TX_BD_LENGTH_OFFSET 16 +#define ETH_TX_BD_LENGTH_WIDTH 16 +#define ETH_TX_BD_READY_OFFSET 15 +#define ETH_TX_BD_IRQ_OFFSET 14 +#define ETH_TX_BD_WRAP_OFFSET 13 +#define ETH_TX_BD_PAD_OFFSET 12 +#define ETH_TX_BD_CRC_OFFSET 11 +#define ETH_TX_BD_LAST_OFFSET 10 +#define ETH_TX_BD_PAUSE_OFFSET 9 +#define ETH_TX_BD_UNDERRUN_OFFSET 8 +#define ETH_TX_BD_RETRY_OFFSET 4 +#define ETH_TX_BD_RETRY_WIDTH 4 +#define ETH_TX_BD_RETRANSMIT_OFFSET 3 +#define ETH_TX_BD_COLLISION_OFFSET 2 +#define ETH_TX_BD_DEFER_OFFSET 1 +#define ETH_TX_BD_NO_CARRIER_OFFSET 0 + + +/* Field definitions for RX buffer descriptors */ +#define ETH_RX_BD_LENGTH_OFFSET 16 +#define ETH_RX_BD_LENGTH_WIDTH 16 +#define ETH_RX_BD_READY_OFFSET 15 +#define ETH_RX_BD_IRQ_OFFSET 14 +#define ETH_RX_BD_WRAP_OFFSET 13 +#define ETH_RX_BD_MISS_OFFSET 7 +#define ETH_RX_BD_UVERRUN_OFFSET 6 +#define ETH_RX_BD_INVALID_OFFSET 5 +#define ETH_RX_BD_DRIBBLE_OFFSET 4 +#define ETH_RX_BD_TOOBIG_OFFSET 3 +#define ETH_RX_BD_TOOSHORT_OFFSET 2 +#define ETH_RX_BD_CRC_OFFSET 1 +#define ETH_RX_BD_COLLISION_OFFSET 0 + +#endif

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