URL
https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
Subversion Repositories openrisc_me
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- This comparison shows the changes necessary to convert path
/openrisc/trunk/bootloaders
- from Rev 463 to Rev 464
- ↔ Reverse comparison
Rev 463 → Rev 464
/orpmon/include/build.h
1,?rev1len? → ?rev2line?,?rev2len?
#define BUILD_VERSION "Fri Jan 7 13:00:59 CET 2011" |
#define BUILD_VERSION "Fri Jan 7 15:17:07 CET 2011" |
/orpmon/include/eth.h
1,11 → 1,13
#define ETH_REG_BASE ETH_BASE |
#define ETH_BD_BASE (ETH_BASE + 0x400) |
#define ETH_TOTAL_BD 32 |
#define ETH_TOTAL_BD 8 |
#define ETH_MAXBUF_LEN 0x600 |
|
#define ETH_TXBD_NUM 8 |
#define ETH_RXBD_NUM 24 |
#define ETH_TXBD_NUM 4 |
#define ETH_RXBD_NUM 4 |
|
#define ETH_BUF_SPACE (ETH_TOTAL_BD * ETH_MAXBUF_LEN) |
|
typedef unsigned int uint; |
|
/* Ethernet configuration registers */ |
/orpmon/include/board.h
2,7 → 2,6
#define _BOARD_H_ |
|
#define CFG_IN_FLASH 0 |
//#define MC_ENABLED 1 |
|
//LAN controller |
//#define SMC91111_LAN 1 |
54,10 → 53,6
|
#elif BOARD==2 |
//ORSoC ordb1a3pe1500 |
# define FLASH_BASE_ADDR 0xf0000000 |
# define FLASH_SIZE 0x04000000 |
# define FLASH_BLOCK_SIZE 0x00040000 |
# define START_ADD 0x0 |
# define SDRAM_SIZE 0x02000000 |
# define SDRAM_ROW_SIZE 0x00000400 |
# define SDRAM_BANK_SIZE 0x00800000 |
68,40 → 63,25
#elif BOARD==3 |
//ORSoC ordb1a3p1000 |
|
# define FLASH_BASE_ADDR 0xf0000000 |
# define FLASH_SIZE 0x04000000 |
# define FLASH_BLOCK_SIZE 0x00040000 |
# define START_ADD 0x0 |
# define SDRAM_SIZE 0x02000000 |
# define SDRAM_ROW_SIZE 0x00000400 |
# define SDRAM_BANK_SIZE 0x00800000 |
# define IN_CLK 25000000 |
# define FLASH_ORG_16_2 1 |
# define BOARD_DEF_NAME "ORSoC A3P1000 devboard" |
|
#elif BOARD==4 |
//Xilinx ML501 |
|
# define FLASH_BASE_ADDR 0xf0000000 |
# define FLASH_SIZE 0x04000000 |
# define FLASH_BLOCK_SIZE 0x00040000 |
# define START_ADD 0x0 |
# define SDRAM_SIZE 0x10000000 |
# define SDRAM_ROW_SIZE 0x00000400 |
# define SDRAM_BANK_SIZE 0x00800000 |
# define IN_CLK 50000000 |
# define FLASH_ORG_16_2 1 |
# define BOARD_DEF_NAME "Xilinx ML501" |
|
#else |
//Custom Board |
|
# define FLASH_BASE_ADDR 0xf0000000 |
# define FLASH_SIZE 0x04000000 |
# define FLASH_BLOCK_SIZE 0x00040000 |
# define START_ADD 0x0 |
# define IN_CLK 25000000 |
# define FLASH_ORG_16_2 1 |
# define BOARD_DEF_NAME "custom" |
|
#endif |
115,7 → 95,6
#define BOARD_DEF_GW 0xc0a86401 // 192.168.100.1 |
#define BOARD_DEF_TBOOT_SRVR 0xc0a86469 //"192.168.100.105" |
#define BOARD_DEF_IMAGE_NAME "boot.img" |
#define BOARD_DEF_LOAD_SPACE 0xa00000 |
#define ETH_MDIOPHYADDR 0x00 |
#define ETH_MACADDR0 0x00 |
#define ETH_MACADDR1 0x12 |
131,7 → 110,6
#define BOARD_DEF_GW 0xc0a86401 // 192.168.100.1 |
#define BOARD_DEF_TBOOT_SRVR 0xc0a864e3 //"192.168.100.227" |
#define BOARD_DEF_IMAGE_NAME "boot.img" |
#define BOARD_DEF_LOAD_SPACE 0xa00000 |
#define ETH_MDIOPHYADDR 0x00 |
#define ETH_MACADDR0 0x00 |
#define ETH_MACADDR1 0x12 |
147,7 → 125,6
#define BOARD_DEF_GW 0xac1e0001 //"172.30.0.1" |
#define BOARD_DEF_TBOOT_SRVR 0xac1e0001 //"172.30.0.1" |
#define BOARD_DEF_IMAGE_NAME "boot.img" |
#define BOARD_DEF_LOAD_SPACE 0xa00000 |
#define ETH_MDIOPHYADDR 0x00 |
#define ETH_MACADDR0 0x00 |
#define ETH_MACADDR1 0x12 |
163,7 → 140,6
#define BOARD_DEF_GW 0xc0a80001 // 192.168.0.1 |
#define BOARD_DEF_TBOOT_SRVR 0xc0a8000f // 192.168.0.15 |
#define BOARD_DEF_IMAGE_NAME "boot.img" |
#define BOARD_DEF_LOAD_SPACE 0xa00000 |
#define ETH_MDIOPHYADDR 0x00 |
#define ETH_MACADDR0 0x00 |
#define ETH_MACADDR1 0x12 |
179,7 → 155,6
#define BOARD_DEF_GW 0x0a010101 // 10.1.1.1 |
#define BOARD_DEF_TBOOT_SRVR 0x0a010101 // 10.1.1.1 |
#define BOARD_DEF_IMAGE_NAME "boot.img" |
#define BOARD_DEF_LOAD_SPACE 0xa00000 |
#define ETH_MDIOPHYADDR 0x00 |
#define ETH_MACADDR0 0x00 |
#define ETH_MACADDR1 0x01 |
190,11 → 165,10
|
#endif |
|
#define UART_BAUD_RATE 115200 |
|
|
#define TICKS_PER_SEC 100 |
|
|
#define MS_PER_SEC 1000 |
#define US_PER_SEC 1000000 |
#define US_PER_TICK (US_PER_SEC/TICKS_PER_SEC) |
202,21 → 176,15
|
#define STACK_SIZE 0x10000 |
|
#if CONFIG_OR32_MC_VERSION==1 |
// Marvin, Bender MC |
# include "mc-init-1.h" |
#elif CONFIG_OR32_MC_VERSION==2 |
// Highland MC |
# include "mc-init-2.h" |
//#else |
//# error "no memory controler chosen" |
#endif |
|
/* UART core defines */ |
#define UART_BASE 0x90000000 |
#define UART_IRQ 2 |
#define UART_BAUD_RATE 115200 |
|
/* Ethernet core defines */ |
#define ETH_BASE 0x92000000 |
#define ETH_IRQ 4 |
|
#define ETH_DATA_BASE ((((unsigned long)&_src_addr) + 16) & ~0x3) |
#define SPI_BASE 0xb0000000 |
#define CRT_BASE_ADDR 0x97000000 |
#define ATA_BASE_ADDR 0x9e000000 |
226,8 → 194,6
#define SDC_CONTROLLER_BASE 0x9e000000 |
|
#define SANCHO_BASE_ADD 0x98000000 |
/* Address for ETH_DATA */ |
#define ETH_DATA_BASE (SDRAM_SIZE - (0x600 * 128)) |
|
#define CRT_ENABLED 0 |
#define FB_BASE_ADDR 0xa8000000 |
/orpmon/include/common.h
14,6 → 14,9
#define debug(fmt,args...) __printf (fmt ,##args) |
#endif |
|
/* Stack top */ |
extern unsigned long _src_addr; |
|
/* A Board Information structure that is given to a program when |
* ppcboot starts it up. */ |
typedef struct bd_info { |
/orpmon/cmds/load.c
2,6 → 2,7
#include "support.h" |
#include "flash.h" |
#include "net.h" |
#include "eth.h" |
#include "uart.h" |
#include "dosfs.h" |
#include "spr-defs.h" |
10,6 → 11,10
#define MAX_IMAGES 20 |
#endif |
|
// Put the copyboot program at just before end of memory |
#define COPYBOOT_LOCATION (SDRAM_SIZE - (32*4)) |
|
|
extern unsigned long fprog_addr; |
extern char *tftp_filename; |
|
88,6 → 93,7
register unsigned long length, |
register int erase, register unsigned long start_addr) |
{ |
#ifdef FLASH_BASE_ADDR |
unsigned long i, flags; |
|
register char *dst = (char *)dst_addr; |
152,6 → 158,9
/* Run the program */ |
((void (*)(void))start_addr) (); |
return 0; /* just to satisfy the cc */ |
#else |
return -1; |
#endif |
} |
|
void bf_jump(unsigned long addr) |
162,6 → 171,7
|
int boot_flash_cmd(int argc, char *argv[]) |
{ |
#ifdef FLASH_BASE_ADDR |
unsigned long addr, val, jaddr; |
addr = 17; |
val = 0; |
175,59 → 185,19
jaddr = strtoul(argv[0], 0, 0); |
bf_jump(jaddr); |
} |
#endif |
return 0; |
} |
|
void init_load(void) |
{ |
#if 0 // JB - removing flash stuff |
# ifdef CFG_IN_FLASH |
copy_memory_run((unsigned long)&fl_word_program, |
(unsigned long)&fprog_addr, 95, 0, 0xffffffff); |
copy_memory_run((unsigned long)&fl_block_erase, |
(unsigned long)&fprog_addr + 96, 119, 0, 0xffffffff); |
copy_memory_run((unsigned long)&fl_unlock_one_block, |
(unsigned long)&fprog_addr + 96 + 120, 115, 0, |
0xffffffff); |
|
fl_ext_program = (t_fl_ext_program) & fprog_addr; |
fl_ext_erase = (t_fl_erase) & fprog_addr + 96; |
fl_ext_unlock = (t_fl_erase) & fprog_addr + 96 + 120; |
|
# if 0 |
printf("fl_word_program(): 0x%x\tfl_ext_program(): 0x%x\n", |
&fl_word_program, fl_ext_program); |
printf("fl_block_erase: 0x%x\tfl_ext_erase(): 0x%x\n", |
&fl_block_erase, fl_ext_erase); |
printf("fl_unlock_one_block(): 0x%x\tfl_ext_unlock(): 0x%x\n", |
&fl_unlock_one_block, fl_ext_unlock); |
# endif |
|
# else /* not CFG_IN_FLASH */ |
fl_ext_program = (t_fl_ext_program) & fl_word_program; |
fl_ext_erase = (t_fl_erase) & fl_block_erase; |
fl_ext_unlock = (t_fl_erase) & fl_unlock_one_block; |
# endif /* CFG_IN_FLASH */ |
#endif |
|
/* |
global.ip = gcfg.eth_ip; |
global.gw_ip = gcfg.eth_gw; |
global.mask = gcfg.eth_mask; |
global.srv_ip = gcfg.tftp_srv_ip; |
global.src_addr = 0x100000; |
tftp_filename = "boot.img"; |
*/ |
|
global.ip = BOARD_DEF_IP; |
global.gw_ip = BOARD_DEF_GW; |
global.mask = BOARD_DEF_MASK; |
global.srv_ip = BOARD_DEF_TBOOT_SRVR; |
global.src_addr = BOARD_DEF_LOAD_SPACE; |
global.src_addr = ((ETH_BUF_SPACE + ETH_DATA_BASE) + 8) & ~0x3; |
tftp_filename = BOARD_DEF_IMAGE_NAME; |
|
/*memcpy(tftp_filename, gcfg.tftp_filename, strlen(gcfg.tftp_filename)); |
tftp_filename[strlen(gcfg.tftp_filename)] = '\0'; */ |
} |
|
int tftp_cmd(int argc, char *argv[]) |
277,6 → 247,7
|
void save_global_cfg(flash_cfg_struct cfg) |
{ |
#ifdef FLASH_BASE_ADDR |
unsigned long dst = (unsigned long)&gcfg, src = (unsigned long)&cfg; |
unsigned long i, end, flags; |
|
308,6 → 279,7
|
/* and than enable it back */ |
mtspr(SPR_SR, flags); |
#endif |
return; |
} |
|
362,6 → 334,7
*/ |
unsigned long get_good_addr(unsigned int size) |
{ |
#ifdef FLASH_BASE_ADDR |
unsigned long start_addr[MAX_IMAGES], end_addr[MAX_IMAGES]; |
unsigned long free[MAX_IMAGES], st_addr[MAX_IMAGES]; |
unsigned long tmpval; |
444,6 → 417,9
|
/* there is not enough space (in one segment) left */ |
return 0; |
#else |
return -1; |
#endif |
} |
|
unsigned long prepare_img_data(unsigned int num, unsigned int size) |
647,8 → 623,6
mtspr(SPR_SR, mfspr(SPR_SR) & ~SPR_SR_TEE); |
mtspr(SPR_TTMR, 0); |
|
// Put the copyboot program at 24MB mark in memory |
#define COPYBOOT_LOCATION (1024*1024*24) |
printf("tboot: relocating copy loop to 0x%x ...\n", |
(unsigned long)COPYBOOT_LOCATION); |
// Setup where we'll copy the relocation function to |
743,8 → 717,6
mtspr(SPR_SR, mfspr(SPR_SR) & ~SPR_SR_TEE); |
mtspr(SPR_TTMR, 0); |
|
// Put the copyboot program at 24MB mark in memory |
#define COPYBOOT_LOCATION (1024*1024*24) |
printf("tboot: relocating copy loop to 0x%x ...\n", |
(unsigned long)COPYBOOT_LOCATION); |
// Setup where we'll copy the relocation function to |
/orpmon/cmds/memory.c
24,6 → 24,25
unsigned long err_addr = 0; |
unsigned long err_no = 0; |
|
unsigned long stack_top = (unsigned long) &_src_addr; |
|
if (start_addr < stack_top) |
{ |
printf("\n"); |
printf("Warning: RAM test will overwrite stack.\n"); |
printf(" Moving start of test to 0x%08x to avoid stack\n", |
stack_top); |
start_addr = stack_top; |
} |
|
if (start_addr >= stop_addr) |
{ |
printf("ram_test: Start of test must be after end (0x%08x !< 0x%08x)\n", |
start_addr, stop_addr); |
printf("ram_test: Aborting.\n"); |
return; |
} |
|
/* Test 1: Write locations with their addresses */ |
if ((testno == 1) || (testno == 0)) { |
printf("\n1. Writing locations with their addresses: "); |
/orpmon/ChangeLog
1,8 → 1,32
2011-01-07 Julius Baxter <julius@opencores.org> |
* ChangeLog: Created |
* include/board.h: IP config 3 changes |
Remove flash defines for boards which do not have it. |
Reorganise UART and Ethernet modules defines |
<ETH_DATA_BASE>: Changed to point to just past top of stack. |
* reset.s: Remove flash boot options and early relocation boot code. |
Added BSS clearing code. |
* flash_reset.S: Added, containing all flash boot code. |
* config.mk: Added different optimization options (all commented out) |
* ram.ld: Add BSS symbols to help clearing. |
* include/eth.h: <ETH_TOTAL_BD>: Change to 8. |
<ETH_TXBD_NUM>: Change to 4. |
<ETH_RXBD_NUM>: Change to 4. |
<ETH_BUF_SPACE>: Added. |
* drivers/eth.c: |
(init_tx_bd_pool): Use updated version of ETH_DATA_BASE. |
(init_rx_bd_pool): Ditto. |
* include/common.h: <_src_addr>: Added as extern (symbol from linker |
script) |
* cmds/load.h: Added eth.h include. |
<COPYBOOT_LOCATION>: Defined in one place now, set as end of SDRAM |
minus the size of the relocate and boot program. |
A few flash functions surrounded with #ifdef FLASH_BASE_ADDR so they |
are compiled in only when the flash stuff is in use. |
(init_load): Whole CFG_IN_FLASH section removed. Tboot default location |
now set as end of ethernet buffer space. |
* cmds/memory.c: |
(testram): Warnings added if memory test will clobber stack. Start |
location automatically changed to end of stack, and test will abort |
if start location is before end location. |
|
/orpmon/common/common.c
37,6 → 37,8
case CT_SIM: |
__printf("%c", c); |
break; |
default: |
break; |
} |
} |
|
334,7 → 336,11
/* Set defaults */ |
global.erase_method = 2; /* as needed */ |
global.src_addr = (unsigned long)&_src_addr; |
#ifdef FLASH_BASE_ADDR |
global.dst_addr = FLASH_BASE_ADDR; |
#else |
global.dst_addr = 0; |
#endif |
global.eth_add[0] = ETH_MACADDR0; |
global.eth_add[1] = ETH_MACADDR1; |
global.eth_add[2] = ETH_MACADDR2; |
401,7 → 407,7
{ |
extern unsigned long calc_mycrc32(void); |
|
#if 0 |
#if SELF_CHECK |
extern unsigned long mycrc32, mysize; |
#endif |
|
/orpmon/drivers/eth.c
24,11 → 24,6
when frame is received */ |
int eth_monitor_enabled; |
|
//unsigned long eth_data[((ETH_TXBD_NUM + ETH_RXBD_NUM) * ETH_MAXBUF_LEN)/4] = {0}; |
//#undef ETH_DATA_BASE |
//#define ETH_DATA_BASE ((unsigned long)eth_data) |
|
|
static void |
print_packet(unsigned long add, int len) |
{ |
65,7 → 60,8
{ |
eth_bd *bd; |
int i; |
|
unsigned long eth_data_base = ETH_DATA_BASE; |
|
bd = (eth_bd *)ETH_BD_BASE; |
|
for(i = 0; i < ETH_TXBD_NUM; i++) { |
73,7 → 69,7
bd[i].len_status = 0 << 16 | ETH_TX_BD_PAD | ETH_TX_BD_CRC | ETH_RX_BD_IRQ; |
|
/* Initialize Tx buffer pointer */ |
bd[i].addr = ETH_DATA_BASE + (i * ETH_MAXBUF_LEN); |
bd[i].addr = eth_data_base + (i * ETH_MAXBUF_LEN); |
} |
|
bd[i-1].len_status |= ETH_TX_BD_WRAP; // Last Tx BD - Wrap |
83,6 → 79,8
{ |
eth_bd *bd; |
int i; |
/* Set ethernet data buffers just above that of stack */ |
unsigned long eth_data_base = ETH_DATA_BASE; |
|
bd = (eth_bd *)ETH_BD_BASE + ETH_TXBD_NUM; |
|
92,7 → 90,7
bd[i].len_status = 0 << 16 | ETH_RX_BD_EMPTY | ETH_RX_BD_IRQ; |
|
/* Initialize Rx buffer pointer */ |
bd[i].addr = ETH_DATA_BASE + ((ETH_TXBD_NUM + i) * ETH_MAXBUF_LEN); |
bd[i].addr = eth_data_base + ((ETH_TXBD_NUM + i) * ETH_MAXBUF_LEN); |
} |
|
bd[i-1].len_status |= ETH_RX_BD_WRAP; // Last Rx BD - Wrap |