OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /openrisc/trunk/gnu-old/gdb-7.1/gdb/features
    from Rev 227 to Rev 816
    Reverse comparison

Rev 227 → Rev 816

/s390-fpr.xml
0,0 → 1,27
<?xml version="1.0"?>
<!-- Copyright (C) 2010 Free Software Foundation, Inc.
 
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
 
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.s390.fpr">
<reg name="fpc" bitsize="32" type="uint32" group="float"/>
<reg name="f0" bitsize="64" type="ieee_double" group="float"/>
<reg name="f1" bitsize="64" type="ieee_double" group="float"/>
<reg name="f2" bitsize="64" type="ieee_double" group="float"/>
<reg name="f3" bitsize="64" type="ieee_double" group="float"/>
<reg name="f4" bitsize="64" type="ieee_double" group="float"/>
<reg name="f5" bitsize="64" type="ieee_double" group="float"/>
<reg name="f6" bitsize="64" type="ieee_double" group="float"/>
<reg name="f7" bitsize="64" type="ieee_double" group="float"/>
<reg name="f8" bitsize="64" type="ieee_double" group="float"/>
<reg name="f9" bitsize="64" type="ieee_double" group="float"/>
<reg name="f10" bitsize="64" type="ieee_double" group="float"/>
<reg name="f11" bitsize="64" type="ieee_double" group="float"/>
<reg name="f12" bitsize="64" type="ieee_double" group="float"/>
<reg name="f13" bitsize="64" type="ieee_double" group="float"/>
<reg name="f14" bitsize="64" type="ieee_double" group="float"/>
<reg name="f15" bitsize="64" type="ieee_double" group="float"/>
</feature>
s390-fpr.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: arm-with-neon.xml =================================================================== --- arm-with-neon.xml (nonexistent) +++ arm-with-neon.xml (revision 816) @@ -0,0 +1,13 @@ + + + + + + + + +
arm-with-neon.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: osdata.dtd =================================================================== --- osdata.dtd (nonexistent) +++ osdata.dtd (revision 816) @@ -0,0 +1,16 @@ + + + + + + + + + + + + Index: s390x-core64.xml =================================================================== --- s390x-core64.xml (nonexistent) +++ s390x-core64.xml (revision 816) @@ -0,0 +1,28 @@ + + + + + + + + + + + + + + + + + + + + + + + +
s390x-core64.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: xinclude.dtd =================================================================== --- xinclude.dtd (nonexistent) +++ xinclude.dtd (revision 816) @@ -0,0 +1,13 @@ + + + + + + Index: s390-linux64.c =================================================================== --- s390-linux64.c (nonexistent) +++ s390-linux64.c (revision 816) @@ -0,0 +1,90 @@ +/* THIS FILE IS GENERATED. Original: s390-linux64.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_s390_linux64; +static void +initialize_tdesc_s390_linux64 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("s390:31-bit")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.s390.core"); + tdesc_create_reg (feature, "pswm", 0, 0, "psw", 32, "uint32"); + tdesc_create_reg (feature, "pswa", 1, 0, "psw", 32, "uint32"); + tdesc_create_reg (feature, "r0h", 2, 1, "upper", 32, "uint32"); + tdesc_create_reg (feature, "r0l", 3, 1, "lower", 32, "uint32"); + tdesc_create_reg (feature, "r1h", 4, 1, "upper", 32, "uint32"); + tdesc_create_reg (feature, "r1l", 5, 1, "lower", 32, "uint32"); + tdesc_create_reg (feature, "r2h", 6, 1, "upper", 32, "uint32"); + tdesc_create_reg (feature, "r2l", 7, 1, "lower", 32, "uint32"); + tdesc_create_reg (feature, "r3h", 8, 1, "upper", 32, "uint32"); + tdesc_create_reg (feature, "r3l", 9, 1, "lower", 32, "uint32"); + tdesc_create_reg (feature, "r4h", 10, 1, "upper", 32, "uint32"); + tdesc_create_reg (feature, "r4l", 11, 1, "lower", 32, "uint32"); + tdesc_create_reg (feature, "r5h", 12, 1, "upper", 32, "uint32"); + tdesc_create_reg (feature, "r5l", 13, 1, "lower", 32, "uint32"); + tdesc_create_reg (feature, "r6h", 14, 1, "upper", 32, "uint32"); + tdesc_create_reg (feature, "r6l", 15, 1, "lower", 32, "uint32"); + tdesc_create_reg (feature, "r7h", 16, 1, "upper", 32, "uint32"); + tdesc_create_reg (feature, "r7l", 17, 1, "lower", 32, "uint32"); + tdesc_create_reg (feature, "r8h", 18, 1, "upper", 32, "uint32"); + tdesc_create_reg (feature, "r8l", 19, 1, "lower", 32, "uint32"); + tdesc_create_reg (feature, "r9h", 20, 1, "upper", 32, "uint32"); + tdesc_create_reg (feature, "r9l", 21, 1, "lower", 32, "uint32"); + tdesc_create_reg (feature, "r10h", 22, 1, "upper", 32, "uint32"); + tdesc_create_reg (feature, "r10l", 23, 1, "lower", 32, "uint32"); + tdesc_create_reg (feature, "r11h", 24, 1, "upper", 32, "uint32"); + tdesc_create_reg (feature, "r11l", 25, 1, "lower", 32, "uint32"); + tdesc_create_reg (feature, "r12h", 26, 1, "upper", 32, "uint32"); + tdesc_create_reg (feature, "r12l", 27, 1, "lower", 32, "uint32"); + tdesc_create_reg (feature, "r13h", 28, 1, "upper", 32, "uint32"); + tdesc_create_reg (feature, "r13l", 29, 1, "lower", 32, "uint32"); + tdesc_create_reg (feature, "r14h", 30, 1, "upper", 32, "uint32"); + tdesc_create_reg (feature, "r14l", 31, 1, "lower", 32, "uint32"); + tdesc_create_reg (feature, "r15h", 32, 1, "upper", 32, "uint32"); + tdesc_create_reg (feature, "r15l", 33, 1, "lower", 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.s390.acr"); + tdesc_create_reg (feature, "acr0", 34, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr1", 35, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr2", 36, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr3", 37, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr4", 38, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr5", 39, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr6", 40, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr7", 41, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr8", 42, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr9", 43, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr10", 44, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr11", 45, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr12", 46, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr13", 47, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr14", 48, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr15", 49, 1, "access", 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.s390.fpr"); + tdesc_create_reg (feature, "fpc", 50, 1, "float", 32, "uint32"); + tdesc_create_reg (feature, "f0", 51, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 52, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 53, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 54, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 55, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 56, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 57, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 58, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 59, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 60, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 61, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 62, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 63, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 64, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 65, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 66, 1, "float", 64, "ieee_double"); + + tdesc_s390_linux64 = result; +}
s390-linux64.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: mips-cp0.xml =================================================================== --- mips-cp0.xml (nonexistent) +++ mips-cp0.xml (revision 816) @@ -0,0 +1,13 @@ + + + + + + + + +
mips-cp0.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: s390-core32.xml =================================================================== --- s390-core32.xml (nonexistent) +++ s390-core32.xml (revision 816) @@ -0,0 +1,28 @@ + + + + + + + + + + + + + + + + + + + + + + + +
s390-core32.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: gdb-target.dtd =================================================================== --- gdb-target.dtd (nonexistent) +++ gdb-target.dtd (revision 816) @@ -0,0 +1,52 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +%xinclude; Index: sort-regs.xsl =================================================================== --- sort-regs.xsl (nonexistent) +++ sort-regs.xsl (revision 816) @@ -0,0 +1,11 @@ + + + + + + + + + +
sort-regs.xsl Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: number-regs.xsl =================================================================== --- number-regs.xsl (nonexistent) +++ number-regs.xsl (revision 816) @@ -0,0 +1,47 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
number-regs.xsl Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: mips-cpu.xml =================================================================== --- mips-cpu.xml (nonexistent) +++ mips-cpu.xml (revision 816) @@ -0,0 +1,46 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
mips-cpu.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: arm-with-iwmmxt.c =================================================================== --- arm-with-iwmmxt.c (nonexistent) +++ arm-with-iwmmxt.c (revision 816) @@ -0,0 +1,79 @@ +/* THIS FILE IS GENERATED. Original: arm-with-iwmmxt.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_arm_with_iwmmxt; +static void +initialize_tdesc_arm_with_iwmmxt (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("iwmmxt")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.arm.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sp", 13, 1, NULL, 32, "data_ptr"); + tdesc_create_reg (feature, "lr", 14, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pc", 15, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "cpsr", 25, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.xscale.iwmmxt"); + field_type = tdesc_named_type (feature, "uint8"); + tdesc_create_vector (feature, "iwmmxt_v8u8", field_type, 8); + + field_type = tdesc_named_type (feature, "uint16"); + tdesc_create_vector (feature, "iwmmxt_v4u16", field_type, 4); + + field_type = tdesc_named_type (feature, "uint32"); + tdesc_create_vector (feature, "iwmmxt_v2u32", field_type, 2); + + type = tdesc_create_union (feature, "iwmmxt_vec64i"); + field_type = tdesc_named_type (feature, "iwmmxt_v8u8"); + tdesc_add_field (type, "u8", field_type); + field_type = tdesc_named_type (feature, "iwmmxt_v4u16"); + tdesc_add_field (type, "u16", field_type); + field_type = tdesc_named_type (feature, "iwmmxt_v2u32"); + tdesc_add_field (type, "u32", field_type); + field_type = tdesc_named_type (feature, "uint64"); + tdesc_add_field (type, "u64", field_type); + + tdesc_create_reg (feature, "wR0", 26, 1, NULL, 64, "iwmmxt_vec64i"); + tdesc_create_reg (feature, "wR1", 27, 1, NULL, 64, "iwmmxt_vec64i"); + tdesc_create_reg (feature, "wR2", 28, 1, NULL, 64, "iwmmxt_vec64i"); + tdesc_create_reg (feature, "wR3", 29, 1, NULL, 64, "iwmmxt_vec64i"); + tdesc_create_reg (feature, "wR4", 30, 1, NULL, 64, "iwmmxt_vec64i"); + tdesc_create_reg (feature, "wR5", 31, 1, NULL, 64, "iwmmxt_vec64i"); + tdesc_create_reg (feature, "wR6", 32, 1, NULL, 64, "iwmmxt_vec64i"); + tdesc_create_reg (feature, "wR7", 33, 1, NULL, 64, "iwmmxt_vec64i"); + tdesc_create_reg (feature, "wR8", 34, 1, NULL, 64, "iwmmxt_vec64i"); + tdesc_create_reg (feature, "wR9", 35, 1, NULL, 64, "iwmmxt_vec64i"); + tdesc_create_reg (feature, "wR10", 36, 1, NULL, 64, "iwmmxt_vec64i"); + tdesc_create_reg (feature, "wR11", 37, 1, NULL, 64, "iwmmxt_vec64i"); + tdesc_create_reg (feature, "wR12", 38, 1, NULL, 64, "iwmmxt_vec64i"); + tdesc_create_reg (feature, "wR13", 39, 1, NULL, 64, "iwmmxt_vec64i"); + tdesc_create_reg (feature, "wR14", 40, 1, NULL, 64, "iwmmxt_vec64i"); + tdesc_create_reg (feature, "wR15", 41, 1, NULL, 64, "iwmmxt_vec64i"); + tdesc_create_reg (feature, "wCSSF", 42, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "wCASF", 43, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "wCGR0", 44, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "wCGR1", 45, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "wCGR2", 46, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "wCGR3", 47, 1, "vector", 32, "int"); + + tdesc_arm_with_iwmmxt = result; +}
arm-with-iwmmxt.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: mips-fpu.xml =================================================================== --- mips-fpu.xml (nonexistent) +++ mips-fpu.xml (revision 816) @@ -0,0 +1,45 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
mips-fpu.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: mips64-linux.c =================================================================== --- mips64-linux.c (nonexistent) +++ mips64-linux.c (revision 816) @@ -0,0 +1,98 @@ +/* THIS FILE IS GENERATED. Original: mips64-linux.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_mips64_linux; +static void +initialize_tdesc_mips64_linux (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("mips")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.mips.cpu"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "lo", 33, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "hi", 34, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "pc", 37, 1, NULL, 64, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.mips.cp0"); + tdesc_create_reg (feature, "status", 32, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "badvaddr", 35, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "cause", 36, 1, NULL, 64, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.mips.fpu"); + tdesc_create_reg (feature, "f0", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 64, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 65, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 66, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 67, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 68, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 69, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fcsr", 70, 1, "float", 64, "int"); + tdesc_create_reg (feature, "fir", 71, 1, "float", 64, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.mips.linux"); + tdesc_create_reg (feature, "restart", 72, 1, "system", 64, "int"); + + tdesc_mips64_linux = result; +}
mips64-linux.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: s390-acr.xml =================================================================== --- s390-acr.xml (nonexistent) +++ s390-acr.xml (revision 816) @@ -0,0 +1,26 @@ + + + + + + + + + + + + + + + + + + + + + +
s390-acr.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: xscale-iwmmxt.xml =================================================================== --- xscale-iwmmxt.xml (nonexistent) +++ xscale-iwmmxt.xml (revision 816) @@ -0,0 +1,44 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
xscale-iwmmxt.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: s390-linux64.xml =================================================================== --- s390-linux64.xml (nonexistent) +++ s390-linux64.xml (revision 816) @@ -0,0 +1,17 @@ + + + + + + + + s390:31-bit + + + +
s390-linux64.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: arm-core.xml =================================================================== --- arm-core.xml (nonexistent) +++ arm-core.xml (revision 816) @@ -0,0 +1,31 @@ + + + + + + + + + + + + + + + + + + + + + + + + +
arm-core.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: feature_to_c.sh =================================================================== --- feature_to_c.sh (nonexistent) +++ feature_to_c.sh (revision 816) @@ -0,0 +1,75 @@ +#!/bin/sh + +# Convert text files to compilable C arrays. +# +# Copyright (C) 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +# +# This file is part of GDB. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +output=$1 +shift + +if test -z "$output" || test -z "$1"; then + echo "Usage: $0 OUTPUTFILE INPUTFILE..." + exit 1 +fi + +if test -e "$output"; then + echo "Output file \"$output\" already exists; refusing to overwrite." + exit 1 +fi + +for input; do + arrayname=xml_feature_`echo $input | sed 's,.*/,,; s/[-.]/_/g'` + + ${AWK:-awk} 'BEGIN { n = 0 + print "static const char '$arrayname'[] = {" + for (i = 0; i < 255; i++) + _ord_[sprintf("%c", i)] = i + } { + split($0, line, ""); + printf " " + for (i = 1; i <= length($0); i++) { + c = line[i] + if (c == "'\''") { + printf "'\''\\'\'''\'', " + } else if (c == "\\") { + printf "'\''\\\\'\'', " + } else if (_ord_[c] >= 32 && _ord_[c] < 127) { + printf "'\''%s'\'', ", c + } else { + printf "'\''\\%03o'\'', ", _ord_[c] + } + if (i % 10 == 0) + printf "\n " + } + printf "'\''\\n'\'', \n" + } END { + print " 0 };" + }' < $input >> $output +done + +echo >> $output +echo "const char *const xml_builtin[][2] = {" >> $output + +for input; do + basename=`echo $input | sed 's,.*/,,'` + arrayname=xml_feature_`echo $input | sed 's,.*/,,; s/[-.]/_/g'` + echo " { \"$basename\", $arrayname }," >> $output +done + +echo " { 0, 0 }" >> $output +echo "};" >> $output
feature_to_c.sh Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: arm-with-vfpv2.c =================================================================== --- arm-with-vfpv2.c (nonexistent) +++ arm-with-vfpv2.c (revision 816) @@ -0,0 +1,54 @@ +/* THIS FILE IS GENERATED. Original: arm-with-vfpv2.xml */ + +#include "defs.h" +#include "gdbtypes.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_arm_with_vfpv2; +static void +initialize_tdesc_arm_with_vfpv2 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct type *field_type, *type; + + feature = tdesc_create_feature (result, "org.gnu.gdb.arm.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sp", 13, 1, NULL, 32, "data_ptr"); + tdesc_create_reg (feature, "lr", 14, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pc", 15, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "cpsr", 25, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.arm.vfp"); + tdesc_create_reg (feature, "d0", 26, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d1", 27, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d2", 28, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d3", 29, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d4", 30, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d5", 31, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d6", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d7", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d8", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d9", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d10", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d11", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d12", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d13", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d14", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d15", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 42, 1, "float", 32, "int"); + + tdesc_arm_with_vfpv2 = result; +}
arm-with-vfpv2.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: arm-with-iwmmxt.xml =================================================================== --- arm-with-iwmmxt.xml (nonexistent) +++ arm-with-iwmmxt.xml (revision 816) @@ -0,0 +1,13 @@ + + + + + + iwmmxt + + +
arm-with-iwmmxt.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: arm-with-vfpv3.c =================================================================== --- arm-with-vfpv3.c (nonexistent) +++ arm-with-vfpv3.c (revision 816) @@ -0,0 +1,70 @@ +/* THIS FILE IS GENERATED. Original: arm-with-vfpv3.xml */ + +#include "defs.h" +#include "gdbtypes.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_arm_with_vfpv3; +static void +initialize_tdesc_arm_with_vfpv3 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct type *field_type, *type; + + feature = tdesc_create_feature (result, "org.gnu.gdb.arm.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sp", 13, 1, NULL, 32, "data_ptr"); + tdesc_create_reg (feature, "lr", 14, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pc", 15, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "cpsr", 25, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.arm.vfp"); + tdesc_create_reg (feature, "d0", 26, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d1", 27, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d2", 28, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d3", 29, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d4", 30, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d5", 31, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d6", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d7", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d8", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d9", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d10", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d11", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d12", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d13", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d14", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d15", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d16", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d17", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d18", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d19", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d20", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d21", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d22", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d23", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d24", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d25", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d26", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d27", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d28", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d29", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d30", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d31", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 58, 1, "float", 32, "int"); + + tdesc_arm_with_vfpv3 = result; +}
arm-with-vfpv3.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: Makefile =================================================================== --- Makefile (nonexistent) +++ Makefile (revision 816) @@ -0,0 +1,92 @@ +# Copyright (C) 2007, 2008, 2009, 2010 Free Software Foundation, Inc. + +# This file is part of GDB. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + + +# This file requires GNU make! + +# This Makefile updates files in ../regformats from their XML master +# copies. Because this relies on xsltproc, it is not normally run +# during the build process; it should be run by hand when one of the +# affected XML files is changed, and the results should be kept in the +# GDB repository. + +# It can also update the C files in the features directory from their +# XML master copies. This relies on a GDB linked with expat and +# configured for the correct architecture, so the files are again kept +# in the GDB repository. To generate C files: +# make GDB=/path/to/gdb XMLTOC="xml files" cfiles + +WHICH = arm-with-iwmmxt arm-with-vfpv2 arm-with-vfpv3 arm-with-neon \ + i386/i386 i386/i386-linux \ + i386/amd64 i386/amd64-linux \ + mips-linux mips64-linux \ + rs6000/powerpc-32l rs6000/powerpc-altivec32l rs6000/powerpc-e500l \ + rs6000/powerpc-64l rs6000/powerpc-altivec64l rs6000/powerpc-vsx32l \ + rs6000/powerpc-vsx64l rs6000/powerpc-cell32l rs6000/powerpc-cell64l \ + s390-linux32 s390-linux64 s390x-linux64 + +# Record which registers should be sent to GDB by default after stop. +arm-expedite = r11,sp,pc +i386/i386-expedite = ebp,esp,eip +i386/i386-linux-expedite = ebp,esp,eip +i386/amd64-expedite = rbp,rsp,rip +i386/amd64-linux-expedite = rbp,rsp,rip +mips-expedite = r29,pc +mips64-expedite = r29,pc +powerpc-expedite = r1,pc +rs6000/powerpc-cell32l-expedite = r1,pc,r0,orig_r3,r4 +rs6000/powerpc-cell64l-expedite = r1,pc,r0,orig_r3,r4 +s390-linux32-expedite = r14,r15,pswa +s390-linux64-expedite = r14l,r15l,pswa +s390x-linux64-expedite = r14,r15,pswa + + +XSLTPROC = xsltproc +outdir = ../regformats +OUTPUTS = $(patsubst %,$(outdir)/%.dat,$(WHICH)) + +XMLTOC = +CFILES = $(patsubst %.xml,%.c,$(XMLTOC)) +GDB = false + +all: $(OUTPUTS) + +$(outdir)/%.dat: %.xml number-regs.xsl sort-regs.xsl gdbserver-regs.xsl + echo "# DO NOT EDIT: generated from $<" > $(outdir)/$*.tmp + echo "name:`echo $(notdir $*) | sed 's/-/_/g'`" >> $(outdir)/$*.tmp + echo "xmltarget:$(> $(outdir)/$*.tmp + echo "expedite:$(if $($*-expedite),$($*-expedite),$($(firstword $(subst -, ,$(notdir $*)))-expedite))" \ + >> $(outdir)/$*.tmp + $(XSLTPROC) --path "$(PWD)" --xinclude number-regs.xsl $< | \ + $(XSLTPROC) sort-regs.xsl - | \ + $(XSLTPROC) gdbserver-regs.xsl - >> $(outdir)/$*.tmp + sh ../../move-if-change $(outdir)/$*.tmp $(outdir)/$*.dat + +cfiles: $(CFILES) +%.c: %.xml + $(GDB) -nx -q -batch \ + -ex "set tdesc filename $<" -ex 'maint print c-tdesc' > $@.tmp + sh ../../move-if-change $@.tmp $@ + +# Other dependencies. +$(outdir)/arm-with-iwmmxt.dat: arm-core.xml xscale-iwmmxt.xml +$(outdir)/i386/i386.dat: i386/32bit-core.xml i386/32bit-sse.xml +$(outdir)/i386/i386-linux.dat: i386/32bit-core.xml i386/32bit-sse.xml \ + i386/32bit-linux.xml +$(outdir)/i386/amd64.dat: i386/64bit-core.xml i386/64bit-sse.xml +$(outdir)/i386/amd64-linux.dat: i386/64bit-core.xml i386/64bit-sse.xml \ + i386/64bit-linux.xml
Makefile Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: s390x-linux64.c =================================================================== --- s390x-linux64.c (nonexistent) +++ s390x-linux64.c (revision 816) @@ -0,0 +1,74 @@ +/* THIS FILE IS GENERATED. Original: s390x-linux64.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_s390x_linux64; +static void +initialize_tdesc_s390x_linux64 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("s390:64-bit")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.s390.core"); + tdesc_create_reg (feature, "pswm", 0, 0, "psw", 64, "uint64"); + tdesc_create_reg (feature, "pswa", 1, 0, "psw", 64, "uint64"); + tdesc_create_reg (feature, "r0", 2, 1, "general", 64, "uint64"); + tdesc_create_reg (feature, "r1", 3, 1, "general", 64, "uint64"); + tdesc_create_reg (feature, "r2", 4, 1, "general", 64, "uint64"); + tdesc_create_reg (feature, "r3", 5, 1, "general", 64, "uint64"); + tdesc_create_reg (feature, "r4", 6, 1, "general", 64, "uint64"); + tdesc_create_reg (feature, "r5", 7, 1, "general", 64, "uint64"); + tdesc_create_reg (feature, "r6", 8, 1, "general", 64, "uint64"); + tdesc_create_reg (feature, "r7", 9, 1, "general", 64, "uint64"); + tdesc_create_reg (feature, "r8", 10, 1, "general", 64, "uint64"); + tdesc_create_reg (feature, "r9", 11, 1, "general", 64, "uint64"); + tdesc_create_reg (feature, "r10", 12, 1, "general", 64, "uint64"); + tdesc_create_reg (feature, "r11", 13, 1, "general", 64, "uint64"); + tdesc_create_reg (feature, "r12", 14, 1, "general", 64, "uint64"); + tdesc_create_reg (feature, "r13", 15, 1, "general", 64, "uint64"); + tdesc_create_reg (feature, "r14", 16, 1, "general", 64, "uint64"); + tdesc_create_reg (feature, "r15", 17, 1, "general", 64, "uint64"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.s390.acr"); + tdesc_create_reg (feature, "acr0", 18, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr1", 19, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr2", 20, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr3", 21, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr4", 22, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr5", 23, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr6", 24, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr7", 25, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr8", 26, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr9", 27, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr10", 28, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr11", 29, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr12", 30, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr13", 31, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr14", 32, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr15", 33, 1, "access", 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.s390.fpr"); + tdesc_create_reg (feature, "fpc", 34, 1, "float", 32, "uint32"); + tdesc_create_reg (feature, "f0", 35, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 36, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 37, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 38, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 39, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 40, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 41, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 42, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 43, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 44, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 45, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 46, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 47, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 48, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 49, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 50, 1, "float", 64, "ieee_double"); + + tdesc_s390x_linux64 = result; +}
s390x-linux64.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: mips64-linux.xml =================================================================== --- mips64-linux.xml (nonexistent) +++ mips64-linux.xml (revision 816) @@ -0,0 +1,18 @@ + + + + + + mips + + + + + + + +
mips64-linux.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: arm-vfpv2.xml =================================================================== --- arm-vfpv2.xml (nonexistent) +++ arm-vfpv2.xml (revision 816) @@ -0,0 +1,28 @@ + + + + + + + + + + + + + + + + + + + + + + + +
arm-vfpv2.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: arm-vfpv3.xml =================================================================== --- arm-vfpv3.xml (nonexistent) +++ arm-vfpv3.xml (revision 816) @@ -0,0 +1,44 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
arm-vfpv3.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: s390-linux32.c =================================================================== --- s390-linux32.c (nonexistent) +++ s390-linux32.c (revision 816) @@ -0,0 +1,74 @@ +/* THIS FILE IS GENERATED. Original: s390-linux32.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_s390_linux32; +static void +initialize_tdesc_s390_linux32 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("s390:31-bit")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.s390.core"); + tdesc_create_reg (feature, "pswm", 0, 0, "psw", 32, "uint32"); + tdesc_create_reg (feature, "pswa", 1, 0, "psw", 32, "uint32"); + tdesc_create_reg (feature, "r0", 2, 1, "general", 32, "uint32"); + tdesc_create_reg (feature, "r1", 3, 1, "general", 32, "uint32"); + tdesc_create_reg (feature, "r2", 4, 1, "general", 32, "uint32"); + tdesc_create_reg (feature, "r3", 5, 1, "general", 32, "uint32"); + tdesc_create_reg (feature, "r4", 6, 1, "general", 32, "uint32"); + tdesc_create_reg (feature, "r5", 7, 1, "general", 32, "uint32"); + tdesc_create_reg (feature, "r6", 8, 1, "general", 32, "uint32"); + tdesc_create_reg (feature, "r7", 9, 1, "general", 32, "uint32"); + tdesc_create_reg (feature, "r8", 10, 1, "general", 32, "uint32"); + tdesc_create_reg (feature, "r9", 11, 1, "general", 32, "uint32"); + tdesc_create_reg (feature, "r10", 12, 1, "general", 32, "uint32"); + tdesc_create_reg (feature, "r11", 13, 1, "general", 32, "uint32"); + tdesc_create_reg (feature, "r12", 14, 1, "general", 32, "uint32"); + tdesc_create_reg (feature, "r13", 15, 1, "general", 32, "uint32"); + tdesc_create_reg (feature, "r14", 16, 1, "general", 32, "uint32"); + tdesc_create_reg (feature, "r15", 17, 1, "general", 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.s390.acr"); + tdesc_create_reg (feature, "acr0", 18, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr1", 19, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr2", 20, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr3", 21, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr4", 22, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr5", 23, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr6", 24, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr7", 25, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr8", 26, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr9", 27, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr10", 28, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr11", 29, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr12", 30, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr13", 31, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr14", 32, 1, "access", 32, "uint32"); + tdesc_create_reg (feature, "acr15", 33, 1, "access", 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.s390.fpr"); + tdesc_create_reg (feature, "fpc", 34, 1, "float", 32, "uint32"); + tdesc_create_reg (feature, "f0", 35, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 36, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 37, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 38, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 39, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 40, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 41, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 42, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 43, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 44, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 45, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 46, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 47, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 48, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 49, 1, "float", 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 50, 1, "float", 64, "ieee_double"); + + tdesc_s390_linux32 = result; +}
s390-linux32.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: arm-fpa.xml =================================================================== --- arm-fpa.xml (nonexistent) +++ arm-fpa.xml (revision 816) @@ -0,0 +1,23 @@ + + + + + + + + + + + + + + + + +
arm-fpa.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: gdbserver-regs.xsl =================================================================== --- gdbserver-regs.xsl (nonexistent) +++ gdbserver-regs.xsl (revision 816) @@ -0,0 +1,47 @@ + + + + + + + + 0: + + + + + + + + + + + + + + + + + + + : + + + + + + + + + + + + + + + + + + +
gdbserver-regs.xsl Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: mips-linux.c =================================================================== --- mips-linux.c (nonexistent) +++ mips-linux.c (revision 816) @@ -0,0 +1,98 @@ +/* THIS FILE IS GENERATED. Original: mips-linux.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_mips_linux; +static void +initialize_tdesc_mips_linux (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("mips")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.mips.cpu"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "lo", 33, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "hi", 34, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pc", 37, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.mips.cp0"); + tdesc_create_reg (feature, "status", 32, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "badvaddr", 35, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "cause", 36, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.mips.fpu"); + tdesc_create_reg (feature, "f0", 38, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f1", 39, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f2", 40, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f3", 41, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f4", 42, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f5", 43, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f6", 44, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f7", 45, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f8", 46, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f9", 47, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f10", 48, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f11", 49, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f12", 50, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f13", 51, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f14", 52, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f15", 53, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f16", 54, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f17", 55, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f18", 56, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f19", 57, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f20", 58, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f21", 59, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f22", 60, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f23", 61, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f24", 62, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f25", 63, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f26", 64, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f27", 65, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f28", 66, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f29", 67, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f30", 68, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "f31", 69, 1, NULL, 32, "ieee_single"); + tdesc_create_reg (feature, "fcsr", 70, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fir", 71, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.mips.linux"); + tdesc_create_reg (feature, "restart", 72, 1, "system", 32, "int"); + + tdesc_mips_linux = result; +}
mips-linux.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: library-list.dtd =================================================================== --- library-list.dtd (nonexistent) +++ library-list.dtd (revision 816) @@ -0,0 +1,18 @@ + + + + + + + + + + + + + + Index: arm-with-vfpv2.xml =================================================================== --- arm-with-vfpv2.xml (nonexistent) +++ arm-with-vfpv2.xml (revision 816) @@ -0,0 +1,12 @@ + + + + + + + +
arm-with-vfpv2.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: i386/32bit-linux.xml =================================================================== --- i386/32bit-linux.xml (nonexistent) +++ i386/32bit-linux.xml (revision 816) @@ -0,0 +1,11 @@ + + + + + + +
i386/32bit-linux.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: i386/64bit-sse.xml =================================================================== --- i386/64bit-sse.xml (nonexistent) +++ i386/64bit-sse.xml (revision 816) @@ -0,0 +1,44 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
i386/64bit-sse.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: i386/64bit-linux.xml =================================================================== --- i386/64bit-linux.xml (nonexistent) +++ i386/64bit-linux.xml (revision 816) @@ -0,0 +1,11 @@ + + + + + + +
i386/64bit-linux.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: i386/i386-linux.xml =================================================================== --- i386/i386-linux.xml (nonexistent) +++ i386/i386-linux.xml (revision 816) @@ -0,0 +1,17 @@ + + + + + + + + i386 + GNU/Linux + + + +
i386/i386-linux.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: i386/amd64-linux.xml =================================================================== --- i386/amd64-linux.xml (nonexistent) +++ i386/amd64-linux.xml (revision 816) @@ -0,0 +1,17 @@ + + + + + + + + i386:x86-64 + GNU/Linux + + + +
i386/amd64-linux.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: i386/i386-linux.c =================================================================== --- i386/i386-linux.c (nonexistent) +++ i386/i386-linux.c (revision 816) @@ -0,0 +1,102 @@ +/* THIS FILE IS GENERATED. Original: i386-linux.xml */ + +#include "defs.h" +#include "osabi.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_i386_linux; +static void +initialize_tdesc_i386_linux (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("i386")); + + set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.i386.core"); + tdesc_create_reg (feature, "eax", 0, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "ecx", 1, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "edx", 2, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "ebx", 3, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "esp", 4, 1, NULL, 32, "data_ptr"); + tdesc_create_reg (feature, "ebp", 5, 1, NULL, 32, "data_ptr"); + tdesc_create_reg (feature, "esi", 6, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "edi", 7, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "eip", 8, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "eflags", 9, 1, NULL, 32, "i386_eflags"); + tdesc_create_reg (feature, "cs", 10, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "ss", 11, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "ds", 12, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "es", 13, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "fs", 14, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "gs", 15, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "st0", 16, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st1", 17, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st2", 18, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st3", 19, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st4", 20, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st5", 21, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st6", 22, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st7", 23, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "fctrl", 24, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fstat", 25, 1, "float", 32, "int"); + tdesc_create_reg (feature, "ftag", 26, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fiseg", 27, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fioff", 28, 1, "float", 32, "int"); + tdesc_create_reg (feature, "foseg", 29, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fooff", 30, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fop", 31, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.i386.linux"); + tdesc_create_reg (feature, "orig_eax", 41, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse"); + field_type = tdesc_named_type (feature, "ieee_single"); + tdesc_create_vector (feature, "v4f", field_type, 4); + + field_type = tdesc_named_type (feature, "ieee_double"); + tdesc_create_vector (feature, "v2d", field_type, 2); + + field_type = tdesc_named_type (feature, "int8"); + tdesc_create_vector (feature, "v16i8", field_type, 16); + + field_type = tdesc_named_type (feature, "int16"); + tdesc_create_vector (feature, "v8i16", field_type, 8); + + field_type = tdesc_named_type (feature, "int32"); + tdesc_create_vector (feature, "v4i32", field_type, 4); + + field_type = tdesc_named_type (feature, "int64"); + tdesc_create_vector (feature, "v2i64", field_type, 2); + + type = tdesc_create_union (feature, "vec128"); + field_type = tdesc_named_type (feature, "v4f"); + tdesc_add_field (type, "v4_float", field_type); + field_type = tdesc_named_type (feature, "v2d"); + tdesc_add_field (type, "v2_double", field_type); + field_type = tdesc_named_type (feature, "v16i8"); + tdesc_add_field (type, "v16_int8", field_type); + field_type = tdesc_named_type (feature, "v8i16"); + tdesc_add_field (type, "v8_int16", field_type); + field_type = tdesc_named_type (feature, "v4i32"); + tdesc_add_field (type, "v4_int32", field_type); + field_type = tdesc_named_type (feature, "v2i64"); + tdesc_add_field (type, "v2_int64", field_type); + field_type = tdesc_named_type (feature, "uint128"); + tdesc_add_field (type, "uint128", field_type); + + tdesc_create_reg (feature, "xmm0", 32, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm1", 33, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm2", 34, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm3", 35, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm4", 36, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm5", 37, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm6", 38, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm7", 39, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "mxcsr", 40, 1, "vector", 32, "i386_mxcsr"); + + tdesc_i386_linux = result; +}
i386/i386-linux.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: i386/32bit-core.xml =================================================================== --- i386/32bit-core.xml (nonexistent) +++ i386/32bit-core.xml (revision 816) @@ -0,0 +1,45 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
i386/32bit-core.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: i386/i386.xml =================================================================== --- i386/i386.xml (nonexistent) +++ i386/i386.xml (revision 816) @@ -0,0 +1,15 @@ + + + + + + + + i386 + + +
i386/i386.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: i386/amd64-linux.c =================================================================== --- i386/amd64-linux.c (nonexistent) +++ i386/amd64-linux.c (revision 816) @@ -0,0 +1,118 @@ +/* THIS FILE IS GENERATED. Original: amd64-linux.xml */ + +#include "defs.h" +#include "osabi.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_amd64_linux; +static void +initialize_tdesc_amd64_linux (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("i386:x86-64")); + + set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.i386.core"); + tdesc_create_reg (feature, "rax", 0, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "rbx", 1, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "rcx", 2, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "rdx", 3, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "rsi", 4, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "rdi", 5, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "rbp", 6, 1, NULL, 64, "data_ptr"); + tdesc_create_reg (feature, "rsp", 7, 1, NULL, 64, "data_ptr"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "rip", 16, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "eflags", 17, 1, NULL, 32, "i386_eflags"); + tdesc_create_reg (feature, "cs", 18, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "ss", 19, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "ds", 20, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "es", 21, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "fs", 22, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "gs", 23, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "st0", 24, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st1", 25, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st2", 26, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st3", 27, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st4", 28, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st5", 29, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st6", 30, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st7", 31, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "fctrl", 32, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fstat", 33, 1, "float", 32, "int"); + tdesc_create_reg (feature, "ftag", 34, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fiseg", 35, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fioff", 36, 1, "float", 32, "int"); + tdesc_create_reg (feature, "foseg", 37, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fooff", 38, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fop", 39, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse"); + field_type = tdesc_named_type (feature, "ieee_single"); + tdesc_create_vector (feature, "v4f", field_type, 4); + + field_type = tdesc_named_type (feature, "ieee_double"); + tdesc_create_vector (feature, "v2d", field_type, 2); + + field_type = tdesc_named_type (feature, "int8"); + tdesc_create_vector (feature, "v16i8", field_type, 16); + + field_type = tdesc_named_type (feature, "int16"); + tdesc_create_vector (feature, "v8i16", field_type, 8); + + field_type = tdesc_named_type (feature, "int32"); + tdesc_create_vector (feature, "v4i32", field_type, 4); + + field_type = tdesc_named_type (feature, "int64"); + tdesc_create_vector (feature, "v2i64", field_type, 2); + + type = tdesc_create_union (feature, "vec128"); + field_type = tdesc_named_type (feature, "v4f"); + tdesc_add_field (type, "v4_float", field_type); + field_type = tdesc_named_type (feature, "v2d"); + tdesc_add_field (type, "v2_double", field_type); + field_type = tdesc_named_type (feature, "v16i8"); + tdesc_add_field (type, "v16_int8", field_type); + field_type = tdesc_named_type (feature, "v8i16"); + tdesc_add_field (type, "v8_int16", field_type); + field_type = tdesc_named_type (feature, "v4i32"); + tdesc_add_field (type, "v4_int32", field_type); + field_type = tdesc_named_type (feature, "v2i64"); + tdesc_add_field (type, "v2_int64", field_type); + field_type = tdesc_named_type (feature, "uint128"); + tdesc_add_field (type, "uint128", field_type); + + tdesc_create_reg (feature, "xmm0", 40, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm1", 41, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm2", 42, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm3", 43, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm4", 44, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm5", 45, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm6", 46, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm7", 47, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm8", 48, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm9", 49, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm10", 50, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm11", 51, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm12", 52, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm13", 53, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm14", 54, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm15", 55, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "mxcsr", 56, 1, "vector", 32, "i386_mxcsr"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.i386.linux"); + tdesc_create_reg (feature, "orig_rax", 57, 1, NULL, 64, "int"); + + tdesc_amd64_linux = result; +}
i386/amd64-linux.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: i386/32bit-sse.xml =================================================================== --- i386/32bit-sse.xml (nonexistent) +++ i386/32bit-sse.xml (revision 816) @@ -0,0 +1,36 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
i386/32bit-sse.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: i386/amd64.xml =================================================================== --- i386/amd64.xml (nonexistent) +++ i386/amd64.xml (revision 816) @@ -0,0 +1,15 @@ + + + + + + + + i386:x86-64 + + +
i386/amd64.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: i386/i386.c =================================================================== --- i386/i386.c (nonexistent) +++ i386/i386.c (revision 816) @@ -0,0 +1,97 @@ +/* THIS FILE IS GENERATED. Original: i386.xml */ + +#include "defs.h" +#include "osabi.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_i386; +static void +initialize_tdesc_i386 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("i386")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.i386.core"); + tdesc_create_reg (feature, "eax", 0, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "ecx", 1, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "edx", 2, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "ebx", 3, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "esp", 4, 1, NULL, 32, "data_ptr"); + tdesc_create_reg (feature, "ebp", 5, 1, NULL, 32, "data_ptr"); + tdesc_create_reg (feature, "esi", 6, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "edi", 7, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "eip", 8, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "eflags", 9, 1, NULL, 32, "i386_eflags"); + tdesc_create_reg (feature, "cs", 10, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "ss", 11, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "ds", 12, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "es", 13, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "fs", 14, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "gs", 15, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "st0", 16, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st1", 17, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st2", 18, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st3", 19, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st4", 20, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st5", 21, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st6", 22, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st7", 23, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "fctrl", 24, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fstat", 25, 1, "float", 32, "int"); + tdesc_create_reg (feature, "ftag", 26, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fiseg", 27, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fioff", 28, 1, "float", 32, "int"); + tdesc_create_reg (feature, "foseg", 29, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fooff", 30, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fop", 31, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse"); + field_type = tdesc_named_type (feature, "ieee_single"); + tdesc_create_vector (feature, "v4f", field_type, 4); + + field_type = tdesc_named_type (feature, "ieee_double"); + tdesc_create_vector (feature, "v2d", field_type, 2); + + field_type = tdesc_named_type (feature, "int8"); + tdesc_create_vector (feature, "v16i8", field_type, 16); + + field_type = tdesc_named_type (feature, "int16"); + tdesc_create_vector (feature, "v8i16", field_type, 8); + + field_type = tdesc_named_type (feature, "int32"); + tdesc_create_vector (feature, "v4i32", field_type, 4); + + field_type = tdesc_named_type (feature, "int64"); + tdesc_create_vector (feature, "v2i64", field_type, 2); + + type = tdesc_create_union (feature, "vec128"); + field_type = tdesc_named_type (feature, "v4f"); + tdesc_add_field (type, "v4_float", field_type); + field_type = tdesc_named_type (feature, "v2d"); + tdesc_add_field (type, "v2_double", field_type); + field_type = tdesc_named_type (feature, "v16i8"); + tdesc_add_field (type, "v16_int8", field_type); + field_type = tdesc_named_type (feature, "v8i16"); + tdesc_add_field (type, "v8_int16", field_type); + field_type = tdesc_named_type (feature, "v4i32"); + tdesc_add_field (type, "v4_int32", field_type); + field_type = tdesc_named_type (feature, "v2i64"); + tdesc_add_field (type, "v2_int64", field_type); + field_type = tdesc_named_type (feature, "uint128"); + tdesc_add_field (type, "uint128", field_type); + + tdesc_create_reg (feature, "xmm0", 32, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm1", 33, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm2", 34, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm3", 35, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm4", 36, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm5", 37, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm6", 38, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm7", 39, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "mxcsr", 40, 1, "vector", 32, "i386_mxcsr"); + + tdesc_i386 = result; +}
i386/i386.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: i386/amd64.c =================================================================== --- i386/amd64.c (nonexistent) +++ i386/amd64.c (revision 816) @@ -0,0 +1,113 @@ +/* THIS FILE IS GENERATED. Original: amd64.xml */ + +#include "defs.h" +#include "osabi.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_amd64; +static void +initialize_tdesc_amd64 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("i386:x86-64")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.i386.core"); + tdesc_create_reg (feature, "rax", 0, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "rbx", 1, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "rcx", 2, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "rdx", 3, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "rsi", 4, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "rdi", 5, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "rbp", 6, 1, NULL, 64, "data_ptr"); + tdesc_create_reg (feature, "rsp", 7, 1, NULL, 64, "data_ptr"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "rip", 16, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "eflags", 17, 1, NULL, 32, "i386_eflags"); + tdesc_create_reg (feature, "cs", 18, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "ss", 19, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "ds", 20, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "es", 21, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "fs", 22, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "gs", 23, 1, NULL, 32, "int32"); + tdesc_create_reg (feature, "st0", 24, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st1", 25, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st2", 26, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st3", 27, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st4", 28, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st5", 29, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st6", 30, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "st7", 31, 1, NULL, 80, "i387_ext"); + tdesc_create_reg (feature, "fctrl", 32, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fstat", 33, 1, "float", 32, "int"); + tdesc_create_reg (feature, "ftag", 34, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fiseg", 35, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fioff", 36, 1, "float", 32, "int"); + tdesc_create_reg (feature, "foseg", 37, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fooff", 38, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fop", 39, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse"); + field_type = tdesc_named_type (feature, "ieee_single"); + tdesc_create_vector (feature, "v4f", field_type, 4); + + field_type = tdesc_named_type (feature, "ieee_double"); + tdesc_create_vector (feature, "v2d", field_type, 2); + + field_type = tdesc_named_type (feature, "int8"); + tdesc_create_vector (feature, "v16i8", field_type, 16); + + field_type = tdesc_named_type (feature, "int16"); + tdesc_create_vector (feature, "v8i16", field_type, 8); + + field_type = tdesc_named_type (feature, "int32"); + tdesc_create_vector (feature, "v4i32", field_type, 4); + + field_type = tdesc_named_type (feature, "int64"); + tdesc_create_vector (feature, "v2i64", field_type, 2); + + type = tdesc_create_union (feature, "vec128"); + field_type = tdesc_named_type (feature, "v4f"); + tdesc_add_field (type, "v4_float", field_type); + field_type = tdesc_named_type (feature, "v2d"); + tdesc_add_field (type, "v2_double", field_type); + field_type = tdesc_named_type (feature, "v16i8"); + tdesc_add_field (type, "v16_int8", field_type); + field_type = tdesc_named_type (feature, "v8i16"); + tdesc_add_field (type, "v8_int16", field_type); + field_type = tdesc_named_type (feature, "v4i32"); + tdesc_add_field (type, "v4_int32", field_type); + field_type = tdesc_named_type (feature, "v2i64"); + tdesc_add_field (type, "v2_int64", field_type); + field_type = tdesc_named_type (feature, "uint128"); + tdesc_add_field (type, "uint128", field_type); + + tdesc_create_reg (feature, "xmm0", 40, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm1", 41, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm2", 42, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm3", 43, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm4", 44, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm5", 45, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm6", 46, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm7", 47, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm8", 48, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm9", 49, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm10", 50, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm11", 51, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm12", 52, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm13", 53, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm14", 54, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "xmm15", 55, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "mxcsr", 56, 1, "vector", 32, "i386_mxcsr"); + + tdesc_amd64 = result; +}
i386/amd64.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: i386/64bit-core.xml =================================================================== --- i386/64bit-core.xml (nonexistent) +++ i386/64bit-core.xml (revision 816) @@ -0,0 +1,53 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
i386/64bit-core.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: arm-with-vfpv3.xml =================================================================== --- arm-with-vfpv3.xml (nonexistent) +++ arm-with-vfpv3.xml (revision 816) @@ -0,0 +1,12 @@ + + + + + + + +
arm-with-vfpv3.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-64l.xml =================================================================== --- rs6000/powerpc-64l.xml (nonexistent) +++ rs6000/powerpc-64l.xml (revision 816) @@ -0,0 +1,17 @@ + + + + + + + + powerpc:common64 + + + +
rs6000/powerpc-64l.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-cell64l.xml =================================================================== --- rs6000/powerpc-cell64l.xml (nonexistent) +++ rs6000/powerpc-cell64l.xml (revision 816) @@ -0,0 +1,19 @@ + + + + + + + + powerpc:common64 + spu + + + + +
rs6000/powerpc-cell64l.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-vsx64l.xml =================================================================== --- rs6000/powerpc-vsx64l.xml (nonexistent) +++ rs6000/powerpc-vsx64l.xml (revision 816) @@ -0,0 +1,20 @@ + + + + + + + + powerpc:common64 + + + + + +
rs6000/powerpc-vsx64l.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/power-fpu-isa205.xml =================================================================== --- rs6000/power-fpu-isa205.xml (nonexistent) +++ rs6000/power-fpu-isa205.xml (revision 816) @@ -0,0 +1,44 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
rs6000/power-fpu-isa205.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-altivec32l.xml =================================================================== --- rs6000/powerpc-altivec32l.xml (nonexistent) +++ rs6000/powerpc-altivec32l.xml (revision 816) @@ -0,0 +1,19 @@ + + + + + + + + powerpc:common + + + + +
rs6000/powerpc-altivec32l.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-505.xml =================================================================== --- rs6000/powerpc-505.xml (nonexistent) +++ rs6000/powerpc-505.xml (revision 816) @@ -0,0 +1,19 @@ + + + + + + + + + + + + + + +
rs6000/powerpc-505.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-vsx64.c =================================================================== --- rs6000/powerpc-vsx64.c (nonexistent) +++ rs6000/powerpc-vsx64.c (revision 816) @@ -0,0 +1,186 @@ +/* THIS FILE IS GENERATED. Original: powerpc-vsx64.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_vsx64; +static void +initialize_tdesc_powerpc_vsx64 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common64")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); + field_type = tdesc_named_type (feature, "ieee_single"); + tdesc_create_vector (feature, "v4f", field_type, 4); + + field_type = tdesc_named_type (feature, "int32"); + tdesc_create_vector (feature, "v4i32", field_type, 4); + + field_type = tdesc_named_type (feature, "int16"); + tdesc_create_vector (feature, "v8i16", field_type, 8); + + field_type = tdesc_named_type (feature, "int8"); + tdesc_create_vector (feature, "v16i8", field_type, 16); + + type = tdesc_create_union (feature, "vec128"); + field_type = tdesc_named_type (feature, "uint128"); + tdesc_add_field (type, "uint128", field_type); + field_type = tdesc_named_type (feature, "v4f"); + tdesc_add_field (type, "v4_float", field_type); + field_type = tdesc_named_type (feature, "v4i32"); + tdesc_add_field (type, "v4_int32", field_type); + field_type = tdesc_named_type (feature, "v8i16"); + tdesc_add_field (type, "v8_int16", field_type); + field_type = tdesc_named_type (feature, "v16i8"); + tdesc_add_field (type, "v16_int8", field_type); + + tdesc_create_reg (feature, "vr0", 71, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr1", 72, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr2", 73, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr3", 74, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr4", 75, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr5", 76, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr6", 77, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr7", 78, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr8", 79, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr9", 80, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr10", 81, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr11", 82, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr12", 83, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr13", 84, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr14", 85, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr15", 86, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr16", 87, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr17", 88, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr18", 89, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr19", 90, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr20", 91, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr21", 92, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr22", 93, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr23", 94, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr24", 95, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr25", 96, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr26", 97, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr27", 98, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr28", 99, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr29", 100, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr30", 101, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr31", 102, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vscr", 103, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "vrsave", 104, 1, "vector", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.vsx"); + tdesc_create_reg (feature, "vs0h", 105, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs1h", 106, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs2h", 107, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs3h", 108, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs4h", 109, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs5h", 110, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs6h", 111, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs7h", 112, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs8h", 113, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs9h", 114, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs10h", 115, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs11h", 116, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs12h", 117, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs13h", 118, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs14h", 119, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs15h", 120, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs16h", 121, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs17h", 122, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs18h", 123, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs19h", 124, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs20h", 125, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs21h", 126, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs22h", 127, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs23h", 128, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs24h", 129, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs25h", 130, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs26h", 131, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs27h", 132, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs28h", 133, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs29h", 134, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs30h", 135, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs31h", 136, 1, NULL, 64, "uint64"); + + tdesc_powerpc_vsx64 = result; +}
rs6000/powerpc-vsx64.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/rs6000.xml =================================================================== --- rs6000/rs6000.xml (nonexistent) +++ rs6000/rs6000.xml (revision 816) @@ -0,0 +1,99 @@ + + + + + + + + rs6000:6000 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
rs6000/rs6000.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-860.xml =================================================================== --- rs6000/powerpc-860.xml (nonexistent) +++ rs6000/powerpc-860.xml (revision 816) @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
rs6000/powerpc-860.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-altivec64l.xml =================================================================== --- rs6000/powerpc-altivec64l.xml (nonexistent) +++ rs6000/powerpc-altivec64l.xml (revision 816) @@ -0,0 +1,19 @@ + + + + + + + + powerpc:common64 + + + + +
rs6000/powerpc-altivec64l.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-isa205-vsx32l.c =================================================================== --- rs6000/powerpc-isa205-vsx32l.c (nonexistent) +++ rs6000/powerpc-isa205-vsx32l.c (revision 816) @@ -0,0 +1,190 @@ +/* THIS FILE IS GENERATED. Original: powerpc-isa205-vsx32l.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_isa205_vsx32l; +static void +initialize_tdesc_powerpc_isa205_vsx32l (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 64, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); + tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "trap", 72, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); + field_type = tdesc_named_type (feature, "ieee_single"); + tdesc_create_vector (feature, "v4f", field_type, 4); + + field_type = tdesc_named_type (feature, "int32"); + tdesc_create_vector (feature, "v4i32", field_type, 4); + + field_type = tdesc_named_type (feature, "int16"); + tdesc_create_vector (feature, "v8i16", field_type, 8); + + field_type = tdesc_named_type (feature, "int8"); + tdesc_create_vector (feature, "v16i8", field_type, 16); + + type = tdesc_create_union (feature, "vec128"); + field_type = tdesc_named_type (feature, "uint128"); + tdesc_add_field (type, "uint128", field_type); + field_type = tdesc_named_type (feature, "v4f"); + tdesc_add_field (type, "v4_float", field_type); + field_type = tdesc_named_type (feature, "v4i32"); + tdesc_add_field (type, "v4_int32", field_type); + field_type = tdesc_named_type (feature, "v8i16"); + tdesc_add_field (type, "v8_int16", field_type); + field_type = tdesc_named_type (feature, "v16i8"); + tdesc_add_field (type, "v16_int8", field_type); + + tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.vsx"); + tdesc_create_reg (feature, "vs0h", 107, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs1h", 108, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs2h", 109, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs3h", 110, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs4h", 111, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs5h", 112, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs6h", 113, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs7h", 114, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs8h", 115, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs9h", 116, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs10h", 117, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs11h", 118, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs12h", 119, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs13h", 120, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs14h", 121, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs15h", 122, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs16h", 123, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs17h", 124, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs18h", 125, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs19h", 126, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs20h", 127, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs21h", 128, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs22h", 129, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs23h", 130, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs24h", 131, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs25h", 132, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs26h", 133, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs27h", 134, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs28h", 135, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs29h", 136, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs30h", 137, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs31h", 138, 1, NULL, 64, "uint64"); + + tdesc_powerpc_isa205_vsx32l = result; +}
rs6000/powerpc-isa205-vsx32l.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-vsx64.xml =================================================================== --- rs6000/powerpc-vsx64.xml (nonexistent) +++ rs6000/powerpc-vsx64.xml (revision 816) @@ -0,0 +1,18 @@ + + + + + + + + powerpc:common64 + + + + +
rs6000/powerpc-vsx64.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-e500.c =================================================================== --- rs6000/powerpc-e500.c (nonexistent) +++ rs6000/powerpc-e500.c (revision 816) @@ -0,0 +1,93 @@ +/* THIS FILE IS GENERATED. Original: powerpc-e500.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_e500; +static void +initialize_tdesc_powerpc_e500 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:e500")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.spe"); + tdesc_create_reg (feature, "ev0h", 32, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev1h", 33, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev2h", 34, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev3h", 35, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev4h", 36, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev5h", 37, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev6h", 38, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev7h", 39, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev8h", 40, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev9h", 41, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev10h", 42, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev11h", 43, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev12h", 44, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev13h", 45, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev14h", 46, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev15h", 47, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev16h", 48, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev17h", 49, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev18h", 50, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev19h", 51, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev20h", 52, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev21h", 53, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev22h", 54, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev23h", 55, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev24h", 56, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev25h", 57, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev26h", 58, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev27h", 59, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev28h", 60, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev29h", 61, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev30h", 62, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev31h", 63, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "acc", 73, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "spefscr", 74, 1, NULL, 32, "int"); + + tdesc_powerpc_e500 = result; +}
rs6000/powerpc-e500.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-isa205-altivec64l.c =================================================================== --- rs6000/powerpc-isa205-altivec64l.c (nonexistent) +++ rs6000/powerpc-isa205-altivec64l.c (revision 816) @@ -0,0 +1,156 @@ +/* THIS FILE IS GENERATED. Original: powerpc-isa205-altivec64l.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_isa205_altivec64l; +static void +initialize_tdesc_powerpc_isa205_altivec64l (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common64")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 64, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); + tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "trap", 72, 1, NULL, 64, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); + field_type = tdesc_named_type (feature, "ieee_single"); + tdesc_create_vector (feature, "v4f", field_type, 4); + + field_type = tdesc_named_type (feature, "int32"); + tdesc_create_vector (feature, "v4i32", field_type, 4); + + field_type = tdesc_named_type (feature, "int16"); + tdesc_create_vector (feature, "v8i16", field_type, 8); + + field_type = tdesc_named_type (feature, "int8"); + tdesc_create_vector (feature, "v16i8", field_type, 16); + + type = tdesc_create_union (feature, "vec128"); + field_type = tdesc_named_type (feature, "uint128"); + tdesc_add_field (type, "uint128", field_type); + field_type = tdesc_named_type (feature, "v4f"); + tdesc_add_field (type, "v4_float", field_type); + field_type = tdesc_named_type (feature, "v4i32"); + tdesc_add_field (type, "v4_int32", field_type); + field_type = tdesc_named_type (feature, "v8i16"); + tdesc_add_field (type, "v8_int16", field_type); + field_type = tdesc_named_type (feature, "v16i8"); + tdesc_add_field (type, "v16_int8", field_type); + + tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int"); + + tdesc_powerpc_isa205_altivec64l = result; +}
rs6000/powerpc-isa205-altivec64l.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-isa205-vsx32l.xml =================================================================== --- rs6000/powerpc-isa205-vsx32l.xml (nonexistent) +++ rs6000/powerpc-isa205-vsx32l.xml (revision 816) @@ -0,0 +1,20 @@ + + + + + + + + powerpc:common + + + + + +
rs6000/powerpc-isa205-vsx32l.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/power-spe.xml =================================================================== --- rs6000/power-spe.xml (nonexistent) +++ rs6000/power-spe.xml (revision 816) @@ -0,0 +1,45 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
rs6000/power-spe.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/power-core.xml =================================================================== --- rs6000/power-core.xml (nonexistent) +++ rs6000/power-core.xml (revision 816) @@ -0,0 +1,49 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
rs6000/power-core.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-isa205-vsx64l.xml =================================================================== --- rs6000/powerpc-isa205-vsx64l.xml (nonexistent) +++ rs6000/powerpc-isa205-vsx64l.xml (revision 816) @@ -0,0 +1,20 @@ + + + + + + + + powerpc:common64 + + + + + +
rs6000/powerpc-isa205-vsx64l.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-isa205-altivec32l.xml =================================================================== --- rs6000/powerpc-isa205-altivec32l.xml (nonexistent) +++ rs6000/powerpc-isa205-altivec32l.xml (revision 816) @@ -0,0 +1,19 @@ + + + + + + + + powerpc:common + + + + +
rs6000/powerpc-isa205-altivec32l.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-750.xml =================================================================== --- rs6000/powerpc-750.xml (nonexistent) +++ rs6000/powerpc-750.xml (revision 816) @@ -0,0 +1,41 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
rs6000/powerpc-750.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-7400.c =================================================================== --- rs6000/powerpc-7400.c (nonexistent) +++ rs6000/powerpc-7400.c (revision 816) @@ -0,0 +1,200 @@ +/* THIS FILE IS GENERATED. Original: powerpc-7400.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_7400; +static void +initialize_tdesc_powerpc_7400 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "OEA"); + tdesc_create_reg (feature, "sr0", 71, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr1", 72, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr2", 73, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr3", 74, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr4", 75, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr5", 76, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr6", 77, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr7", 78, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr8", 79, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr9", 80, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr10", 81, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr11", 82, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr12", 83, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr13", 84, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr14", 85, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr15", 86, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pvr", 87, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0u", 88, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0l", 89, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1u", 90, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1l", 91, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2u", 92, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2l", 93, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3u", 94, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3l", 95, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0u", 96, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0l", 97, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1u", 98, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1l", 99, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2u", 100, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2l", 101, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3u", 102, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3l", 103, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sdr1", 104, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "asr", 105, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "dar", 106, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dsisr", 107, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg0", 108, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg1", 109, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg2", 110, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg3", 111, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr0", 112, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr1", 113, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbl", 114, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbu", 115, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dec", 116, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dabr", 117, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ear", 118, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); + field_type = tdesc_named_type (feature, "ieee_single"); + tdesc_create_vector (feature, "v4f", field_type, 4); + + field_type = tdesc_named_type (feature, "int32"); + tdesc_create_vector (feature, "v4i32", field_type, 4); + + field_type = tdesc_named_type (feature, "int16"); + tdesc_create_vector (feature, "v8i16", field_type, 8); + + field_type = tdesc_named_type (feature, "int8"); + tdesc_create_vector (feature, "v16i8", field_type, 16); + + type = tdesc_create_union (feature, "vec128"); + field_type = tdesc_named_type (feature, "uint128"); + tdesc_add_field (type, "uint128", field_type); + field_type = tdesc_named_type (feature, "v4f"); + tdesc_add_field (type, "v4_float", field_type); + field_type = tdesc_named_type (feature, "v4i32"); + tdesc_add_field (type, "v4_int32", field_type); + field_type = tdesc_named_type (feature, "v8i16"); + tdesc_add_field (type, "v8_int16", field_type); + field_type = tdesc_named_type (feature, "v16i8"); + tdesc_add_field (type, "v16_int8", field_type); + + tdesc_create_reg (feature, "vr0", 119, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr1", 120, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr2", 121, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr3", 122, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr4", 123, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr5", 124, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr6", 125, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr7", 126, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr8", 127, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr9", 128, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr10", 129, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr11", 130, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr12", 131, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr13", 132, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr14", 133, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr15", 134, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr16", 135, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr17", 136, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr18", 137, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr19", 138, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr20", 139, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr21", 140, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr22", 141, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr23", 142, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr24", 143, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr25", 144, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr26", 145, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr27", 146, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr28", 147, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr29", 148, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr30", 149, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr31", 150, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vscr", 151, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "vrsave", 152, 1, "vector", 32, "int"); + + tdesc_powerpc_7400 = result; +}
rs6000/powerpc-7400.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-isa205-altivec64l.xml =================================================================== --- rs6000/powerpc-isa205-altivec64l.xml (nonexistent) +++ rs6000/powerpc-isa205-altivec64l.xml (revision 816) @@ -0,0 +1,19 @@ + + + + + + + + powerpc:common64 + + + + +
rs6000/powerpc-isa205-altivec64l.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/power-oea.xml =================================================================== --- rs6000/power-oea.xml (nonexistent) +++ rs6000/power-oea.xml (revision 816) @@ -0,0 +1,62 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
rs6000/power-oea.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-vsx32l.c =================================================================== --- rs6000/powerpc-vsx32l.c (nonexistent) +++ rs6000/powerpc-vsx32l.c (revision 816) @@ -0,0 +1,190 @@ +/* THIS FILE IS GENERATED. Original: powerpc-vsx32l.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_vsx32l; +static void +initialize_tdesc_powerpc_vsx32l (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); + tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "trap", 72, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); + field_type = tdesc_named_type (feature, "ieee_single"); + tdesc_create_vector (feature, "v4f", field_type, 4); + + field_type = tdesc_named_type (feature, "int32"); + tdesc_create_vector (feature, "v4i32", field_type, 4); + + field_type = tdesc_named_type (feature, "int16"); + tdesc_create_vector (feature, "v8i16", field_type, 8); + + field_type = tdesc_named_type (feature, "int8"); + tdesc_create_vector (feature, "v16i8", field_type, 16); + + type = tdesc_create_union (feature, "vec128"); + field_type = tdesc_named_type (feature, "uint128"); + tdesc_add_field (type, "uint128", field_type); + field_type = tdesc_named_type (feature, "v4f"); + tdesc_add_field (type, "v4_float", field_type); + field_type = tdesc_named_type (feature, "v4i32"); + tdesc_add_field (type, "v4_int32", field_type); + field_type = tdesc_named_type (feature, "v8i16"); + tdesc_add_field (type, "v8_int16", field_type); + field_type = tdesc_named_type (feature, "v16i8"); + tdesc_add_field (type, "v16_int8", field_type); + + tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.vsx"); + tdesc_create_reg (feature, "vs0h", 107, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs1h", 108, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs2h", 109, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs3h", 110, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs4h", 111, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs5h", 112, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs6h", 113, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs7h", 114, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs8h", 115, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs9h", 116, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs10h", 117, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs11h", 118, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs12h", 119, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs13h", 120, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs14h", 121, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs15h", 122, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs16h", 123, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs17h", 124, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs18h", 125, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs19h", 126, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs20h", 127, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs21h", 128, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs22h", 129, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs23h", 130, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs24h", 131, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs25h", 132, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs26h", 133, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs27h", 134, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs28h", 135, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs29h", 136, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs30h", 137, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs31h", 138, 1, NULL, 64, "uint64"); + + tdesc_powerpc_vsx32l = result; +}
rs6000/powerpc-vsx32l.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-e500l.xml =================================================================== --- rs6000/powerpc-e500l.xml (nonexistent) +++ rs6000/powerpc-e500l.xml (revision 816) @@ -0,0 +1,14 @@ + + + + + + powerpc:e500 + + + +
rs6000/powerpc-e500l.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-vsx32.xml =================================================================== --- rs6000/powerpc-vsx32.xml (nonexistent) +++ rs6000/powerpc-vsx32.xml (revision 816) @@ -0,0 +1,18 @@ + + + + + + + + powerpc:common + + + + +
rs6000/powerpc-vsx32.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/power64-linux.xml =================================================================== --- rs6000/power64-linux.xml (nonexistent) +++ rs6000/power64-linux.xml (revision 816) @@ -0,0 +1,12 @@ + + + + + + + +
rs6000/power64-linux.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-cell64l.c =================================================================== --- rs6000/powerpc-cell64l.c (nonexistent) +++ rs6000/powerpc-cell64l.c (revision 816) @@ -0,0 +1,158 @@ +/* THIS FILE IS GENERATED. Original: powerpc-cell64l.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_cell64l; +static void +initialize_tdesc_powerpc_cell64l (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common64")); + + tdesc_add_compatible (result, bfd_scan_arch ("spu:256K")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); + tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "trap", 72, 1, NULL, 64, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); + field_type = tdesc_named_type (feature, "ieee_single"); + tdesc_create_vector (feature, "v4f", field_type, 4); + + field_type = tdesc_named_type (feature, "int32"); + tdesc_create_vector (feature, "v4i32", field_type, 4); + + field_type = tdesc_named_type (feature, "int16"); + tdesc_create_vector (feature, "v8i16", field_type, 8); + + field_type = tdesc_named_type (feature, "int8"); + tdesc_create_vector (feature, "v16i8", field_type, 16); + + type = tdesc_create_union (feature, "vec128"); + field_type = tdesc_named_type (feature, "uint128"); + tdesc_add_field (type, "uint128", field_type); + field_type = tdesc_named_type (feature, "v4f"); + tdesc_add_field (type, "v4_float", field_type); + field_type = tdesc_named_type (feature, "v4i32"); + tdesc_add_field (type, "v4_int32", field_type); + field_type = tdesc_named_type (feature, "v8i16"); + tdesc_add_field (type, "v8_int16", field_type); + field_type = tdesc_named_type (feature, "v16i8"); + tdesc_add_field (type, "v16_int8", field_type); + + tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int"); + + tdesc_powerpc_cell64l = result; +}
rs6000/powerpc-cell64l.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-64l.c =================================================================== --- rs6000/powerpc-64l.c (nonexistent) +++ rs6000/powerpc-64l.c (revision 816) @@ -0,0 +1,96 @@ +/* THIS FILE IS GENERATED. Original: powerpc-64l.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_64l; +static void +initialize_tdesc_powerpc_64l (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common64")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); + tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "trap", 72, 1, NULL, 64, "int"); + + tdesc_powerpc_64l = result; +}
rs6000/powerpc-64l.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-isa205-64l.c =================================================================== --- rs6000/powerpc-isa205-64l.c (nonexistent) +++ rs6000/powerpc-isa205-64l.c (revision 816) @@ -0,0 +1,96 @@ +/* THIS FILE IS GENERATED. Original: powerpc-isa205-64l.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_isa205_64l; +static void +initialize_tdesc_powerpc_isa205_64l (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common64")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 64, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); + tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "trap", 72, 1, NULL, 64, "int"); + + tdesc_powerpc_isa205_64l = result; +}
rs6000/powerpc-isa205-64l.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-403.c =================================================================== --- rs6000/powerpc-403.c (nonexistent) +++ rs6000/powerpc-403.c (revision 816) @@ -0,0 +1,166 @@ +/* THIS FILE IS GENERATED. Original: powerpc-403.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_403; +static void +initialize_tdesc_powerpc_403 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "OEA"); + tdesc_create_reg (feature, "sr0", 71, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr1", 72, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr2", 73, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr3", 74, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr4", 75, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr5", 76, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr6", 77, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr7", 78, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr8", 79, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr9", 80, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr10", 81, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr11", 82, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr12", 83, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr13", 84, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr14", 85, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr15", 86, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pvr", 87, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0u", 88, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0l", 89, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1u", 90, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1l", 91, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2u", 92, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2l", 93, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3u", 94, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3l", 95, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0u", 96, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0l", 97, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1u", 98, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1l", 99, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2u", 100, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2l", 101, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3u", 102, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3l", 103, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sdr1", 104, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "asr", 105, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "dar", 106, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dsisr", 107, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg0", 108, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg1", 109, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg2", 110, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg3", 111, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr0", 112, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr1", 113, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbl", 114, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbu", 115, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dec", 116, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dabr", 117, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ear", 118, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "403"); + tdesc_create_reg (feature, "icdbdr", 119, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "esr", 120, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dear", 121, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "evpr", 122, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "cdbcr", 123, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tsr", 124, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tcr", 125, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pit", 126, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbhi", 127, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tblo", 128, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr2", 129, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr3", 130, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbsr", 131, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbcr", 132, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "iac1", 133, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "iac2", 134, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dac1", 135, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dac2", 136, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dccr", 137, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "iccr", 138, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pbl1", 139, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pbu1", 140, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pbl2", 141, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pbu2", 142, 1, NULL, 32, "int"); + + tdesc_powerpc_403 = result; +}
rs6000/powerpc-403.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-601.c =================================================================== --- rs6000/powerpc-601.c (nonexistent) +++ rs6000/powerpc-601.c (revision 816) @@ -0,0 +1,149 @@ +/* THIS FILE IS GENERATED. Original: powerpc-601.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_601; +static void +initialize_tdesc_powerpc_601 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "mq", 124, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "OEA"); + tdesc_create_reg (feature, "sr0", 71, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr1", 72, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr2", 73, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr3", 74, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr4", 75, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr5", 76, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr6", 77, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr7", 78, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr8", 79, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr9", 80, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr10", 81, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr11", 82, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr12", 83, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr13", 84, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr14", 85, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr15", 86, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pvr", 87, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0u", 88, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0l", 89, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1u", 90, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1l", 91, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2u", 92, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2l", 93, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3u", 94, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3l", 95, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0u", 96, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0l", 97, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1u", 98, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1l", 99, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2u", 100, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2l", 101, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3u", 102, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3l", 103, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sdr1", 104, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "asr", 105, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "dar", 106, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dsisr", 107, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg0", 108, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg1", 109, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg2", 110, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg3", 111, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr0", 112, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr1", 113, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbl", 114, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbu", 115, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dec", 116, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dabr", 117, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ear", 118, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "601"); + tdesc_create_reg (feature, "hid0", 119, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "hid1", 120, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "iabr", 121, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pir", 123, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rtcu", 125, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rtcl", 126, 1, NULL, 32, "int"); + + tdesc_powerpc_601 = result; +}
rs6000/powerpc-601.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-64.xml =================================================================== --- rs6000/powerpc-64.xml (nonexistent) +++ rs6000/powerpc-64.xml (revision 816) @@ -0,0 +1,16 @@ + + + + + + + + powerpc:common64 + + +
rs6000/powerpc-64.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-603.c =================================================================== --- rs6000/powerpc-603.c (nonexistent) +++ rs6000/powerpc-603.c (revision 816) @@ -0,0 +1,152 @@ +/* THIS FILE IS GENERATED. Original: powerpc-603.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_603; +static void +initialize_tdesc_powerpc_603 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "OEA"); + tdesc_create_reg (feature, "sr0", 71, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr1", 72, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr2", 73, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr3", 74, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr4", 75, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr5", 76, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr6", 77, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr7", 78, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr8", 79, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr9", 80, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr10", 81, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr11", 82, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr12", 83, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr13", 84, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr14", 85, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr15", 86, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pvr", 87, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0u", 88, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0l", 89, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1u", 90, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1l", 91, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2u", 92, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2l", 93, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3u", 94, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3l", 95, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0u", 96, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0l", 97, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1u", 98, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1l", 99, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2u", 100, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2l", 101, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3u", 102, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3l", 103, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sdr1", 104, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "asr", 105, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "dar", 106, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dsisr", 107, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg0", 108, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg1", 109, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg2", 110, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg3", 111, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr0", 112, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr1", 113, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbl", 114, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbu", 115, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dec", 116, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dabr", 117, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ear", 118, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "603"); + tdesc_create_reg (feature, "hid0", 119, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "hid1", 120, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "iabr", 121, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dmiss", 124, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dcmp", 125, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "hash1", 126, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "hash2", 127, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "imiss", 128, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "icmp", 129, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rpa", 130, 1, NULL, 32, "int"); + + tdesc_powerpc_603 = result; +}
rs6000/powerpc-603.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-405.c =================================================================== --- rs6000/powerpc-405.c (nonexistent) +++ rs6000/powerpc-405.c (revision 816) @@ -0,0 +1,136 @@ +/* THIS FILE IS GENERATED. Original: powerpc-405.xml */ + +#include "defs.h" +#include "gdbtypes.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_405; +static void +initialize_tdesc_powerpc_405 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct type *field_type, *type; + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "405"); + tdesc_create_reg (feature, "pvr", 87, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg0", 108, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg1", 109, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg2", 110, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg3", 111, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr0", 112, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr1", 113, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbl", 114, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbu", 115, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "icdbdr", 119, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "esr", 120, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dear", 121, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "evpr", 122, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tsr", 124, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tcr", 125, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pit", 126, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr2", 129, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr3", 130, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbsr", 131, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbcr", 132, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "iac1", 133, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "iac2", 134, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dac1", 135, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dac2", 136, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dccr", 137, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "iccr", 138, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "zpr", 143, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pid", 144, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sgr", 145, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dcwr", 146, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ccr0", 149, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbcr1", 150, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dvc1", 151, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dvc2", 152, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "iac3", 153, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "iac4", 154, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sler", 155, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg4", 156, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg5", 157, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg6", 158, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg7", 159, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "su0r", 160, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "usprg0", 161, 1, NULL, 32, "int"); + + tdesc_powerpc_405 = result; +}
rs6000/powerpc-405.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-7400.xml =================================================================== --- rs6000/powerpc-7400.xml (nonexistent) +++ rs6000/powerpc-7400.xml (revision 816) @@ -0,0 +1,14 @@ + + + + + + + + + +
rs6000/powerpc-7400.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-505.c =================================================================== --- rs6000/powerpc-505.c (nonexistent) +++ rs6000/powerpc-505.c (revision 816) @@ -0,0 +1,145 @@ +/* THIS FILE IS GENERATED. Original: powerpc-505.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_505; +static void +initialize_tdesc_powerpc_505 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "OEA"); + tdesc_create_reg (feature, "sr0", 71, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr1", 72, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr2", 73, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr3", 74, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr4", 75, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr5", 76, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr6", 77, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr7", 78, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr8", 79, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr9", 80, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr10", 81, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr11", 82, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr12", 83, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr13", 84, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr14", 85, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr15", 86, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pvr", 87, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0u", 88, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0l", 89, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1u", 90, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1l", 91, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2u", 92, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2l", 93, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3u", 94, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3l", 95, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0u", 96, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0l", 97, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1u", 98, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1l", 99, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2u", 100, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2l", 101, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3u", 102, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3l", 103, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sdr1", 104, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "asr", 105, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "dar", 106, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dsisr", 107, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg0", 108, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg1", 109, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg2", 110, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg3", 111, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr0", 112, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr1", 113, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbl", 114, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbu", 115, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dec", 116, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dabr", 117, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ear", 118, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "505"); + tdesc_create_reg (feature, "eie", 119, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "eid", 120, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "nri", 121, 1, NULL, 32, "int"); + + tdesc_powerpc_505 = result; +}
rs6000/powerpc-505.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/rs6000.c =================================================================== --- rs6000/rs6000.c (nonexistent) +++ rs6000/rs6000.c (revision 816) @@ -0,0 +1,93 @@ +/* THIS FILE IS GENERATED. Original: rs6000.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_rs6000; +static void +initialize_tdesc_rs6000 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("rs6000:6000")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "cnd", 66, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "cnt", 68, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "mq", 70, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 71, 1, "float", 32, "int"); + + tdesc_rs6000 = result; +}
rs6000/rs6000.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-860.c =================================================================== --- rs6000/powerpc-860.c (nonexistent) +++ rs6000/powerpc-860.c (revision 816) @@ -0,0 +1,189 @@ +/* THIS FILE IS GENERATED. Original: powerpc-860.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_860; +static void +initialize_tdesc_powerpc_860 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "OEA"); + tdesc_create_reg (feature, "sr0", 71, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr1", 72, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr2", 73, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr3", 74, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr4", 75, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr5", 76, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr6", 77, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr7", 78, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr8", 79, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr9", 80, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr10", 81, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr11", 82, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr12", 83, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr13", 84, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr14", 85, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr15", 86, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pvr", 87, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0u", 88, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0l", 89, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1u", 90, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1l", 91, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2u", 92, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2l", 93, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3u", 94, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3l", 95, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0u", 96, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0l", 97, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1u", 98, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1l", 99, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2u", 100, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2l", 101, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3u", 102, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3l", 103, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sdr1", 104, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "asr", 105, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "dar", 106, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dsisr", 107, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg0", 108, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg1", 109, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg2", 110, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg3", 111, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr0", 112, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr1", 113, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbl", 114, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbu", 115, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dec", 116, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dabr", 117, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ear", 118, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "860"); + tdesc_create_reg (feature, "eie", 119, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "eid", 120, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "nri", 121, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "cmpa", 122, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "cmpb", 123, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "cmpc", 124, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "cmpd", 125, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "icr", 126, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "der", 127, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "counta", 128, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "countb", 129, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "cmpe", 130, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "cmpf", 131, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "cmpg", 132, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "cmph", 133, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "lctrl1", 134, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "lctrl2", 135, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ictrl", 136, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "bar", 137, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ic_cst", 138, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ic_adr", 139, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ic_dat", 140, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dc_cst", 141, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dc_adr", 142, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dc_dat", 143, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dpdr", 144, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dpir", 145, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "immr", 146, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "mi_ctr", 147, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "mi_ap", 148, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "mi_epn", 149, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "mi_twc", 150, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "mi_rpn", 151, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "md_ctr", 152, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "m_casid", 153, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "md_ap", 154, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "md_epn", 155, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "m_twb", 156, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "md_twc", 157, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "md_rpn", 158, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "m_tw", 159, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "mi_dbcam", 160, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "mi_dbram0", 161, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "mi_dbram1", 162, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "md_dbcam", 163, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "md_dbram0", 164, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "md_dbram1", 165, 1, NULL, 32, "int"); + + tdesc_powerpc_860 = result; +}
rs6000/powerpc-860.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-altivec64l.c =================================================================== --- rs6000/powerpc-altivec64l.c (nonexistent) +++ rs6000/powerpc-altivec64l.c (revision 816) @@ -0,0 +1,156 @@ +/* THIS FILE IS GENERATED. Original: powerpc-altivec64l.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_altivec64l; +static void +initialize_tdesc_powerpc_altivec64l (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common64")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); + tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "trap", 72, 1, NULL, 64, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); + field_type = tdesc_named_type (feature, "ieee_single"); + tdesc_create_vector (feature, "v4f", field_type, 4); + + field_type = tdesc_named_type (feature, "int32"); + tdesc_create_vector (feature, "v4i32", field_type, 4); + + field_type = tdesc_named_type (feature, "int16"); + tdesc_create_vector (feature, "v8i16", field_type, 8); + + field_type = tdesc_named_type (feature, "int8"); + tdesc_create_vector (feature, "v16i8", field_type, 16); + + type = tdesc_create_union (feature, "vec128"); + field_type = tdesc_named_type (feature, "uint128"); + tdesc_add_field (type, "uint128", field_type); + field_type = tdesc_named_type (feature, "v4f"); + tdesc_add_field (type, "v4_float", field_type); + field_type = tdesc_named_type (feature, "v4i32"); + tdesc_add_field (type, "v4_int32", field_type); + field_type = tdesc_named_type (feature, "v8i16"); + tdesc_add_field (type, "v8_int16", field_type); + field_type = tdesc_named_type (feature, "v16i8"); + tdesc_add_field (type, "v16_int8", field_type); + + tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int"); + + tdesc_powerpc_altivec64l = result; +}
rs6000/powerpc-altivec64l.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-altivec64.xml =================================================================== --- rs6000/powerpc-altivec64.xml (nonexistent) +++ rs6000/powerpc-altivec64.xml (revision 816) @@ -0,0 +1,17 @@ + + + + + + + + powerpc:common64 + + + +
rs6000/powerpc-altivec64.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-isa205-32l.xml =================================================================== --- rs6000/powerpc-isa205-32l.xml (nonexistent) +++ rs6000/powerpc-isa205-32l.xml (revision 816) @@ -0,0 +1,17 @@ + + + + + + + + powerpc:common + + + +
rs6000/powerpc-isa205-32l.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/power-altivec.xml =================================================================== --- rs6000/power-altivec.xml (nonexistent) +++ rs6000/power-altivec.xml (revision 816) @@ -0,0 +1,57 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
rs6000/power-altivec.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-601.xml =================================================================== --- rs6000/powerpc-601.xml (nonexistent) +++ rs6000/powerpc-601.xml (revision 816) @@ -0,0 +1,69 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
rs6000/powerpc-601.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-32.c =================================================================== --- rs6000/powerpc-32.c (nonexistent) +++ rs6000/powerpc-32.c (revision 816) @@ -0,0 +1,92 @@ +/* THIS FILE IS GENERATED. Original: powerpc-32.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_32; +static void +initialize_tdesc_powerpc_32 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + tdesc_powerpc_32 = result; +}
rs6000/powerpc-32.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-403.xml =================================================================== --- rs6000/powerpc-403.xml (nonexistent) +++ rs6000/powerpc-403.xml (revision 816) @@ -0,0 +1,40 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
rs6000/powerpc-403.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-isa205-64l.xml =================================================================== --- rs6000/powerpc-isa205-64l.xml (nonexistent) +++ rs6000/powerpc-isa205-64l.xml (revision 816) @@ -0,0 +1,17 @@ + + + + + + + + powerpc:common64 + + + +
rs6000/powerpc-isa205-64l.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-602.xml =================================================================== --- rs6000/powerpc-602.xml (nonexistent) +++ rs6000/powerpc-602.xml (revision 816) @@ -0,0 +1,26 @@ + + + + + + + + + + + + + + + + + + + + + +
rs6000/powerpc-602.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-603.xml =================================================================== --- rs6000/powerpc-603.xml (nonexistent) +++ rs6000/powerpc-603.xml (revision 816) @@ -0,0 +1,28 @@ + + + + + + + + + + + + + + + + + + + + + + + +
rs6000/powerpc-603.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-405.xml =================================================================== --- rs6000/powerpc-405.xml (nonexistent) +++ rs6000/powerpc-405.xml (revision 816) @@ -0,0 +1,58 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
rs6000/powerpc-405.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-604.xml =================================================================== --- rs6000/powerpc-604.xml (nonexistent) +++ rs6000/powerpc-604.xml (revision 816) @@ -0,0 +1,28 @@ + + + + + + + + + + + + + + + + + + + + + + + +
rs6000/powerpc-604.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/power-linux.xml =================================================================== --- rs6000/power-linux.xml (nonexistent) +++ rs6000/power-linux.xml (revision 816) @@ -0,0 +1,12 @@ + + + + + + + +
rs6000/power-linux.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-altivec32.c =================================================================== --- rs6000/powerpc-altivec32.c (nonexistent) +++ rs6000/powerpc-altivec32.c (revision 816) @@ -0,0 +1,152 @@ +/* THIS FILE IS GENERATED. Original: powerpc-altivec32.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_altivec32; +static void +initialize_tdesc_powerpc_altivec32 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); + field_type = tdesc_named_type (feature, "ieee_single"); + tdesc_create_vector (feature, "v4f", field_type, 4); + + field_type = tdesc_named_type (feature, "int32"); + tdesc_create_vector (feature, "v4i32", field_type, 4); + + field_type = tdesc_named_type (feature, "int16"); + tdesc_create_vector (feature, "v8i16", field_type, 8); + + field_type = tdesc_named_type (feature, "int8"); + tdesc_create_vector (feature, "v16i8", field_type, 16); + + type = tdesc_create_union (feature, "vec128"); + field_type = tdesc_named_type (feature, "uint128"); + tdesc_add_field (type, "uint128", field_type); + field_type = tdesc_named_type (feature, "v4f"); + tdesc_add_field (type, "v4_float", field_type); + field_type = tdesc_named_type (feature, "v4i32"); + tdesc_add_field (type, "v4_int32", field_type); + field_type = tdesc_named_type (feature, "v8i16"); + tdesc_add_field (type, "v8_int16", field_type); + field_type = tdesc_named_type (feature, "v16i8"); + tdesc_add_field (type, "v16_int8", field_type); + + tdesc_create_reg (feature, "vr0", 71, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr1", 72, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr2", 73, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr3", 74, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr4", 75, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr5", 76, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr6", 77, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr7", 78, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr8", 79, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr9", 80, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr10", 81, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr11", 82, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr12", 83, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr13", 84, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr14", 85, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr15", 86, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr16", 87, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr17", 88, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr18", 89, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr19", 90, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr20", 91, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr21", 92, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr22", 93, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr23", 94, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr24", 95, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr25", 96, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr26", 97, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr27", 98, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr28", 99, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr29", 100, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr30", 101, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr31", 102, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vscr", 103, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "vrsave", 104, 1, "vector", 32, "int"); + + tdesc_powerpc_altivec32 = result; +}
rs6000/powerpc-altivec32.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/power64-core.xml =================================================================== --- rs6000/power64-core.xml (nonexistent) +++ rs6000/power64-core.xml (revision 816) @@ -0,0 +1,49 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
rs6000/power64-core.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-32.xml =================================================================== --- rs6000/powerpc-32.xml (nonexistent) +++ rs6000/powerpc-32.xml (revision 816) @@ -0,0 +1,16 @@ + + + + + + + + powerpc:common + + +
rs6000/powerpc-32.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-isa205-vsx64l.c =================================================================== --- rs6000/powerpc-isa205-vsx64l.c (nonexistent) +++ rs6000/powerpc-isa205-vsx64l.c (revision 816) @@ -0,0 +1,190 @@ +/* THIS FILE IS GENERATED. Original: powerpc-isa205-vsx64l.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_isa205_vsx64l; +static void +initialize_tdesc_powerpc_isa205_vsx64l (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common64")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 64, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); + tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "trap", 72, 1, NULL, 64, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); + field_type = tdesc_named_type (feature, "ieee_single"); + tdesc_create_vector (feature, "v4f", field_type, 4); + + field_type = tdesc_named_type (feature, "int32"); + tdesc_create_vector (feature, "v4i32", field_type, 4); + + field_type = tdesc_named_type (feature, "int16"); + tdesc_create_vector (feature, "v8i16", field_type, 8); + + field_type = tdesc_named_type (feature, "int8"); + tdesc_create_vector (feature, "v16i8", field_type, 16); + + type = tdesc_create_union (feature, "vec128"); + field_type = tdesc_named_type (feature, "uint128"); + tdesc_add_field (type, "uint128", field_type); + field_type = tdesc_named_type (feature, "v4f"); + tdesc_add_field (type, "v4_float", field_type); + field_type = tdesc_named_type (feature, "v4i32"); + tdesc_add_field (type, "v4_int32", field_type); + field_type = tdesc_named_type (feature, "v8i16"); + tdesc_add_field (type, "v8_int16", field_type); + field_type = tdesc_named_type (feature, "v16i8"); + tdesc_add_field (type, "v16_int8", field_type); + + tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.vsx"); + tdesc_create_reg (feature, "vs0h", 107, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs1h", 108, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs2h", 109, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs3h", 110, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs4h", 111, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs5h", 112, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs6h", 113, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs7h", 114, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs8h", 115, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs9h", 116, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs10h", 117, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs11h", 118, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs12h", 119, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs13h", 120, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs14h", 121, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs15h", 122, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs16h", 123, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs17h", 124, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs18h", 125, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs19h", 126, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs20h", 127, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs21h", 128, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs22h", 129, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs23h", 130, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs24h", 131, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs25h", 132, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs26h", 133, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs27h", 134, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs28h", 135, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs29h", 136, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs30h", 137, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs31h", 138, 1, NULL, 64, "uint64"); + + tdesc_powerpc_isa205_vsx64l = result; +}
rs6000/powerpc-isa205-vsx64l.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-isa205-altivec32l.c =================================================================== --- rs6000/powerpc-isa205-altivec32l.c (nonexistent) +++ rs6000/powerpc-isa205-altivec32l.c (revision 816) @@ -0,0 +1,156 @@ +/* THIS FILE IS GENERATED. Original: powerpc-isa205-altivec32l.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_isa205_altivec32l; +static void +initialize_tdesc_powerpc_isa205_altivec32l (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 64, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); + tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "trap", 72, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); + field_type = tdesc_named_type (feature, "ieee_single"); + tdesc_create_vector (feature, "v4f", field_type, 4); + + field_type = tdesc_named_type (feature, "int32"); + tdesc_create_vector (feature, "v4i32", field_type, 4); + + field_type = tdesc_named_type (feature, "int16"); + tdesc_create_vector (feature, "v8i16", field_type, 8); + + field_type = tdesc_named_type (feature, "int8"); + tdesc_create_vector (feature, "v16i8", field_type, 16); + + type = tdesc_create_union (feature, "vec128"); + field_type = tdesc_named_type (feature, "uint128"); + tdesc_add_field (type, "uint128", field_type); + field_type = tdesc_named_type (feature, "v4f"); + tdesc_add_field (type, "v4_float", field_type); + field_type = tdesc_named_type (feature, "v4i32"); + tdesc_add_field (type, "v4_int32", field_type); + field_type = tdesc_named_type (feature, "v8i16"); + tdesc_add_field (type, "v8_int16", field_type); + field_type = tdesc_named_type (feature, "v16i8"); + tdesc_add_field (type, "v16_int8", field_type); + + tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int"); + + tdesc_powerpc_isa205_altivec32l = result; +}
rs6000/powerpc-isa205-altivec32l.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-altivec32.xml =================================================================== --- rs6000/powerpc-altivec32.xml (nonexistent) +++ rs6000/powerpc-altivec32.xml (revision 816) @@ -0,0 +1,17 @@ + + + + + + + + powerpc:common + + + +
rs6000/powerpc-altivec32.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/power-vsx.xml =================================================================== --- rs6000/power-vsx.xml (nonexistent) +++ rs6000/power-vsx.xml (revision 816) @@ -0,0 +1,44 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
rs6000/power-vsx.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-750.c =================================================================== --- rs6000/powerpc-750.c (nonexistent) +++ rs6000/powerpc-750.c (revision 816) @@ -0,0 +1,165 @@ +/* THIS FILE IS GENERATED. Original: powerpc-750.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_750; +static void +initialize_tdesc_powerpc_750 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "OEA"); + tdesc_create_reg (feature, "sr0", 71, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr1", 72, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr2", 73, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr3", 74, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr4", 75, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr5", 76, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr6", 77, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr7", 78, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr8", 79, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr9", 80, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr10", 81, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr11", 82, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr12", 83, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr13", 84, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr14", 85, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr15", 86, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pvr", 87, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0u", 88, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0l", 89, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1u", 90, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1l", 91, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2u", 92, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2l", 93, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3u", 94, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3l", 95, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0u", 96, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0l", 97, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1u", 98, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1l", 99, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2u", 100, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2l", 101, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3u", 102, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3l", 103, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sdr1", 104, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "asr", 105, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "dar", 106, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dsisr", 107, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg0", 108, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg1", 109, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg2", 110, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg3", 111, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr0", 112, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr1", 113, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbl", 114, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbu", 115, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dec", 116, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dabr", 117, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ear", 118, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "750"); + tdesc_create_reg (feature, "hid0", 119, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "hid1", 120, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "iabr", 121, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dabr", 122, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ummcr0", 124, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "upmc1", 125, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "upmc2", 126, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "usia", 127, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ummcr1", 128, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "upmc3", 129, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "upmc4", 130, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "mmcr0", 131, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pmc1", 132, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pmc2", 133, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sia", 134, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "mmcr1", 135, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pmc3", 136, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pmc4", 137, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "l2cr", 138, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ictc", 139, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "thrm1", 140, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "thrm2", 141, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "thrm3", 142, 1, NULL, 32, "int"); + + tdesc_powerpc_750 = result; +}
rs6000/powerpc-750.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-403gc.c =================================================================== --- rs6000/powerpc-403gc.c (nonexistent) +++ rs6000/powerpc-403gc.c (revision 816) @@ -0,0 +1,172 @@ +/* THIS FILE IS GENERATED. Original: powerpc-403gc.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_403gc; +static void +initialize_tdesc_powerpc_403gc (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "OEA"); + tdesc_create_reg (feature, "sr0", 71, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr1", 72, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr2", 73, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr3", 74, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr4", 75, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr5", 76, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr6", 77, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr7", 78, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr8", 79, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr9", 80, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr10", 81, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr11", 82, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr12", 83, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr13", 84, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr14", 85, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr15", 86, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pvr", 87, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0u", 88, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0l", 89, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1u", 90, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1l", 91, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2u", 92, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2l", 93, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3u", 94, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3l", 95, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0u", 96, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0l", 97, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1u", 98, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1l", 99, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2u", 100, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2l", 101, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3u", 102, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3l", 103, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sdr1", 104, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "asr", 105, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "dar", 106, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dsisr", 107, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg0", 108, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg1", 109, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg2", 110, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg3", 111, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr0", 112, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr1", 113, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbl", 114, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbu", 115, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dec", 116, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dabr", 117, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ear", 118, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "403GC"); + tdesc_create_reg (feature, "icdbdr", 119, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "esr", 120, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dear", 121, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "evpr", 122, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "cdbcr", 123, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tsr", 124, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tcr", 125, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pit", 126, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbhi", 127, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tblo", 128, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr2", 129, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr3", 130, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbsr", 131, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbcr", 132, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "iac1", 133, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "iac2", 134, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dac1", 135, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dac2", 136, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dccr", 137, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "iccr", 138, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pbl1", 139, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pbu1", 140, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pbl2", 141, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pbu2", 142, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "zpr", 143, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pid", 144, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sgr", 145, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dcwr", 146, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbhu", 147, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tblu", 148, 1, NULL, 32, "int"); + + tdesc_powerpc_403gc = result; +}
rs6000/powerpc-403gc.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-vsx32.c =================================================================== --- rs6000/powerpc-vsx32.c (nonexistent) +++ rs6000/powerpc-vsx32.c (revision 816) @@ -0,0 +1,186 @@ +/* THIS FILE IS GENERATED. Original: powerpc-vsx32.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_vsx32; +static void +initialize_tdesc_powerpc_vsx32 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); + field_type = tdesc_named_type (feature, "ieee_single"); + tdesc_create_vector (feature, "v4f", field_type, 4); + + field_type = tdesc_named_type (feature, "int32"); + tdesc_create_vector (feature, "v4i32", field_type, 4); + + field_type = tdesc_named_type (feature, "int16"); + tdesc_create_vector (feature, "v8i16", field_type, 8); + + field_type = tdesc_named_type (feature, "int8"); + tdesc_create_vector (feature, "v16i8", field_type, 16); + + type = tdesc_create_union (feature, "vec128"); + field_type = tdesc_named_type (feature, "uint128"); + tdesc_add_field (type, "uint128", field_type); + field_type = tdesc_named_type (feature, "v4f"); + tdesc_add_field (type, "v4_float", field_type); + field_type = tdesc_named_type (feature, "v4i32"); + tdesc_add_field (type, "v4_int32", field_type); + field_type = tdesc_named_type (feature, "v8i16"); + tdesc_add_field (type, "v8_int16", field_type); + field_type = tdesc_named_type (feature, "v16i8"); + tdesc_add_field (type, "v16_int8", field_type); + + tdesc_create_reg (feature, "vr0", 71, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr1", 72, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr2", 73, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr3", 74, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr4", 75, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr5", 76, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr6", 77, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr7", 78, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr8", 79, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr9", 80, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr10", 81, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr11", 82, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr12", 83, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr13", 84, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr14", 85, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr15", 86, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr16", 87, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr17", 88, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr18", 89, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr19", 90, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr20", 91, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr21", 92, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr22", 93, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr23", 94, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr24", 95, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr25", 96, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr26", 97, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr27", 98, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr28", 99, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr29", 100, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr30", 101, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr31", 102, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vscr", 103, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "vrsave", 104, 1, "vector", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.vsx"); + tdesc_create_reg (feature, "vs0h", 105, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs1h", 106, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs2h", 107, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs3h", 108, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs4h", 109, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs5h", 110, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs6h", 111, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs7h", 112, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs8h", 113, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs9h", 114, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs10h", 115, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs11h", 116, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs12h", 117, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs13h", 118, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs14h", 119, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs15h", 120, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs16h", 121, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs17h", 122, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs18h", 123, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs19h", 124, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs20h", 125, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs21h", 126, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs22h", 127, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs23h", 128, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs24h", 129, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs25h", 130, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs26h", 131, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs27h", 132, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs28h", 133, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs29h", 134, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs30h", 135, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs31h", 136, 1, NULL, 64, "uint64"); + + tdesc_powerpc_vsx32 = result; +}
rs6000/powerpc-vsx32.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/power-fpu.xml =================================================================== --- rs6000/power-fpu.xml (nonexistent) +++ rs6000/power-fpu.xml (revision 816) @@ -0,0 +1,44 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
rs6000/power-fpu.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-e500l.c =================================================================== --- rs6000/powerpc-e500l.c (nonexistent) +++ rs6000/powerpc-e500l.c (revision 816) @@ -0,0 +1,97 @@ +/* THIS FILE IS GENERATED. Original: powerpc-e500l.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_e500l; +static void +initialize_tdesc_powerpc_e500l (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:e500")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.spe"); + tdesc_create_reg (feature, "ev0h", 32, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev1h", 33, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev2h", 34, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev3h", 35, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev4h", 36, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev5h", 37, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev6h", 38, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev7h", 39, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev8h", 40, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev9h", 41, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev10h", 42, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev11h", 43, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev12h", 44, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev13h", 45, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev14h", 46, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev15h", 47, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev16h", 48, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev17h", 49, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev18h", 50, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev19h", 51, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev20h", 52, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev21h", 53, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev22h", 54, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev23h", 55, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev24h", 56, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev25h", 57, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev26h", 58, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev27h", 59, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev28h", 60, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev29h", 61, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev30h", 62, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ev31h", 63, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "acc", 73, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "spefscr", 74, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); + tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "trap", 72, 1, NULL, 32, "int"); + + tdesc_powerpc_e500l = result; +}
rs6000/powerpc-e500l.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-e500.xml =================================================================== --- rs6000/powerpc-e500.xml (nonexistent) +++ rs6000/powerpc-e500.xml (revision 816) @@ -0,0 +1,13 @@ + + + + + + powerpc:e500 + + +
rs6000/powerpc-e500.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-64.c =================================================================== --- rs6000/powerpc-64.c (nonexistent) +++ rs6000/powerpc-64.c (revision 816) @@ -0,0 +1,92 @@ +/* THIS FILE IS GENERATED. Original: powerpc-64.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_64; +static void +initialize_tdesc_powerpc_64 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common64")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + tdesc_powerpc_64 = result; +}
rs6000/powerpc-64.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-403gc.xml =================================================================== --- rs6000/powerpc-403gc.xml (nonexistent) +++ rs6000/powerpc-403gc.xml (revision 816) @@ -0,0 +1,46 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
rs6000/powerpc-403gc.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-cell32l.c =================================================================== --- rs6000/powerpc-cell32l.c (nonexistent) +++ rs6000/powerpc-cell32l.c (revision 816) @@ -0,0 +1,158 @@ +/* THIS FILE IS GENERATED. Original: powerpc-cell32l.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_cell32l; +static void +initialize_tdesc_powerpc_cell32l (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common")); + + tdesc_add_compatible (result, bfd_scan_arch ("spu:256K")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); + tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "trap", 72, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); + field_type = tdesc_named_type (feature, "ieee_single"); + tdesc_create_vector (feature, "v4f", field_type, 4); + + field_type = tdesc_named_type (feature, "int32"); + tdesc_create_vector (feature, "v4i32", field_type, 4); + + field_type = tdesc_named_type (feature, "int16"); + tdesc_create_vector (feature, "v8i16", field_type, 8); + + field_type = tdesc_named_type (feature, "int8"); + tdesc_create_vector (feature, "v16i8", field_type, 16); + + type = tdesc_create_union (feature, "vec128"); + field_type = tdesc_named_type (feature, "uint128"); + tdesc_add_field (type, "uint128", field_type); + field_type = tdesc_named_type (feature, "v4f"); + tdesc_add_field (type, "v4_float", field_type); + field_type = tdesc_named_type (feature, "v4i32"); + tdesc_add_field (type, "v4_int32", field_type); + field_type = tdesc_named_type (feature, "v8i16"); + tdesc_add_field (type, "v8_int16", field_type); + field_type = tdesc_named_type (feature, "v16i8"); + tdesc_add_field (type, "v16_int8", field_type); + + tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int"); + + tdesc_powerpc_cell32l = result; +}
rs6000/powerpc-cell32l.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-32l.c =================================================================== --- rs6000/powerpc-32l.c (nonexistent) +++ rs6000/powerpc-32l.c (revision 816) @@ -0,0 +1,96 @@ +/* THIS FILE IS GENERATED. Original: powerpc-32l.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_32l; +static void +initialize_tdesc_powerpc_32l (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); + tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "trap", 72, 1, NULL, 32, "int"); + + tdesc_powerpc_32l = result; +}
rs6000/powerpc-32l.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-isa205-32l.c =================================================================== --- rs6000/powerpc-isa205-32l.c (nonexistent) +++ rs6000/powerpc-isa205-32l.c (revision 816) @@ -0,0 +1,96 @@ +/* THIS FILE IS GENERATED. Original: powerpc-isa205-32l.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_isa205_32l; +static void +initialize_tdesc_powerpc_isa205_32l (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 64, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); + tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "trap", 72, 1, NULL, 32, "int"); + + tdesc_powerpc_isa205_32l = result; +}
rs6000/powerpc-isa205-32l.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-altivec64.c =================================================================== --- rs6000/powerpc-altivec64.c (nonexistent) +++ rs6000/powerpc-altivec64.c (revision 816) @@ -0,0 +1,152 @@ +/* THIS FILE IS GENERATED. Original: powerpc-altivec64.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_altivec64; +static void +initialize_tdesc_powerpc_altivec64 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common64")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); + field_type = tdesc_named_type (feature, "ieee_single"); + tdesc_create_vector (feature, "v4f", field_type, 4); + + field_type = tdesc_named_type (feature, "int32"); + tdesc_create_vector (feature, "v4i32", field_type, 4); + + field_type = tdesc_named_type (feature, "int16"); + tdesc_create_vector (feature, "v8i16", field_type, 8); + + field_type = tdesc_named_type (feature, "int8"); + tdesc_create_vector (feature, "v16i8", field_type, 16); + + type = tdesc_create_union (feature, "vec128"); + field_type = tdesc_named_type (feature, "uint128"); + tdesc_add_field (type, "uint128", field_type); + field_type = tdesc_named_type (feature, "v4f"); + tdesc_add_field (type, "v4_float", field_type); + field_type = tdesc_named_type (feature, "v4i32"); + tdesc_add_field (type, "v4_int32", field_type); + field_type = tdesc_named_type (feature, "v8i16"); + tdesc_add_field (type, "v8_int16", field_type); + field_type = tdesc_named_type (feature, "v16i8"); + tdesc_add_field (type, "v16_int8", field_type); + + tdesc_create_reg (feature, "vr0", 71, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr1", 72, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr2", 73, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr3", 74, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr4", 75, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr5", 76, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr6", 77, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr7", 78, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr8", 79, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr9", 80, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr10", 81, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr11", 82, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr12", 83, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr13", 84, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr14", 85, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr15", 86, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr16", 87, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr17", 88, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr18", 89, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr19", 90, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr20", 91, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr21", 92, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr22", 93, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr23", 94, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr24", 95, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr25", 96, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr26", 97, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr27", 98, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr28", 99, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr29", 100, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr30", 101, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr31", 102, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vscr", 103, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "vrsave", 104, 1, "vector", 32, "int"); + + tdesc_powerpc_altivec64 = result; +}
rs6000/powerpc-altivec64.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-vsx64l.c =================================================================== --- rs6000/powerpc-vsx64l.c (nonexistent) +++ rs6000/powerpc-vsx64l.c (revision 816) @@ -0,0 +1,190 @@ +/* THIS FILE IS GENERATED. Original: powerpc-vsx64l.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_vsx64l; +static void +initialize_tdesc_powerpc_vsx64l (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common64")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); + tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "trap", 72, 1, NULL, 64, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); + field_type = tdesc_named_type (feature, "ieee_single"); + tdesc_create_vector (feature, "v4f", field_type, 4); + + field_type = tdesc_named_type (feature, "int32"); + tdesc_create_vector (feature, "v4i32", field_type, 4); + + field_type = tdesc_named_type (feature, "int16"); + tdesc_create_vector (feature, "v8i16", field_type, 8); + + field_type = tdesc_named_type (feature, "int8"); + tdesc_create_vector (feature, "v16i8", field_type, 16); + + type = tdesc_create_union (feature, "vec128"); + field_type = tdesc_named_type (feature, "uint128"); + tdesc_add_field (type, "uint128", field_type); + field_type = tdesc_named_type (feature, "v4f"); + tdesc_add_field (type, "v4_float", field_type); + field_type = tdesc_named_type (feature, "v4i32"); + tdesc_add_field (type, "v4_int32", field_type); + field_type = tdesc_named_type (feature, "v8i16"); + tdesc_add_field (type, "v8_int16", field_type); + field_type = tdesc_named_type (feature, "v16i8"); + tdesc_add_field (type, "v16_int8", field_type); + + tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.vsx"); + tdesc_create_reg (feature, "vs0h", 107, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs1h", 108, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs2h", 109, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs3h", 110, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs4h", 111, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs5h", 112, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs6h", 113, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs7h", 114, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs8h", 115, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs9h", 116, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs10h", 117, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs11h", 118, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs12h", 119, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs13h", 120, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs14h", 121, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs15h", 122, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs16h", 123, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs17h", 124, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs18h", 125, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs19h", 126, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs20h", 127, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs21h", 128, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs22h", 129, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs23h", 130, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs24h", 131, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs25h", 132, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs26h", 133, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs27h", 134, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs28h", 135, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs29h", 136, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs30h", 137, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs31h", 138, 1, NULL, 64, "uint64"); + + tdesc_powerpc_vsx64l = result; +}
rs6000/powerpc-vsx64l.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-602.c =================================================================== --- rs6000/powerpc-602.c (nonexistent) +++ rs6000/powerpc-602.c (revision 816) @@ -0,0 +1,152 @@ +/* THIS FILE IS GENERATED. Original: powerpc-602.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_602; +static void +initialize_tdesc_powerpc_602 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "OEA"); + tdesc_create_reg (feature, "sr0", 71, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr1", 72, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr2", 73, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr3", 74, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr4", 75, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr5", 76, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr6", 77, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr7", 78, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr8", 79, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr9", 80, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr10", 81, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr11", 82, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr12", 83, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr13", 84, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr14", 85, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr15", 86, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pvr", 87, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0u", 88, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0l", 89, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1u", 90, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1l", 91, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2u", 92, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2l", 93, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3u", 94, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3l", 95, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0u", 96, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0l", 97, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1u", 98, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1l", 99, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2u", 100, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2l", 101, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3u", 102, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3l", 103, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sdr1", 104, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "asr", 105, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "dar", 106, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dsisr", 107, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg0", 108, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg1", 109, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg2", 110, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg3", 111, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr0", 112, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr1", 113, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbl", 114, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbu", 115, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dec", 116, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dabr", 117, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ear", 118, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "602"); + tdesc_create_reg (feature, "hid0", 119, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "hid1", 120, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "iabr", 121, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tcr", 124, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibr", 125, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "esasrr", 126, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sebr", 127, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ser", 128, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sp", 129, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "lt", 130, 1, NULL, 32, "int"); + + tdesc_powerpc_602 = result; +}
rs6000/powerpc-602.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-altivec32l.c =================================================================== --- rs6000/powerpc-altivec32l.c (nonexistent) +++ rs6000/powerpc-altivec32l.c (revision 816) @@ -0,0 +1,156 @@ +/* THIS FILE IS GENERATED. Original: powerpc-altivec32l.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_altivec32l; +static void +initialize_tdesc_powerpc_altivec32l (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); + tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "trap", 72, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); + field_type = tdesc_named_type (feature, "ieee_single"); + tdesc_create_vector (feature, "v4f", field_type, 4); + + field_type = tdesc_named_type (feature, "int32"); + tdesc_create_vector (feature, "v4i32", field_type, 4); + + field_type = tdesc_named_type (feature, "int16"); + tdesc_create_vector (feature, "v8i16", field_type, 8); + + field_type = tdesc_named_type (feature, "int8"); + tdesc_create_vector (feature, "v16i8", field_type, 16); + + type = tdesc_create_union (feature, "vec128"); + field_type = tdesc_named_type (feature, "uint128"); + tdesc_add_field (type, "uint128", field_type); + field_type = tdesc_named_type (feature, "v4f"); + tdesc_add_field (type, "v4_float", field_type); + field_type = tdesc_named_type (feature, "v4i32"); + tdesc_add_field (type, "v4_int32", field_type); + field_type = tdesc_named_type (feature, "v8i16"); + tdesc_add_field (type, "v8_int16", field_type); + field_type = tdesc_named_type (feature, "v16i8"); + tdesc_add_field (type, "v16_int8", field_type); + + tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int"); + + tdesc_powerpc_altivec32l = result; +}
rs6000/powerpc-altivec32l.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-604.c =================================================================== --- rs6000/powerpc-604.c (nonexistent) +++ rs6000/powerpc-604.c (revision 816) @@ -0,0 +1,152 @@ +/* THIS FILE IS GENERATED. Original: powerpc-604.xml */ + +#include "defs.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_604; +static void +initialize_tdesc_powerpc_604 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "OEA"); + tdesc_create_reg (feature, "sr0", 71, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr1", 72, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr2", 73, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr3", 74, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr4", 75, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr5", 76, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr6", 77, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr7", 78, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr8", 79, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr9", 80, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr10", 81, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr11", 82, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr12", 83, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr13", 84, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr14", 85, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sr15", 86, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pvr", 87, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0u", 88, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat0l", 89, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1u", 90, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat1l", 91, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2u", 92, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat2l", 93, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3u", 94, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ibat3l", 95, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0u", 96, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat0l", 97, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1u", 98, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat1l", 99, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2u", 100, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat2l", 101, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3u", 102, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dbat3l", 103, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sdr1", 104, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "asr", 105, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "dar", 106, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dsisr", 107, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg0", 108, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg1", 109, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg2", 110, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sprg3", 111, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr0", 112, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "srr1", 113, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbl", 114, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "tbu", 115, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dec", 116, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dabr", 117, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "ear", 118, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "604"); + tdesc_create_reg (feature, "hid0", 119, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "hid1", 120, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "iabr", 121, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dabr", 122, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pir", 123, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "mmcr0", 124, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pmc1", 125, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pmc2", 126, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sia", 127, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sda", 128, 1, NULL, 32, "int"); + + tdesc_powerpc_604 = result; +}
rs6000/powerpc-604.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-cell32l.xml =================================================================== --- rs6000/powerpc-cell32l.xml (nonexistent) +++ rs6000/powerpc-cell32l.xml (revision 816) @@ -0,0 +1,19 @@ + + + + + + + + powerpc:common + spu + + + + +
rs6000/powerpc-cell32l.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-32l.xml =================================================================== --- rs6000/powerpc-32l.xml (nonexistent) +++ rs6000/powerpc-32l.xml (revision 816) @@ -0,0 +1,17 @@ + + + + + + + + powerpc:common + + + +
rs6000/powerpc-32l.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: rs6000/powerpc-vsx32l.xml =================================================================== --- rs6000/powerpc-vsx32l.xml (nonexistent) +++ rs6000/powerpc-vsx32l.xml (revision 816) @@ -0,0 +1,20 @@ + + + + + + + + powerpc:common + + + + + +
rs6000/powerpc-vsx32l.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: s390x-linux64.xml =================================================================== --- s390x-linux64.xml (nonexistent) +++ s390x-linux64.xml (revision 816) @@ -0,0 +1,16 @@ + + + + + + + + s390:64-bit + + + +
s390x-linux64.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: s390-core64.xml =================================================================== --- s390-core64.xml (nonexistent) +++ s390-core64.xml (revision 816) @@ -0,0 +1,45 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
s390-core64.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: s390-linux32.xml =================================================================== --- s390-linux32.xml (nonexistent) +++ s390-linux32.xml (revision 816) @@ -0,0 +1,17 @@ + + + + + + + + s390:31-bit + + + +
s390-linux32.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: mips64-cp0.xml =================================================================== --- mips64-cp0.xml (nonexistent) +++ mips64-cp0.xml (revision 816) @@ -0,0 +1,13 @@ + + + + + + + + +
mips64-cp0.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: mips-linux.xml =================================================================== --- mips-linux.xml (nonexistent) +++ mips-linux.xml (revision 816) @@ -0,0 +1,19 @@ + + + + + + mips + GNU/Linux + + + + + + + +
mips-linux.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: threads.dtd =================================================================== --- threads.dtd (nonexistent) +++ threads.dtd (revision 816) @@ -0,0 +1,13 @@ + + + + + + + + + Index: mips64-cpu.xml =================================================================== --- mips64-cpu.xml (nonexistent) +++ mips64-cpu.xml (revision 816) @@ -0,0 +1,46 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
mips64-cpu.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: arm-with-neon.c =================================================================== --- arm-with-neon.c (nonexistent) +++ arm-with-neon.c (revision 816) @@ -0,0 +1,72 @@ +/* THIS FILE IS GENERATED. Original: arm-with-neon.xml */ + +#include "defs.h" +#include "gdbtypes.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_arm_with_neon; +static void +initialize_tdesc_arm_with_neon (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct type *field_type, *type; + + feature = tdesc_create_feature (result, "org.gnu.gdb.arm.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sp", 13, 1, NULL, 32, "data_ptr"); + tdesc_create_reg (feature, "lr", 14, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pc", 15, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "cpsr", 25, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.arm.vfp"); + tdesc_create_reg (feature, "d0", 26, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d1", 27, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d2", 28, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d3", 29, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d4", 30, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d5", 31, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d6", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d7", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d8", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d9", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d10", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d11", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d12", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d13", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d14", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d15", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d16", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d17", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d18", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d19", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d20", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d21", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d22", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d23", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d24", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d25", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d26", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d27", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d28", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d29", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d30", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d31", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 58, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.arm.neon"); + + tdesc_arm_with_neon = result; +}
arm-with-neon.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: mips64-fpu.xml =================================================================== --- mips64-fpu.xml (nonexistent) +++ mips64-fpu.xml (revision 816) @@ -0,0 +1,45 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
mips64-fpu.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: m68k-core.xml =================================================================== --- m68k-core.xml (nonexistent) +++ m68k-core.xml (revision 816) @@ -0,0 +1,24 @@ + + + + + + + + + + + + + + + + + + + + + + + +
m68k-core.xml Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property

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