OpenCores

/gettime.c

0,0 → 1,12

gettime.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: exit-64-001.c =================================================================== --- exit-64-001.c (nonexistent) +++ exit-64-001.c (revision 816) @@ -0,0 +1,12 @@ +#include <_ansi.h> +#include +#include + + +void _exit (n) +{ + /* Set bit #0 in the _DEBUG_HALT_REG to trigger program exit to + the simulator. (The simulator will return a SIGQUIT signal.) */ + asm("ori r1, r0, #$1\n"); + asm("stw r1, r0, #$300\n"); +}

exit-64-001.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: configure =================================================================== --- configure (nonexistent) +++ configure (revision 816) @@ -0,0 +1,3732 @@ +#! /bin/sh +# Guess values for system-dependent variables and create Makefiles. +# Generated by GNU Autoconf 2.61. +# +# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, +# 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. +# This configure script is free software; the Free Software Foundation +# gives unlimited permission to copy, distribute and modify it. +## --------------------- ## +## M4sh Initialization. ## +## --------------------- ## + +# Be more Bourne compatible +DUALCASE=1; export DUALCASE # for MKS sh +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in + *posix*) set -o posix ;; +esac + +fi + + + + +# PATH needs CR +# Avoid depending upon Character Ranges. +as_cr_letters='abcdefghijklmnopqrstuvwxyz' +as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ' +as_cr_Letters=$as_cr_letters$as_cr_LETTERS +as_cr_digits='0123456789' +as_cr_alnum=$as_cr_Letters$as_cr_digits + +# The user is always right. +if test "${PATH_SEPARATOR+set}" != set; then + echo "#! /bin/sh" >conf$$.sh + echo "exit 0" >>conf$$.sh + chmod +x conf$$.sh + if (PATH="/nonexistent;."; conf$$.sh) >/dev/null 2>&1; then + PATH_SEPARATOR=';' + else + PATH_SEPARATOR=: + fi + rm -f conf$$.sh +fi + +# Support unset when possible. +if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then + as_unset=unset +else + as_unset=false +fi + + +# IFS +# We need space, tab and new line, in precisely that order. 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But avoid the broken or +# incompatible versions: +# SysV /etc/install, /usr/sbin/install +# SunOS /usr/etc/install +# IRIX /sbin/install +# AIX /bin/install +# AmigaOS /C/install, which installs bootblocks on floppy discs +# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag +# AFS /usr/afsws/bin/install, which mishandles nonexistent args +# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" +# OS/2's system install, which has a completely different semantic +# ./install, which can be erroneously created by make from ./install.sh. +{ echo "$as_me:$LINENO: checking for a BSD-compatible install" >&5 +echo $ECHO_N "checking for a BSD-compatible install... $ECHO_C" >&6; } +if test -z "$INSTALL"; then +if test "${ac_cv_path_install+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + # Account for people who put trailing slashes in PATH elements. +case $as_dir/ in + ./ | .// | /cC/* | \ + /etc/* | /usr/sbin/* | /usr/etc/* | /sbin/* | /usr/afsws/bin/* | \ + ?:\\/os2\\/install\\/* | ?:\\/OS2\\/INSTALL\\/* | \ + /usr/ucb/* ) ;; + *) + # OSF1 and SCO ODT 3.0 have their own names for install. + # Don't use installbsd from OSF since it installs stuff as root + # by default. + for ac_prog in ginstall scoinst install; do + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_prog$ac_exec_ext" && $as_test_x "$as_dir/$ac_prog$ac_exec_ext"; }; then + if test $ac_prog = install && + grep dspmsg "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then + # AIX install. It has an incompatible calling convention. + : + elif test $ac_prog = install && + grep pwplus "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then + # program-specific install script used by HP pwplus--don't use. + : + else + ac_cv_path_install="$as_dir/$ac_prog$ac_exec_ext -c" + break 3 + fi + fi + done + done + ;; +esac +done +IFS=$as_save_IFS + + +fi + if test "${ac_cv_path_install+set}" = set; then + INSTALL=$ac_cv_path_install + else + # As a last resort, use the slow shell script. Don't cache a + # value for INSTALL within a source directory, because that will + # break other packages using the cache if that directory is + # removed, or if the value is a relative name. + INSTALL=$ac_install_sh + fi +fi +{ echo "$as_me:$LINENO: result: $INSTALL" >&5 +echo "${ECHO_T}$INSTALL" >&6; } + +# Use test -z because SunOS4 sh mishandles braces in ${var-val}. +# It thinks the first close brace ends the variable substitution. +test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}' + +test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL}' + +test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' + + +rm -rf .tst 2>/dev/null +mkdir .tst 2>/dev/null +if test -d .tst; then + am__leading_dot=. +else + am__leading_dot=_ +fi +rmdir .tst 2>/dev/null + +DEPDIR="${am__leading_dot}deps" + +ac_config_commands="$ac_config_commands depfiles" + + +am_make=${MAKE-make} +cat > confinc << 'END' +am__doit: + @echo done +.PHONY: am__doit +END +# If we don't find an include directive, just comment out the code. +{ echo "$as_me:$LINENO: checking for style of include used by $am_make" >&5 +echo $ECHO_N "checking for style of include used by $am_make... $ECHO_C" >&6; } +am__include="#" +am__quote= +_am_result=none +# First try GNU make style include. +echo "include confinc" > confmf +# We grep out `Entering directory' and `Leaving directory' +# messages which can occur if `w' ends up in MAKEFLAGS. +# In particular we don't look at `^make:' because GNU make might +# be invoked under some other name (usually "gmake"), in which +# case it prints its new name instead of `make'. +if test "`$am_make -s -f confmf 2> /dev/null | grep -v 'ing directory'`" = "done"; then + am__include=include + am__quote= + _am_result=GNU +fi +# Now try BSD make style include. +if test "$am__include" = "#"; then + echo '.include "confinc"' > confmf + if test "`$am_make -s -f confmf 2> /dev/null`" = "done"; then + am__include=.include + am__quote="\"" + _am_result=BSD + fi +fi + + +{ echo "$as_me:$LINENO: result: $_am_result" >&5 +echo "${ECHO_T}$_am_result" >&6; } +rm -f confinc confmf + +# Check whether --enable-dependency-tracking was given. +if test "${enable_dependency_tracking+set}" = set; then + enableval=$enable_dependency_tracking; +fi + +if test "x$enable_dependency_tracking" != xno; then + am_depcomp="$ac_aux_dir/depcomp" + AMDEPBACKSLASH='\' +fi + + +if test "x$enable_dependency_tracking" != xno; then + AMDEP_TRUE= + AMDEP_FALSE='#' +else + AMDEP_TRUE='#' + AMDEP_FALSE= +fi + + + +# Extract the first word of "gcc", so it can be a program name with args. +set dummy gcc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="gcc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + +depcc="$CC" am_compiler_list= + +{ echo "$as_me:$LINENO: checking dependency style of $depcc" >&5 +echo $ECHO_N "checking dependency style of $depcc... $ECHO_C" >&6; } +if test "${am_cv_CC_dependencies_compiler_type+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -z "$AMDEP_TRUE" && test -f "$am_depcomp"; then + # We make a subdir and do the tests there. Otherwise we can end up + # making bogus files that we don't know about and never remove. For + # instance it was reported that on HP-UX the gcc test will end up + # making a dummy file named `D' -- because `-MD' means `put the output + # in D'. + mkdir conftest.dir + # Copy depcomp to subdir because otherwise we won't find it if we're + # using a relative directory. + cp "$am_depcomp" conftest.dir + cd conftest.dir + # We will build objects and dependencies in a subdirectory because + # it helps to detect inapplicable dependency modes. For instance + # both Tru64's cc and ICC support -MD to output dependencies as a + # side effect of compilation, but ICC will put the dependencies in + # the current directory while Tru64 will put them in the object + # directory. + mkdir sub + + am_cv_CC_dependencies_compiler_type=none + if test "$am_compiler_list" = ""; then + am_compiler_list=`sed -n 's/^#*$[a-zA-Z0-9]*$)$/\1/p' < ./depcomp` + fi + for depmode in $am_compiler_list; do + # Setup a source with many dependencies, because some compilers + # like to wrap large dependency lists on column 80 (with \), and + # we should not choose a depcomp mode which is confused by this. + # + # We need to recreate these files for each test, as the compiler may + # overwrite some of them when testing with obscure command lines. + # This happens at least with the AIX C compiler. + : > sub/conftest.c + for i in 1 2 3 4 5 6; do + echo '#include "conftst'$i'.h"' >> sub/conftest.c + # Using `: > sub/conftst$i.h' creates only sub/conftst1.h with + # Solaris 8's {/usr,}/bin/sh. + touch sub/conftst$i.h + done + echo "${am__include} ${am__quote}sub/conftest.Po${am__quote}" > confmf + + case $depmode in + nosideeffect) + # after this tag, mechanisms are not by side-effect, so they'll + # only be used when explicitly requested + if test "x$enable_dependency_tracking" = xyes; then + continue + else + break + fi + ;; + none) break ;; + esac + # We check with `-c' and `-o' for the sake of the "dashmstdout" + # mode. It turns out that the SunPro C++ compiler does not properly + # handle `-M -o', and we need to detect this. + if depmode=$depmode \ + source=sub/conftest.c object=sub/conftest.${OBJEXT-o} \ + depfile=sub/conftest.Po tmpdepfile=sub/conftest.TPo \ + $SHELL ./depcomp $depcc -c -o sub/conftest.${OBJEXT-o} sub/conftest.c \ + >/dev/null 2>conftest.err && + grep sub/conftst6.h sub/conftest.Po > /dev/null 2>&1 && + grep sub/conftest.${OBJEXT-o} sub/conftest.Po > /dev/null 2>&1 && + ${MAKE-make} -s -f confmf > /dev/null 2>&1; then + # icc doesn't choke on unknown options, it will just issue warnings + # or remarks (even with -Werror). So we grep stderr for any message + # that says an option was ignored or not supported. + # When given -MP, icc 7.0 and 7.1 complain thusly: + # icc: Command line warning: ignoring option '-M'; no argument required + # The diagnosis changed in icc 8.0: + # icc: Command line remark: option '-MP' not supported + if (grep 'ignoring option' conftest.err || + grep 'not supported' conftest.err) >/dev/null 2>&1; then :; else + am_cv_CC_dependencies_compiler_type=$depmode + break + fi + fi + done + + cd .. + rm -rf conftest.dir +else + am_cv_CC_dependencies_compiler_type=none +fi + +fi +{ echo "$as_me:$LINENO: result: $am_cv_CC_dependencies_compiler_type" >&5 +echo "${ECHO_T}$am_cv_CC_dependencies_compiler_type" >&6; } +CCDEPMODE=depmode=$am_cv_CC_dependencies_compiler_type + + + +if + test "x$enable_dependency_tracking" != xno \ + && test "$am_cv_CC_dependencies_compiler_type" = gcc3; then + am__fastdepCC_TRUE= + am__fastdepCC_FALSE='#' +else + am__fastdepCC_TRUE='#' + am__fastdepCC_FALSE= +fi + + +if test -z "$CC"; then + # Extract the first word of "cc", so it can be a program name with args. +set dummy cc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else + ac_prog_rejected=no +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if test "$as_dir/$ac_word$ac_exec_ext" = "/usr/ucb/cc"; then + ac_prog_rejected=yes + continue + fi + ac_cv_prog_CC="cc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +if test $ac_prog_rejected = yes; then + # We found a bogon in the path, so make sure we never use it. + set dummy $ac_cv_prog_CC + shift + if test $# != 0; then + # We chose a different compiler from the bogus one. + # However, it has the same basename, so the bogon will be chosen + # first if we set CC to just the basename; use the full file name. + shift + ac_cv_prog_CC="$as_dir/$ac_word${1+' '}$@" + fi +fi +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + test -z "$CC" && { { echo "$as_me:$LINENO: error: no acceptable cc found in \$PATH" >&5 +echo "$as_me: error: no acceptable cc found in \$PATH" >&2;} + { (exit 1); exit 1; }; } +fi + +{ echo "$as_me:$LINENO: checking whether we are using GNU C" >&5 +echo $ECHO_N "checking whether we are using GNU C... $ECHO_C" >&6; } +if test "${ac_cv_c_compiler_gnu+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat > conftest.c <&5 + (eval $ac_try) 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } | egrep yes >/dev/null 2>&1; then + ac_cv_c_compiler_gnu=yes +else + ac_cv_c_compiler_gnu=no +fi +fi +{ echo "$as_me:$LINENO: result: $ac_cv_c_compiler_gnu" >&5 +echo "${ECHO_T}$ac_cv_c_compiler_gnu" >&6; } + +if test $ac_cv_c_compiler_gnu = yes; then + GCC=yes + ac_test_CFLAGS="${CFLAGS+set}" + ac_save_CFLAGS="$CFLAGS" + CFLAGS= + ac_test_CFLAGS=${CFLAGS+set} +ac_save_CFLAGS=$CFLAGS +{ echo "$as_me:$LINENO: checking whether $CC accepts -g" >&5 +echo $ECHO_N "checking whether $CC accepts -g... $ECHO_C" >&6; } +if test "${ac_cv_prog_cc_g+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_save_c_werror_flag=$ac_c_werror_flag + ac_c_werror_flag=yes + ac_cv_prog_cc_g=no + CFLAGS="-g" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_prog_cc_g=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + CFLAGS="" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_c_werror_flag=$ac_save_c_werror_flag + CFLAGS="-g" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_prog_cc_g=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + ac_c_werror_flag=$ac_save_c_werror_flag +fi +{ echo "$as_me:$LINENO: result: $ac_cv_prog_cc_g" >&5 +echo "${ECHO_T}$ac_cv_prog_cc_g" >&6; } +if test "$ac_test_CFLAGS" = set; then + CFLAGS=$ac_save_CFLAGS +elif test $ac_cv_prog_cc_g = yes; then + if test "$GCC" = yes; then + CFLAGS="-g -O2" + else + CFLAGS="-g" + fi +else + if test "$GCC" = yes; then + CFLAGS="-O2" + else + CFLAGS= + fi +fi + if test "$ac_test_CFLAGS" = set; then + CFLAGS="$ac_save_CFLAGS" + elif test $ac_cv_prog_cc_g = yes; then + CFLAGS="-g -O2" + else + CFLAGS="-O2" + fi +else + GCC= + test "${CFLAGS+set}" = set || CFLAGS="-g" +fi + + +AS=${AS-as} + +AR=${AR-ar} + +LD=${LD-ld} + +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. +set dummy ${ac_tool_prefix}ranlib; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_RANLIB+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$RANLIB"; then + ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +RANLIB=$ac_cv_prog_RANLIB +if test -n "$RANLIB"; then + { echo "$as_me:$LINENO: result: $RANLIB" >&5 +echo "${ECHO_T}$RANLIB" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_RANLIB"; then + ac_ct_RANLIB=$RANLIB + # Extract the first word of "ranlib", so it can be a program name with args. +set dummy ranlib; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_ac_ct_RANLIB+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$ac_ct_RANLIB"; then + ac_cv_prog_ac_ct_RANLIB="$ac_ct_RANLIB" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_RANLIB="ranlib" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_RANLIB=$ac_cv_prog_ac_ct_RANLIB +if test -n "$ac_ct_RANLIB"; then + { echo "$as_me:$LINENO: result: $ac_ct_RANLIB" >&5 +echo "${ECHO_T}$ac_ct_RANLIB" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + if test "x$ac_ct_RANLIB" = x; then + RANLIB=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&5 +echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&2;} +ac_tool_warned=yes ;; +esac + RANLIB=$ac_ct_RANLIB + fi +else + RANLIB="$ac_cv_prog_RANLIB" +fi + +# By default we simply use the C compiler to build assembly code. + +test "${CCAS+set}" = set || CCAS=$CC +test "${CCASFLAGS+set}" = set || CCASFLAGS=$CFLAGS + + + + +host_makefile_frag=${srcdir}/../config/default.mh + +host_makefile_frag_path=$host_makefile_frag + + + +ac_config_files="$ac_config_files Makefile" + +cat >confcache <<\_ACEOF +# This file is a shell script that caches the results of configure +# tests run on this system so they can be shared between configure +# scripts and configure runs, see configure's option --config-cache. +# It is not useful on other systems. If it contains results you don't +# want to keep, you may remove or edit it. +# +# config.status only pays attention to the cache file if you give it +# the --recheck option to rerun configure. +# +# `ac_cv_env_foo' variables (set or unset) will be overridden when +# loading this file, other *unset* `ac_cv_foo' will be assigned the +# following values. + +_ACEOF + +# The following way of writing the cache mishandles newlines in values, +# but we know of no workaround that is simple, portable, and efficient. +# So, we kill variables containing newlines. +# Ultrix sh set writes to stderr and can't be redirected directly, +# and sets the high bit in the cache file unless we assign to the vars. +( + for ac_var in `(set) 2>&1 | sed -n 's/^$[a-zA-Z_][a-zA-Z0-9_]*$=.*/\1/p'`; do + eval ac_val=\$$ac_var + case $ac_val in #( + *${as_nl}*) + case $ac_var in #( + *_cv_*) { echo "$as_me:$LINENO: WARNING: Cache variable $ac_var contains a newline." >&5 +echo "$as_me: WARNING: Cache variable $ac_var contains a newline." >&2;} ;; + esac + case $ac_var in #( + _ | IFS | as_nl) ;; #( + *) $as_unset $ac_var ;; + esac ;; + esac + done + + (set) 2>&1 | + case $as_nl`(ac_space=' '; set) 2>&1` in #( + *${as_nl}ac_space=\ *) + # `set' does not quote correctly, so add quotes (double-quote + # substitution turns \\\\ into \\, and sed turns \\ into \). + sed -n \ + "s/'/'\\\\''/g; + s/^\$[_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\$=\$.*\$/\\1='\\2'/p" + ;; #( + *) + # `set' quotes correctly as required by POSIX, so do not add quotes. + sed -n "/^[_$as_cr_alnum]*_cv_[_$as_cr_alnum]*=/p" + ;; + esac | + sort +) | + sed ' + /^ac_cv_env_/b end + t clear + :clear + s/^$[^=]*$=$.*[{}].*$$/test "${\1+set}" = set || &/ + t end + s/^$[^=]*$=$.*$$/\1=${\1=\2}/ + :end' >>confcache +if diff "$cache_file" confcache >/dev/null 2>&1; then :; else + if test -w "$cache_file"; then + test "x$cache_file" != "x/dev/null" && + { echo "$as_me:$LINENO: updating cache $cache_file" >&5 +echo "$as_me: updating cache $cache_file" >&6;} + cat confcache >$cache_file + else + { echo "$as_me:$LINENO: not updating unwritable cache $cache_file" >&5 +echo "$as_me: not updating unwritable cache $cache_file" >&6;} + fi +fi +rm -f confcache + +test "x$prefix" = xNONE && prefix=$ac_default_prefix +# Let make expand exec_prefix. +test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' + +# Transform confdefs.h into DEFS. +# Protect against shell expansion while executing Makefile rules. +# Protect against Makefile macro expansion. +# +# If the first sed substitution is executed (which looks for macros that +# take arguments), then branch to the quote section. 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When used with automake>=1.10 LIBOBJDIR + # will be set to the directory where LIBOBJS objects are built. + ac_libobjs="$ac_libobjs \${LIBOBJDIR}$ac_i\$U.$ac_objext" + ac_ltlibobjs="$ac_ltlibobjs \${LIBOBJDIR}$ac_i"'$U.lo' +done +LIBOBJS=$ac_libobjs + +LTLIBOBJS=$ac_ltlibobjs + + +if test -z "${AMDEP_TRUE}" && test -z "${AMDEP_FALSE}"; then + { { echo "$as_me:$LINENO: error: conditional \"AMDEP\" was never defined. +Usually this means the macro was only invoked conditionally." >&5 +echo "$as_me: error: conditional \"AMDEP\" was never defined. +Usually this means the macro was only invoked conditionally." >&2;} + { (exit 1); exit 1; }; } +fi +if test -z "${am__fastdepCC_TRUE}" && test -z "${am__fastdepCC_FALSE}"; then + { { echo "$as_me:$LINENO: error: conditional \"am__fastdepCC\" was never defined. +Usually this means the macro was only invoked conditionally." >&5 +echo "$as_me: error: conditional \"am__fastdepCC\" was never defined. +Usually this means the macro was only invoked conditionally." >&2;} + { (exit 1); exit 1; }; } +fi + +: ${CONFIG_STATUS=./config.status} +ac_clean_files_save=$ac_clean_files +ac_clean_files="$ac_clean_files $CONFIG_STATUS" +{ echo "$as_me:$LINENO: creating $CONFIG_STATUS" >&5 +echo "$as_me: creating $CONFIG_STATUS" >&6;} +cat >$CONFIG_STATUS <<_ACEOF +#! $SHELL +# Generated by $as_me. +# Run this file to recreate the current configuration. +# Compiler output produced by configure, useful for debugging +# configure, is in config.log if it exists. + +debug=false +ac_cs_recheck=false +ac_cs_silent=false +SHELL=\${CONFIG_SHELL-$SHELL} +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF +## --------------------- ## +## M4sh Initialization. ## +## --------------------- ## + +# Be more Bourne compatible +DUALCASE=1; export DUALCASE # for MKS sh +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in + *posix*) set -o posix ;; +esac + +fi + + + + +# PATH needs CR +# Avoid depending upon Character Ranges. +as_cr_letters='abcdefghijklmnopqrstuvwxyz' +as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ' +as_cr_Letters=$as_cr_letters$as_cr_LETTERS +as_cr_digits='0123456789' +as_cr_alnum=$as_cr_Letters$as_cr_digits + +# The user is always right. +if test "${PATH_SEPARATOR+set}" != set; then + echo "#! /bin/sh" >conf$$.sh + echo "exit 0" >>conf$$.sh + chmod +x conf$$.sh + if (PATH="/nonexistent;."; conf$$.sh) >/dev/null 2>&1; then + PATH_SEPARATOR=';' + else + PATH_SEPARATOR=: + fi + rm -f conf$$.sh +fi + +# Support unset when possible. +if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then + as_unset=unset +else + as_unset=false +fi + + +# IFS +# We need space, tab and new line, in precisely that order. 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So we exec the FD to /dev/null, +# effectively closing config.log, so it can be properly (re)opened and +# appended to by config.status. When coming back to configure, we +# need to make the FD available again. +if test "$no_create" != yes; then + ac_cs_success=: + ac_config_status_args= + test "$silent" = yes && + ac_config_status_args="$ac_config_status_args --quiet" + exec 5>/dev/null + $SHELL $CONFIG_STATUS $ac_config_status_args || ac_cs_success=false + exec 5>>config.log + # Use ||, not &&, to avoid exiting from the if with $? = 1, which + # would make configure fail if this is the last instruction. + $ac_cs_success || { (exit 1); exit 1; } +fi +

configure Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: unlink.c =================================================================== --- unlink.c (nonexistent) +++ unlink.c (revision 816) @@ -0,0 +1,11 @@ +#include <_ansi.h> +#include +#include +#include "trap.h" + + +int +unlink () +{ + return -1; +}

unlink.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: open.c =================================================================== --- open.c (nonexistent) +++ open.c (revision 816) @@ -0,0 +1,11 @@ +#include <_ansi.h> +#include +#include +#include "trap.h" + + +int +open (const char *path, int flags, int mode) +{ + return TRAP0 (SYS_open, path, flags, mode); +}

open.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: Makefile.in =================================================================== --- Makefile.in (nonexistent) +++ Makefile.in (revision 816) @@ -0,0 +1,128 @@ +# Copyright (c) 2001, 2005 Red Hat, Inc. +# +# The authors hereby grant permission to use, copy, modify, distribute, +# and license this software and its documentation for any purpose, provided +# that existing copyright notices are retained in all copies and that this +# notice is included verbatim in any distributions. No written agreement, +# license, or royalty fee is required for any of the authorized uses. +# Modifications to this software may be copyrighted by their authors +# and need not follow the licensing terms described here, provided that +# the new terms are clearly indicated on the first page of each file where +# they apply. + +# Makefile for libgloss/mt. This is the board support for the Morpho mt. + +VPATH = @srcdir@ @srcdir@/.. +srcdir = @srcdir@ +objdir = . +srcroot = $(srcdir)/../.. +objroot = $(objdir)/../.. + +prefix = @prefix@ +exec_prefix = @exec_prefix@ + +host_alias = @host_alias@ +target_alias = @target_alias@ + +bindir = @bindir@ +libdir = @libdir@ +tooldir = $(exec_prefix)/$(target_alias) + +# Multilib support variables. +# TOP is used instead of MULTI{BUILD,SRC}TOP. +MULTIDIRS = +MULTISUBDIR = +MULTIDO = true +MULTICLEAN = true + +INSTALL = @INSTALL@ +INSTALL_PROGRAM = @INSTALL_PROGRAM@ +INSTALL_DATA = @INSTALL_DATA@ + +SHELL = /bin/sh + +CC = @CC@ + +AS = @AS@ +AR = @AR@ +LD = @LD@ +RANLIB = @RANLIB@ +AR_FLAGS = rc + +OBJDUMP = `if [ -f ${objroot}/../binutils/objdump ] ; \ + then echo ${objroot}/../binutils/objdump ; \ + else t='$(program_transform_name)'; echo objdump | sed -e $$t ; fi` +OBJCOPY = `if [ -f ${objroot}/../binutils/objcopy ] ; \ + then echo ${objroot}/../binutils/objcopy ; \ + else t='$(program_transform_name)'; echo objcopy | sed -e $$t ; fi` + +SCRIPTS = 16-002.ld 16-003.ld 64-001.ld ms2.ld +CRT0 = crt0.o crt0-64-001.o crt0-16-002.o crt0-16-003.o crt0-ms2.o \ + startup-64-001.o startup-16-002.o startup-16-003.o startup-ms2.o \ + exit.o exit-64-001.o exit-16-002.o exit-16-003.o exit-ms2.o + +SIM_BSP = libsim.a +SIM_OBJS = access.o chmod.o close.o \ + fstat.o getpid.o gettime.o isatty.o kill.o lseek.o open.o \ + read.o sbrk.o stat.o time.o times.o trap.o unlink.o utime.o write.o + +#### Host specific Makefile fragment comes in here. +@host_makefile_frag@ + +all: $(CRT0) $(SIM_BSP) + +$(SIM_BSP): $(SIM_OBJS) + $(AR) $(ARFLAGS) $@ $? + $(RANLIB) $@ + +access.o: $(srcdir)/access.c +chmod.o: $(srcdir)/chmod.c +close.o: $(srcdir)/close.c +fstat.o: $(srcdir)/fstat.c +getpid.o: $(srcdir)/getpid.c +gettime.o: $(srcdir)/gettime.c +isatty.o: $(srcdir)/isatty.c +kill.o: $(srcdir)/kill.c +lseek.o: $(srcdir)/lseek.c +open.o: $(srcdir)/open.c +read.o: $(srcdir)/read.c +sbrk.o: $(srcdir)/sbrk.c +stat.o: $(srcdir)/stat.c +time.o: $(srcdir)/time.c +times.o: $(srcdir)/times.c +unlink.o: $(srcdir)/unlink.c +utime.o: $(srcdir)/utime.c +write.o: $(srcdir)/write.c +crt0.o: $(srcdir)/crt0.S +crt0-16-002.o: $(srcdir)/crt0-16-002.S +crt0-16-003.o: $(srcdir)/crt0-16-003.S +crt0-64-001.o: $(srcdir)/crt0-64-001.S +crt0-ms2.o: $(srcdir)/crt0-ms2.S + +trap.o: $(srcdir)/trap.S + +install: $($(CPU)_INSTALL) + for c in $(CRT0); do \ + $(INSTALL_DATA) $$c $(tooldir)/lib${MULTISUBDIR}/$$c ; \ + done; + $(INSTALL_DATA) $(SIM_BSP) $(tooldir)/lib${MULTISUBDIR}/$(SIM_BSP) + for c in $(SCRIPTS); do \ + $(INSTALL_DATA) $(srcdir)/$$c $(tooldir)/lib/$$c ; \ + done; + +clean mostlyclean: + rm -f *.o *.a + +distclean maintainer-clean realclean: clean + rm -f Makefile config.cache config.log config.status + +.PHONY: info dvi doc install-info clean-info +info doc dvi: +install-info: +clean-info: + +Makefile: Makefile.in config.status @host_makefile_frag_path@ + $(SHELL) config.status + +config.status: configure + $(SHELL) config.status --recheck Index: 16-003.ld =================================================================== --- 16-003.ld (nonexistent) +++ 16-003.ld (revision 816) @@ -0,0 +1,258 @@ +OUTPUT_FORMAT("elf32-mt", "elf32-mt", "elf32-mt") +OUTPUT_ARCH(mt) +ENTRY(__boot_start) + +/* Do we need any of these for elf? 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We + could instead move the label definition inside the section, but + the linker would then create the section even if it turns out to + be empty, which isn't pretty. */ + . = ALIGN(32 / 8); + PROVIDE (__preinit_array_start = .); + .preinit_array : { *(.preinit_array) } >ram + PROVIDE (__preinit_array_end = .); + PROVIDE (__init_array_start = .); + .init_array : { *(.init_array) } >ram + PROVIDE (__init_array_end = .); + PROVIDE (__fini_array_start = .); + .fini_array : { *(.fini_array) } >ram + PROVIDE (__fini_array_end = .); + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } >ram + .dtors : + { + KEEP (*crtbegin*.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } >ram + .jcr : { KEEP (*(.jcr)) } >ram + .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >ram + .dynamic : { *(.dynamic) } >ram + + /* DJK - Re-align the data section from the read-only section. */ + . = ALIGN(16) + (. & (16 - 1)); + PROVIDE (_data = .); + .data : + { + *(.data .data.* .gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + SORT(CONSTRUCTORS) + } >ram + .data1 : { *(.data1) } >ram + .got : { *(.got.plt) *(.got) } >ram + + /* We want the small data sections together, so single-instruction offsets + can access them all, and initialized data all before uninitialized, so + we can shorten the on-disk segment size. */ + .sdata : { *(.sdata .sdata.* .gnu.linkonce.s.*) } >ram + _edata = .; + PROVIDE ( edata = . ); + .sbss : + { + PROVIDE (__sbss_start = .); + PROVIDE (___sbss_start = .); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + PROVIDE (__sbss_end = .); + PROVIDE (___sbss_end = .); + } >ram + .bss : + { + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. 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__stack : 0x007ffff0) : + { + __stack = .; + *(.stack) + LONG(0xdeaddead) + } + /DISCARD/ : { *(.note.GNU-stack) } +} Index: 64-001.ld =================================================================== --- 64-001.ld (nonexistent) +++ 64-001.ld (revision 816) @@ -0,0 +1,282 @@ +OUTPUT_FORMAT("elf32-mt", "elf32-mt", "elf32-mt") +OUTPUT_ARCH(mt) +ENTRY(__boot_start) + +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +MEMORY +{ + rom (rx) : ORIGIN = 0x000000, LENGTH = 8M + frame-buffer (w) : ORIGIN = 0x800000, LENGTH = 64K + ram (w) : ORIGIN = 0xc00000, LENGTH = 4M + dma-ram (w) : ORIGIN = 0x1000000, LENGTH = 16M +} +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + PROVIDE (__executable_start = 0x0); . = 0x0; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rel.init : { *(.rel.init) } + .rela.init : { *(.rela.init) } + .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } + .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } + .rel.fini : { *(.rel.fini) } + .rela.fini : { *(.rela.fini) } + .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } + .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } + .rel.data.rel.ro : { *(.rel.data.rel.ro*) } + .rela.data.rel.ro : { *(.rel.data.rel.ro*) } + .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } + .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } + .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } + .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } + .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } + .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.sdata : { *(.rel.sdata .rel.sdata.* .rel.gnu.linkonce.s.*) } + .rela.sdata : { *(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*) } + .rel.sbss : { *(.rel.sbss .rel.sbss.* .rel.gnu.linkonce.sb.*) } + .rela.sbss : { *(.rela.sbss .rela.sbss.* .rel.gnu.linkonce.sb.*) } + .rel.sdata2 : { *(.rel.sdata2 .rel.sdata2.* .rel.gnu.linkonce.s2.*) } + .rela.sdata2 : { *(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*) } + .rel.sbss2 : { *(.rel.sbss2 .rel.sbss2.* .rel.gnu.linkonce.sb2.*) } + .rela.sbss2 : { *(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*) } + .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } + .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + + .startup : { *startup-64-001.o(.startup) } >rom =0 + + .init : { KEEP (*(.init)) } >rom =0 + .plt : { *(.plt) } >rom + .text : + { + *startup-64-001.o(.text) + *(.text .stub .text.* .gnu.linkonce.t.*) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + } >rom =0 + .fini : + { + KEEP (*(.fini)) + } >rom =0 + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >rom + .rodata1 : { *(.rodata1) } >rom + + /* Data starting here needs to be copied from ROM to the frame buffer. */ + /* Section .sdata2 is used as the beginning marker of the frame buffer + address as well as the start of the data that needs to be copied. */ + .sdata2 : AT (ADDR(.rodata1) + SIZEOF(.rodata1)) + { *(.sdata2 .sdata2.* .gnu.linkonce.s2.*) } >frame-buffer + .sbss2 : AT (LOADADDR(.sdata2) + SIZEOF(.sdata2)) + { *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) } >frame-buffer + .eh_frame_hdr : AT (LOADADDR(.sbss2) + SIZEOF(.sbss2)) + { *(.eh_frame_hdr) } >frame-buffer + .eh_frame : AT (LOADADDR(.eh_frame_hdr) + SIZEOF(.eh_frame_hdr)) + ONLY_IF_RO { KEEP (*(.eh_frame)) } >frame-buffer + .gcc_except_table : AT (LOADADDR(.eh_frame) + SIZEOF(.eh_frame)) + ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >frame-buffer + /* Adjust the address for the data segment. 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We + could instead move the label definition inside the section, but + the linker would then create the section even if it turns out to + be empty, which isn't pretty. */ + . = ALIGN(32 / 8); + PROVIDE (__preinit_array_start = .); + .preinit_array : AT (LOADADDR(.tbss) + SIZEOF(.tbss)) + { *(.preinit_array) } >frame-buffer + PROVIDE (__preinit_array_end = .); + PROVIDE (__init_array_start = .); + .init_array : AT (LOADADDR(.preinit_array) + SIZEOF(.preinit_array)) + { *(.init_array) } >frame-buffer + PROVIDE (__init_array_end = .); + PROVIDE (__fini_array_start = .); + .fini_array : AT (LOADADDR(.init_array) + SIZEOF(.init_array)) + { *(.fini_array) } >frame-buffer + PROVIDE (__fini_array_end = .); + .ctors : AT (LOADADDR(.fini_array) + SIZEOF(.fini_array)) + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin*.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } >frame-buffer + .dtors : AT (LOADADDR(.ctors) + SIZEOF(.ctors)) + { + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } >frame-buffer + .jcr : AT (LOADADDR(.dtors) + SIZEOF(.dtors)) + { KEEP (*(.jcr)) } >frame-buffer + .data.rel.ro : AT (LOADADDR(.jcr) + SIZEOF(.jcr)) + { *(.data.rel.ro.local) *(.data.rel.ro*) } >frame-buffer + .dynamic : AT (LOADADDR(.data.rel.ro) + SIZEOF(.data.rel.ro)) + { *(.dynamic) } >frame-buffer + + /* DJK - Re-align the data section from the read-only section. */ + . = ALIGN(16) + (. & (16 - 1)); + PROVIDE (_data = .); + .data : AT (LOADADDR(.dynamic) + SIZEOF(.dynamic)) + { + *(.data .data.* .gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + SORT(CONSTRUCTORS) + } >frame-buffer + .data1 : AT (LOADADDR(.data) + SIZEOF(.data)) + { *(.data1) } >frame-buffer + .got : AT (LOADADDR(.data1) + SIZEOF(.data1)) + { *(.got.plt) *(.got) } + + /* We want the small data sections together, so single-instruction offsets + can access them all, and initialized data all before uninitialized, so + we can shorten the on-disk segment size. */ + .sdata : AT (LOADADDR(.got) + SIZEOF(.got)) + { *(.sdata .sdata.* .gnu.linkonce.s.*) } >frame-buffer + _edata = .; + PROVIDE ( edata = . ) ; + + _fbdata_start = LOADADDR(.sdata2) ; + _fbdata_end = LOADADDR(.sdata) + SIZEOF(.sdata) - 4 ; + + PROVIDE (__FRAME_BUFFER_START = ADDR(.sdata2)); + PROVIDE (__FRAME_BUFFER_SIZE = 0x10000); + PROVIDE (__FRAME_BUFFER_END = __FRAME_BUFFER_START + __FRAME_BUFFER_SIZE); + + .sbss : AT (LOADADDR(.sdata) + SIZEOF(.sdata)) + { + PROVIDE (__sbss_start = .); + PROVIDE (___sbss_start = .); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + PROVIDE (__sbss_end = .); + PROVIDE (___sbss_end = .); + } >frame-buffer + .bss : AT (LOADADDR(.sbss) + SIZEOF(.sbss)) + { + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. */ + . = ALIGN(32 / 8); + } >frame-buffer + . = ALIGN(32 / 8); + __bss_start = ADDR(.sbss) ; + __bss_end = __bss_start + SIZEOF(.sbss) + SIZEOF(.bss) - 4 ; + _end = .; + PROVIDE (end = .); + + PROVIDE ( _extdata_start = ADDR(.bss) + SIZEOF(.bss)); + .extdata : AT ( LOADADDR(.bss) + SIZEOF(.bss)) + { + *(.extdata) + } >ram + PROVIDE (_extdata_end = _extdata_start + SIZEOF(.extdata) - 4 ); + + .extbss : AT ( LOADADDR(.extdata) + SIZEOF(.extdata)) + { + _extbss_start = .; + *(.extbss); + . = ALIGN(4); + _extbss_end = .; + } >ram + . = ALIGN(4); + + PROVIDE (__EXTERNAL_MEMORY_START = 0xc00000); + + .dma : + { + _dma_start = .; + *(.dma) + _dma_end = .; + } >dma-ram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + + PROVIDE (__stack = 0x80fff0); + + .stack (DEFINED(__stack) ? __stack : 0x7FFFF0) : + { + __stack = .; + *(.stack) + LONG(0xdeaddead) + } + /DISCARD/ : { *(.note.GNU-stack) } +} Index: close.c =================================================================== --- close.c (nonexistent) +++ close.c (revision 816) @@ -0,0 +1,11 @@ +#include <_ansi.h> +#include +#include +#include "trap.h" + + +int +close (int file) +{ + return TRAP0 (SYS_close, file, 0, 0); +}

close.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: startup-64-001.S =================================================================== --- startup-64-001.S (nonexistent) +++ startup-64-001.S (revision 816) @@ -0,0 +1,378 @@ +/* + * $Header: /cvs/src/src/libgloss/mt/startup-64-001.S,v 1.1 2005/12/12 11:16:41 nathan Exp $ + * + * interrupt_vectors.s -- the interrupt handler jump table. + * + * + * There are a total of 32 interrupt vector possible, however, only + * 11 of those are currently used (the others are reserved). The + * order of vectors is as follows: + * + * 1. Boot Vector. Vector for power-on/reset. + * 2. Software Vector. Vector for handling the SI instruction (an + * explicit interrupt caused by software). + * 3. Break Vector. Vector for handling the Break instruction. + * 4. Device 0 Vector. Service vector for device zero. + * 5. Device 1 Vector. Service vector for device one. + * 6. Device 2 Vector. Service vector for device two. + * 7. Device 3 Vector. Service vector for device three. + * 8. Device 4 Vector. Service vector for device four. + * 9. Device 5 Vector. Service vector for device five. + * 10. Device 6 Vector. Service vector for device six. + * 11. Device 7 Vector. Service vector for device seven. + * + * The rest of the interrupt vectors are reserved for future use. + * + * + * Each jump table entry consists of the following two instructions: + * + * jmp Label ; Label as appropriate + * nop ; implemented as or r0,r0,r0 + * + * The following labels are reserved for the vectors named above, + * respectively: + * + * _BOOTIVEC, _SOFTIVEC, _BRKIVEC, _DEV0IVEC, _DEV1IVEC, _DEV2IVEC, + * _DEV3IVEC, _DEV4IVEC, _DEV5IVEC, _DEV6IVEC, _DEV7IVEC + * + * + * 26Sep01 (DJK) The memory map is changed and the device interrupts are + * now memory-mapped. + * + * 10Oct01 (DJK) The memory map is finalized and the first 4K of address + * space is now reserved for memory-mapped I/O devices. + * (There is over 2K unused, reserved space in this area.) + * + * 27Jul02 (DJK) Fixed the address for the interrupt mask register. Old + * documentation stated the port address as 0x140, but + * the implementation uses 0x13c. + * + * 30Jul02 (DJK) Added support for printf. This only supports output to + * stderr and stdout. Using the message box interface, + * a (newly defined) message or series of messages is + * passed to the controller to output bytes as text to + * the debug console. These messages are constructed in + * the interrupt handler for the SI instruction. + * With this implementation, the user is unable to + * utilize the message box interface in applications as + * specialized interrupt handlers for the external + * interrupts are necessary. + * + * + * + * Copyright (c) 2001, 2002, 2003, 2004 Morpho Technologies, Inc. + * + */ + + .section .startup, "a", @progbits + .global __boot_start +_INTERRUPT_VECTOR_TABLE: +__boot_start: + jmp _BOOTIVEC ; Boot vector + or r0, r0, r0 + jmp _SOFTIVEC ; Vector for SI instruction + or r0,r0,r0 + jmp _BRKIVEC ; Vector for Break instruction + or r0,r0,r0 + + + ; This is the memory-mapped I/O region. + + ; Hardware Interrupt Registers + .org 0x100 + .global _DEV0_INTERRUPT_REG +_DEV0_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV1_INTERRUPT_REG +_DEV1_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV2_INTERRUPT_REG +_DEV2_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV3_INTERRUPT_REG +_DEV3_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV4_INTERRUPT_REG +_DEV4_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV5_INTERRUPT_REG +_DEV5_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV6_INTERRUPT_REG +_DEV6_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV7_INTERRUPT_REG +_DEV7_INTERRUPT_REG: + .word 0x00000000 + + ; 60 bytes minus eight registers (four bytes per register) + .fill (60 - 8 * 4) + + .global _INTERRUPT_MASK_REG +_INTERRUPT_MASK_REG: + .word 0x00000000 + + ; 256 bytes minus sixteen registers (four bytes per register) + .fill (256 - 16 * 4) + + + + .org 0x200 + ; MorphoSys Decoder Registers + .global _MS_DEC_AUTO_INCREMENT_REG +_MS_DEC_AUTO_INCREMENT_REG: + .word 0x00000000 + + .global _MS_DEC_SKIP_FACTOR_REG +_MS_DEC_SKIP_FACTOR_REG: + .word 0x00000000 + + .global _MS_DEC_CUSTOM_PERMUTATION_REG +_MS_DEC_CUSTOM_PERMUTATION_REG: + .word 0x00000000 + + .global _MS_DEC_CONTEXT_BASE_REG +_MS_DEC_CONTEXT_BASE_REG: + .word 0x00000000 + + .global _MS_DEC_LOOKUP_TABLE_BASE_REG +_MS_DEC_LOOKUP_TABLE_BASE_REG: + .word 0x00000000 + + .global _MS_CIRCULAR_BUFFER_END_REG +_MS_CIRCULAR_BUFFER_END_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRCULAR_BUFFER_SIZE_REG +_MS_CIRCULAR_BUFFER_SIZE_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BLOCK_END_REG +_MS_DATA_BLOCK_END_REG: + .word 0x00000000 + + .global _MS_DATA_BLOCK_SIZE_REG +_MS_DATA_BLOCK_SIZE_REG: + .word 0x00000000 + + ; 256 bytes minus nine registers (four bytes per register) + .fill (256 - 9 * 4) + + + + .org 0x300 + ; Debug Registers + .global _DEBUG_HALT_REG +_DEBUG_HALT_REG: + .word 0x00000000 + + .global _DEBUG_BREAK_REG +_DEBUG_BREAK_REG: + .word 0x00000000 + + .global _DEBUG_HW_RESERVED0_REG +_DEBUG_HW_RESERVED0_REG: + .word 0x00000000 + + .global _DEBUG_HW_RESERVED1_REG +_DEBUG_HW_RESERVED1_REG: + .word 0x00000000 + + .global _DEBUG_HW_RESERVED2_REG +_DEBUG_HW_RESERVED2_REG: + .word 0x00000000 + + .global _DEBUG_HW_RESERVED3_REG +_DEBUG_HW_RESERVED3_REG: + .word 0x00000000 + + .global _DEBUG_HW_RESERVED4_REG +_DEBUG_HW_RESERVED4_REG: + .word 0x00000000 + + .global _DEBUG_SW_SYSREQ_REG +_DEBUG_SW_SYSREQ_REG: + .word 0x00000000 + + ; 256 bytes minus eight registers (four bytes per register) + .fill (256 - 8 * 4) + + + + .org 0x400 + ; Sequence Generator Registers +_SEQ_GEN_REGS: + .fill 256 + + + + .org 0x500 +_RESERVED_SEQ_GEN_REGS: + .fill 256 + + + + .org 0x600 + .global _TIMER0_VAL_REG +_TIMER0_VAL_REG: + .word 0x00000000 + + .global _TIMER0_CTRL_REG +_TIMER0_CTRL_REG: + .word 0x00000000 + + .global _TIMER1_VAL_REG +_TIMER1_VAL_REG: + .word 0x00000000 + + .global _TIMER1_CTRL_REG +_TIMER1_CTRL_REG: + .word 0x00000000 + + .global _TIMER2_VAL_REG +_TIMER2_VAL_REG: + .word 0x00000000 + + .global _TIMER2_CTRL_REG +_TIMER2_CTRL_REG: + .word 0x00000000 + + ; 256 bytes minus six registers (four bytes per register) + .fill (256 - 6 * 4) + + + + .org 0x700 + .global _OUTPUT0_CONTROL +_OUTPUT0_CONTROL: + .word 0x00000000 + + .global _OUTPUT1_CONTROL +_OUTPUT1_CONTROL: + .word 0x00000000 + + .global _OUTPUT2_CONTROL +_OUTPUT2_CONTROL: + .word 0x00000000 + + .global _OUTPUT3_CONTROL +_OUTPUT3_CONTROL: + .word 0x00000000 + + .global _OUTPUT4_CONTROL +_OUTPUT4_CONTROL: + .word 0x00000000 + + .global _OUTPUT5_CONTROL +_OUTPUT5_CONTROL: + .word 0x00000000 + + .global _OUTPUT6_CONTROL +_OUTPUT6_CONTROL: + .word 0x00000000 + + .global _OUTPUT7_CONTROL +_OUTPUT7_CONTROL: + .word 0x00000000 + + ; 256 bytes minus eight registers (four bytes per register) + .fill (256 - 8 * 4) + + + + .org 0x800 + ; Reserved memory-mapped space. + .fill (0x1000 - 0x800) + + + + .text + + .equ SI_IOPORT_ADR, _DEBUG_SW_SYSREQ_REG + .equ SI_IOPORT_BIT, 0x1 + .equ BRK_IOPORT_ADR, _DEBUG_BREAK_REG + .equ BRK_IOPORT_BIT, 0x1 + + .global _BOOTIVEC +_BOOTIVEC: + + ; Initialize the interrupt controller's interrupt vector registers + ; for devices zero through seven. + ldui r1, #%hi16(_IVEC_DEFAULT) + ori r1, r1, #%lo16(_IVEC_DEFAULT) + stw r1, r0, #%lo16(_DEV0_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV1_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV2_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV3_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV4_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV5_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV6_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV7_INTERRUPT_REG) + + ; Jump to the beginning of the application and enable interrupts. + jmp _start + ei + + + + ; Handler for the SI instruction. To perform a system call, the + ; C model uses a trapping mechanism which executes an SI instruction. + ; The Morpho Technologies simulator simply performs a branch to + ; this vector to simulate the SI instruction (this is as the hardware + ; behaves). In order to trigger the simulator that a system call + ; is needed, a write into the I/O register at address $40005 to + ; set bit #2 (0x4) is necessary. + ; + ; The above address has been changed to 0x31C and the bit number + ; is zero. (The manifest constants have been changed to reflect this.) + ; + .global _SOFTIVEC +_SOFTIVEC: + ; Build a frame to save registers. + subi sp, sp, #$8 + stw r9, sp, #$4 + ldui r9, #%hi16(SI_IOPORT_ADR) + stw r10, sp, #$0 + ori r9, r9, #%lo16(SI_IOPORT_ADR) + ori r10, r0, #SI_IOPORT_BIT + stw r10, r9, #$0 + ; SYS_call is handled by simulator here... + or r0, r0, r0 + ldw r10, sp, #$0 + or r0, r0, r0 + ldw r9, sp, #$4 + reti r14 + addi sp, sp, #$8 + + + + .global _BRKIVEC +_BRKIVEC: + ; Build a frame to save registers. + subi sp, sp, #$8 + stw r9, sp, #$4 + ldui r9, #%hi16(BRK_IOPORT_ADR) + stw r10, sp, #$0 + ori r9, r9, #%lo16(BRK_IOPORT_ADR) + ori r10, r0, #BRK_IOPORT_BIT + stw r10, r9, #$0 + or r0, r0, r0 + ldw r10, sp, #$0 + subi r15, r15, #$4 ; Backup to address of break + ldw r9, sp, #$4 + reti r15 + addi sp, sp, #$8 + + + + .global _IVEC_DEFAULT +_IVEC_DEFAULT: + reti r15 + or r0, r0, r0

startup-64-001.S Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: exit-ms2.c =================================================================== --- exit-ms2.c (nonexistent) +++ exit-ms2.c (revision 816) @@ -0,0 +1,12 @@ +#include <_ansi.h> +#include +#include + + +void _exit (n) +{ + // Set bit #0 in the _DEBUG_HALT_REG to trigger program exit to + // the simulator. (The simulator will return a SIGQUIT signal.) + asm("ori r1, r0, #$1\n"); + asm("stw r1, r0, #$fffff300\n"); +} // exit

exit-ms2.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: exit.c =================================================================== --- exit.c (nonexistent) +++ exit.c (revision 816) @@ -0,0 +1,10 @@ +#include <_ansi.h> +#include +#include +#include "trap.h" + + +void _exit (n) +{ + TRAP0 (SYS_exit, n, 0, 0); +}

exit.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: read.c =================================================================== --- read.c (nonexistent) +++ read.c (revision 816) @@ -0,0 +1,12 @@ +#include <_ansi.h> +#include +#include +#include "trap.h" + + +read (int file, + char *ptr, + size_t len) +{ + return TRAP0 (SYS_read, file, ptr, len); +}

read.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: crt0-16-002.S =================================================================== --- crt0-16-002.S (nonexistent) +++ crt0-16-002.S (revision 816) @@ -0,0 +1,111 @@ +; crt0_2.s - Startup code for the mrisc1. This code initializes the C +; run-time model. +; +; Copyright 2001, 2002, 2003, 2004 Free Software Foundation, Inc. +; +; The authors hereby grant permission to use, copy, modify, distribute, +; and license this software and its documentation for any purpose, provided +; that existing copyright notices are retained in all copies and that this +; notice is included verbatim in any distributions. No written agreement, +; license, or royalty fee is required for any of the authorized uses. +; Modifications to this software may be copyrighted by their authors +; and need not follow the licensing terms described here, provided that +; the new terms are clearly indicated on the first page of each file where +; they apply. +; + + ; Create a label for the start of the eh_frame section. + .section .eh_frame +__eh_frame_begin: + + .text + .global _start +_start: + ;; Initialize the stack pointer + ldui sp, #%hi16(__stack) + addui sp, sp, #%lo16(__stack) + or fp, sp, sp + ;; Zero the bss space + ldui r9, #%hi16(__bss_start) + addui r9, r9, #%lo16(__bss_start) + ldui r10, #%hi16(__bss_end) + addui r10, r10, #%lo16(__bss_end) + or r0, r0, r0 + brle r10, r9, .Lnext1 + or r0, r0, r0 +.Lcpy0: + stw r0, r9, #0 + addi r9, r9, #4 + or r0, r0, r0 ; nop + brle r9, r10, .Lcpy0 + or r0, r0, r0 ; nop + +.Lnext1: + ;; Copy data from ROM to Frame Buffer (on-chip memory) + ldui r9, #%hi16(_fbdata_start) + ori r9, r9, #%lo16(_fbdata_start) + ldui r10, #%hi16(_fbdata_end) + ori r10, r10, #%lo16(_fbdata_end) + ldui r11, #%hi16(_fbdata_vma) + brle r10, r9, .Lnext2 + ori r11, r11, #%lo16(_fbdata_vma) +.Lcpy1: + ldw r5, r9, #$0 + addi r9, r9, #$4 + stw r5, r11, #$0 + brlt r9, r10, .Lcpy1 + addi r11, r11, #$4 + +.Lnext2: + ;; Zero the frame buffer bss section + ldui r9, #%hi16(_fbbss_start) + ori r9, r9, #%lo16(_fbbss_start) + ldui r10, #%hi16(_fbbss_end) + ori r10, r10, #%lo16(_fbbss_end) + or r0, r0, r0 + brle r10, r9, .Lnext3 + or r0, r0, r0 +.Lcpy2: + stw r0, r9, #$0 + addi r9, r9, #$4 + or r0, r0, r0 + brle r9, r10, .Lcpy2 + or r0, r0, r0 + +.Lnext3: + ;; Call global and static constructors + ldui r10, #%hi16(_init) + ori r10, r10, #%lo16(_init) + or r0, r0, r0 ; nop + jal r14, r10 + or r0, r0, r0 ; nop + + ;; Call main + ldui r10, #%hi16(main) + ori r10, r10, #%lo16(main) + or r0, r0, r0 ; nop + jal r14, r10 + or r0, r0, r0 ; nop + + ;; DJK - Added 12Nov01. Pass main's return value to exit. + or r1, r11, r0 + + ;; Jump to exit + ldui r10, #%hi16(exit) + ori r10, r10, #%lo16(exit) + or r0, r0, r0 ; nop + jal r14, r10 + or r0, r0, r0 ; nop + + ;; Exit does not return, however, this code is to catch an + ;; error if it does. Set the processor into sleep mode. + ori r1, r0, #$1 + stw r1, r0, #%lo16(_DEBUG_HALT_REG) + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 +.Lend: + jmp .Lend + or r0, r0, r0

crt0-16-002.S Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: stat.c =================================================================== --- stat.c (nonexistent) +++ stat.c (revision 816) @@ -0,0 +1,12 @@ +#include <_ansi.h> +#include +#include +#include "trap.h" + + +int +stat (const char *path, struct stat *st) + +{ + return TRAP0 (SYS_stat, path, st, 0); +}

stat.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: crt0-16-003.S =================================================================== --- crt0-16-003.S (nonexistent) +++ crt0-16-003.S (revision 816) @@ -0,0 +1,112 @@ +; crt0.s - Startup code for the mrisc1. This code initializes the C +; run-time model. +; +; +; Copyright 2001, 2002, 2003, 2004 Free Software Foundation, Inc. +; +; The authors hereby grant permission to use, copy, modify, distribute, +; and license this software and its documentation for any purpose, provided +; that existing copyright notices are retained in all copies and that this +; notice is included verbatim in any distributions. No written agreement, +; license, or royalty fee is required for any of the authorized uses. +; Modifications to this software may be copyrighted by their authors +; and need not follow the licensing terms described here, provided that +; the new terms are clearly indicated on the first page of each file where +; they apply. +; + + ; Create a label for the start of the eh_frame section. + .section .eh_frame +__eh_frame_begin: + + .text + .global _start +_start: + ;; Initialize the stack pointer + ldui sp, #%hi16(__stack) + addui sp, sp, #%lo16(__stack) + or fp, sp, sp + ;; Zero the bss space + ldui r9, #%hi16(__bss_start) + addui r9, r9, #%lo16(__bss_start) + ldui r10, #%hi16(__bss_end) + addui r10, r10, #%lo16(__bss_end) + or r0, r0, r0 + brle r10, r9, .Lnext1 + or r0, r0, r0 +.Lcpy0: + stw r0, r9, #0 + addi r9, r9, #4 + or r0, r0, r0 ; nop + brle r9, r10, .Lcpy0 + or r0, r0, r0 ; nop + +.Lnext1: + ;; Copy data from ROM to Frame Buffer (on-chip memory) + ldui r9, #%hi16(_fbdata_start) + ori r9, r9, #%lo16(_fbdata_start) + ldui r10, #%hi16(_fbdata_end) + ori r10, r10, #%lo16(_fbdata_end) + ldui r11, #%hi16(_fbdata_vma) + brle r10, r9, .Lnext2 + ori r11, r11, #%lo16(_fbdata_vma) +.Lcpy1: + ldw r5, r9, #$0 + addi r9, r9, #$4 + stw r5, r11, #$0 + brlt r9, r10, .Lcpy1 + addi r11, r11, #$4 + +.Lnext2: + ;; Zero the frame buffer bss section + ldui r9, #%hi16(_fbbss_start) + ori r9, r9, #%lo16(_fbbss_start) + ldui r10, #%hi16(_fbbss_end) + ori r10, r10, #%lo16(_fbbss_end) + or r0, r0, r0 + brle r10, r9, .Lnext3 + or r0, r0, r0 +.Lcpy2: + stw r0, r9, #$0 + addi r9, r9, #$4 + or r0, r0, r0 + brle r9, r10, .Lcpy2 + or r0, r0, r0 + +.Lnext3: + ;; Call global and static constructors + ldui r10, #%hi16(_init) + ori r10, r10, #%lo16(_init) + or r0, r0, r0 ; nop + jal r14, r10 + or r0, r0, r0 ; nop + + ;; Call main + ldui r10, #%hi16(main) + ori r10, r10, #%lo16(main) + or r0, r0, r0 ; nop + jal r14, r10 + or r0, r0, r0 ; nop + + ;; DJK - Added 12Nov01. Pass main's return value to exit. + or r1, r11, r0 + + ;; Jump to exit + ldui r10, #%hi16(exit) + ori r10, r10, #%lo16(exit) + or r0, r0, r0 ; nop + jal r14, r10 + or r0, r0, r0 ; nop + + ;; Exit does not return, however, this code is to catch an + ;; error if it does. Set the processor into sleep mode. + ori r1, r0, #$1 + stw r1, r0, #%lo16(_DEBUG_HALT_REG) + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 +.Lend: + jmp .Lend + or r0, r0, r0

crt0-16-003.S Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: getpid.c =================================================================== --- getpid.c (nonexistent) +++ getpid.c (revision 816) @@ -0,0 +1,10 @@ +#include <_ansi.h> +#include +#include +#include "trap.h" + + +getpid (n) +{ + return 1; +}

getpid.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: utime.c =================================================================== --- utime.c (nonexistent) +++ utime.c (revision 816) @@ -0,0 +1,13 @@ +#include <_ansi.h> +#include +#include +#include "trap.h" + + +int +utime (path, times) + const char *path; + char *times; +{ + return TRAP0 (SYS_utime, path, times, 0); +}

utime.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: trap.S =================================================================== --- trap.S (nonexistent) +++ trap.S (revision 816) @@ -0,0 +1,34 @@ +;; +;; The errno will be in r5 if r11 is -1. +;; + .text + .global __trap0 +__trap0: + ;; non-leaf function so need to create stack frame to + ;; store ra and fp + subi sp, sp, #16 + stw ra, sp, #12 + or r0, r0, r0 ;; nop + stw fp, sp, #8 + or fp, sp, sp + stw r5, sp, #4 + or r0, r0, r0 ;; nop + stw r6, sp, #0 + addi r6, r0, #$-1 + si r14 + or r0, r0, r0 ;; nop + brne r11, r6, .L0 + ldui r6, #%hi16(errno) + addui r6, r6, #%lo16(errno) + stw r5, r6, #0 + or r0, r0, r0 ;; nop +.L0: + ldw r6, sp, #0 + or r0, r0, r0 ;; nop + ldw r5, sp, #4 + or r0, r0, r0 ;; nop + ldw ra, sp, #12 + or r0, r0, r0 ;; nop + ldw fp, sp, #8 + jal r0, r14 + addi sp, sp, #16

trap.S Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: crt0-ms2.S =================================================================== --- crt0-ms2.S (nonexistent) +++ crt0-ms2.S (revision 816) @@ -0,0 +1,121 @@ +; crt0.s - Startup code for the ms2. This code initializes the C +; run-time model. +; +; +; Copyright 2001, 2002, 2003, 2004 Morpho Technologies +; + + ; Create a label for the start of the eh_frame section. + .section .eh_frame +__eh_frame_begin: + + .text + .global _start +_start: + ;; Initialize the stack pointer + ldui sp, #%hi16(__stack) + addui sp, sp, #%lo16(__stack) + or fp, sp, sp + ;; Zero the bss space + ldui r9, #%hi16(__bss_start) + addui r9, r9, #%lo16(__bss_start) + ldui r10, #%hi16(__bss_end) + addui r10, r10, #%lo16(__bss_end) + or r0, r0, r0 + brle r10, r9, .Lnext1 + or r0, r0, r0 +.Lcpy0: + stw r0, r9, #0 + addi r9, r9, #4 + or r0, r0, r0 ; nop + brle r9, r10, .Lcpy0 + or r0, r0, r0 ; nop + +.Lnext1: + ;; Copy data from ROM to Frame Buffer (on-chip memory) + ldui r9, #%hi16(_fbdata_start) + ori r9, r9, #%lo16(_fbdata_start) + ldui r10, #%hi16(_fbdata_end) + ori r10, r10, #%lo16(_fbdata_end) + ldui r11, #%hi16(_fbdata_vma) + brle r10, r9, .Lnext2 + ori r11, r11, #%lo16(_fbdata_vma) +.Lcpy1: + ldw r5, r9, #$0 + addi r9, r9, #$4 + stw r5, r11, #$0 + brlt r9, r10, .Lcpy1 + addi r11, r11, #$4 + +.Lnext2: + ;; Zero the frame buffer bss section + ldui r9, #%hi16(_fbbss_start) + ori r9, r9, #%lo16(_fbbss_start) + ldui r10, #%hi16(_fbbss_end) + ori r10, r10, #%lo16(_fbbss_end) + or r0, r0, r0 + brle r10, r9, .Lnext3 + or r0, r0, r0 +.Lcpy2: + stw r0, r9, #$0 + addi r9, r9, #$4 + or r0, r0, r0 + brle r9, r10, .Lcpy2 + or r0, r0, r0 + +.Lnext3: + ;; Copy data from ROM to SRAM (another on-chip memory) + ldui r9, #%hi16(_sram_data_start) + ori r9, r9, #%lo16(_sram_data_start) + ldui r10, #%hi16(_sram_data_end) + ori r10, r10, #%lo16(_sram_data_end) + ldui r11, #%hi16(_sram_data_vma) + brle r10, r9, .Lnext4 + ori r11, r11, #%lo16(_sram_data_vma) +.Lcpy3: + ldw r5, r9, #$0 + addi r9, r9, #$4 + stw r5, r11, #$0 + brlt r9, r10, .Lcpy3 + addi r11, r11, #$4 + +.Lnext4: + ;; Call global and static constructors + ldui r10, #%hi16(_init) + ori r10, r10, #%lo16(_init) + or r0, r0, r0 ; nop + or r0, r0, r0 ; nop, added 06Sep05 + jal r14, r10 + or r0, r0, r0 ; nop + + ;; Call main + ldui r10, #%hi16(main) + ori r10, r10, #%lo16(main) + or r0, r0, r0 ; nop + or r0, r0, r0 ; nop, added 06Sep05 + jal r14, r10 + or r0, r0, r0 ; nop + + ;; DJK - Added 12Nov01. Pass main's return value to exit. + or r1, r11, r0 + + ;; Jump to exit + ldui r10, #%hi16(exit) + ori r10, r10, #%lo16(exit) + or r0, r0, r0 ; nop + or r0, r0, r0 ; nop, added 06Sep05 + jal r14, r10 + or r0, r0, r0 ; nop + + ;; Exit does not return, however, this code is to catch an + ;; error if it does. Set the processor into sleep mode. + ori r1, r0, #$1 + stw r1, r0, #%lo16(_DEBUG_HALT_REG) + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 +.Lend: + jmp .Lend + or r0, r0, r0

crt0-ms2.S Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: crt0.S =================================================================== --- crt0.S (nonexistent) +++ crt0.S (revision 816) @@ -0,0 +1,63 @@ +# Startup Code for the Morpho mt + +# Create a label for the start of the eh_frame section. + .section .eh_frame +__eh_frame_begin: + + .section .text + .global _start +_start: + + ;; Initialise the stack pointer + ldui sp, #%hi16(__stack) + addui sp, sp, #%lo16(__stack) + or fp, sp, sp + + ;; Zero the data space + ldui r9, #%hi16(_edata) + addui r9, r9, #%lo16(_edata) + ldui r10, #%hi16(_end) + addui r10, r10, #%lo16(_end) + addi r5, r0, #0 + +.L0: + stw r5, r9, #0 + addi r9, r9, #4 + or r0, r0, r0 ; nop + brle r9, r10, .L0 + or r0, r0, r0 ; nop + + ;; Call global and static constructors + ldui r10, #%hi16(_init) + addui r10, r10, #%lo16(_init) + or r0, r0, r0 ; nop + jal r14, r10 + or r0, r0, r0 ; nop + ;; Setup destructors to be called from exit. + ;; (Just in case main never returns....) + ldui r10, #%hi16(atexit) + addui r10, r10, #%lo16(atexit) + ldui r1, #%hi16(_fini) + addui r1, r1, #%lo16(_fini) + or r0, r0, r0 ; nop + jal r14, r10 + or r0, r0, r0 ; nop + + ;; Initialise argc, argv and envp to empty + addi r1, r0, #0 + addi r2, r0, #0 + addi r3, r0, #0 + + ;; Call main + ldui r10, #%hi16(main) + addui r10, r10, #%lo16(main) + or r0, r0, r0 ; nop + jal r14, r10 + or r0, r0, r0 ; nop + + ;; Jump to exit + ldui r10, #%hi16(exit) + addui r10, r10, #%lo16(exit) + or r0, r0, r0 ; nop + jal r14, r10 + or r0, r0, r0 ; nop

crt0.S Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: kill.c =================================================================== --- kill.c (nonexistent) +++ kill.c (revision 816) @@ -0,0 +1,11 @@ +#include <_ansi.h> +#include +#include +#include "trap.h" + + +kill (n, m) +{ + return TRAP0 (SYS_exit, 0xdead, 0, 0); +} +

kill.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: exit-16-002.c =================================================================== --- exit-16-002.c (nonexistent) +++ exit-16-002.c (revision 816) @@ -0,0 +1,12 @@ +#include <_ansi.h> +#include +#include + + +void _exit (n) +{ + /* Set bit #0 in the _DEBUG_HALT_REG to trigger program exit to + the simulator. (The simulator will return a SIGQUIT signal.) */ + asm("ori r1, r0, #$1\n"); + asm("stw r1, r0, #$fffff300\n"); +}

exit-16-002.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: exit-16-003.c =================================================================== --- exit-16-003.c (nonexistent) +++ exit-16-003.c (revision 816) @@ -0,0 +1,12 @@ +#include <_ansi.h> +#include +#include + + +void _exit (n) +{ + /* Set bit #0 in the _DEBUG_HALT_REG to trigger program exit to + the simulator. (The simulator will return a SIGQUIT signal.) */ + asm("ori r1, r0, #$1\n"); + asm("stw r1, r0, #$fffff300\n"); +}

exit-16-003.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: time.c =================================================================== --- time.c (nonexistent) +++ time.c (revision 816) @@ -0,0 +1,11 @@ +#include <_ansi.h> +#include +#include +#include "trap.h" + + +time_t +time (time_t *tloc) +{ + return TRAP0 (SYS_time, tloc, 0, 0); +}

time.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: access.c =================================================================== --- access.c (nonexistent) +++ access.c (revision 816) @@ -0,0 +1,33 @@ +/* This is file ACCESS.C */ +/* + * Copyright (C) 1993 DJ Delorie + * All rights reserved. + * + * Redistribution and use in source and binary forms is permitted + * provided that the above copyright notice and following paragraph are + * duplicated in all such forms. + * + * This file is distributed WITHOUT ANY WARRANTY; without even the implied + * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + */ + +#include +#include +#include + +int access(const char *fn, int flags) +{ + struct stat s; + if (stat(fn, &s)) + return -1; + if (s.st_mode & S_IFDIR) + return 0; + if (flags & W_OK) + { + if (s.st_mode & S_IWRITE) + return 0; + return -1; + } + return 0; +} +

access.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: sbrk.c =================================================================== --- sbrk.c (nonexistent) +++ sbrk.c (revision 816) @@ -0,0 +1,24 @@ +#include <_ansi.h> +#include +#include +#include "trap.h" + + +caddr_t +sbrk (size_t incr) +{ + extern char end; /* Defined by the linker */ + static char *heap_end; + char *prev_heap_end; + + char *sp = (char *) &sp; + + if (heap_end == 0) + { + heap_end = &end; + } + prev_heap_end = heap_end; + heap_end += incr; + + return (caddr_t) prev_heap_end; +}

sbrk.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: 16-002.ld =================================================================== --- 16-002.ld (nonexistent) +++ 16-002.ld (revision 816) @@ -0,0 +1,248 @@ +OUTPUT_FORMAT("elf32-mt", "elf32-mt", "elf32-mt") +OUTPUT_ARCH(mt) +ENTRY(__boot_start) + +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +MEMORY +{ + ram (rwx) : ORIGIN = 0x0, LENGTH = 128K + frame-buffer (w) : ORIGIN = 0xde0000, LENGTH = 40K + ports (w) : ORIGIN = 0xfff000, LENGTH = 4K + dma-ram (w) : ORIGIN = 0x1000000, LENGTH = 16M-4K +} +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = 0x0; + PROVIDE(__executable_start = 0x0); + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rel.init : { *(.rel.init) } + .rela.init : { *(.rela.init) } + .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } + .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } + .rel.fini : { *(.rel.fini) } + .rela.fini : { *(.rela.fini) } + .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } + .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } + .rel.data.rel.ro : { *(.rel.data.rel.ro*) } + .rela.data.rel.ro : { *(.rela.data.rel.ro*) } + .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } + .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } + .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } + .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } + .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } + .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.sdata : { *(.rel.sdata .rel.sdata.* .rel.gnu.linkonce.s.*) } + .rela.sdata : { *(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*) } + .rel.sbss : { *(.rel.sbss .rel.sbss.* .rel.gnu.linkonce.sb.*) } + .rela.sbss : { *(.rela.sbss .rela.sbss.* .rel.gnu.linkonce.sb.*) } + .rel.sdata2 : { *(.rel.sdata2 .rel.sdata2.* .rel.gnu.linkonce.s2.*) } + .rela.sdata2 : { *(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*) } + .rel.sbss2 : { *(.rel.sbss2 .rel.sbss2.* .rel.gnu.linkonce.sb2.*) } + .rela.sbss2 : { *(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*) } + .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } + .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + + .startup : { *startup-16-002.o(.startup) } >ram =0 + . = 0x40 ; + + .init : { KEEP (*(.init)) } >ram =0 + .plt : { *(.plt) } >ram + .text : + { + *startup-16-002.o(.text) + *(.text .stub .text.* .gnu.linkonce.t.*) + KEEP (*(.text.*personality*)) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + } >ram =0 + .fini : { KEEP (*(.fini)) } >ram =0 + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >ram + .rodata1 : { *(.rodata1) } >ram + .sdata2 : { *(.sdata2 .sdata2.* .gnu.linkonce.s2.*) } >ram + .sbss2 : { *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) } >ram + .eh_frame_hdr : { *(.eh_frame_hdr) } >ram + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >ram + .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >ram + /* Adjust the address for the data segment. We want to adjust up to + the same address within the page on the next page up. */ + . = ALIGN(256) + (. & (256 - 1)); + /* Exception handling */ + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >ram + .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >ram + /* Thread Local Storage sections */ + .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >ram + .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >ram + /* Ensure the __preinit_array_start label is properly aligned. We + could instead move the label definition inside the section, but + the linker would then create the section even if it turns out to + be empty, which isn't pretty. */ + . = ALIGN(32 / 8); + PROVIDE (__preinit_array_start = .); + .preinit_array : { *(.preinit_array) } >ram + PROVIDE (__preinit_array_end = .); + PROVIDE (__init_array_start = .); + .init_array : { *(.init_array) } >ram + PROVIDE (__init_array_end = .); + PROVIDE (__fini_array_start = .); + .fini_array : { *(.fini_array) } >ram + PROVIDE (__fini_array_end = .); + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } >ram + .dtors : + { + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } >ram + .jcr : { KEEP (*(.jcr)) } >ram + .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >ram + .dynamic : { *(.dynamic) } >ram + + /* DJK - Re-align the data section from the read-only section. */ + . = ALIGN(16) + (. & (16 - 1)); + PROVIDE (_data = .); + .data : + { + *(.data .data.* .gnu.linkonce.d.*) + SORT(CONSTRUCTORS) + } >ram + .data1 : { *(.data1) } >ram + .got : { *(.got.plt) *(.got) } >ram + + /* We want the small data sections together, so single-instruction offsets + can access them all, and initialized data all before uninitialized, so + we can shorten the on-disk segment size. */ + .sdata : { *(.sdata .sdata.* .gnu.linkonce.s.*) } >ram + _edata = .; + PROVIDE ( edata = . ) ; + .sbss : + { + PROVIDE (__sbss_start = .); + PROVIDE (___sbss_start = .); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + PROVIDE (__sbss_end = .); + PROVIDE (___sbss_end = .); + } >ram + .bss : + { + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. */ + . = ALIGN(32 / 8); + } >ram + . = ALIGN(32 / 8); + __bss_start = ADDR ( .sbss ) ; + __bss_end = __bss_start + SIZEOF ( .sbss ) + SIZEOF ( .bss ) - 4 ; + _end = .; + PROVIDE (end = .); + + /* DJK - Initialized frame buffer data is copied from RAM to FB. */ + .auxbss : AT (ADDR(.bss) + SIZEOF(.bss)) { *(.auxbss) } >frame-buffer + .auxdata : AT (LOADADDR(.auxbss) + SIZEOF(.auxbss)) + { + *(.auxdata) + } >frame-buffer + + _fbbss_start = ADDR ( .auxbss ); + _fbbss_end = _fbbss_start + SIZEOF ( .auxbss ) - 4; + _fbdata_start = LOADADDR ( .auxdata ); + _fbdata_end = _fbdata_start + SIZEOF ( .auxdata ) ; + _fbdata_vma = ADDR ( .auxdata ); + + PROVIDE (__FRAME_BUFFER_START = ADDR(.auxbss) ); + PROVIDE (__FRAME_BUFFER_SIZE = 0xa000); + PROVIDE (__FRAME_BUFFER_END = __FRAME_BUFFER_START + __FRAME_BUFFER_SIZE); + + .dma : { _dma_start = .; *(.dma) _dma_end = .; } >dma-ram + .internal_io (NOLOAD) : { *(.internal_io) } >ports + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /* In a multi-core environment, each core is given its own stack space + equal to __stack_size. */ + PROVIDE (__stack = 0x1fff0); + PROVIDE (__stack_size = 0x800); + + .stack (DEFINED(__stack) ? __stack : 0x007ffff0) : + { + __stack = .; + *(.stack) + LONG(0xdeaddead) + } + /DISCARD/ : { *(.note.GNU-stack) } +} Index: lseek.c =================================================================== --- lseek.c (nonexistent) +++ lseek.c (revision 816) @@ -0,0 +1,14 @@ +#include <_ansi.h> +#include +#include +#include +#include "trap.h" + + +off_t +lseek (int file, + off_t ptr, + int dir) +{ + return TRAP0 (SYS_lseek, file, ptr, dir); +}

lseek.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: configure.in =================================================================== --- configure.in (nonexistent) +++ configure.in (revision 816) @@ -0,0 +1,55 @@ +dnl Process this file with autoconf to produce a configure script. +AC_PREREQ(2.59) +AC_INIT(crt0.S) + +if test "${enable_shared}" = "yes" ; then + echo "Shared libraries not supported for cross compiling, ignored" +fi + +if test "$srcdir" = "." ; then + if test "${with_target_subdir}" != "." ; then + libgloss_topdir="${srcdir}/${with_multisrctop}../../.." + else + libgloss_topdir="${srcdir}/${with_multisrctop}../.." + fi +else + libgloss_topdir="${srcdir}/../.." +fi +AC_CONFIG_AUX_DIR($libgloss_topdir) + +AC_CANONICAL_SYSTEM +AC_ARG_PROGRAM + +AC_PROG_INSTALL + +LIB_AC_PROG_CC + +AS=${AS-as} +AC_SUBST(AS) +AR=${AR-ar} +AC_SUBST(AR) +LD=${LD-ld} +AC_SUBST(LD) +AC_PROG_RANLIB +LIB_AM_PROG_AS + +host_makefile_frag=${srcdir}/../config/default.mh + +dnl We have to assign the same value to other variables because autoconf +dnl doesn't provide a mechanism to substitute a replacement keyword with +dnl arbitrary data or pathnames. +dnl +host_makefile_frag_path=$host_makefile_frag +AC_SUBST(host_makefile_frag_path) +AC_SUBST_FILE(host_makefile_frag) + +AC_CONFIG_FILES(Makefile, +. ${libgloss_topdir}/config-ml.in, +srcdir=${srcdir} +target=${target} +with_multisubdir=${with_multisubdir} +ac_configure_args="${ac_configure_args} --enable-multilib" +CONFIG_SHELL=${CONFIG_SHELL-/bin/sh} +libgloss_topdir=${libgloss_topdir} +) +AC_OUTPUT

configure.in Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: startup-16-002.S =================================================================== --- startup-16-002.S (nonexistent) +++ startup-16-002.S (revision 816) @@ -0,0 +1,628 @@ +/* + * interrupt_vectors.s -- the interrupt handler jump table. + * + * + * There are a total of 32 interrupt vector possible, however, only + * 11 of those are currently used (the others are reserved). The + * order of vectors is as follows: + * + * 1. Boot Vector. Vector for power-on/reset. + * 2. Software Vector. Vector for handling the SI instruction (an + * explicit interrupt caused by software). + * 3. Break Vector. Vector for handling the Break instruction. + * 4. Device 0 Vector. Service vector for device zero. + * 5. Device 1 Vector. Service vector for device one. + * 6. Device 2 Vector. Service vector for device two. + * 7. Device 3 Vector. Service vector for device three. + * 8. Device 4 Vector. Service vector for device four. + * 9. Device 5 Vector. Service vector for device five. + * 10. Device 6 Vector. Service vector for device six. + * 11. Device 7 Vector. Service vector for device seven. + * + * The rest of the interrupt vectors are reserved for future use. + * + * + * Each jump table entry consists of the following two instructions: + * + * jmp Label ; Label as appropriate + * nop ; implemented as or r0,r0,r0 + * + * The following labels are reserved for the vectors named above, + * respectively: + * + * _BOOTIVEC, _SOFTIVEC, _BRKIVEC, _DEV0IVEC, _DEV1IVEC, _DEV2IVEC, + * _DEV3IVEC, _DEV4IVEC, _DEV5IVEC, _DEV6IVEC, _DEV7IVEC + * + * + * + * Copyright (c) 2001, 2002, 2003, 2004 Morpho Technologies + * + */ + + .section .startup, "a", @progbits + .global __boot_start +__boot_start: +_INTERRUPT_VECTOR_TABLE: + jmp _BOOTIVEC ; Boot vector + or r0, r0, r0 + jmp _SOFTIVEC ; Vector for SI instruction + or r0,r0,r0 + jmp _BRKIVEC ; Vector for Break instruction + or r0,r0,r0 + ; The illegal instruction trap is not implemented. +_RESERVED1_IVEC: + jmp _RESERVED1_IVEC ; Vector for illegal instruction + or r0,r0,r0 + jmp _OVFIVEC ; Vector for overflow exception + or r0,r0,r0 +_RESERVED2_IVEC: + jmp _RESERVED2_IVEC + or r0,r0,r0 +_RESERVED3_IVEC: + jmp _RESERVED3_IVEC + or r0,r0,r0 +_RESERVED4_IVEC: + jmp _RESERVED4_IVEC + or r0,r0,r0 + + .text + + .equ SI_IOPORT_ADR, _DEBUG_SW_SYSREQ_REG + .equ SI_IOPORT_BIT, 0x1 + .equ BRK_IOPORT_ADR, _DEBUG_BREAK_REG + .equ BRK_IOPORT_BIT, 0x1 + + .global _BOOTIVEC +_BOOTIVEC: + ; Initialize the interrupt controller's interrupt vector registers + ldui r1, #%hi16(_IVEC_DEFAULT) + ori r1, r1, #%lo16(_IVEC_DEFAULT) + stw r1, r0, #%lo16(_DEV0_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV1_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV2_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV3_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV4_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV5_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV6_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV7_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV8_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV9_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV10_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV11_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV12_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV13_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV14_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV15_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV16_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV17_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV18_INTERRUPT_REG) + + ; Statically initialized data must be copied from ROM to RAM. + ; This is done in the C run-time start-up code (crt0.o). + + ; Jump to the beginning of the application and enable interrupts. + jmp _start + ei + + + + ; Handler for the SI instruction. To perform a system call, the + ; C model uses a trapping mechanism which executes an SI instruction. + ; The Morpho Technologies simulator simply performs a branch to + ; this vector to simulate the SI instruction (this is as the hardware + ; behaves). In order to trigger the simulator that a system call + ; is needed a write into the I/O register at address $40005 to + ; set bit #2 (0x4) is necessary. + ; + ; The above address has been changed to 0x00031C and the bit number + ; is zero. (The manifest constants have been changed to reflect this.) + .global _SOFTIVEC +_SOFTIVEC: + ; Build a frame to save registers. + subi sp, sp, #$8 + stw r9, sp, #$4 + ldui r9, #%hi16(SI_IOPORT_ADR) + stw r10, sp, #$0 + ori r9, r9, #%lo16(SI_IOPORT_ADR) + ori r10, r0, #SI_IOPORT_BIT + stw r10, r9, #$0 + or r0, r0, r0 ; SYS_call is handled by simulator here... + ldw r10, sp, #$0 + or r0, r0, r0 + ldw r9, sp, #$4 + reti r14 + addi sp, sp, #$8 + + + + ; Handler for BREAK instruction. This handler triggers the simulator + ; to send a SIGTRAP signal to gdb by writing to the I/O register at + ; address $40005, setting bit #0 (0x1). + ; + ; The above address has been changed to 0x000304 and the bit number + ; is zero. (The manifest constants have been changed to reflect this.) + .global _BRKIVEC +_BRKIVEC: + ; Build a frame to save registers. + subi sp, sp, #$8 + stw r9, sp, #$4 + ldui r9, #%hi16(BRK_IOPORT_ADR) + stw r10, sp, #$0 + ori r9, r9, #%lo16(BRK_IOPORT_ADR) + ori r10, r0, #BRK_IOPORT_BIT + stw r10, r9, #$0 + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 + ldw r10, sp, #$0 + ldw r9, sp, #$4 + reti r15 + addi sp, sp, #$8 + + + ; The documentation is lacking in the specification of the Overflow + ; Exception generation. The address of the instruction causing the + ; overflow is placed into R15 and the overflow exception interrupt + ; is triggered. So, to continue execution, return to the address + ; of the next instruction (i.e., R15 + one instruction). +_OVFIVEC: + addi r15, r15, #$4 + or r0, r0, r0 + reti r15 + or r0, r0, r0 + + + .global _IVEC_DEFAULT +_IVEC_DEFAULT: + reti r15 + or r0, r0, r0 + + + .section .internal_io, "a", @nobits + .fill 256 ; Fill the first page. + + ; This is the memory-mapped I/O region. + + ; Hardware Interrupt Registers + ;.org 0xfff100 + .global _DEV0_INTERRUPT_REG +_DEV0_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV1_INTERRUPT_REG +_DEV1_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV2_INTERRUPT_REG +_DEV2_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV3_INTERRUPT_REG +_DEV3_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV4_INTERRUPT_REG +_DEV4_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV5_INTERRUPT_REG +_DEV5_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV6_INTERRUPT_REG +_DEV6_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV7_INTERRUPT_REG +_DEV7_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV8_INTERRUPT_REG +_DEV8_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV9_INTERRUPT_REG +_DEV9_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV10_INTERRUPT_REG +_DEV10_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV11_INTERRUPT_REG +_DEV11_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV12_INTERRUPT_REG +_DEV12_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV13_INTERRUPT_REG +_DEV13_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV14_INTERRUPT_REG +_DEV14_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV15_INTERRUPT_REG +_DEV15_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV16_INTERRUPT_REG +_DEV16_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV17_INTERRUPT_REG +_DEV17_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV18_INTERRUPT_REG +_DEV18_INTERRUPT_REG: + .word 0x00000000 + + ; 128 bytes minus ten registers (four bytes per register) + .fill (128 - 19 * 4) + + .global _INTERRUPT_MASK_REG +_INTERRUPT_MASK_REG: + .word 0x00000000 + + ; 128 bytes minus one register (four bytes per register) + .fill (128 - 1 * 4) + + + ;.org 0xfff200 + ; MorphoSys Decoder Registers + .global _MS_DEC_CIRC_BUFF_SEL_REG +_MS_DEC_CIRC_BUFF_SEL_REG: + .word 0x00000000 + + .global _MS_DEC_SKIP_FACTOR_REG +_MS_DEC_SKIP_FACTOR_REG: + .word 0x00000000 + + .global _MS_DEC_CUSTOM_PERM_REG +_MS_DEC_CUSTOM_PERM_REG: + .word 0x00000000 + + .global _MS_DEC_CTXT_BASE_REG +_MS_DEC_CTXT_BASE_REG: + .word 0x00000000 + + .global _MS_DEC_LOOKUP_TBL_REG +_MS_DEC_LOOKUP_TBL_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF0_END_REG +_MS_CIRC_BUFF0_END_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF0_SIZE_REG +_MS_CIRC_BUFF0_SIZE_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BLK0_END_REG +_MS_DATA_BLK0_END_REG: + .word 0x00000000 + + .global _MS_DATA_BLK0_SIZE_REG +_MS_DATA_BLK0_SIZE_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF1_END_REG +_MS_CIRC_BUFF1_END_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF1_SIZE_REG +_MS_CIRC_BUFF1_SIZE_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BLK1_END_REG +_MS_DATA_BLK1_END_REG: + .word 0x00000000 + + .global _MS_DATA_BLK1_SIZE_REG +_MS_DATA_BLK1_SIZE_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF2_END_REG +_MS_CIRC_BUFF2_END_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF2_SIZE_REG +_MS_CIRC_BUFF2_SIZE_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BLK2_END_REG +_MS_DATA_BLK2_END_REG: + .word 0x00000000 + + .global _MS_DATA_BLK2_SIZE_REG +_MS_DATA_BLK2_SIZE_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF3_END_REG +_MS_CIRC_BUFF3_END_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF3_SIZE_REG +_MS_CIRC_BUFF3_SIZE_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BLK3_END_REG +_MS_DATA_BLK3_END_REG: + .word 0x00000000 + + .global _MS_DATA_BLK3_SIZE_REG +_MS_DATA_BLK3_SIZE_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF4_END_REG +_MS_CIRC_BUFF4_END_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF4_SIZE_REG +_MS_CIRC_BUFF4_SIZE_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BLK4_END_REG +_MS_DATA_BLK4_END_REG: + .word 0x00000000 + + .global _MS_DATA_BLK4_SIZE_REG +_MS_DATA_BLK4_SIZE_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF5_END_REG +_MS_CIRC_BUFF5_END_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF5_SIZE_REG +_MS_CIRC_BUFF5_SIZE_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BLK5_END_REG +_MS_DATA_BLK5_END_REG: + .word 0x00000000 + + .global _MS_DATA_BLK5_SIZE_REG +_MS_DATA_BLK5_SIZE_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF6_END_REG +_MS_CIRC_BUFF6_END_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF6_SIZE_REG +_MS_CIRC_BUFF6_SIZE_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BLK6_END_REG +_MS_DATA_BLK6_END_REG: + .word 0x00000000 + + .global _MS_DATA_BLK6_SIZE_REG +_MS_DATA_BLK6_SIZE_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF7_END_REG +_MS_CIRC_BUFF7_END_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF7_SIZE_REG +_MS_CIRC_BUFF7_SIZE_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BLK7_END_REG +_MS_DATA_BLK7_END_REG: + .word 0x00000000 + + .global _MS_DATA_BLK7_SIZE_REG +_MS_DATA_BLK7_SIZE_REG: + .word 0x00000000 + + .global _MS_DEC_AUTO_INC0_REG +_MS_DEC_AUTO_INC0_REG: + .word 0x00000000 + + .global _MS_DEC_AUTO_INC1_REG +_MS_DEC_AUTO_INC1_REG: + .word 0x00000000 + + .global _MS_DEC_AUTO_INC2_REG +_MS_DEC_AUTO_INC2_REG: + .word 0x00000000 + + .global _MS_DEC_AUTO_INC3_REG +_MS_DEC_AUTO_INC3_REG: + .word 0x00000000 + + .global _MS_DEC_AUTO_INC4_REG +_MS_DEC_AUTO_INC4_REG: + .word 0x00000000 + + .global _MS_DEC_AUTO_INC5_REG +_MS_DEC_AUTO_INC5_REG: + .word 0x00000000 + + .global _MS_DEC_AUTO_INC6_REG +_MS_DEC_AUTO_INC6_REG: + .word 0x00000000 + + .global _MS_DEC_AUTO_INC7_REG +_MS_DEC_AUTO_INC7_REG: + .word 0x00000000 + + + ; 256 bytes minus forty-five registers (four bytes per register) + .fill (256 - 45 * 4) + + + + ;.org 0xfff300 + ; Debug Registers + .global _DEBUG_HALT_REG +_DEBUG_HALT_REG: + .word 0x00000000 + + .global _DEBUG_BREAK_REG +_DEBUG_BREAK_REG: + .word 0x00000000 + + ; There are five reserved registers. + .fill (5 * 4) + + .global _DEBUG_SW_SYSREQ_REG +_DEBUG_SW_SYSREQ_REG: + .word 0x00000000 + + ; 256 bytes minus eight registers (four bytes per register) + .fill (256 - 8 * 4) + + + + ;.org 0xfff400 + ; Sequence Generator Registers + .global _SEQ_GEN_CTRL_REG +_SEQ_GEN_CTRL_REG: + .word 0x00000000 + + .global _SEQ_GEN_MASK_REGS +_SEQ_GEN_MASK_REGS: + ; The mask registers consume two pages (less one control register). + ; 512 bytes minus one register (four bytes per register). + .fill (256 + 256 - 1 * 4) + + + + ;.org 0xfff600 + ; Timer Registers + .global _TIMER0_VAL_REG +_TIMER0_VAL_REG: + .word 0x00000000 + + .global _TIMER1_VAL_REG +_TIMER1_VAL_REG: + .word 0x00000000 + + .global _TIMER2_VAL_REG +_TIMER2_VAL_REG: + .word 0x00000000 + + .global _TIMER3_VAL_REG +_TIMER3_VAL_REG: + .word 0x00000000 + + ; 256 bytes minus four registers (four bytes per register) + .fill (256 - 4 * 4) + + + + ;.org 0xfff700 + ; Output Line Control Registers + .global _OUTPUT0_CTRL +_OUTPUT0_CTRL: + .word 0x00000000 + + .global _OUTPUT1_CTRL +_OUTPUT1_CTRL: + .word 0x00000000 + + .global _OUTPUT2_CTRL +_OUTPUT2_CTRL: + .word 0x00000000 + + .global _OUTPUT3_CTRL +_OUTPUT3_CTRL: + .word 0x00000000 + + .global _OUTPUT4_CTRL +_OUTPUT4_CTRL: + .word 0x00000000 + + .global _OUTPUT5_CTRL +_OUTPUT5_CTRL: + .word 0x00000000 + + .global _OUTPUT6_CTRL +_OUTPUT6_CTRL: + .word 0x00000000 + + .global _OUTPUT7_CTRL +_OUTPUT7_CTRL: + .word 0x00000000 + + .global _OUTPUT8_CTRL +_OUTPUT8_CTRL: + .word 0x00000000 + + .global _OUTPUT9_CTRL +_OUTPUT9_CTRL: + .word 0x00000000 + + .global _OUTPUT10_CTRL +_OUTPUT10_CTRL: + .word 0x00000000 + + ;; 128 bytes minus eleven registers (four bytes per register) + ;.fill (128 - 11 * 4) + + .global _INPUT0_CTRL +_INPUT0_CTRL: + .word 0x00000000 + + ;; 128 bytes minus one register (four bytes per register) + ;.fill (128 - 1 * 4) + ; 256 bytes minus twelve registers (four bytes per register) + .fill (256 - 12 * 4) + + + + ;.org 0xfff800 + ; IQ Buffer Registers + .global _IQ_BUFF_CTRL_REG +_IQ_BUFF_CTRL_REG: + .word 0x00000000 + + .global _IQ_BUFF_PARAMETER1_REG +_IQ_BUFF_PARAMETER1_REG: + .word 0x00000000 + + .global _IQ_BUFF_DATA_SIZE1_REG +_IQ_BUFF_DATA_SIZE1_REG: + .word 0x00000000 + + .global _IQ_BUFF_TRANSFER_SIZE1_REG +_IQ_BUFF_TRANSFER_SIZE1_REG: + .word 0x00000000 + + .global _IQ_BUFF_FB_ADDR1_REG +_IQ_BUFF_FB_ADDR1_REG: + .word 0x00000000 + + .global _IQ_BUFF_PARAMETER2_REG +_IQ_BUFF_PARAMETER2_REG: + .word 0x00000000 + + .global _IQ_BUFF_DATA_SIZE2_REG +_IQ_BUFF_DATA_SIZE2_REG: + .word 0x00000000 + + .global _IQ_BUFF_TRANSFER_SIZE2_REG +_IQ_BUFF_TRANSFER_SIZE2_REG: + .word 0x00000000 + + .global _IQ_BUFF_FB_ADDR2_REG +_IQ_BUFF_FB_ADDR2_REG: + .word 0x00000000 + + ; 256 bytes minus nine registers (four bytes per register) + .fill (256 - 9 * 4) + + + ;.org 0xfff900 + ; Reserved memory-mapped space. + .fill (0x1000 - 0x900)

startup-16-002.S Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: startup-16-003.S =================================================================== --- startup-16-003.S (nonexistent) +++ startup-16-003.S (revision 816) @@ -0,0 +1,838 @@ +/* + * $Header: /cvs/src/src/libgloss/mt/startup-16-003.S,v 1.2 2006/03/22 12:47:59 nathan Exp $ + * + * interrupt_vectors.s -- the interrupt handler jump table. + * + * + * There are a total of 32 interrupt vector possible, however, only + * 11 of those are currently used (the others are reserved). The + * order of vectors is as follows: + * + * 1. Boot Vector. Vector for power-on/reset. + * 2. Software Vector. Vector for handling the SI instruction (an + * explicit interrupt caused by software). + * 3. Break Vector. Vector for handling the Break instruction. + * 4. Device 0 Vector. Service vector for device zero. + * 5. Device 1 Vector. Service vector for device one. + * 6. Device 2 Vector. Service vector for device two. + * 7. Device 3 Vector. Service vector for device three. + * 8. Device 4 Vector. Service vector for device four. + * 9. Device 5 Vector. Service vector for device five. + * 10. Device 6 Vector. Service vector for device six. + * 11. Device 7 Vector. Service vector for device seven. + * + * The rest of the interrupt vectors are reserved for future use. + * + * + * Each jump table entry consists of the following two instructions: + * + * jmp Label ; Label as appropriate + * nop ; implemented as or r0,r0,r0 + * + * The following labels are reserved for the vectors named above, + * respectively: + * + * _BOOTIVEC, _SOFTIVEC, _BRKIVEC, _DEV0IVEC, _DEV1IVEC, _DEV2IVEC, + * _DEV3IVEC, _DEV4IVEC, _DEV5IVEC, _DEV6IVEC, _DEV7IVEC + * + * 09Jan04 (DJK) Modified internal I/O port definitions for the + * MS1-16-003. + * + * 10Oct01 (DJK) The memory map is finalized and the first 4K of address + * space is now reserved for memory-mapped I/O devices. + * (There is over 2K unused, reserved space in this area.) + * + * 26Sep01 (DJK) The memory map is changed and the device interrupts are + * now memory-mapped. + * + * + * + * Copyright (c) 2001, 2002, 2003, 2004 Morpho Technologies + * + */ + + .section .startup, "a", @progbits + .global __boot_start +__boot_start: +_INTERRUPT_VECTOR_TABLE: + jmp _BOOTIVEC ; Boot vector + or r0, r0, r0 + jmp _SOFTIVEC ; Vector for SI instruction + or r0,r0,r0 + jmp _BRKIVEC ; Vector for Break instruction + or r0,r0,r0 + ; The illegal instruction trap is not implemented. + ;jmp _ILLIVEC ; Vector for illegal instruction + or r0,r0,r0 + or r0,r0,r0 +_RESERVED1_IVEC: + jmp _RESERVED1_IVEC + or r0,r0,r0 +_RESERVED2_IVEC: + jmp _RESERVED2_IVEC + or r0,r0,r0 +_RESERVED3_IVEC: + jmp _RESERVED3_IVEC + or r0,r0,r0 +_RESERVED4_IVEC: + jmp _RESERVED4_IVEC + or r0,r0,r0 + + + .text + + .equ SI_IOPORT_ADR, _DEBUG_SW_SYSREQ_REG + .equ SI_IOPORT_BIT, 0x1 + .equ BRK_IOPORT_ADR, _DEBUG_BREAK_REG + .equ BRK_IOPORT_BIT, 0x1 + + .global _BOOTIVEC +_BOOTIVEC: + ; Initialize the interrupt controller's interrupt vector registers + ldui r1, #%hi16(_IVEC_DEFAULT) + ori r1, r1, #%lo16(_IVEC_DEFAULT) + stw r1, r0, #%lo16(_DEV0_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV1_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV2_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV3_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV4_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV5_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV6_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV7_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV8_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV9_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV10_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV11_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV12_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV13_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV14_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV15_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV16_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV17_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV18_INTERRUPT_REG) + + ; Statically initialized data must be copied from ROM to RAM. + ; This is done in the C run-time start-up code (crt0.o). + + ; Jump to the beginning of the application and enable interrupts. + jmp _start + ei + + + ; Handler for the SI instruction. To perform a system call, the + ; C model uses a trapping mechanism which executes an SI instruction. + ; The Morpho Technologies simulator simply performs a branch to + ; this vector to simulate the SI instruction (this is as the hardware + ; behaves). In order to trigger the simulator that a system call + ; is needed a write into the I/O register at address $40005 to + ; set bit #2 (0x4) is necessary. + ; + ; The above address has been changed to 0x00031C and the bit number + ; is zero. (The manifest constants have been changed to reflect this.) + .global _SOFTIVEC +_SOFTIVEC: + ; Build a frame to save registers. + subi sp, sp, #$8 + stw r9, sp, #$4 + ldui r9, #%hi16(SI_IOPORT_ADR) + stw r10, sp, #$0 + ori r9, r9, #%lo16(SI_IOPORT_ADR) + ori r10, r0, #SI_IOPORT_BIT + stw r10, r9, #$0 + ; SYS_call is handled by simulator here... + or r0, r0, r0 + ldw r10, sp, #$0 + or r0, r0, r0 + ldw r9, sp, #$4 + reti r14 + addi sp, sp, #$8 + + + + .global _BRKIVEC +_BRKIVEC: + ; Build a frame to save registers. + subi sp, sp, #$8 + stw r9, sp, #$4 + ldui r9, #%hi16(BRK_IOPORT_ADR) + stw r10, sp, #$0 + ori r9, r9, #%lo16(BRK_IOPORT_ADR) + ori r10, r0, #BRK_IOPORT_BIT + stw r10, r9, #$0 + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 + ldw r10, sp, #$0 + ldw r9, sp, #$4 + reti r15 + addi sp, sp, #$8 + + +.if 0 + ; Handler for illegal instruction. + .global _ILLIVEC +_ILLIVEC: + reti r15 + or r0, r0, r0 +.endif + + + .global _IVEC_DEFAULT +_IVEC_DEFAULT: + reti r15 + or r0, r0, r0 + + + .section .internal_io, "a", @nobits + .fill 256 ; Fill the first page. + + ; This is the memory-mapped I/O region. + + ; Hardware Interrupt Registers + ;.org 0xfffff100 + .global _DEV0_INTERRUPT_REG +_DEV0_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV1_INTERRUPT_REG +_DEV1_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV2_INTERRUPT_REG +_DEV2_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV3_INTERRUPT_REG +_DEV3_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV4_INTERRUPT_REG +_DEV4_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV5_INTERRUPT_REG +_DEV5_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV6_INTERRUPT_REG +_DEV6_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV7_INTERRUPT_REG +_DEV7_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV8_INTERRUPT_REG +_DEV8_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV9_INTERRUPT_REG +_DEV9_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV10_INTERRUPT_REG +_DEV10_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV11_INTERRUPT_REG +_DEV11_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV12_INTERRUPT_REG +_DEV12_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV13_INTERRUPT_REG +_DEV13_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV14_INTERRUPT_REG +_DEV14_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV15_INTERRUPT_REG +_DEV15_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV16_INTERRUPT_REG +_DEV16_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV17_INTERRUPT_REG +_DEV17_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV18_INTERRUPT_REG +_DEV18_INTERRUPT_REG: + .word 0x00000000 + + ; 128 bytes minus nineteen registers (four bytes per register) + .fill (128 - 19 * 4) + + .global _INTERRUPT_MASK_REG +_INTERRUPT_MASK_REG: + .word 0x00000000 + + .global _INTERRUPT_PENDING_REG +_INTERRUPT_PENDING_REG: + .word 0x00000000 + + ; 16 bytes minus two registers (four bytes per register) + .fill (16 - 2 * 4) + + .global _DEV0_INTERRUPT_LEVEL_REG +_DEV0_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV1_INTERRUPT_LEVEL_REG +_DEV1_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV2_INTERRUPT_LEVEL_REG +_DEV2_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV3_INTERRUPT_LEVEL_REG +_DEV3_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV4_INTERRUPT_LEVEL_REG +_DEV4_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV5_INTERRUPT_LEVEL_REG +_DEV5_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV6_INTERRUPT_LEVEL_REG +_DEV6_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV7_INTERRUPT_LEVEL_REG +_DEV7_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV8_INTERRUPT_LEVEL_REG +_DEV8_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV9_INTERRUPT_LEVEL_REG +_DEV9_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV10_INTERRUPT_LEVEL_REG +_DEV10_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV11_INTERRUPT_LEVEL_REG +_DEV11_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV12_INTERRUPT_LEVEL_REG +_DEV12_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV13_INTERRUPT_LEVEL_REG +_DEV13_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV14_INTERRUPT_LEVEL_REG +_DEV14_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV15_INTERRUPT_LEVEL_REG +_DEV15_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV16_INTERRUPT_LEVEL_REG +_DEV16_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV17_INTERRUPT_LEVEL_REG +_DEV17_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV18_INTERRUPT_LEVEL_REG +_DEV18_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + ; 128 bytes minus twenty-three registers (four bytes per register) + .fill (128 - 23 * 4) + + + ;.org 0xfffff200 + ; MorphoSys Decoder Registers + .global _MS_DEC_CIRC_BUFF_SEL_REG +_MS_DEC_CIRC_BUFF_SEL_REG: + .word 0x00000000 + + .global _MS_DEC_SKIP_FACTOR_REG +_MS_DEC_SKIP_FACTOR_REG: + .word 0x00000000 + + .global _MS_DEC_CUSTOM_PERM_REG +_MS_DEC_CUSTOM_PERM_REG: + .word 0x00000000 + + .global _MS_DEC_CTXT_BASE_REG +_MS_DEC_CTXT_BASE_REG: + .word 0x00000000 + + .global _MS_DEC_LOOKUP_TBL_REG +_MS_DEC_LOOKUP_TBL_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF0_I_REG +_MS_CIRC_BUFF0_I_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF0_P_REG +_MS_CIRC_BUFF0_P_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BUFF0_B_REG +_MS_DATA_BUFF0_B_REG: + .word 0x00000000 + + .global _MS_DATA_BUFF0_S_REG +_MS_DATA_BUFF0_S_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF1_I_REG +_MS_CIRC_BUFF1_I_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF1_P_REG +_MS_CIRC_BUFF1_P_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BUFF1_B_REG +_MS_DATA_BUFF1_B_REG: + .word 0x00000000 + + .global _MS_DATA_BUFF1_S_REG +_MS_DATA_BUFF1_S_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF2_I_REG +_MS_CIRC_BUFF2_I_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF2_P_REG +_MS_CIRC_BUFF2_P_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BUFF2_B_REG +_MS_DATA_BUFF2_B_REG: + .word 0x00000000 + + .global _MS_DATA_BUFF2_S_REG +_MS_DATA_BUFF2_S_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF3_I_REG +_MS_CIRC_BUFF3_I_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF3_P_REG +_MS_CIRC_BUFF3_P_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BUFF3_B_REG +_MS_DATA_BUFF3_B_REG: + .word 0x00000000 + + .global _MS_DATA_BUFF3_S_REG +_MS_DATA_BUFF3_S_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF4_I_REG +_MS_CIRC_BUFF4_I_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF4_P_REG +_MS_CIRC_BUFF4_P_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BUFF4_B_REG +_MS_DATA_BUFF4_B_REG: + .word 0x00000000 + + .global _MS_DATA_BUFF4_S_REG +_MS_DATA_BUFF4_S_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF5_I_REG +_MS_CIRC_BUFF5_I_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF5_P_REG +_MS_CIRC_BUFF5_P_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BUFF5_B_REG +_MS_DATA_BUFF5_B_REG: + .word 0x00000000 + + .global _MS_DATA_BUFF5_S_REG +_MS_DATA_BUFF5_S_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF6_I_REG +_MS_CIRC_BUFF6_I_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF6_P_REG +_MS_CIRC_BUFF6_P_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BUFF6_B_REG +_MS_DATA_BUFF6_B_REG: + .word 0x00000000 + + .global _MS_DATA_BUFF6_S_REG +_MS_DATA_BUFF6_S_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF7_I_REG +_MS_CIRC_BUFF7_I_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF7_P_REG +_MS_CIRC_BUFF7_P_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BUFF7_B_REG +_MS_DATA_BUFF7_B_REG: + .word 0x00000000 + + .global _MS_DATA_BUFF7_S_REG +_MS_DATA_BUFF7_S_REG: + .word 0x00000000 + + .global _MS_OMEGA_PERM1_REG +_MS_OMEGA_PERM1_REG: + .word 0x00000000 + + .global _MS_WRITE_FB_ADDR_REG +_MS_WRITE_FB_ADDR_REG: + .word 0x00000000 + + .global _MS_OMEGA_PERM2_REG +_MS_OMEGA_PERM2_REG: + .word 0x00000000 + + + ; 256 bytes minus forty registers (four bytes per register) + .fill (256 - 40 * 4) + + + + ;.org 0xfffff300 + ; Debug Registers + .global _DEBUG_HALT_REG +_DEBUG_HALT_REG: + .word 0x00000000 + + .global _DEBUG_BREAK_REG +_DEBUG_BREAK_REG: + .word 0x00000000 + + .global _DEBUG_CRITICAL_REG +_DEBUG_OWNERSHIP_REG: + .word 0x00000000 + + .global _DEBUG_KERNEL_ID_REG +_DEBUG_KERNEL_ID_REG: + .word 0x00000000 + + .global _DEBUG_IRQ_STATUS_REG +_DEBUG_IRQ_STATUS_REG: + .word 0x00000000 + + ; There are two reserved registers. + .fill (2 * 4) + + .global _DEBUG_SW_SYSREQ_REG +_DEBUG_SW_SYSREQ_REG: + .word 0x00000000 + + ; 128 bytes minus eight registers (four bytes per register) + .fill (128 - 8 * 4) + + .global _EXTENDED_GP0_REG +_EXTENDED_GP0_REG: + .word 0x00000000 + + .global _EXTENDED_GP1_REG +_EXTENDED_GP1_REG: + .word 0x00000000 + + .global _EXTENDED_GP2_REG +_EXTENDED_GP2_REG: + .word 0x00000000 + + .global _EXTENDED_GP3_REG +_EXTENDED_GP3_REG: + .word 0x00000000 + + .global _EXTENDED_GP4_REG +_EXTENDED_GP4_REG: + .word 0x00000000 + + .global _EXTENDED_GP5_REG +_EXTENDED_GP5_REG: + .word 0x00000000 + + .global _EXTENDED_GP6_REG +_EXTENDED_GP6_REG: + .word 0x00000000 + + .global _EXTENDED_GP7_REG +_EXTENDED_GP7_REG: + .word 0x00000000 + + .global _MEM_CTRL_EN_NC_MEM_REG +_MEM_CTRL_EN_NC_MEM_REG: + .word 0x00000000 + + .global _MEM_CTRL_BASE0_ADDR_REG +_MEM_CTRL_BASE0_ADDR_REG: + .word 0x00000000 + + .global _MEM_CTRL_MASK0_ADDR_REG +_MEM_CTRL_MASK0_ADDR_REG: + .word 0x00000000 + + .global _MEM_CTRL_BASE1_ADDR_REG +_MEM_CTRL_BASE1_ADDR_REG: + .word 0x00000000 + + .global _MEM_CTRL_MASK1_ADDR_REG +_MEM_CTRL_MASK1_ADDR_REG: + .word 0x00000000 + + .global _MEM_CTRL_BASE2_ADDR_REG +_MEM_CTRL_BASE2_ADDR_REG: + .word 0x00000000 + + .global _MEM_CTRL_MASK2_ADDR_REG +_MEM_CTRL_MASK2_ADDR_REG: + .word 0x00000000 + + .global _MEM_CTRL_BASE3_ADDR_REG +_MEM_CTRL_BASE3_ADDR_REG: + .word 0x00000000 + + .global _MEM_CTRL_MASK3_ADDR_REG +_MEM_CTRL_MASK3_ADDR_REG: + .word 0x00000000 + + ; 128 bytes minus seventeen registers (four bytes per register) + .fill (128 - 17 * 4) + + + + ; Reserved memory-map space + .fill (256 + 256) + + + + ;.org 0xfffff600 + ; Timer Registers + .global _TIMER0_VAL_REG +_TIMER0_VAL_REG: + .word 0x00000000 + + .global _TIMER1_VAL_REG +_TIMER1_VAL_REG: + .word 0x00000000 + + .global _TIMER2_VAL_REG +_TIMER2_VAL_REG: + .word 0x00000000 + + .global _TIMER3_VAL_REG +_TIMER3_VAL_REG: + .word 0x00000000 + + ; 256 bytes minus four registers (four bytes per register) + .fill (256 - 4 * 4) + + + + ;.org 0xfffff700 + ; Output Line Control Registers + .global _OUTPUT0_CTRL +_OUTPUT0_CTRL: + .word 0x00000000 + + .global _OUTPUT1_CTRL +_OUTPUT1_CTRL: + .word 0x00000000 + + .global _OUTPUT2_CTRL +_OUTPUT2_CTRL: + .word 0x00000000 + + .global _OUTPUT3_CTRL +_OUTPUT3_CTRL: + .word 0x00000000 + + .global _OUTPUT4_CTRL +_OUTPUT4_CTRL: + .word 0x00000000 + + .global _OUTPUT5_CTRL +_OUTPUT5_CTRL: + .word 0x00000000 + + .global _OUTPUT6_CTRL +_OUTPUT6_CTRL: + .word 0x00000000 + + ; 128 bytes minus seven registers (four bytes per register) + .fill (128 - 7 * 4) + + .global _INPUT0_CTRL +_INPUT0_CTRL: + .word 0x00000000 + + ; 128 bytes minus one register (four bytes per register) + .fill (128 - 1 * 4) + + + + ;.org 0xfffff800 + ; IQ Buffer Registers + .global _IQ_BUFF_CTRL_REG +_IQ_BUFF_CTRL_REG: + .word 0x00000000 + + .global _IQ_BUFF_STATUS_REG +_IQ_BUFF_STATUS_REG: + .word 0x00000000 + + .global _IQ_BUFF_PARAMETER1_REG +_IQ_BUFF_PARAMETER1_REG: + .word 0x00000000 + + .global _IQ_BUFF_TRANSFER_SIZE1_REG +_IQ_BUFF_TRANSFER_SIZE1_REG: + .word 0x00000000 + + .global _IQ_BUFF_FB_BASE1_REG +_IQ_BUFF_FB_BASE1_REG: + .word 0x00000000 + + .global _IQ_BUFF_FB_SIZE1_REG +_IQ_BUFF_FB_SIZE1_REG: + .word 0x00000000 + + .global _IQ_BUFF_PARAMETER2_REG +_IQ_BUFF_PARAMETER2_REG: + .word 0x00000000 + + .global _IQ_BUFF_TRANSFER_SIZE2_REG +_IQ_BUFF_TRANSFER_SIZE2_REG: + .word 0x00000000 + + .global _IQ_BUFF_FB_BASE2_REG +_IQ_BUFF_FB_BASE2_REG: + .word 0x00000000 + + .global _IQ_BUFF_FB_SIZE2_REG +_IQ_BUFF_FB_SIZE2_REG: + .word 0x00000000 + + ; 256 bytes minus ten registers (four bytes per register) + .fill (256 - 10 * 4) + + + + ;.org 0xfffff900 + ; DMA Controller + .global _DMA_CTRL_REG +_DMA_CTRL_REG: + .word 0x00000000 + + .global _DMA_STATUS_REG +_DMA_STATUS_REG: + .word 0x00000000 + + .global _DMA_CH0_EADDR_REG +_DMA_CH0_EADDR_REG: + .word 0x00000000 + + .global _DMA_CH0_IADDR_REG +_DMA_CH0_IADDR_REG: + .word 0x00000000 + + .global _DMA_CH0_SIZE_REG +_DMA_CH0_SIZE_REG: + .word 0x00000000 + + .global _DMA_CH1_EADDR_REG +_DMA_CH1_EADDR_REG: + .word 0x00000000 + + .global _DMA_CH1_IADDR_REG +_DMA_CH1_IADDR_REG: + .word 0x00000000 + + .global _DMA_CH1_SIZE_REG +_DMA_CH1_SIZE_REG: + .word 0x00000000 + + .global _DMA_CH2_EADDR_REG +_DMA_CH2_EADDR_REG: + .word 0x00000000 + + .global _DMA_CH2_IADDR_REG +_DMA_CH2_IADDR_REG: + .word 0x00000000 + + .global _DMA_CH2_SIZE_REG +_DMA_CH2_SIZE_REG: + .word 0x00000000 + + .global _DMA_CH3_EADDR_REG +_DMA_CH3_EADDR_REG: + .word 0x00000000 + + .global _DMA_CH3_IADDR_REG +_DMA_CH3_IADDR_REG: + .word 0x00000000 + + .global _DMA_CH3_SIZE_REG +_DMA_CH3_SIZE_REG: + .word 0x00000000 + + ; 256 bytes minus fourteen registers (four bytes per register) + .fill (256 - 14 * 4) + + + + ;.org 0xfffffa00 + ; Sequence Generator + .global _SEQ_GEN_CTRL_STATUS_REG +_SEQ_GEN_CTRL_STATUS_REG: + .word 0x00000000 + + .global _SEQ_GEN_MASK_REGS +_SEQ_GEN_MASK_REGS: + .fill (302 * 4) + + .global _SEQ_GEN_SHIFT_REG +_SEQ_GEN_SHIFT_REG: + .word 0x00000000 + + ; 256 bytes minus seven registers (four bytes per register) + .fill (256 - 48 * 4) + + + + ; Reserved memory-map space + .fill (0x1000 - 0xf00)

startup-16-003.S Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: trap.h =================================================================== --- trap.h (nonexistent) +++ trap.h (revision 816) @@ -0,0 +1,5 @@ +#include "syscall.h" + +int __trap0 (); + +#define TRAP0(f, p1, p2, p3) __trap0(f, (p1), (p2), (p3))

trap.h Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: isatty.c =================================================================== --- isatty.c (nonexistent) +++ isatty.c (revision 816) @@ -0,0 +1,11 @@ +#include <_ansi.h> +#include +#include +#include "trap.h" + + +isatty (fd) + int fd; +{ + return 1; +}

isatty.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: crt0-64-001.S =================================================================== --- crt0-64-001.S (nonexistent) +++ crt0-64-001.S (revision 816) @@ -0,0 +1,144 @@ +; crt0_2.s - Startup code for the mrisc1. This code initializes the C +; run-time model. +; +; 12Nov01 (DJK) - The return code from main was not being passed to exit(). +; Now it is passed as a parameter in R1. +; +; 10Sep01 (DJK) - The function exit() does not return. However, in the +; the case of device error (if the halt bit does not +; function properly, for instance), then a catch loop +; has been added. +; +; +; Copyright 2001, 2002, 2003, 2004 Morpho Technologies, Inc. +; + + ; Create a label for the start of the eh_frame section. + .section .eh_frame +__eh_frame_begin: + + .equ HALT_REG, 0x300 + .section .text + .global _start +_start: + ;; Initialize the stack pointer + ldui sp, #%hi16(__stack) + addui sp, sp, #%lo16(__stack) + or fp, sp, sp + + ;; Copy data from ROM to Frame Buffer (on-chip memory) + ldui r9, #%hi16(_fbdata_start) + ori r9, r9, #%lo16(_fbdata_start) + ldui r10, #%hi16(_fbdata_end) + ori r10, r10, #%lo16(_fbdata_end) + ldui r11, #%hi16(__FRAME_BUFFER_START) + brle r10, r9, .Lnext1 + ori r11, r11, #%lo16(__FRAME_BUFFER_START) +.Lcpy0: + ldw r5, r9, #$0 + addi r9, r9, #$4 + stw r5, r11, #$0 + brlt r9, r10, .Lcpy0 + addi r11, r11, #$4 + +.Lnext1: + ;; Copy data from ROM to External Memory (off-chip memory) + ldui r9, #%hi16(_extdata_start) + ori r9, r9, #%lo16(_extdata_start) + ldui r10, #%hi16(_extdata_end) + ori r10, r10, #%lo16(_extdata_end) + ldui r11, #%hi16(__EXTERNAL_MEMORY_START) + brle r10, r9, .Lnext2 + ori r11, r11, #%lo16(__EXTERNAL_MEMORY_START) +.Lcpy1: + ldw r5, r9, #$0 + addi r9, r9, #$4 + stw r5, r11, #$0 + brlt r9, r10, .Lcpy1 + addi r11, r11, #$4 + + +.Lnext2: + ;; Zero the bss space + ldui r9, #%hi16(__bss_start) + addui r9, r9, #%lo16(__bss_start) + ldui r10, #%hi16(__bss_end) + addui r10, r10, #%lo16(__bss_end) + or r0, r0, r0 + brle r10, r9, .Lnext3 + or r0, r0, r0 +.Lcpy2: + stw r0, r9, #0 + addi r9, r9, #4 + or r0, r0, r0 ; nop + brle r9, r10, .Lcpy2 + or r0, r0, r0 ; nop + +.Lnext3: + ;; Zero the external memory bss section + ldui r9, #%hi16(_extbss_start) + ori r9, r9, #%lo16(_extbss_start) + ldui r10, #%hi16(_extbss_end) + ori r10, r10, #%lo16(_extbss_end) + or r0, r0, r0 + brle r10, r9, .Lnext4 + or r0, r0, r0 +.Lcpy3: + stw r0, r9, #$0 + addi r9, r9, #$4 + or r0, r0, r0 + brle r9, r10, .Lcpy3 + or r0, r0, r0 + +.Lnext4: + ;; Call global and static constructors + ldui r10, #%hi16(_init) + ori r10, r10, #%lo16(_init) + or r0, r0, r0 ; nop + jal r14, r10 + or r0, r0, r0 ; nop + + ;; Setup destructors to be called from exit. + ;; (Just in case main never returns....) + ldui r10, #%hi16(atexit) + ori r10, r10, #%lo16(atexit) + ldui r1, #%hi16(_fini) + ori r1, r1, #%lo16(_fini) + or r0, r0, r0 ; nop + jal r14, r10 + or r0, r0, r0 ; nop + + ;; Initialise argc, argv and envp to empty + addi r1, r0, #0 + addi r2, r0, #0 + addi r3, r0, #0 + + ;; Call main + ldui r10, #%hi16(main) + ori r10, r10, #%lo16(main) + or r0, r0, r0 ; nop + jal r14, r10 + or r0, r0, r0 ; nop + + ;; DJK - Added 12Nov01. Pass main's return value to exit. + or r1, r11, r0 + + ;; Jump to exit + ldui r10, #%hi16(exit) + ori r10, r10, #%lo16(exit) + or r0, r0, r0 ; nop + jal r14, r10 + or r0, r0, r0 ; nop + + ;; Exit does not return, however, this code is to catch an + ;; error if it does. Set the processor into sleep mode. + ori r1, r0, #$1 + stw r1, r0, #HALT_REG + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 +.Lend: + jmp .Lend + or r0, r0, r0

crt0-64-001.S Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: ms2.ld =================================================================== --- ms2.ld (nonexistent) +++ ms2.ld (revision 816) @@ -0,0 +1,271 @@ +OUTPUT_FORMAT("elf32-mt", "elf32-mt", "elf32-mt") +OUTPUT_ARCH(mt) +ENTRY(__boot_start) + +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +MEMORY +{ + ram (rwx) : ORIGIN = 0x0, LENGTH = 16M + sram (wx) : ORIGIN = 0xfef00000, LENGTH = 64K + frame-buffer (w) : ORIGIN = 0xff000000, LENGTH = 80K + dma-ram (w) : ORIGIN = 0x1000000, LENGTH = 32M + ports (w) : ORIGIN = 0xfffff000, LENGTH = 4K +} +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = 0x0; + PROVIDE(__executable_start = 0x0); + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rel.init : { *(.rel.init) } + .rela.init : { *(.rela.init) } + .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } + .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } + .rel.fini : { *(.rel.fini) } + .rela.fini : { *(.rela.fini) } + .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } + .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } + .rel.data.rel.ro : { *(.rel.data.rel.ro*) } + .rela.data.rel.ro : { *(.rela.data.rel.ro*) } + .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } + .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } + .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } + .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } + .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } + .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.sdata : { *(.rel.sdata .rel.sdata.* .rel.gnu.linkonce.s.*) } + .rela.sdata : { *(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*) } + .rel.sbss : { *(.rel.sbss .rel.sbss.* .rel.gnu.linkonce.sb.*) } + .rela.sbss : { *(.rela.sbss .rela.sbss.* .rel.gnu.linkonce.sb.*) } + .rel.sdata2 : { *(.rel.sdata2 .rel.sdata2.* .rel.gnu.linkonce.s2.*) } + .rela.sdata2 : { *(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*) } + .rel.sbss2 : { *(.rel.sbss2 .rel.sbss2.* .rel.gnu.linkonce.sb2.*) } + .rela.sbss2 : { *(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*) } + .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } + .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + + .startup : { *startup-16-003.o(.startup) } >ram =0 + . = 0x40; + + .init : { KEEP (*(.init)) } >ram =0 + .plt : { *(.plt) } >ram + .text : + { + *startup-16-004.o(.text); + *(.text .stub .text.* .gnu.linkonce.t.*) + KEEP (*(.text.*personality*)) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + } >ram =0 + .fini : { KEEP (*(.fini)) } >ram =0 + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >ram + .rodata1 : { *(.rodata1) } >ram + .sdata2 : { *(.sdata2 .sdata2.* .gnu.linkonce.s2.*) } >ram + .sbss2 : { *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) } >ram + .eh_frame_hdr : { *(.eh_frame_hdr) } >ram + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >ram + .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >ram + /* Adjust the address for the data segment. We want to adjust up to + the same address within the page on the next page up. */ + . = ALIGN(256) + (. & (256 - 1)); + /* Exception handling */ + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >ram + .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >ram + /* Thread Local Storage sections */ + .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >ram + .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >ram + /* Ensure the __preinit_array_start label is properly aligned. We + could instead move the label definition inside the section, but + the linker would then create the section even if it turns out to + be empty, which isn't pretty. */ + . = ALIGN(32 / 8); + PROVIDE (__preinit_array_start = .); + .preinit_array : { *(.preinit_array) } >ram + PROVIDE (__preinit_array_end = .); + PROVIDE (__init_array_start = .); + .init_array : { *(.init_array) } >ram + PROVIDE (__init_array_end = .); + PROVIDE (__fini_array_start = .); + .fini_array : { *(.fini_array) } >ram + PROVIDE (__fini_array_end = .); + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } >ram + .dtors : + { + KEEP (*crtbegin*.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } >ram + .jcr : { KEEP (*(.jcr)) } >ram + .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >ram + .dynamic : { *(.dynamic) } >ram + + /* DJK - Re-align the data section from the read-only section. */ + . = ALIGN(16) + (. & (16 - 1)); + PROVIDE (_data = .); + .data : + { + *(.data .data.* .gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + SORT(CONSTRUCTORS) + } >ram + .data1 : { *(.data1) } >ram + .got : { *(.got.plt) *(.got) } >ram + + /* We want the small data sections together, so single-instruction offsets + can access them all, and initialized data all before uninitialized, so + we can shorten the on-disk segment size. */ + .sdata : { *(.sdata .sdata.* .gnu.linkonce.s.*) } >ram + _edata = .; + PROVIDE ( edata = . ); + .sbss : + { + PROVIDE (__sbss_start = .); + PROVIDE (___sbss_start = .); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + PROVIDE (__sbss_end = .); + PROVIDE (___sbss_end = .); + } >ram + .bss : + { + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. */ + . = ALIGN(32 / 8); + } >ram + . = ALIGN(32 / 8); + __bss_start = ADDR ( .sbss ) ; + __bss_end = __bss_start + SIZEOF ( .sbss ) + SIZEOF ( .bss ) - 4 ; + _end = .; + PROVIDE (end = .); + + /* DJK - Initialized frame buffer data is copied from RAM to FB. */ + .auxbss : AT (ADDR(.bss) + SIZEOF(.bss)) { *(.auxbss) } >frame-buffer + .auxdata : AT (LOADADDR(.auxbss) + SIZEOF(.auxbss)) + { + *(.auxdata.bank0) + . = ALIGN(0x4000); + *(.auxdata.bank1) + . = ALIGN(0x4000); + *(.auxdata.bank2) + . = ALIGN(0x4000); + *(.auxdata.bank3) + . = ALIGN(0x4000); + *(.auxdata.bank4) + *(.auxdata) + } >frame-buffer + + _fbbss_start = ADDR ( .auxbss ); + _fbbss_end = _fbbss_start + SIZEOF ( .auxbss ) - 4; + _fbdata_start = LOADADDR ( .auxdata ); + _fbdata_end = _fbdata_start + SIZEOF ( .auxdata ) ; + _fbdata_vma = ADDR ( .auxdata ); + + PROVIDE (__FRAME_BUFFER_START = ADDR(.auxbss) ); + PROVIDE (__FRAME_BUFFER_SIZE = 0x14000); + PROVIDE (__FRAME_BUFFER_END = __FRAME_BUFFER_START + __FRAME_BUFFER_SIZE); + + /* For now, locate data ahead of code in onchip sram/memory. */ + .sram : AT (LOADADDR(.auxdata) + SIZEOF(.auxdata)) + { + *(.sram.data) + . = ALIGN(4) ; /* Make sure that instructions are aligned... */ + *(.sram.text) + } >sram + + _sram_data_start = LOADADDR ( .sram ); + _sram_data_end = _sram_data_start + SIZEOF ( .sram ) ; + _sram_data_vma = ADDR ( .sram ); + + .dma : { _dma_start = .; *(.dma) _dma_end = .; } >dma-ram + .internal_io (NOLOAD) : { *(.internal_io) } >ports + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /* In a multi-core environment, each core is given its own stack space + equal to __stack_size, growing downwards. */ + PROVIDE (__stack = 0x97ff0); + PROVIDE (__stack_size = 0x800); + + .stack (DEFINED(__stack) ? __stack : 0x007ffff0) : + { + __stack = .; + *(.stack) + LONG(0xdeaddead) + } + /DISCARD/ : { *(.note.GNU-stack) } +} Index: fstat.c =================================================================== --- fstat.c (nonexistent) +++ fstat.c (revision 816) @@ -0,0 +1,14 @@ +#include <_ansi.h> +#include +#include +#include "trap.h" + + +int +fstat (int file, + struct stat *st) +{ + st->st_mode = S_IFCHR; + st->st_blksize = 4096; + return 0; +}

fstat.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: startup-ms2.S =================================================================== --- startup-ms2.S (nonexistent) +++ startup-ms2.S (revision 816) @@ -0,0 +1,840 @@ +/* + * + * interrupt_vectors.s -- the interrupt handler jump table. + * + * + * There are a total of 32 interrupt vector possible, however, only + * 11 of those are currently used (the others are reserved). The + * order of vectors is as follows: + * + * 1. Boot Vector. Vector for power-on/reset. + * 2. Software Vector. Vector for handling the SI instruction (an + * explicit interrupt caused by software). + * 3. Break Vector. Vector for handling the Break instruction. + * 4. Device 0 Vector. Service vector for device zero. + * 5. Device 1 Vector. Service vector for device one. + * 6. Device 2 Vector. Service vector for device two. + * 7. Device 3 Vector. Service vector for device three. + * 8. Device 4 Vector. Service vector for device four. + * 9. Device 5 Vector. Service vector for device five. + * 10. Device 6 Vector. Service vector for device six. + * 11. Device 7 Vector. Service vector for device seven. + * + * The rest of the interrupt vectors are reserved for future use. + * + * + * Each jump table entry consists of the following two instructions: + * + * jmp Label ; Label as appropriate + * nop ; implemented as or r0,r0,r0 + * + * The following labels are reserved for the vectors named above, + * respectively: + * + * _BOOTIVEC, _SOFTIVEC, _BRKIVEC, _DEV0IVEC, _DEV1IVEC, _DEV2IVEC, + * _DEV3IVEC, _DEV4IVEC, _DEV5IVEC, _DEV6IVEC, _DEV7IVEC + * + * 28Apr05 (DJK) Added support for the overflow vector. + * + * XXXXXXX (DJK) Modified for the MS2 target + * + * 09Jan04 (DJK) Modified internal I/O port definitions for the + * MS1-16-003. + * + * 10Oct01 (DJK) The memory map is finalized and the first 4K of address + * space is now reserved for memory-mapped I/O devices. + * (There is over 2K unused, reserved space in this area.) + * + * 26Sep01 (DJK) The memory map is changed and the device interrupts are + * now memory-mapped. + * + * + * + * Copyright (c) 2001, 2002, 2003, 2004 Morpho Technologies + * + */ + + .section .startup, "a", @progbits + .global __boot_start +__boot_start: +_INTERRUPT_VECTOR_TABLE: + jmp _BOOTIVEC ; Boot vector + or r0, r0, r0 + jmp _SOFTIVEC ; Vector for SI instruction + or r0, r0, r0 + jmp _BRKIVEC ; Vector for Break instruction + or r0, r0, r0 + ; The illegal instruction trap is not implemented. +_RESERVED1_IVEC: + jmp _RESERVED1_IVEC + or r0, r0, r0 + jmp _OVFIVEC + or r0, r0, r0 +_RESERVED2_IVEC: + jmp _RESERVED2_IVEC + or r0, r0, r0 +_RESERVED3_IVEC: + jmp _RESERVED3_IVEC + or r0, r0, r0 +_RESERVED4_IVEC: + jmp _RESERVED4_IVEC + or r0, r0, r0 + + + .text + + .equ SI_IOPORT_ADR, _DEBUG_SW_SYSREQ_REG + .equ SI_IOPORT_BIT, 0x1 + .equ BRK_IOPORT_ADR, _DEBUG_BREAK_REG + .equ BRK_IOPORT_BIT, 0x1 + + .global _BOOTIVEC +_BOOTIVEC: + ; Initialize the interrupt controller's interrupt vector registers + ldui r1, #%hi16(_IVEC_DEFAULT) + ori r1, r1, #%lo16(_IVEC_DEFAULT) + stw r1, r0, #%lo16(_DEV0_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV1_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV2_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV3_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV4_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV5_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV6_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV7_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV8_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV9_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV10_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV11_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV12_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV13_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV14_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV15_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV16_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV17_INTERRUPT_REG) + stw r1, r0, #%lo16(_DEV18_INTERRUPT_REG) + + ; Statically initialized data must be copied from ROM to RAM. + ; This is done in the C run-time start-up code (crt0.o). + + ; Jump to the beginning of the application and enable interrupts. + jmp _start + ei + + + ; Handler for the SI instruction. To perform a system call, the + ; C model uses a trapping mechanism which executes an SI instruction. + ; The Morpho Technologies simulator simply performs a branch to + ; this vector to simulate the SI instruction (this is as the hardware + ; behaves). In order to trigger the simulator that a system call + ; is needed a write into the I/O register at address $40005 to + ; set bit #2 (0x4) is necessary. + ; + ; The above address has been changed to 0x00031C and the bit number + ; is zero. (The manifest constants have been changed to reflect this.) + .global _SOFTIVEC +_SOFTIVEC: + ; Build a frame to save registers. + subi sp, sp, #$8 + stw r9, sp, #$4 + ldui r9, #%hi16(SI_IOPORT_ADR) + stw r10, sp, #$0 + ori r9, r9, #%lo16(SI_IOPORT_ADR) + ori r10, r0, #SI_IOPORT_BIT + stw r10, r9, #$0 + ; SYS_call is handled by simulator here... + or r0, r0, r0 + ldw r10, sp, #$0 + or r0, r0, r0 + ldw r9, sp, #$4 + reti r14 + addi sp, sp, #$8 + + + + .global _BRKIVEC +_BRKIVEC: + ; Build a frame to save registers. + subi sp, sp, #$8 + stw r9, sp, #$4 + ldui r9, #%hi16(BRK_IOPORT_ADR) + stw r10, sp, #$0 + ori r9, r9, #%lo16(BRK_IOPORT_ADR) + ori r10, r0, #BRK_IOPORT_BIT + stw r10, r9, #$0 + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 + or r0, r0, r0 + ldw r10, sp, #$0 + ldw r9, sp, #$4 + reti r15 + addi sp, sp, #$8 + + + .global _OVFIVEC +_OVFIVEC: + addi r15, r15, #$4 + or r0, r0, r0 + or r0, r0, r0 ; added 06Sep05 + reti r15 + or r0, r0, r0 + + + .global _IVEC_DEFAULT +_IVEC_DEFAULT: + reti r15 + or r0, r0, r0 + + + .section .internal_io, "a", @nobits + .fill 256 ; Fill the first page. + + ; This is the memory-mapped I/O region. + + ; Hardware Interrupt Registers + ;.org 0xfffff100 + .global _DEV0_INTERRUPT_REG +_DEV0_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV1_INTERRUPT_REG +_DEV1_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV2_INTERRUPT_REG +_DEV2_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV3_INTERRUPT_REG +_DEV3_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV4_INTERRUPT_REG +_DEV4_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV5_INTERRUPT_REG +_DEV5_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV6_INTERRUPT_REG +_DEV6_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV7_INTERRUPT_REG +_DEV7_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV8_INTERRUPT_REG +_DEV8_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV9_INTERRUPT_REG +_DEV9_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV10_INTERRUPT_REG +_DEV10_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV11_INTERRUPT_REG +_DEV11_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV12_INTERRUPT_REG +_DEV12_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV13_INTERRUPT_REG +_DEV13_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV14_INTERRUPT_REG +_DEV14_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV15_INTERRUPT_REG +_DEV15_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV16_INTERRUPT_REG +_DEV16_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV17_INTERRUPT_REG +_DEV17_INTERRUPT_REG: + .word 0x00000000 + + .global _DEV18_INTERRUPT_REG +_DEV18_INTERRUPT_REG: + .word 0x00000000 + + ; 128 bytes minus nineteen registers (four bytes per register) + .fill (128 - 19 * 4) + + .global _INTERRUPT_MASK_REG +_INTERRUPT_MASK_REG: + .word 0x00000000 + + .global _INTERRUPT_PENDING_REG +_INTERRUPT_PENDING_REG: + .word 0x00000000 + + ; 16 bytes minus two registers (four bytes per register) + .fill (16 - 2 * 4) + + .global _DEV0_INTERRUPT_LEVEL_REG +_DEV0_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV1_INTERRUPT_LEVEL_REG +_DEV1_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV2_INTERRUPT_LEVEL_REG +_DEV2_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV3_INTERRUPT_LEVEL_REG +_DEV3_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV4_INTERRUPT_LEVEL_REG +_DEV4_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV5_INTERRUPT_LEVEL_REG +_DEV5_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV6_INTERRUPT_LEVEL_REG +_DEV6_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV7_INTERRUPT_LEVEL_REG +_DEV7_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV8_INTERRUPT_LEVEL_REG +_DEV8_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV9_INTERRUPT_LEVEL_REG +_DEV9_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV10_INTERRUPT_LEVEL_REG +_DEV10_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV11_INTERRUPT_LEVEL_REG +_DEV11_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV12_INTERRUPT_LEVEL_REG +_DEV12_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV13_INTERRUPT_LEVEL_REG +_DEV13_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV14_INTERRUPT_LEVEL_REG +_DEV14_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV15_INTERRUPT_LEVEL_REG +_DEV15_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV16_INTERRUPT_LEVEL_REG +_DEV16_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV17_INTERRUPT_LEVEL_REG +_DEV17_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + .global _DEV18_INTERRUPT_LEVEL_REG +_DEV18_INTERRUPT_LEVEL_REG: + .word 0x00000000 + + ; 128 bytes minus twenty-three registers (four bytes per register) + .fill (128 - 23 * 4) + + + ;.org 0xfffff200 + ; MorphoSys Decoder Registers + .global _MS_DEC_CIRC_BUFF_SEL_REG +_MS_DEC_CIRC_BUFF_SEL_REG: + .word 0x00000000 + + .global _MS_DEC_SKIP_FACTOR_REG +_MS_DEC_SKIP_FACTOR_REG: + .word 0x00000000 + + .global _MS_DEC_CUSTOM_PERM_REG +_MS_DEC_CUSTOM_PERM_REG: + .word 0x00000000 + + .global _MS_DEC_CTXT_BASE_REG +_MS_DEC_CTXT_BASE_REG: + .word 0x00000000 + + .global _MS_DEC_LOOKUP_TBL_REG +_MS_DEC_LOOKUP_TBL_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF0_I_REG +_MS_CIRC_BUFF0_I_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF0_P_REG +_MS_CIRC_BUFF0_P_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BUFF0_B_REG +_MS_DATA_BUFF0_B_REG: + .word 0x00000000 + + .global _MS_DATA_BUFF0_S_REG +_MS_DATA_BUFF0_S_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF1_I_REG +_MS_CIRC_BUFF1_I_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF1_P_REG +_MS_CIRC_BUFF1_P_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BUFF1_B_REG +_MS_DATA_BUFF1_B_REG: + .word 0x00000000 + + .global _MS_DATA_BUFF1_S_REG +_MS_DATA_BUFF1_S_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF2_I_REG +_MS_CIRC_BUFF2_I_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF2_P_REG +_MS_CIRC_BUFF2_P_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BUFF2_B_REG +_MS_DATA_BUFF2_B_REG: + .word 0x00000000 + + .global _MS_DATA_BUFF2_S_REG +_MS_DATA_BUFF2_S_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF3_I_REG +_MS_CIRC_BUFF3_I_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF3_P_REG +_MS_CIRC_BUFF3_P_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BUFF3_B_REG +_MS_DATA_BUFF3_B_REG: + .word 0x00000000 + + .global _MS_DATA_BUFF3_S_REG +_MS_DATA_BUFF3_S_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF4_I_REG +_MS_CIRC_BUFF4_I_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF4_P_REG +_MS_CIRC_BUFF4_P_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BUFF4_B_REG +_MS_DATA_BUFF4_B_REG: + .word 0x00000000 + + .global _MS_DATA_BUFF4_S_REG +_MS_DATA_BUFF4_S_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF5_I_REG +_MS_CIRC_BUFF5_I_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF5_P_REG +_MS_CIRC_BUFF5_P_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BUFF5_B_REG +_MS_DATA_BUFF5_B_REG: + .word 0x00000000 + + .global _MS_DATA_BUFF5_S_REG +_MS_DATA_BUFF5_S_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF6_I_REG +_MS_CIRC_BUFF6_I_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF6_P_REG +_MS_CIRC_BUFF6_P_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BUFF6_B_REG +_MS_DATA_BUFF6_B_REG: + .word 0x00000000 + + .global _MS_DATA_BUFF6_S_REG +_MS_DATA_BUFF6_S_REG: + .word 0x00000000 + + .global _MS_CIRC_BUFF7_I_REG +_MS_CIRC_BUFF7_I_REG: + .word (__FRAME_BUFFER_END) + + .global _MS_CIRC_BUFF7_P_REG +_MS_CIRC_BUFF7_P_REG: + .word __FRAME_BUFFER_SIZE + + .global _MS_DATA_BUFF7_B_REG +_MS_DATA_BUFF7_B_REG: + .word 0x00000000 + + .global _MS_DATA_BUFF7_S_REG +_MS_DATA_BUFF7_S_REG: + .word 0x00000000 + + .global _MS_OMEGA_PERM1_REG +_MS_OMEGA_PERM1_REG: + .word 0x00000000 + + .global _MS_WRITE_FB_ADDR_REG +_MS_WRITE_FB_ADDR_REG: + .word 0x00000000 + + .global _MS_OMEGA_PERM2_REG +_MS_OMEGA_PERM2_REG: + .word 0x00000000 + + + ; 256 bytes minus forty registers (four bytes per register) + .fill (256 - 40 * 4) + + + + ;.org 0xfffff300 + ; Debug Registers + .global _DEBUG_HALT_REG +_DEBUG_HALT_REG: + .word 0x00000000 + + .global _DEBUG_BREAK_REG +_DEBUG_BREAK_REG: + .word 0x00000000 + + .global _DEBUG_CRITICAL_REG +_DEBUG_OWNERSHIP_REG: + .word 0x00000000 + + .global _DEBUG_KERNEL_ID_REG +_DEBUG_KERNEL_ID_REG: + .word 0x00000000 + + .global _DEBUG_IRQ_STATUS_REG +_DEBUG_IRQ_STATUS_REG: + .word 0x00000000 + + ; There are two reserved registers. + .fill (2 * 4) + + .global _DEBUG_SW_SYSREQ_REG +_DEBUG_SW_SYSREQ_REG: + .word 0x00000000 + + ; 128 bytes minus eight registers (four bytes per register) + .fill (128 - 8 * 4) + + .global _EXTENDED_GP0_REG +_EXTENDED_GP0_REG: + .word 0x00000000 + + .global _EXTENDED_GP1_REG +_EXTENDED_GP1_REG: + .word 0x00000000 + + .global _EXTENDED_GP2_REG +_EXTENDED_GP2_REG: + .word 0x00000000 + + .global _EXTENDED_GP3_REG +_EXTENDED_GP3_REG: + .word 0x00000000 + + .global _EXTENDED_GP4_REG +_EXTENDED_GP4_REG: + .word 0x00000000 + + .global _EXTENDED_GP5_REG +_EXTENDED_GP5_REG: + .word 0x00000000 + + .global _EXTENDED_GP6_REG +_EXTENDED_GP6_REG: + .word 0x00000000 + + .global _EXTENDED_GP7_REG +_EXTENDED_GP7_REG: + .word 0x00000000 + + .global _MEM_CTRL_EN_NC_MEM_REG +_MEM_CTRL_EN_NC_MEM_REG: + .word 0x00000000 + + .global _MEM_CTRL_BASE0_ADDR_REG +_MEM_CTRL_BASE0_ADDR_REG: + .word 0x00000000 + + .global _MEM_CTRL_MASK0_ADDR_REG +_MEM_CTRL_MASK0_ADDR_REG: + .word 0x00000000 + + .global _MEM_CTRL_BASE1_ADDR_REG +_MEM_CTRL_BASE1_ADDR_REG: + .word 0x00000000 + + .global _MEM_CTRL_MASK1_ADDR_REG +_MEM_CTRL_MASK1_ADDR_REG: + .word 0x00000000 + + .global _MEM_CTRL_BASE2_ADDR_REG +_MEM_CTRL_BASE2_ADDR_REG: + .word 0x00000000 + + .global _MEM_CTRL_MASK2_ADDR_REG +_MEM_CTRL_MASK2_ADDR_REG: + .word 0x00000000 + + .global _MEM_CTRL_BASE3_ADDR_REG +_MEM_CTRL_BASE3_ADDR_REG: + .word 0x00000000 + + .global _MEM_CTRL_MASK3_ADDR_REG +_MEM_CTRL_MASK3_ADDR_REG: + .word 0x00000000 + + ; 128 bytes minus seventeen registers (four bytes per register) + .fill (128 - 17 * 4) + + + + ; Reserved memory-map space + .fill (256 + 256) + + + + ;.org 0xfffff600 + ; Timer Registers + .global _TIMER0_VAL_REG +_TIMER0_VAL_REG: + .word 0x00000000 + + .global _TIMER1_VAL_REG +_TIMER1_VAL_REG: + .word 0x00000000 + + .global _TIMER2_VAL_REG +_TIMER2_VAL_REG: + .word 0x00000000 + + .global _TIMER3_VAL_REG +_TIMER3_VAL_REG: + .word 0x00000000 + + ; 256 bytes minus four registers (four bytes per register) + .fill (256 - 4 * 4) + + + + ;.org 0xfffff700 + ; Output Line Control Registers + .global _OUTPUT0_CTRL +_OUTPUT0_CTRL: + .word 0x00000000 + + .global _OUTPUT1_CTRL +_OUTPUT1_CTRL: + .word 0x00000000 + + .global _OUTPUT2_CTRL +_OUTPUT2_CTRL: + .word 0x00000000 + + .global _OUTPUT3_CTRL +_OUTPUT3_CTRL: + .word 0x00000000 + + .global _OUTPUT4_CTRL +_OUTPUT4_CTRL: + .word 0x00000000 + + .global _OUTPUT5_CTRL +_OUTPUT5_CTRL: + .word 0x00000000 + + .global _OUTPUT6_CTRL +_OUTPUT6_CTRL: + .word 0x00000000 + + ; 128 bytes minus seven registers (four bytes per register) + .fill (128 - 7 * 4) + + .global _INPUT0_CTRL +_INPUT0_CTRL: + .word 0x00000000 + + ; 128 bytes minus one register (four bytes per register) + .fill (128 - 1 * 4) + + + + ;.org 0xfffff800 + ; IQ Buffer Registers + .global _IQ_BUFF_CTRL_REG +_IQ_BUFF_CTRL_REG: + .word 0x00000000 + + .global _IQ_BUFF_STATUS_REG +_IQ_BUFF_STATUS_REG: + .word 0x00000000 + + .global _IQ_BUFF_PARAMETER1_REG +_IQ_BUFF_PARAMETER1_REG: + .word 0x00000000 + + .global _IQ_BUFF_TRANSFER_SIZE1_REG +_IQ_BUFF_TRANSFER_SIZE1_REG: + .word 0x00000000 + + .global _IQ_BUFF_FB_BASE1_REG +_IQ_BUFF_FB_BASE1_REG: + .word 0x00000000 + + .global _IQ_BUFF_FB_SIZE1_REG +_IQ_BUFF_FB_SIZE1_REG: + .word 0x00000000 + + .global _IQ_BUFF_PARAMETER2_REG +_IQ_BUFF_PARAMETER2_REG: + .word 0x00000000 + + .global _IQ_BUFF_TRANSFER_SIZE2_REG +_IQ_BUFF_TRANSFER_SIZE2_REG: + .word 0x00000000 + + .global _IQ_BUFF_FB_BASE2_REG +_IQ_BUFF_FB_BASE2_REG: + .word 0x00000000 + + .global _IQ_BUFF_FB_SIZE2_REG +_IQ_BUFF_FB_SIZE2_REG: + .word 0x00000000 + + ; 256 bytes minus ten registers (four bytes per register) + .fill (256 - 10 * 4) + + + + ;.org 0xfffff900 + ; DMA Controller + .global _DMA_CTRL_REG +_DMA_CTRL_REG: + .word 0x00000000 + + .global _DMA_STATUS_REG +_DMA_STATUS_REG: + .word 0x00000000 + + .global _DMA_CH0_EADDR_REG +_DMA_CH0_EADDR_REG: + .word 0x00000000 + + .global _DMA_CH0_IADDR_REG +_DMA_CH0_IADDR_REG: + .word 0x00000000 + + .global _DMA_CH0_SIZE_REG +_DMA_CH0_SIZE_REG: + .word 0x00000000 + + .global _DMA_CH1_EADDR_REG +_DMA_CH1_EADDR_REG: + .word 0x00000000 + + .global _DMA_CH1_IADDR_REG +_DMA_CH1_IADDR_REG: + .word 0x00000000 + + .global _DMA_CH1_SIZE_REG +_DMA_CH1_SIZE_REG: + .word 0x00000000 + + .global _DMA_CH2_EADDR_REG +_DMA_CH2_EADDR_REG: + .word 0x00000000 + + .global _DMA_CH2_IADDR_REG +_DMA_CH2_IADDR_REG: + .word 0x00000000 + + .global _DMA_CH2_SIZE_REG +_DMA_CH2_SIZE_REG: + .word 0x00000000 + + .global _DMA_CH3_EADDR_REG +_DMA_CH3_EADDR_REG: + .word 0x00000000 + + .global _DMA_CH3_IADDR_REG +_DMA_CH3_IADDR_REG: + .word 0x00000000 + + .global _DMA_CH3_SIZE_REG +_DMA_CH3_SIZE_REG: + .word 0x00000000 + + ; 256 bytes minus fourteen registers (four bytes per register) + .fill (256 - 14 * 4) + + + + ;.org 0xfffffa00 + ; Sequence Generator + .global _SEQ_GEN_CTRL_STATUS_REG +_SEQ_GEN_CTRL_STATUS_REG: + .word 0x00000000 + + .global _SEQ_GEN_MASK_REGS +_SEQ_GEN_MASK_REGS: + .fill (302 * 4) + + .global _SEQ_GEN_SHIFT_REG +_SEQ_GEN_SHIFT_REG: + .word 0x00000000 + + ; 256 bytes minus seven registers (four bytes per register) + .fill (256 - 48 * 4) + + + + ; Reserved memory-map space + .fill (0x1000 - 0xf00)

startup-ms2.S Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: times.c =================================================================== --- times.c (nonexistent) +++ times.c (revision 816) @@ -0,0 +1,12 @@ +#include <_ansi.h> +#include +#include +#include "trap.h" +#include "sys/times.h" + + +clock_t +times (struct tms *buffer) +{ + return TRAP0 (SYS_times, buffer, 0, 0); +}

times.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: chmod.c =================================================================== --- chmod.c (nonexistent) +++ chmod.c (revision 816) @@ -0,0 +1,11 @@ +#include <_ansi.h> +#include +#include +#include "trap.h" + + +int +chmod (const char *path, mode_t mode) +{ + return TRAP0 (SYS_chmod, path, mode, 0); +}

chmod.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: write.c =================================================================== --- write.c (nonexistent) +++ write.c (revision 816) @@ -0,0 +1,13 @@ +#include <_ansi.h> +#include +#include +#include "trap.h" + + +int +write ( int file, + char *ptr, + size_t len) +{ + return TRAP0 (SYS_write, file, ptr, len); +}

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Otherwise we can end up + # making bogus files that we don't know about and never remove. For + # instance it was reported that on HP-UX the gcc test will end up + # making a dummy file named `D' -- because `-MD' means `put the output + # in D'. + mkdir conftest.dir + # Copy depcomp to subdir because otherwise we won't find it if we're + # using a relative directory. + cp "$am_depcomp" conftest.dir + cd conftest.dir + # We will build objects and dependencies in a subdirectory because + # it helps to detect inapplicable dependency modes. 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It turns out that the SunPro C++ compiler does not properly + # handle `-M -o', and we need to detect this. + if depmode=$depmode \ + source=sub/conftest.c object=sub/conftest.${OBJEXT-o} \ + depfile=sub/conftest.Po tmpdepfile=sub/conftest.TPo \ + $SHELL ./depcomp $depcc -c -o sub/conftest.${OBJEXT-o} sub/conftest.c \ + >/dev/null 2>conftest.err && + grep sub/conftst6.h sub/conftest.Po > /dev/null 2>&1 && + grep sub/conftest.${OBJEXT-o} sub/conftest.Po > /dev/null 2>&1 && + ${MAKE-make} -s -f confmf > /dev/null 2>&1; then + # icc doesn't choke on unknown options, it will just issue warnings + # or remarks (even with -Werror). So we grep stderr for any message + # that says an option was ignored or not supported. + # When given -MP, icc 7.0 and 7.1 complain thusly: + # icc: Command line warning: ignoring option '-M'; no argument required + # The diagnosis changed in icc 8.0: + # icc: Command line remark: option '-MP' not supported + if (grep 'ignoring option' conftest.err || + grep 'not supported' conftest.err) >/dev/null 2>&1; then :; else + am_cv_$1_dependencies_compiler_type=$depmode + break + fi + fi + done + + cd .. + rm -rf conftest.dir +else + am_cv_$1_dependencies_compiler_type=none +fi +]) +AC_SUBST([$1DEPMODE], [depmode=$am_cv_$1_dependencies_compiler_type]) +AM_CONDITIONAL([am__fastdep$1], [ + test "x$enable_dependency_tracking" != xno \ + && test "$am_cv_$1_dependencies_compiler_type" = gcc3]) +]) + + +# AM_SET_DEPDIR +# ------------- +# Choose a directory name for dependency files. +# This macro is AC_REQUIREd in _AM_DEPENDENCIES +AC_DEFUN([AM_SET_DEPDIR], +[AC_REQUIRE([AM_SET_LEADING_DOT])dnl +AC_SUBST([DEPDIR], ["${am__leading_dot}deps"])dnl +]) + + +# AM_DEP_TRACK +# ------------ +AC_DEFUN([AM_DEP_TRACK], +[AC_ARG_ENABLE(dependency-tracking, +[ --disable-dependency-tracking speeds up one-time build + --enable-dependency-tracking do not reject slow dependency extractors]) +if test "x$enable_dependency_tracking" != xno; then + am_depcomp="$ac_aux_dir/depcomp" + AMDEPBACKSLASH='\' +fi +AM_CONDITIONAL([AMDEP], [test "x$enable_dependency_tracking" != xno]) +AC_SUBST([AMDEPBACKSLASH]) +]) + +# Generate code to set up dependency tracking. -*- Autoconf -*- + +# Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005 +# Free Software Foundation, Inc. +# +# This file is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +#serial 3 + +# _AM_OUTPUT_DEPENDENCY_COMMANDS +# ------------------------------ +AC_DEFUN([_AM_OUTPUT_DEPENDENCY_COMMANDS], +[for mf in $CONFIG_FILES; do + # Strip MF so we end up with the name of the file. + mf=`echo "$mf" | sed -e 's/:.*$//'` + # Check whether this is an Automake generated Makefile or not. + # We used to match only the files named `Makefile.in', but + # some people rename them; so instead we look at the file content. + # Grep'ing the first line is not enough: some people post-process + # each Makefile.in and add a new line on top of each file to say so. + # So let's grep whole file. + if grep '^#.*generated by automake' $mf > /dev/null 2>&1; then + dirpart=`AS_DIRNAME("$mf")` + else + continue + fi + # Extract the definition of DEPDIR, am__include, and am__quote + # from the Makefile without running `make'. + DEPDIR=`sed -n 's/^DEPDIR = //p' < "$mf"` + test -z "$DEPDIR" && continue + am__include=`sed -n 's/^am__include = //p' < "$mf"` + test -z "am__include" && continue + am__quote=`sed -n 's/^am__quote = //p' < "$mf"` + # When using ansi2knr, U may be empty or an underscore; expand it + U=`sed -n 's/^U = //p' < "$mf"` + # Find all dependency output files, they are included files with + # $(DEPDIR) in their names. We invoke sed twice because it is the + # simplest approach to changing $(DEPDIR) to its actual value in the + # expansion. + for file in `sed -n " + s/^$am__include $am__quote$.*(DEPDIR).*$$am__quote"'$/\1/p' <"$mf" | \ + sed -e 's/\$(DEPDIR)/'"$DEPDIR"'/g' -e 's/\$U/'"$U"'/g'`; do + # Make sure the directory exists. + test -f "$dirpart/$file" && continue + fdir=`AS_DIRNAME(["$file"])` + AS_MKDIR_P([$dirpart/$fdir]) + # echo "creating $dirpart/$file" + echo '# dummy' > "$dirpart/$file" + done +done +])# _AM_OUTPUT_DEPENDENCY_COMMANDS + + +# AM_OUTPUT_DEPENDENCY_COMMANDS +# ----------------------------- +# This macro should only be invoked once -- use via AC_REQUIRE. +# +# This code is only required when automatic dependency tracking +# is enabled. FIXME. This creates each `.P' file that we will +# need in order to bootstrap the dependency handling code. +AC_DEFUN([AM_OUTPUT_DEPENDENCY_COMMANDS], +[AC_CONFIG_COMMANDS([depfiles], + [test x"$AMDEP_TRUE" != x"" || _AM_OUTPUT_DEPENDENCY_COMMANDS], + [AMDEP_TRUE="$AMDEP_TRUE" ac_aux_dir="$ac_aux_dir"]) +]) + +# Copyright (C) 2003, 2005 Free Software Foundation, Inc. +# +# This file is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# serial 2 + +# Check whether the underlying file-system supports filenames +# with a leading dot. For instance MS-DOS doesn't. +AC_DEFUN([AM_SET_LEADING_DOT], +[rm -rf .tst 2>/dev/null +mkdir .tst 2>/dev/null +if test -d .tst; then + am__leading_dot=. +else + am__leading_dot=_ +fi +rmdir .tst 2>/dev/null +AC_SUBST([am__leading_dot])]) + +# Check to see how 'make' treats includes. -*- Autoconf -*- + +# Copyright (C) 2001, 2002, 2003, 2005 Free Software Foundation, Inc. +# +# This file is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# serial 3 + +# AM_MAKE_INCLUDE() +# ----------------- +# Check to see how make treats includes. +AC_DEFUN([AM_MAKE_INCLUDE], +[am_make=${MAKE-make} +cat > confinc << 'END' +am__doit: + @echo done +.PHONY: am__doit +END +# If we don't find an include directive, just comment out the code. +AC_MSG_CHECKING([for style of include used by $am_make]) +am__include="#" +am__quote= +_am_result=none +# First try GNU make style include. +echo "include confinc" > confmf +# We grep out `Entering directory' and `Leaving directory' +# messages which can occur if `w' ends up in MAKEFLAGS. +# In particular we don't look at `^make:' because GNU make might +# be invoked under some other name (usually "gmake"), in which +# case it prints its new name instead of `make'. +if test "`$am_make -s -f confmf 2> /dev/null | grep -v 'ing directory'`" = "done"; then + am__include=include + am__quote= + _am_result=GNU +fi +# Now try BSD make style include. +if test "$am__include" = "#"; then + echo '.include "confinc"' > confmf + if test "`$am_make -s -f confmf 2> /dev/null`" = "done"; then + am__include=.include + am__quote="\"" + _am_result=BSD + fi +fi +AC_SUBST([am__include]) +AC_SUBST([am__quote]) +AC_MSG_RESULT([$_am_result]) +rm -f confinc confmf +]) + +m4_include([../acinclude.m4])

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