OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

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  • This comparison shows the changes necessary to convert path 
    /openrisc/trunk/gnu-src/binutils-2.18.50/gas/testsuite/gas/mmix
    from Rev 38 to Rev 156
    ↔ Reverse comparison
  •

Rev 38 → Rev 156

/loc-5.s
0,0 → 1,11
# Hit a few remaining code-paths.
t SWYM 0,24,7
 
LOC Data_Segment
TETRA 4*4*4*4
 
LOC (#20 << 56) + #20
TETRA 56
 
LOC t+4
Main SWYM 9,1,1
/err-bspec-1.s
0,0 → 1,4
% { dg-do assemble { target mmix-*-* } }
Main SET $45,23
BSPEC 5 % { dg-error "BSPEC without ESPEC" "" }
TETRA 4
/jmp-op-r.d
0,0 → 1,29
# objdump: -dr
# as: -linkrelax
# source: jmp-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fd000000 swym 0,0,0
 
0000000000000004 <here>:
4: fd000000 swym 0,0,0
8: f1ffffff jmp 4 <here>
8: R_MMIX_ADDR27 \.text\+0x4
 
000000000000000c <at>:
c: f0000000 jmp c <at>
c: R_MMIX_ADDR27 \.text\+0xc
10: f0000004 jmp 20 <there>
10: R_MMIX_ADDR27 \.text\+0x20
14: f1fffffc jmp 4 <here>
14: R_MMIX_ADDR27 \.text\+0x4
18: f0000002 jmp 20 <there>
18: R_MMIX_ADDR27 \.text\+0x20
1c: f1fffffa jmp 4 <here>
1c: R_MMIX_ADDR27 \.text\+0x4
 
0000000000000020 <there>:
20: fd000000 swym 0,0,0
/set.l
0,0 → 1,21
GAS for MMIX .*/set\.s page 1
 
 
1 #.*
2 0000 E32D0463 Main SET \$45,1123
3 0004 C1394300 SET \$57,\$67
4 0008 C14E1F00 SET \$78,X
5 000c E3750463 SET Y,1123
6 0010 C1754300 SET Y,\$67
7 0014 C1751F00 SET Y,X
8 X IS \$31
9 Y IS \$117
GAS for MMIX .*/set\.s page 2
 
 
DEFINED SYMBOLS
.*/set\.s:2 \.text:0000000000000000 Main
\*REG\*:000000000000001f X
\*REG\*:0000000000000075 Y
 
NO UNDEFINED SYMBOLS
/greg1.d
0,0 → 1,35
# objdump: -rst
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ l \.text 0+ D4
0+4 l \.text 0+ E6
0+ l \.MMIX\.reg_contents 0+ H9
0+8 l \.MMIX\.reg_contents 0+ G8
0+ l \.MMIX\.reg_contents 0+ F7
0+18 l \.MMIX\.reg_contents 0+ D5
0+20 l \.MMIX\.reg_contents 0+ C3
0+28 l \.MMIX\.reg_contents 0+ B1
0+30 l \.MMIX\.reg_contents 0+ A0
0+0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
0+c g F \.text 0+ Main
 
 
RELOCATION RECORDS FOR \[\.MMIX\.reg_contents\]:
OFFSET TYPE VALUE
0+ R_MMIX_64 \.text\+0x0+8
0+10 R_MMIX_64 \.text\+0x0+1c
0+20 R_MMIX_64 \.text
 
 
Contents of section \.text:
0000 e37b01c8 e3ea1edb fd020304 fd010203 .*
Contents of section \.MMIX\.reg_contents:
0000 00000000 00000000 00000000 000000f7 .*
0010 00000000 00000000 00000000 00000000 .*
0020 00000000 00000000 00000000 00000001 .*
0030 00000000 00000000 .*
/err-bpo3.s
0,0 → 1,13
% { dg-do assemble { target mmix-*-* } }
 
# Base-plus-offset without -linker-allocated-gregs.
 
a TETRA 42
LDO $43,a+52 % { dg-error "no suitable GREG definition" "" }
 
LOC @+256
d TETRA 28
LDO $143,d+12 % { dg-error "no suitable GREG definition" "" }
LDO $243,a+12 % { dg-error "no suitable GREG definition" "" }
LDA $103,d+40 % { dg-error "no suitable GREG definition" "" }
LDA $13,a+24 % { dg-error "no suitable GREG definition" "" }
/relax1-rn.d
0,0 → 1,117
#objdump: -dr
#as: -linkrelax -no-expand -x
#source: relax1.s
#
# This test-case assumes that out-of-range errors (still) cause
# relocs to be emitted, rather than errors emitted. FIXME.
 
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: f0000000 jmp 0 <Main>
0: R_MMIX_ADDR27 \.text\+0x80024
 
0000000000000004 <l0>:
4: f0000000 jmp 4 <l0>
4: R_MMIX_ADDR27 \.text\+0x80024
 
0000000000000008 <l1>:
8: f0000000 jmp 8 <l1>
8: R_MMIX_ADDR27 \.text\+0x80024
 
000000000000000c <l01>:
c: f0000000 jmp c <l01>
c: R_MMIX_ADDR27 \.text\+0x80024
10: f4070000 geta \$7,10 <l01\+0x4>
10: R_MMIX_ADDR19 \.text\+0x4000c
14: f2bf0000 pushj \$191,14 <l01\+0x8>
14: R_MMIX_ADDR19 \.text\+0x40010
 
0000000000000018 <l2>:
18: f0000000 jmp 18 <l2>
18: R_MMIX_ADDR27 \.text\+0x40010
\.\.\.
40004: 4c480000 bnp \$72,40004 <l2\+0x3ffec>
40004: R_MMIX_ADDR19 \.text\+0x4
40008: f4040000 geta \$4,40008 <l2\+0x3fff0>
40008: R_MMIX_ADDR19 \.text\+0x8
 
000000000004000c <nearfar1>:
4000c: f2050000 pushj \$5,4000c <nearfar1>
4000c: R_MMIX_ADDR19 \.text\+0xc
 
0000000000040010 <nearfar2>:
40010: f4090000 geta \$9,40010 <nearfar2>
40010: R_MMIX_ADDR19 \.text\+0x8
40014: f20b0000 pushj \$11,40014 <nearfar2\+0x4>
40014: R_MMIX_ADDR19 \.text\+0x80014
 
0000000000040018 <l4>:
40018: 44370000 bp \$55,40018 <l4>
40018: R_MMIX_ADDR19 \.text\+0x80014
\.\.\.
80010: f0000000 jmp 80010 <l4\+0x3fff8>
80010: R_MMIX_ADDR27 \.text\+0x8
 
0000000000080014 <l3>:
80014: f0000000 jmp 80014 <l3>
80014: R_MMIX_ADDR27 \.text\+0x4
80018: 46580000 bod \$88,80018 <l3\+0x4>
80018: R_MMIX_ADDR19 \.text\+0x40018
8001c: 46580000 bod \$88,8001c <l3\+0x8>
8001c: R_MMIX_ADDR19 \.text\+0x40018
80020: f0000000 jmp 80020 <l3\+0xc>
80020: R_MMIX_ADDR27 \.text\+0x4080020
 
0000000000080024 <l6>:
80024: f0000000 jmp 80024 <l6>
80024: R_MMIX_ADDR27 \.text\+0x4080020
80028: 426f0000 bz \$111,80028 <l6\+0x4>
80028: R_MMIX_ADDR19 \.text\+0x80014
\.\.\.
 
0000000004080020 <l5>:
4080020: f0000000 jmp 4080020 <l5>
4080020: R_MMIX_ADDR27 \.text\+0x4080030
4080024: f0000000 jmp 4080024 <l5\+0x4>
4080024: R_MMIX_ADDR27 \.text\+0x80024
4080028: f0000000 jmp 4080028 <l5\+0x8>
4080028: R_MMIX_ADDR27 \.text\+0x80024
408002c: 482c0000 bnn \$44,408002c <l5\+0xc>
408002c: R_MMIX_ADDR19 \.text\+0x40c002c
 
0000000004080030 <l8>:
4080030: 482c0000 bnn \$44,4080030 <l8>
4080030: R_MMIX_ADDR19 \.text\+0x40c002c
4080034: f0000000 jmp 4080034 <l8\+0x4>
4080034: R_MMIX_ADDR27 \.text\+0x4080020
4080038: f0000000 jmp 4080038 <l8\+0x8>
4080038: R_MMIX_ADDR27 \.text\+0x4080020
\.\.\.
 
00000000040c0028 <l10>:
40c0028: f0000000 jmp 40c0028 <l10>
40c0028: R_MMIX_ADDR27 \.text\+0x4080020
 
00000000040c002c <l9>:
40c002c: f0000000 jmp 40c002c <l9>
40c002c: R_MMIX_ADDR27 \.text\+0x40c0038
 
00000000040c0030 <l7>:
40c0030: f2210000 pushj \$33,40c0030 <l7>
40c0030: R_MMIX_ADDR19 \.text\+0x4080030
40c0034: f2210000 pushj \$33,40c0034 <l7\+0x4>
40c0034: R_MMIX_ADDR19 \.text\+0x4080030
 
00000000040c0038 <l11>:
40c0038: f0000000 jmp 40c0038 <l11>
40c0038: R_MMIX_ADDR27 \.text\+0x4080020
40c003c: f0000000 jmp 40c003c <l11\+0x4>
40c003c: R_MMIX_ADDR27 \.text\+0x4080030
\.\.\.
4100038: f43d0000 geta \$61,4100038 <l11\+0x40000>
4100038: R_MMIX_ADDR19 \.text\+0x40c0038
410003c: f4480000 geta \$72,410003c <l11\+0x40004>
410003c: R_MMIX_ADDR19 \.text\+0x40c0038
/list-in-n.d
0,0 → 1,281
# objdump: -dr
# source: list-insns.s
# as: -no-expand
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: 00000003 trap 0,0,3
4: 00030405 trap 3,4,5
8: 010c17f1 fcmp \$12,\$23,\$241
c: 08700129 flot \$112,ROUND_OFF,\$41
10: 0970048d flot \$112,ROUND_NEAR,141
14: 08bf00f2 flot \$191,\$242
18: 09c3002a flot \$195,42
1c: 027acb04 fun \$122,\$203,\$4
20: 03661e28 feql \$102,\$30,\$40
24: 0a66000e flotu \$102,\$14
28: 0a84020e flotu \$132,ROUND_UP,\$14
2c: 0a660368 flotu \$102,ROUND_DOWN,\$104
30: 0aac048c flotu \$172,ROUND_NEAR,\$140
34: 0a010186 flotu \$1,ROUND_OFF,\$134
38: 0470df29 fadd \$112,\$223,\$41
3c: 05700129 fix \$112,ROUND_OFF,\$41
40: 050b008d fix \$11,\$141
44: 0c700129 sflot \$112,ROUND_OFF,\$41
48: 0d70048d sflot \$112,ROUND_NEAR,141
4c: 0670df29 fsub \$112,\$223,\$41
50: 0766000e fixu \$102,\$14
54: 0784020e fixu \$132,ROUND_UP,\$14
58: 0e0b008d sflotu \$11,\$141
5c: 0f70008d sflotu \$112,141
60: 0f70048d sflotu \$112,ROUND_NEAR,141
64: 0e700129 sflotu \$112,ROUND_OFF,\$41
68: 10661e28 fmul \$102,\$30,\$40
6c: 110cdf01 fcmpe \$12,\$223,\$1
70: 197acb2c mul \$122,\$203,44
74: 18661e28 mul \$102,\$30,\$40
78: 130cdf01 feqle \$12,\$223,\$1
7c: 120cdf0b fune \$12,\$223,\$11
80: 1b7ad52c mulu \$122,\$213,44
84: 1a841e28 mulu \$132,\$30,\$40
88: 140cdf0b fdiv \$12,\$223,\$11
8c: 1584020e fsqrt \$132,ROUND_UP,\$14
90: 150b008d fsqrt \$11,\$141
94: 1d7ad52c div \$122,\$213,44
98: 1c841e28 div \$132,\$30,\$40
9c: 160cdf0b frem \$12,\$223,\$11
a0: 1784020e fint \$132,ROUND_UP,\$14
a4: 170b008d fint \$11,\$141
a8: 1e0cdf01 divu \$12,\$223,\$1
ac: 1f7acbff divu \$122,\$203,255
b0: 200cdf01 add \$12,\$223,\$1
b4: 217acbff add \$122,\$203,255
b8: 280cdf0b 2addu \$12,\$223,\$11
bc: 297acb00 2addu \$122,\$203,0
c0: 237acbff addu \$122,\$203,255
c4: 220cdf0b addu \$12,\$223,\$11
c8: 237acbff addu \$122,\$203,255
cc: 220cdf0b addu \$12,\$223,\$11
d0: 2b7acbcd 4addu \$122,\$203,205
d4: 2a0cdf6f 4addu \$12,\$223,\$111
d8: 240cdf0b sub \$12,\$223,\$11
dc: 257acbcd sub \$122,\$203,205
e0: 2c0cdf0b 8addu \$12,\$223,\$11
e4: 2d7acbcd 8addu \$122,\$203,205
e8: 2602df0b subu \$2,\$223,\$11
ec: 270c14cd subu \$12,\$20,205
f0: 2e02df0b 16addu \$2,\$223,\$11
f4: 2f0c14cd 16addu \$12,\$20,205
f8: 3002df0b cmp \$2,\$223,\$11
fc: 310c14cd cmp \$12,\$20,205
100: 3802df0b sl \$2,\$223,\$11
104: 390c14cd sl \$12,\$20,205
108: 3202df0b cmpu \$2,\$223,\$11
10c: 330c14cd cmpu \$12,\$20,205
110: 3a02df0b slu \$2,\$223,\$11
114: 3b0c14cd slu \$12,\$20,205
118: 3402170b neg \$2,23,\$11
11c: 350c00cd neg \$12,0,205
120: 35c00acd neg \$192,10,205
124: 3d0c14cd sr \$12,\$20,205
128: 3c02df0b sr \$2,\$223,\$11
12c: 3602170b negu \$2,23,\$11
130: 370c00cd negu \$12,0,205
134: 3f0c14cd sru \$12,\$20,205
138: 3e02df0b sru \$2,\$223,\$11
13c: 40020001 bn \$2,140 <Main\+0x140>
140: 4102ffff bn \$2,13c <Main\+0x13c>
144: 4902ffff bnn \$2,140 <Main\+0x140>
148: 4902ffff bnn \$2,144 <Main\+0x144>
14c: 42ff0001 bz \$255,150 <Main\+0x150>
150: 43ffffff bz \$255,14c <Main\+0x14c>
154: 4aff0001 bnz \$255,158 <Main\+0x158>
158: 4bffffff bnz \$255,154 <Main\+0x154>
15c: 44190001 bp \$25,160 <Main\+0x160>
160: 4519ffff bp \$25,15c <Main\+0x15c>
164: 4c190001 bnp \$25,168 <Main\+0x168>
168: 4d19ffff bnp \$25,164 <Main\+0x164>
16c: 46190001 bod \$25,170 <Main\+0x170>
170: 4719ffff bod \$25,16c <Main\+0x16c>
174: 4e190001 bev \$25,178 <Main\+0x178>
178: 4f19ffff bev \$25,174 <Main\+0x174>
17c: 50020001 pbn \$2,180 <Main\+0x180>
180: 5102ffff pbn \$2,17c <Main\+0x17c>
184: 58020001 pbnn \$2,188 <Main\+0x188>
188: 5902ffff pbnn \$2,184 <Main\+0x184>
18c: 520c0001 pbz \$12,190 <Main\+0x190>
190: 5316ffff pbz \$22,18c <Main\+0x18c>
194: 5a200001 pbnz \$32,198 <Main\+0x198>
198: 5b34ffff pbnz \$52,194 <Main\+0x194>
19c: 56190001 pbod \$25,1a0 <Main\+0x1a0>
1a0: 5719ffff pbod \$25,19c <Main\+0x19c>
1a4: 5e190001 pbev \$25,1a8 <Main\+0x1a8>
1a8: 5f19ffff pbev \$25,1a4 <Main\+0x1a4>
1ac: 6002df0b csn \$2,\$223,\$11
1b0: 610c14cd csn \$12,\$20,205
1b4: 6802df0b csnn \$2,\$223,\$11
1b8: 690c14cd csnn \$12,\$20,205
1bc: 6202cb0b csz \$2,\$203,\$11
1c0: 630cc8cd csz \$12,\$200,205
1c4: 6a02cb0b csnz \$2,\$203,\$11
1c8: 6b0cc8cd csnz \$12,\$200,205
1cc: 6402cb0b csp \$2,\$203,\$11
1d0: 650cc8cd csp \$12,\$200,205
1d4: 6c02cb0b csnp \$2,\$203,\$11
1d8: 6d0cc8cd csnp \$12,\$200,205
1dc: 6602cb0b csod \$2,\$203,\$11
1e0: 670cc8cd csod \$12,\$200,205
1e4: 6e02cb0b csev \$2,\$203,\$11
1e8: 6f0cc8cd csev \$12,\$200,205
1ec: 7002df0b zsn \$2,\$223,\$11
1f0: 710c14cd zsn \$12,\$20,205
1f4: 7802df0b zsnn \$2,\$223,\$11
1f8: 790c14cd zsnn \$12,\$20,205
1fc: 7202cb0b zsz \$2,\$203,\$11
200: 730cc8cd zsz \$12,\$200,205
204: 7a02cb0b zsnz \$2,\$203,\$11
208: 7b0cc8cd zsnz \$12,\$200,205
20c: 7402cb0b zsp \$2,\$203,\$11
210: 750cc8cd zsp \$12,\$200,205
214: 7c02cb0b zsnp \$2,\$203,\$11
218: 7d0cc8cd zsnp \$12,\$200,205
21c: 7602cb0b zsod \$2,\$203,\$11
220: 770cc8cd zsod \$12,\$200,205
224: 7e02cb0b zsev \$2,\$203,\$11
228: 7f0cc8cd zsev \$12,\$200,205
22c: 8002000b ldb \$2,\$0,\$11
230: 810c14cd ldb \$12,\$20,205
234: 8802000b ldt \$2,\$0,\$11
238: 890c14cd ldt \$12,\$20,205
23c: 8202000b ldbu \$2,\$0,\$11
240: 830c14cd ldbu \$12,\$20,205
244: 8a02000b ldtu \$2,\$0,\$11
248: 8b0c14cd ldtu \$12,\$20,205
24c: 8402000b ldw \$2,\$0,\$11
250: 850c14cd ldw \$12,\$20,205
254: 8c02000b ldo \$2,\$0,\$11
258: 8d0c14cd ldo \$12,\$20,205
25c: 8602000b ldwu \$2,\$0,\$11
260: 870c14cd ldwu \$12,\$20,205
264: 8e02000b ldou \$2,\$0,\$11
268: 8f0c14cd ldou \$12,\$20,205
26c: 9802000b ldvts \$2,\$0,\$11
270: 990c14cd ldvts \$12,\$20,205
274: 9202000b ldht \$2,\$0,\$11
278: 930c14cd ldht \$12,\$20,205
27c: 9b7014cd preld 112,\$20,205
280: 9a7014e1 preld 112,\$20,\$225
284: 9402000b cswap \$2,\$0,\$11
288: 950c14cd cswap \$12,\$20,205
28c: 9d7014cd prego 112,\$20,205
290: 9c7014e1 prego 112,\$20,\$225
294: 9602000b ldunc \$2,\$0,\$11
298: 970c14cd ldunc \$12,\$20,205
29c: 9e02000b go \$2,\$0,\$11
2a0: 9f0c14cd go \$12,\$20,205
2a4: a0020a97 stb \$2,\$10,\$151
2a8: a10c14cd stb \$12,\$20,205
2ac: a8200a97 stt \$32,\$10,\$151
2b0: a90c14cd stt \$12,\$20,205
2b4: a2020a97 stbu \$2,\$10,\$151
2b8: a30c14cd stbu \$12,\$20,205
2bc: aa200a97 sttu \$32,\$10,\$151
2c0: ab0c14cd sttu \$12,\$20,205
2c4: a4020a97 stw \$2,\$10,\$151
2c8: a50cdccd stw \$12,\$220,205
2cc: ac20aa97 sto \$32,\$170,\$151
2d0: adb614f5 sto \$182,\$20,245
2d4: a6020a97 stwu \$2,\$10,\$151
2d8: a70cdccd stwu \$12,\$220,205
2dc: ae20aa97 stou \$32,\$170,\$151
2e0: afb614f5 stou \$182,\$20,245
2e4: b020aa97 stsf \$32,\$170,\$151
2e8: b1b614f5 stsf \$182,\$20,245
2ec: b97014cd syncd 112,\$20,205
2f0: b87014e1 syncd 112,\$20,\$225
2f4: b220aa97 stht \$32,\$170,\$151
2f8: b3b614f5 stht \$182,\$20,245
2fc: bb7014cd prest 112,\$20,205
300: ba7014e1 prest 112,\$20,\$225
304: b420aa97 stco 32,\$170,\$151
308: b5b614f5 stco 182,\$20,245
30c: bd7014cd syncid 112,\$20,205
310: bc0014e1 syncid 0,\$20,\$225
314: b620aa97 stunc \$32,\$170,\$151
318: b7b614f5 stunc \$182,\$20,245
31c: be20aa97 pushgo \$32,\$170,\$151
320: bfb614f5 pushgo \$182,\$20,245
324: c18ec800 set \$142,\$200
328: c020aa97 or \$32,\$170,\$151
32c: c1b614f5 or \$182,\$20,245
330: c820aa97 and \$32,\$170,\$151
334: c9b614f5 and \$182,\$20,245
338: c220aa97 orn \$32,\$170,\$151
33c: c3b614f5 orn \$182,\$20,245
340: ca20aa97 andn \$32,\$170,\$151
344: cbb614f5 andn \$182,\$20,245
348: c420aa97 nor \$32,\$170,\$151
34c: c5b614f5 nor \$182,\$20,245
350: cc20aa97 nand \$32,\$170,\$151
354: cdb614f5 nand \$182,\$20,245
358: c620aa97 xor \$32,\$170,\$151
35c: c7b614f5 xor \$182,\$20,245
360: ce20aa97 nxor \$32,\$170,\$151
364: cfb614f5 nxor \$182,\$20,245
368: d020aa97 bdif \$32,\$170,\$151
36c: d1b614f5 bdif \$182,\$20,245
370: d820aa97 mux \$32,\$170,\$151
374: d9b614f5 mux \$182,\$20,245
378: d220aa97 wdif \$32,\$170,\$151
37c: d3b614f5 wdif \$182,\$20,245
380: da20aa97 sadd \$32,\$170,\$151
384: dbb600f5 sadd \$182,\$0,245
388: d420aa97 tdif \$32,\$170,\$151
38c: d5b614f5 tdif \$182,\$20,245
390: dc20aa97 mor \$32,\$170,\$151
394: ddb614f5 mor \$182,\$20,245
398: d620aa97 odif \$32,\$170,\$151
39c: d7b614f5 odif \$182,\$20,245
3a0: de201197 mxor \$32,\$17,\$151
3a4: df52b418 mxor \$82,\$180,24
3a8: e004ffff seth \$4,0xffff
3ac: e05e0000 seth \$94,0x0
3b0: e00400ff seth \$4,0xff
3b4: e05e04d2 seth \$94,0x4d2
3b8: e15e04d2 setmh \$94,0x4d2
3bc: e85e04d2 orh \$94,0x4d2
3c0: e95e04d2 ormh \$94,0x4d2
3c4: e25e04d2 setml \$94,0x4d2
3c8: e35e04d2 setl \$94,0x4d2
3cc: ea5e04d2 orml \$94,0x4d2
3d0: eb5e04d2 orl \$94,0x4d2
3d4: e45e04d2 inch \$94,0x4d2
3d8: e55e04d2 incmh \$94,0x4d2
3dc: ec5e04d2 andnh \$94,0x4d2
3e0: ed5e04d2 andnmh \$94,0x4d2
3e4: e65e04d2 incml \$94,0x4d2
3e8: e75e04d2 incl \$94,0x4d2
3ec: ee5e04d2 andnml \$94,0x4d2
3f0: ef5e04d2 andnl \$94,0x4d2
3f4: f1ffffff jmp 3f0 <Main\+0x3f0>
3f8: f0000001 jmp 3fc <Main\+0x3fc>
3fc: f82afffe pop 42,65534
400: f90000ff resume 255
404: f9000000 resume 0
408: f9000001 resume 1
40c: f2190001 pushj \$25,410 <Main\+0x410>
410: f319ffff pushj \$25,40c <Main\+0x40c>
414: fa040000 save \$4,0
418: fb0000ea unsave 0,\$234
41c: f4190001 geta \$25,420 <Main\+0x420>
420: f519ffff geta \$25,41c <Main\+0x41c>
424: fc7a1201 sync 8000001
428: fd010203 swym 1,2,3
42c: fd000000 swym 0,0,0
430: f7040022 put rJ,34
434: f6040086 put rJ,\$134
438: feea0004 get \$234,rJ
43c: ff000000 trip 0,0,0
440: ff050607 trip 5,6,7
/pop-op.d
0,0 → 1,10
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: f8840def pop 132,3567
4: f8845678 pop 132,22136
8: f8170def pop 23,3567
c: f8175678 pop 23,22136
/set.s
0,0 → 1,9
# Test the 'r'-type operand and the mapping of SET to OR(I) and SETL.
Main SET $45,1123
SET $57,$67
SET $78,X
SET Y,1123
SET Y,$67
SET Y,X
X IS $31
Y IS $117
/greg9.d
0,0 → 1,14
# objdump: -h
 
.*: file format elf64-mmix
 
Sections:
Idx Name Size VMA LMA File off Algn
0 \.text 0+4 0+ 0+ 0+40 2\*\*2
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 \.data 0+ 0+ 0+ 0+44 2\*\*0
CONTENTS, ALLOC, LOAD, DATA
2 \.bss 0+ 0+ 0+ 0+44 2\*\*0
ALLOC
3 \.MMIX\.reg_contents 0+6f0 0+ 0+ 0+44 2\*\*0
CONTENTS
/prefix1.d
0,0 → 1,38
# objdump: -rt
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ l \.text 0+ a
0+4 l \.text 0+ c
0+24 l \.text 0+ d
0+8 l \.text 0+ prea
0+c l \.text 0+ pre:c
0+10 l \.text 0+ prefixa
0+14 l \.text 0+ pre:fix:c
0+18 l \.text 0+ aprefixa
0+1c l \.text 0+ aprefix:c
0+20 l \.text 0+ a0
0+ \*UND\* 0+ b
0+ \*UND\* 0+ preb
0+ \*UND\* 0+ pre:d
0+ \*UND\* 0+ prefixb
0+ \*UND\* 0+ pre:fix:d
0+ \*UND\* 0+ aprefixb
0+ \*UND\* 0+ aprefix:d
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+ R_MMIX_32 b
0+4 R_MMIX_32 \.text\+0x0+24
0+8 R_MMIX_32 preb
0+c R_MMIX_32 pre:d
0+10 R_MMIX_32 prefixb
0+14 R_MMIX_32 pre:fix:d
0+18 R_MMIX_32 aprefixb
0+1c R_MMIX_32 aprefix:d
0+20 R_MMIX_32 \.text
0+24 R_MMIX_32 \.text\+0x0+4
/pop-op.l
0,0 → 1,20
GAS for MMIX .*/pop-op\.s page 1
 
 
1 #.*
2 #.*
3 0000 F8840DEF Main POP 132,3567
4 0004 F8845678 POP 132,YZ
5 0008 F8170DEF POP X,3567
6 000c F8175678 POP X,YZ
7 X IS 23
8 YZ IS #5678
GAS for MMIX .*/pop-op\.s page 2
 
 
DEFINED SYMBOLS
.*/pop-op\.s:3 \.text:0000000000000000 Main
\*ABS\*:0000000000005678 YZ
\*ABS\*:0000000000000017 X
 
NO UNDEFINED SYMBOLS
/greg1.s
0,0 → 1,16
# Use of GREG with mmixal syntax.
D4 SET $123,456
E6 SET $234,7899
 
A0 GREG 0
B1 GREG 1
C3 GREG D4
D5 GREG
GREG E6+24
F7 GREG @
GREG @ % Equivalent to F7, unless -no-merge-gregs.
G8 GREG #F7
H9 GREG @ % Equivalent to F7, unless -no-merge-gregs.
 
SWYM 2,3,4
Main SWYM 1,2,3
/builtin1.d
0,0 → 1,22
# objdump: -dtr
 
# Make sure we can override a built-in symbol with a known constant, like
# with mmixal.
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+14 l \*ABS\* 0+ rJ
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ g F \.text 0+ Main
 
 
Disassembly of section \.text:
 
0+ <Main>:
0: fe050014 get \$5,rL
4: fe060014 get \$6,rL
8: f6140007 put rL,\$7
c: f6140008 put rL,\$8
/err-loc-8.s
0,0 → 1,4
% { dg-do assemble { target mmix-*-* } }
LOC #201
.p2align 0
TETRA 1 % { dg-error "unaligned data at an absolute location" "" }
/basep-1.d
0,0 → 1,10
#objdump: -dr
 
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0+ <a>:
0: 0000002a trap 0,0,42
4: 8d2b0034 ldo \$43,\$0,52
6: R_MMIX_REG \.MMIX\.reg_contents
/pop-op.s
0,0 → 1,8
# Check different type of operands to SWYM etc.
# No need to check the canonical three constants.
Main POP 132,3567
POP 132,YZ
POP X,3567
POP X,YZ
X IS 23
YZ IS #5678
/get-op-r.d
0,0 → 1,11
# objdump: -dr
# as: -linkrelax
# source: get-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fe7b0004 get \$123,rJ
4: fe2d0013 get \$45,rG
8: fef5001f get \$245,rZZ
/basep-1b.d
0,0 → 1,14
#source: basep-1.s
#as: -linker-allocated-gregs
#objdump: -dr
 
# Check that this test isn't mistreated with -linker-allocated-gregs.
 
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0+ <a>:
0: 0000002a trap 0,0,42
4: 8d2b0034 ldo \$43,\$0,52
6: R_MMIX_REG \.MMIX\.reg_contents
/geta-op.d
0,0 → 1,25
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fd000000 swym 0,0,0
 
0000000000000004 <here>:
4: fd000000 swym 0,0,0
8: f519ffff geta \$25,4 <here>
 
000000000000000c <at>:
c: f4200000 geta \$32,c <at>
10: 424e0008 bz \$78,30 <there>
14: f35bfffc pushj \$91,4 <here>
18: f387fffb pushj \$135,4 <here>
1c: f4870005 geta \$135,30 <there>
20: f2870004 pushj \$135,30 <there>
24: f2490003 pushj \$73,30 <there>
28: f2380002 pushj \$56,30 <there>
2c: 5f87fff6 pbev \$135,4 <here>
 
0000000000000030 <there>:
30: fd000000 swym 0,0,0
/greg9.s
0,0 → 1,8
% Check that we can allocate max number of GREGs.
% A bit cheesy: we allocate anonymous GREGs with no handle. This isn't
% generally useful, but it helps keeping the number of lines down, and we
% check that the right thing happened in the object file.
Main SWYM 0
.rept 222
GREG
.endr
/prefix1.s
0,0 → 1,20
# Use of PREFIX; sanity check only.
.text
a TETRA b
:c TETRA :d
 
PREFIX pre
a TETRA b
:pre:c TETRA :pre:d
 
PREFIX fix
a TETRA b
:pre:fix:c TETRA :pre:fix:d
 
PREFIX :aprefix
a TETRA b
:aprefix:c TETRA :aprefix:d
 
PREFIX :
a0 TETRA a
d TETRA c
/basep-9.d
0,0 → 1,28
#objdump: -srt
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ l O \.bss 0+4 comm_symbol3
0+4 l O \.bss 0+4 comm_symbol4
0+ l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
0+4 O \*COM\* 0+4 comm_symbol1
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+2 R_MMIX_REG \.MMIX\.reg_contents\+0x0+8
0+6 R_MMIX_REG \.MMIX\.reg_contents
0+a R_MMIX_REG \.MMIX\.reg_contents
 
RELOCATION RECORDS FOR \[\.MMIX\.reg_contents\]:
OFFSET TYPE VALUE
0+ R_MMIX_64 \.bss
0+8 R_MMIX_64 comm_symbol1
 
Contents of section \.text:
0000 232a0000 232c0000 232d0004 .*
Contents of section \.MMIX\.reg_contents:
0000 00000000 00000000 00000000 00000000 .*
/geta-op.l
0,0 → 1,31
GAS for MMIX .*/geta-op\.s page 1
 
 
1 #.*
2 0000 FD000000 Main SWYM 0,0,0
3 0004 FD000000 here SWYM 0,0,0
4 0008 F519FFFF GETA \$25,here
5 000c F4200000 at GETA \$32,at
6 0010 424E0008 BZ \$78,there
7 0014 F35BFFFC PUSHJ X0,here
8 0018 F387FFFB PUSHJ X,here
9 001c F4870005 GETA X,there
10 0020 F2870004 PUSHJ X,there
11 0024 F2490003 PUSHJ \$73,there
12 0028 F2380002 PUSHJ 56,there
13 002c 5F87FFF6 PBEV X,here
14 0030 FD000000 there SWYM 0,0,0
15 X IS \$135
16 X0 IS 91
GAS for MMIX .*/geta-op\.s page 2
 
 
DEFINED SYMBOLS
.*/geta-op\.s:2 \.text:0000000000000000 Main
.*/geta-op\.s:3 \.text:0000000000000004 here
.*/geta-op\.s:5 \.text:000000000000000c at
.*/geta-op\.s:14 \.text:0000000000000030 there
\*ABS\*:000000000000005b X0
\*REG\*:0000000000000087 X
 
NO UNDEFINED SYMBOLS
/builtin1.s
0,0 → 1,8
# When disallowing built-in names, we have to treat GET and PUT
# specially, so when parsing the special register operand we do
# not use the symbol table.
rJ IS 20
Main GET $5,rJ
GET $6,:rJ
PUT rJ,$7
PUT :rJ,$8
/basep-1.s
0,0 → 1,4
# Simple base-plus-offset
b GREG @
a TETRA 42
LDO $43,a+52
/geta-op.s
0,0 → 1,16
# Simple GETA/BRANCH/PUSHJ operands.
Main SWYM 0,0,0
here SWYM 0,0,0
GETA $25,here
at GETA $32,at
BZ $78,there
PUSHJ X0,here
PUSHJ X,here
GETA X,there
PUSHJ X,there
PUSHJ $73,there
PUSHJ 56,there
PBEV X,here
there SWYM 0,0,0
X IS $135
X0 IS 91
/basep-9.s
0,0 → 1,9
# Test that we handle COMM-type symbols with base-plus-offset relocs.
.comm comm_symbol1,4,4
.lcomm comm_symbol3,4
GREG comm_symbol1
GREG comm_symbol3
LDA $42,comm_symbol1
LDA $44,comm_symbol3
LDA $45,comm_symbol4
.lcomm comm_symbol4,4
/round2-op-r.d
0,0 → 1,19
# objdump: -dr
# as: -linkrelax
# source: round2-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: 088700f4 flot \$135,\$244
4: 0a8700e9 flotu \$135,\$233
8: 0d85005b sflot \$133,91
c: 177b00f4 fint \$123,\$244
10: 0c8500f4 sflot \$133,\$244
14: 0987005b flot \$135,91
18: 0f7b005b sflotu \$123,91
1c: 05ad00e9 fix \$173,\$233
20: 0bad00d5 flotu \$173,213
24: 078700f4 fixu \$135,\$244
28: 0b870077 flotu \$135,119
/reloc8.d
0,0 → 1,18
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: b9002dea syncd 0,\$45,234
1: R_MMIX_8 foo
4: 372f002a negu \$47,0,42
6: R_MMIX_8 bar\+0x30
8: fd00b26e swym 0,178,110
9: R_MMIX_8 baz\+0xfffffffffffffffe
c: ff000000 trip 0,0,0
d: R_MMIX_8 fee\+0xffffffffffffffff
e: R_MMIX_8 fie\+0x1
f: R_MMIX_8 foe\+0x3
10: f9000000 resume 0
13: R_MMIX_8 foobar\+0x8
/err-bspec-2.s
0,0 → 1,7
% { dg-do assemble { target mmix-*-* } }
Main SET $45,23
BSPEC 5
TETRA 4
BSPEC 6 % { dg-error "BSPEC already active" "" }
TETRA 5
ESPEC
/comment-1.d
0,0 → 1,46
#as: -no-expand
#readelf: -Ssrx1 -x6
There are 10 section headers, starting at offset 0x...:
#...
\[ 5\] \.MMIX\.spec_data\.4 PROGBITS 0+ 0+c4
0+ 0+ 0 0 1
\[ 6\] \.MMIX\.reg_content PROGBITS 0+ 0+c4
0+8 0+ W 0 0 1
#...
Relocation section '\.rela\.text' at offset 0x... contains 5 entries:
.*
0+34 .* R_MMIX_ADDR19 +0+ +target +\+ 2c
0+46 .* R_MMIX_16 +0+ +target2 +\+ 30
0+48 .* R_MMIX_ADDR27 +0+ +target3 +\+ 38
0+54 .* R_MMIX_ADDR19 +0+ +target3 +\+ 0
0+78 .* R_MMIX_LOCAL +0+30
 
Symbol table '\.symtab' contains 12 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 0+ 0 NOTYPE LOCAL DEFAULT UND
1: 0+ 0 SECTION LOCAL DEFAULT 1
2: 0+ 0 SECTION LOCAL DEFAULT 3
3: 0+ 0 SECTION LOCAL DEFAULT 4
4: 0+18 0 NOTYPE LOCAL DEFAULT ABS z
5: 0+80 0 NOTYPE LOCAL DEFAULT 1 x
6: 0+ 0 SECTION LOCAL DEFAULT 5
7: 0+ 0 SECTION LOCAL DEFAULT 6
8: 0+ 0 FUNC GLOBAL DEFAULT 1 Main
9: 0+ 0 NOTYPE GLOBAL DEFAULT UND target
10: 0+ 0 NOTYPE GLOBAL DEFAULT UND target2
11: 0+ 0 NOTYPE GLOBAL DEFAULT UND target3
 
Hex dump of section '\.text':
NOTE: This section has relocations against it, but these have NOT been applied to this dump.
0x0+ 0000007b 00010017 00010203 01030201 .*
0x0+10 09050006 09070208 0509000a 050b030c .*
0x0+20 230f1011 23121300 23141516 34170018 .*
0x0+30 34191a1b 401c0000 b91d1e1f bf202122 .*
0x0+40 c1232400 e0250000 f0000000 f8260027 .*
0x0+50 f9000028 f2290000 fa2a0000 fb00002b .*
0x0+60 f604002c fe2d0004 00000000 03020104 .*
0x0+70 0007000c 00000014 00000000 0000001c .*
0x0+80 fd221538 .*
 
Hex dump of section '\.MMIX\.reg_contents':
0x0+ 00000000 00000033 .*
/reloc8.l
0,0 → 1,25
GAS for MMIX .*/reloc8\.s page 1
 
 
1 #.*
2 0000 B9002DEA Main SYNCD foo,\$45,234
3 0004 372F002A NEGU \$47,bar\+48,localsym
4 0008 FD00B26E SWYM baz-2,45678
5 000c FF000000 TRIP fee-1,fie\+1,foe\+3
6 0010 F9000000 RESUME foobar\+8
7 localsym IS 42
GAS for MMIX .*/reloc8\.s page 2
 
 
DEFINED SYMBOLS
.*/reloc8\.s:2 \.text:0000000000000000 Main
\*ABS\*:000000000000002a localsym
 
UNDEFINED SYMBOLS
foo
bar
baz
fee
fie
foe
foobar
/greg2.d
0,0 → 1,35
# objdump: -rst
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ l \.text 0+ D4
0+4 l \.text 0+ E6
0+ l \.MMIX\.reg_contents 0+ H9
0+8 l \.MMIX\.reg_contents 0+ G8
0+ l \.MMIX\.reg_contents 0+ F7
0+18 l \.MMIX\.reg_contents 0+ D5
0+20 l \.MMIX\.reg_contents 0+ C3
0+28 l \.MMIX\.reg_contents 0+ B1
0+30 l \.MMIX\.reg_contents 0+ A0
0+0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
0+c g F \.text 0+ Main
 
 
RELOCATION RECORDS FOR \[\.MMIX\.reg_contents\]:
OFFSET TYPE VALUE
0+ R_MMIX_64 \.text\+0x0+8
0+10 R_MMIX_64 \.text\+0x0+1c
0+20 R_MMIX_64 \.text
 
 
Contents of section \.text:
0000 e37b01c8 e3ea1edb fd020304 fd010203 .*
Contents of section \.MMIX\.reg_contents:
0000 00000000 00000000 00000000 000000f7 .*
0010 00000000 00000000 00000000 00000000 .*
0020 00000000 00000000 00000000 00000001 .*
0030 00000000 00000000 .*
/err-bpo4.s
0,0 → 1,7
% { dg-do assemble { target mmix-*-* } }
 
# Base-plus-offset without -linker-allocated-gregs.
 
Main PUSHGO $42,fn % { dg-error "no suitable GREG definition" "" }
SWYM 0
extfn POP 0,0
/op-0-1.d
0,0 → 1,28
#objdump: -srt
#as: -x --no-stubs
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ l \*ABS\* 0+ zero0
0+ l \*ABS\* 0+ zero1
0+ l \*ABS\* 0+ zero2
0+ g F \.text 0+ Main
 
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+ R_MMIX_JMP \*ABS\*
0+14 R_MMIX_GETA \*ABS\*
0+24 R_MMIX_PUSHJ \*ABS\*
 
 
Contents of section \.text:
0000 f0000000 fd000000 fd000000 fd000000 .*
0010 fd000000 f4070000 fd000000 fd000000 .*
0020 fd000000 f2080000 fd000000 fd000000 .*
0030 fd000000 fd000000 .*
 
/swym-op-r.d
0,0 → 1,16
# objdump: -dr
# as: -linkrelax
# source: swym-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fd840def swym 132,13,239
4: ff840def trip 132,13,239
8: 00845678 trap 132,86,120
c: 00170def trap 23,13,239
10: 0023cace trap 35,202,206
14: ff170c43 trip 23,12,67
18: ff175678 trip 23,86,120
1c: fd12d687 swym 18,214,135
/reloc8.s
0,0 → 1,7
# Simple relocations against 8-bit extern symbols.
Main SYNCD foo,$45,234
NEGU $47,bar+48,localsym
SWYM baz-2,45678
TRIP fee-1,fie+1,foe+3
RESUME foobar+8
localsym IS 42
/prefix2.d
0,0 → 1,15
# objdump: -dtr
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ g F \.text 0+ Main
 
 
Disassembly of section \.text:
 
0+ <Main>:
0: 220116e9 addu \$1,\$22,\$233
/comment-1.s
0,0 → 1,46
# Check that "naked" comments are accepted and ignored on all different
# mnemonic types and pseudos. The goal is to use all combinations of
# operands where varying number of operands are allowed. If any
# combinations are missing, for simplicity, add them to another file.
Main TRAP 123 ignore; x y z
TRAP 1,23 all; x y z
TRAP 1,2,3 these; x y z
FCMP $3,$2,$1 comments; x y z
FLOT $5,6 and; x y z
FLOT $7,ROUND_UP,8 do; x y z
FIX $9,$10 nothing; x y z
FIX $11,ROUND_DOWN,$12 that; x y z
ADDU $15,$16,17 would make; x y z
LDA $18,$19 a; x y z
LDA $20,$21,22 difference; x y z
NEG $23,$24 in; x y z
NEG $25,26,$27 the; x y z
bn $28,target + 44 generated; x y z
SYNCD 29,$30,31 code; x y z
PUSHGO 32,$33,34 so; x y z
SET $35,$36 it; x y z
SETH $37,target2 + 48 is; x y z
JMP target3 + 56 as; x y z
POP 38,39 if; x y z
RESUME 40 it; x y z
PUSHJ $41,target3 had; x y z
SAVE $42,0 never; x y z
UNSAVE 0,$43 been; x y z
PUT rJ,$44 there; x y z
GET $45,rJ at all.; x y z
 
LOC @+4 likewise; x y z
PREFIX : with; x y z
BYTE 3,2,1,0+4 the; x y z
WYDE 7,4+8 different; x y z
TETRA 8+12 pseudo; x y z
OCTA 12+16 ops,; x y z
LOCAL 48 they; x y z
BSPEC 49 too; x y z
# Specifying an operand field (although ignored) is necessary for a comment
# with a ';' to be ignorable and not interpreted as eoln, both for GAS and
# mmixal.
ESPEC 0 ignore; x y z
GREG 50 + 1 naked; x y z
z IS 9 + 8 + 7 comments; x y z
x SWYM 34,21,56
/err-loc-1.s
0,0 → 1,5
% { dg-do assemble { target mmix-*-* } }
LOC #200
Main SET $45,23
LOC #100 % { dg-error "LOC expression stepping backwards" "" }
SET $57,$67
/regx-op-r.d
0,0 → 1,36
# objdump: -dr
# as: -linkrelax
# source: regx-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: 9a7b0c43 preld 123,\$12,\$67
4: 9c200c43 prego 32,\$12,\$67
8: b87b2043 syncd 123,\$32,\$67
c: ba008543 prest 0,\$133,\$67
10: b47b0c49 stco 123,\$12,\$73
14: bc820ce9 syncid 130,\$12,\$233
18: 9a7b26d4 preld 123,\$38,\$212
1c: 9c01afb5 prego 1,\$175,\$181
20: b97b0cb0 syncd 123,\$12,176
24: bb200cb0 prest 32,\$12,176
28: b57b84b0 stco 123,\$132,176
2c: bde885b0 syncid 232,\$133,176
30: 9b7b0ccb preld 123,\$12,203
34: 9de70cd5 prego 231,\$12,213
38: b97b26d3 syncd 123,\$38,211
3c: bb04afa1 prest 4,\$175,161
40: b57b0c00 stco 123,\$12,0
44: bd170c00 syncid 23,\$12,0
48: 9b020c00 preld 2,\$12,0
4c: 9de88500 prego 232,\$133,0
50: b97b0c00 syncd 123,\$12,0
54: bb0d0c00 prest 13,\$12,0
58: b57b2600 stco 123,\$38,0
5c: bd04af00 syncid 4,\$175,0
60: 9b7b0c00 preld 123,\$12,0
64: 9d200c00 prego 32,\$12,0
68: b97b2000 syncd 123,\$32,0
6c: bbe88500 prest 232,\$133,0
/pushgo-op.d
0,0 → 1,62
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: be170c43 pushgo \$23,\$12,\$67
4: becb0c43 pushgo \$203,\$12,\$67
8: be200c43 pushgo \$32,\$12,\$67
c: be200c43 pushgo \$32,\$12,\$67
10: be172043 pushgo \$23,\$32,\$67
14: becb2043 pushgo \$203,\$32,\$67
18: bee88543 pushgo \$232,\$133,\$67
1c: bee88543 pushgo \$232,\$133,\$67
20: be170c49 pushgo \$23,\$12,\$73
24: becb0c49 pushgo \$203,\$12,\$73
28: be1f0ce9 pushgo \$31,\$12,\$233
2c: be1f0ce9 pushgo \$31,\$12,\$233
30: be1726d4 pushgo \$23,\$38,\$212
34: becb26d4 pushgo \$203,\$38,\$212
38: be04afb5 pushgo \$4,\$175,\$181
3c: be04afb5 pushgo \$4,\$175,\$181
40: bf170cb0 pushgo \$23,\$12,176
44: bfcb0cb0 pushgo \$203,\$12,176
48: bf200cb0 pushgo \$32,\$12,176
4c: bf200cb0 pushgo \$32,\$12,176
50: bf1720b0 pushgo \$23,\$32,176
54: bfcb20b0 pushgo \$203,\$32,176
58: bfe885b0 pushgo \$232,\$133,176
5c: bfe885b0 pushgo \$232,\$133,176
60: bf170ccb pushgo \$23,\$12,203
64: bfcb0ccb pushgo \$203,\$12,203
68: bf1f0cd5 pushgo \$31,\$12,213
6c: bf1f0cd5 pushgo \$31,\$12,213
70: bf1726d3 pushgo \$23,\$38,211
74: bfcb26d3 pushgo \$203,\$38,211
78: bf04afa1 pushgo \$4,\$175,161
7c: bf04afa1 pushgo \$4,\$175,161
80: bf170c00 pushgo \$23,\$12,0
84: bfcb0c00 pushgo \$203,\$12,0
88: bf290c00 pushgo \$41,\$12,0
8c: bff10c00 pushgo \$241,\$12,0
90: bf171b00 pushgo \$23,\$27,0
94: bfcb3000 pushgo \$203,\$48,0
98: bfdfdb00 pushgo \$223,\$219,0
9c: bfdfe500 pushgo \$223,\$229,0
a0: bf170c00 pushgo \$23,\$12,0
a4: bfcb0c00 pushgo \$203,\$12,0
a8: bf200c00 pushgo \$32,\$12,0
ac: bf200c00 pushgo \$32,\$12,0
b0: bf172000 pushgo \$23,\$32,0
b4: bfcb2000 pushgo \$203,\$32,0
b8: bfe88500 pushgo \$232,\$133,0
bc: bfe88500 pushgo \$232,\$133,0
c0: bf170c00 pushgo \$23,\$12,0
c4: bfcb0c00 pushgo \$203,\$12,0
c8: bf1f0c00 pushgo \$31,\$12,0
cc: bf1f0c00 pushgo \$31,\$12,0
d0: bf172600 pushgo \$23,\$38,0
d4: bfcb2600 pushgo \$203,\$38,0
d8: bf04af00 pushgo \$4,\$175,0
dc: bf04af00 pushgo \$4,\$175,0
/reloclab-r.d
0,0 → 1,49
#objdump: -dr
#as: -linkrelax -x --no-stubs
#source: reloclab.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: f0000000 jmp 0 <Main>
0: R_MMIX_JMP foo\+0x8
4: fd000000 swym 0,0,0
8: fd000000 swym 0,0,0
c: fd000000 swym 0,0,0
10: fd000000 swym 0,0,0
14: f0000004 jmp 24 <here>
14: R_MMIX_ADDR27 \.text\+0x24
18: f4080003 geta \$8,24 <here>
18: R_MMIX_ADDR19 \.text\+0x24
1c: 46630002 bod \$99,24 <here>
1c: R_MMIX_ADDR19 \.text\+0x24
20: fd000000 swym 0,0,0
 
0000000000000024 <here>:
24: 42de0000 bz \$222,24 <here>
24: R_MMIX_CBRANCH bar\+0x10
28: fd000000 swym 0,0,0
2c: fd000000 swym 0,0,0
30: fd000000 swym 0,0,0
34: fd000000 swym 0,0,0
38: fd000000 swym 0,0,0
 
000000000000003c <there>:
3c: f4040000 geta \$4,3c <there>
3c: R_MMIX_GETA baz
40: fd000000 swym 0,0,0
44: fd000000 swym 0,0,0
48: fd000000 swym 0,0,0
4c: f2070000 pushj \$7,4c <there\+0x10>
4c: R_MMIX_PUSHJ foobar
50: fd000000 swym 0,0,0
54: fd000000 swym 0,0,0
58: fd000000 swym 0,0,0
5c: fd000000 swym 0,0,0
60: f1fffff7 jmp 3c <there>
60: R_MMIX_ADDR27 \.text\+0x3c
64: f558fff6 geta \$88,3c <there>
64: R_MMIX_ADDR19 \.text\+0x3c
68: 476ffff5 bod \$111,3c <there>
68: R_MMIX_ADDR19 \.text\+0x3c
/put-op-r.d
0,0 → 1,17
# objdump: -dr
# as: -linkrelax
# source: put-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: f604007b put rJ,\$123
4: f613002d put rG,\$45
8: f61f00f5 put rZZ,\$245
c: f604006f put rJ,\$111
10: f713002d put rG,45
14: f71f00f5 put rZZ,245
18: f7040000 put rJ,0
1c: f7130000 put rG,0
20: f71f0000 put rZZ,0
/greg2.s
0,0 → 1,21
# Use of .greg; non-mmixal syntax though somewhat corresponding to greg1.
# Note that use-before-definition is allowed.
.text
 
.greg A0,0
.greg B1,1
.greg C3,D4
.greg D5,
.greg ,E6+24 % Somewhat unusable, but hey...
.greg F7,.+8
.greg ,.+8
.greg G8,0xf7
.greg H9,.+8
 
D4:
set $123,456
E6:
set $234,7899
swym 2,3,4
Main:
swym 1,2,3
/builtin2.d
0,0 → 1,24
# as: -no-predefined-syms
# objdump: -dtr
# source: builtin1.s
 
# Make sure we don't look at the symbol table when parsing special
# register names.
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+14 l \*ABS\* 0+ rJ
0+ g F \.text 0+ Main
 
 
Disassembly of section \.text:
 
0+ <Main>:
0: fe050004 get \$5,rJ
4: fe060004 get \$6,rJ
8: f6040007 put rJ,\$7
c: f6040008 put rJ,\$8
/op-0-1.s
0,0 → 1,6
zero0 IS 0
zero1 IS 0
zero2 IS 0
Main JMP zero0
GETA $7,zero1
PUSHJ $8,zero2
/basep-2.d
0,0 → 1,23
#as: --no-predefined-syms
#objdump: -dr
 
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <a>:
0: 0000002a trap 0,0,42
4: 8d2b0034 ldo \$43,\$0,52
6: R_MMIX_REG \.MMIX\.reg_contents\+0x8
\.\.\.
 
0000000000000108 <d>:
108: 0000001c trap 0,0,28
10c: 8d8f000c ldo \$143,\$0,12
10e: R_MMIX_REG \.MMIX\.reg_contents
110: 8df3000c ldo \$243,\$0,12
112: R_MMIX_REG \.MMIX\.reg_contents\+0x8
114: 23670028 addu \$103,\$0,40
116: R_MMIX_REG \.MMIX\.reg_contents
118: 230d0018 addu \$13,\$0,24
11a: R_MMIX_REG \.MMIX\.reg_contents\+0x8
/pushgo-op.l
0,0 → 1,87
GAS for MMIX .*/pushgo-op\.s page 1
 
 
1 #.*
2 #.*
3 0000 BE170C43 Main PUSHGO X,Y,Z
4 0004 BECB0C43 PUSHGO XC,Y,Z
5 0008 BE200C43 PUSHGO \$32,Y,Z
6 000c BE200C43 PUSHGO 32,Y,Z
7 0010 BE172043 PUSHGO X,\$32,Z
8 0014 BECB2043 PUSHGO XC,\$32,Z
9 0018 BEE88543 PUSHGO \$232,\$133,Z
10 001c BEE88543 PUSHGO 232,\$133,Z
11 0020 BE170C49 PUSHGO X,Y,\$73
12 0024 BECB0C49 PUSHGO XC,Y,\$73
13 0028 BE1F0CE9 PUSHGO \$31,Y,\$233
14 002c BE1F0CE9 PUSHGO 31,Y,\$233
15 0030 BE1726D4 PUSHGO X,\$38,\$212
16 0034 BECB26D4 PUSHGO XC,\$38,\$212
17 0038 BE04AFB5 PUSHGO \$4,\$175,\$181
18 003c BE04AFB5 PUSHGO 4,\$175,\$181
19
20 0040 BF170CB0 PUSHGO X,Y,Z0
21 0044 BFCB0CB0 PUSHGO XC,Y,Z0
22 0048 BF200CB0 PUSHGO \$32,Y,Z0
23 004c BF200CB0 PUSHGO 32,Y,Z0
24 0050 BF1720B0 PUSHGO X,\$32,Z0
25 0054 BFCB20B0 PUSHGO XC,\$32,Z0
26 0058 BFE885B0 PUSHGO \$232,\$133,Z0
27 005c BFE885B0 PUSHGO 232,\$133,Z0
28 0060 BF170CCB PUSHGO X,Y,203
29 0064 BFCB0CCB PUSHGO XC,Y,203
30 0068 BF1F0CD5 PUSHGO \$31,Y,213
31 006c BF1F0CD5 PUSHGO 31,Y,213
32 0070 BF1726D3 PUSHGO X,\$38,211
33 0074 BFCB26D3 PUSHGO XC,\$38,211
34 0078 BF04AFA1 PUSHGO \$4,\$175,161
35 007c BF04AFA1 PUSHGO 4,\$175,161
36
37 0080 BF170C00 PUSHGO X,Y
38 0084 BFCB0C00 PUSHGO XC,Y
39
40 0088 BF290C00 PUSHGO \$41,Y
41 008c BFF10C00 PUSHGO 241,Y
42
43 0090 BF171B00 PUSHGO X,\$27
44 0094 BFCB3000 PUSHGO XC,\$48
45
46 0098 BFDFDB00 PUSHGO \$223,\$219
47 009c BFDFE500 PUSHGO 223,\$229
48
49 00a0 BF170C00 PUSHGO X,Y,0
50 00a4 BFCB0C00 PUSHGO XC,Y,0
51 00a8 BF200C00 PUSHGO \$32,Y,0
52 00ac BF200C00 PUSHGO 32,Y,0
53 00b0 BF172000 PUSHGO X,\$32,0
54 00b4 BFCB2000 PUSHGO XC,\$32,0
55 00b8 BFE88500 PUSHGO \$232,\$133,0
56 00bc BFE88500 PUSHGO 232,\$133,0
57 00c0 BF170C00 PUSHGO X,Y,0
GAS for MMIX .*/pushgo-op\.s page 2
 
 
58 00c4 BFCB0C00 PUSHGO XC,Y,0
59 00c8 BF1F0C00 PUSHGO \$31,Y,0
60 00cc BF1F0C00 PUSHGO 31,Y,0
61 00d0 BF172600 PUSHGO X,\$38,0
62 00d4 BFCB2600 PUSHGO XC,\$38,0
63 00d8 BF04AF00 PUSHGO \$4,\$175,0
64 00dc BF04AF00 PUSHGO 4,\$175,0
65 X IS \$23
66 XC IS 203
67 Y IS \$12
68 Z IS \$67
69 Z0 IS 176
GAS for MMIX .*/pushgo-op\.s page 3
 
 
DEFINED SYMBOLS
.*/pushgo-op\.s:3 \.text:0000000000000000 Main
\*REG\*:0000000000000017 X
\*REG\*:000000000000000c Y
\*REG\*:0000000000000043 Z
\*ABS\*:00000000000000cb XC
\*ABS\*:00000000000000b0 Z0
 
NO UNDEFINED SYMBOLS
/mmix-list.exp
0,0 → 1,30
# Copyright (C) 2001, 2007 Free Software Foundation, Inc.
 
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
if { ! [istarget "mmix-*"] } {
return
}
 
proc run_mmix_list_tests { } {
global srcdir subdir runtests
foreach test_name [lsort [find ${srcdir}/${subdir} *.l]] {
# Keep basename.
regsub -all ".*/\(\[^\.\]*\)\.l$" $test_name "\\1" test_name
run_list_test $test_name "-a -x"
}
}
 
run_mmix_list_tests
/1cjmp1b-r.d
0,0 → 1,15
# objdump: -dr
# as: -linkrelax
# source: 1cjmp1b.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fd000000 swym 0,0,0
4: f0000001 jmp 8 <Main\+0x8>
4: R_MMIX_ADDR27 \.text\+0x8
8: f0000000 jmp 8 <Main\+0x8>
8: R_MMIX_ADDR27 \.text\+0x8
c: f1ffffff jmp 8 <Main\+0x8>
c: R_MMIX_ADDR27 \.text\+0x8
/prefix2.s
0,0 → 1,3
# Prefix must not interfere with register names.
PREFIX pre
:Main ADDU $1,$22,$233
/pushgo-op.s
0,0 → 1,69
# PUSHGO. Like T, but $X can be expressed as a constant.
# Using regt-op as a template caused this to go out of control.
Main PUSHGO X,Y,Z
PUSHGO XC,Y,Z
PUSHGO $32,Y,Z
PUSHGO 32,Y,Z
PUSHGO X,$32,Z
PUSHGO XC,$32,Z
PUSHGO $232,$133,Z
PUSHGO 232,$133,Z
PUSHGO X,Y,$73
PUSHGO XC,Y,$73
PUSHGO $31,Y,$233
PUSHGO 31,Y,$233
PUSHGO X,$38,$212
PUSHGO XC,$38,$212
PUSHGO $4,$175,$181
PUSHGO 4,$175,$181
 
PUSHGO X,Y,Z0
PUSHGO XC,Y,Z0
PUSHGO $32,Y,Z0
PUSHGO 32,Y,Z0
PUSHGO X,$32,Z0
PUSHGO XC,$32,Z0
PUSHGO $232,$133,Z0
PUSHGO 232,$133,Z0
PUSHGO X,Y,203
PUSHGO XC,Y,203
PUSHGO $31,Y,213
PUSHGO 31,Y,213
PUSHGO X,$38,211
PUSHGO XC,$38,211
PUSHGO $4,$175,161
PUSHGO 4,$175,161
 
PUSHGO X,Y
PUSHGO XC,Y
 
PUSHGO $41,Y
PUSHGO 241,Y
 
PUSHGO X,$27
PUSHGO XC,$48
 
PUSHGO $223,$219
PUSHGO 223,$229
 
PUSHGO X,Y,0
PUSHGO XC,Y,0
PUSHGO $32,Y,0
PUSHGO 32,Y,0
PUSHGO X,$32,0
PUSHGO XC,$32,0
PUSHGO $232,$133,0
PUSHGO 232,$133,0
PUSHGO X,Y,0
PUSHGO XC,Y,0
PUSHGO $31,Y,0
PUSHGO 31,Y,0
PUSHGO X,$38,0
PUSHGO XC,$38,0
PUSHGO $4,$175,0
PUSHGO 4,$175,0
X IS $23
XC IS 203
Y IS $12
Z IS $67
Z0 IS 176
/basep-2.s
0,0 → 1,12
# Simple base-plus-offset
b GREG @
a TETRA 42
LDO $43,a+52
 
LOC @+256
c GREG @
d TETRA 28
LDO $143,d+12
LDO $243,a+12
LDA $103,d+40
LDA $13,a+24
/reg3-op.d
0,0 → 1,30
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: 18170c43 mul \$23,\$12,\$67
4: 20200c43 add \$32,\$12,\$67
8: 2a0c2043 4addu \$12,\$32,\$67
c: 2ce88543 8addu \$232,\$133,\$67
10: 2e170c49 16addu \$23,\$12,\$73
14: 3e1f0ce9 sru \$31,\$12,\$233
18: 601726d4 csn \$23,\$38,\$212
1c: 7c04afb5 zsnp \$4,\$175,\$181
20: 1b170cb0 mulu \$23,\$12,176
24: 39200cb0 sl \$32,\$12,176
28: 330c20b0 cmpu \$12,\$32,176
2c: 29e885b0 2addu \$232,\$133,176
30: df170ccb mxor \$23,\$12,203
34: c11f0cd5 or \$31,\$12,213
38: cd1726d3 nand \$23,\$38,211
3c: d304afa1 wdif \$4,\$175,161
40: db170c00 sadd \$23,\$12,0
44: df200c00 mxor \$32,\$12,0
48: c30c2000 orn \$12,\$32,0
4c: cbe88500 andn \$232,\$133,0
50: 2f170c00 16addu \$23,\$12,0
54: 391f0c00 sl \$31,\$12,0
58: 23172600 addu \$23,\$38,0
5c: 3104af00 cmp \$4,\$175,0
/resume-op.d
0,0 → 1,10
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: f9000001 resume 1
4: f9000000 resume 0
8: f9000001 resume 1
c: f9000000 resume 0
/err-is-1.s
0,0 → 1,4
% { dg-do assemble { target mmix-*-* } }
IS 42 % { dg-error "empty label field for IS" "" }
2H IS 1
IS 2B % { dg-error "empty label field for IS" "" }
/regy-op.d
0,0 → 1,34
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: 347b0c43 neg \$123,12,\$67
4: 36200c43 negu \$32,12,\$67
8: 347b2043 neg \$123,32,\$67
c: 36008543 negu \$0,133,\$67
10: 347b0c49 neg \$123,12,\$73
14: 36820ce9 negu \$130,12,\$233
18: 347b26d4 neg \$123,38,\$212
1c: 3601afb5 negu \$1,175,\$181
20: 357b0cb0 neg \$123,12,176
24: 37200cb0 negu \$32,12,176
28: 357b84b0 neg \$123,132,176
2c: 37e885b0 negu \$232,133,176
30: 357b0ccb neg \$123,12,203
34: 37e70cd5 negu \$231,12,213
38: 357b26d3 neg \$123,38,211
3c: 3704afa1 negu \$4,175,161
40: 357b0c00 neg \$123,12,0
44: 37170c00 negu \$23,12,0
48: 35020c00 neg \$2,12,0
4c: 37e88500 negu \$232,133,0
50: 347b0043 neg \$123,0,\$67
54: 36200043 negu \$32,0,\$67
58: 357b0020 neg \$123,0,32
5c: 37e80085 negu \$232,0,133
60: 357b00b0 neg \$123,0,176
64: 372000b0 negu \$32,0,176
68: 347b0020 neg \$123,0,\$32
6c: 36e80085 negu \$232,0,\$133
/two-op-r.d
0,0 → 1,24
# objdump: -dr
# as: -linkrelax
# source: two-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: e0175840 seth \$23,0x5840
4: e12d5840 setmh \$45,0x5840
8: e8171ed4 orh \$23,0x1ed4
c: e92d3039 ormh \$45,0x3039
10: e2175840 setml \$23,0x5840
14: e32d5840 setl \$45,0x5840
18: ea171ed4 orml \$23,0x1ed4
1c: eb2d3039 orl \$45,0x3039
20: e42d3039 inch \$45,0x3039
24: e5171ed4 incmh \$23,0x1ed4
28: ec2d5840 andnh \$45,0x5840
2c: ed175840 andnmh \$23,0x5840
30: e6175840 incml \$23,0x5840
34: e72d5840 incl \$45,0x5840
38: ee171ed4 andnml \$23,0x1ed4
3c: ef2d3039 andnl \$45,0x3039
/reg3-op.l
0,0 → 1,46
GAS for MMIX .*/reg3-op\.s page 1
 
 
1 #.*
2 #.*
3 0000 18170C43 Main MUL X,Y,Z
4 0004 20200C43 ADD \$32,Y,Z
5 0008 2A0C2043 4ADDU Y,\$32,Z
6 000c 2CE88543 8ADDU \$232,\$133,Z
7 0010 2E170C49 16ADDU X,Y,\$73
8 0014 3E1F0CE9 SRU \$31,Y,\$233
9 0018 601726D4 CSN X,\$38,\$212
10 001c 7C04AFB5 ZSNP \$4,\$175,\$181
11
12 0020 1B170CB0 MULU X,Y,Z0
13 0024 39200CB0 SL \$32,Y,Z0
14 0028 330C20B0 CMPU Y,\$32,Z0
15 002c 29E885B0 2ADDU \$232,\$133,Z0
16 0030 DF170CCB MXOR X,Y,203
17 0034 C11F0CD5 OR \$31,Y,213
18 0038 CD1726D3 NAND X,\$38,211
19 003c D304AFA1 WDIF \$4,\$175,161
20
21 0040 DB170C00 SADD X,Y,0
22 0044 DF200C00 MXOR \$32,Y,0
23 0048 C30C2000 ORN Y,\$32,0
24 004c CBE88500 ANDN \$232,\$133,0
25 0050 2F170C00 16ADDU X,Y,0
26 0054 391F0C00 SL \$31,Y,0
27 0058 23172600 ADDU X,\$38,0
28 005c 3104AF00 CMP \$4,\$175,0
29 X IS \$23
30 Y IS \$12
31 Z IS \$67
32 Z0 IS 176
GAS for MMIX .*/reg3-op\.s page 2
 
 
DEFINED SYMBOLS
.*/reg3-op\.s:3 \.text:0000000000000000 Main
\*REG\*:0000000000000017 X
\*REG\*:000000000000000c Y
\*REG\*:0000000000000043 Z
\*ABS\*:00000000000000b0 Z0
 
NO UNDEFINED SYMBOLS
/roundr-op-r.d
0,0 → 1,15
# objdump: -dr
# as: -linkrelax
# source: roundr-op.s
.*: file format elf64-mmix
 
Disassembly of section .text:
 
0000000000000000 <Main>:
0: 178701f4 fint \$135,ROUND_OFF,\$244
4: 058702e9 fix \$135,ROUND_UP,\$233
8: 178500f4 fint \$133,\$244
c: 157b04f4 fsqrt \$123,ROUND_NEAR,\$244
10: 17ad02e9 fint \$173,ROUND_UP,\$233
14: 058700f4 fix \$135,\$244
18: 078700f4 fixu \$135,\$244
/resume-op.l
0,0 → 1,19
GAS for MMIX .*/resume-op\.s page 1
 
 
1 # Test the 'z'-type operand, RESUME\.
2 0000 F9000001 Main RESUME X
3 0004 F9000000 RESUME 0
4 0008 F9000001 RESUME 1
5 000c F9000000 RESUME XX
6 X IS 1
7 XX IS 0
GAS for MMIX .*/resume-op\.s page 2
 
 
DEFINED SYMBOLS
.*/resume-op\.s:2 \.text:0000000000000000 Main
\*ABS\*:0000000000000001 X
\*ABS\*:0000000000000000 XX
 
NO UNDEFINED SYMBOLS
/sync-op.d
0,0 → 1,12
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section .text:
 
0000000000000000 <Main>:
0: fc6e6406 sync 7234566
4: fc000000 sync 0
8: fc000001 sync 1
c: fc000000 sync 0
10: fc000001 sync 1
14: fc7c2242 sync 8135234
/regy-op.l
0,0 → 1,51
GAS for MMIX .*/regy-op\.s page 1
 
 
1 #.*
2 #.*
3 0000 347B0C43 Main NEG X,Y,Z
4 0004 36200C43 NEGU \$32,Y,Z
5 0008 347B2043 NEG X,32,Z
6 000c 36008543 NEGU \$0,133,Z
7 0010 347B0C49 NEG X,Y,\$73
8 0014 36820CE9 NEGU \$130,Y,\$233
9 0018 347B26D4 NEG X,38,\$212
10 001c 3601AFB5 NEGU \$1,175,\$181
11
12 0020 357B0CB0 NEG X,Y,Z0
13 0024 37200CB0 NEGU \$32,Y,Z0
14 0028 357B84B0 NEG X,132,Z0
15 002c 37E885B0 NEGU \$232,133,Z0
16 0030 357B0CCB NEG X,Y,203
17 0034 37E70CD5 NEGU \$231,Y,213
18 0038 357B26D3 NEG X,38,211
19 003c 3704AFA1 NEGU \$4,175,161
20
21 0040 357B0C00 NEG X,Y,0
22 0044 37170C00 NEGU \$23,Y,0
23 0048 35020C00 NEG \$2,Y,0
24 004c 37E88500 NEGU \$232,133,0
25
26 0050 347B0043 NEG X,Z
27 0054 36200043 NEGU \$32,Z
28 0058 357B0020 NEG X,32
29 005c 37E80085 NEGU \$232,133
30 0060 357B00B0 NEG X,Z0
31 0064 372000B0 NEGU \$32,Z0
32 0068 347B0020 NEG X,\$32
33 006c 36E80085 NEGU \$232,\$133
34 X IS \$123
35 Y IS 12
36 Z IS \$67
37 Z0 IS 176
GAS for MMIX .*/regy-op\.s page 2
 
 
DEFINED SYMBOLS
.*/regy-op\.s:3 \.text:0000000000000000 Main
\*REG\*:000000000000007b X
\*ABS\*:000000000000000c Y
\*REG\*:0000000000000043 Z
\*ABS\*:00000000000000b0 Z0
 
NO UNDEFINED SYMBOLS
/resume-op.s
0,0 → 1,7
# Test the 'z'-type operand, RESUME.
Main RESUME X
RESUME 0
RESUME 1
RESUME XX
X IS 1
XX IS 0
/basep-2b.d
0,0 → 1,26
#source: basep-2.s
#as: --no-predefined-syms -linker-allocated-gregs
#objdump: -dr
 
# Check that this test isn't mistreated with -linker-allocated-gregs.
 
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <a>:
0: 0000002a trap 0,0,42
4: 8d2b0034 ldo \$43,\$0,52
6: R_MMIX_REG \.MMIX\.reg_contents\+0x8
\.\.\.
 
0000000000000108 <d>:
108: 0000001c trap 0,0,28
10c: 8d8f000c ldo \$143,\$0,12
10e: R_MMIX_REG \.MMIX\.reg_contents
110: 8df3000c ldo \$243,\$0,12
112: R_MMIX_REG \.MMIX\.reg_contents\+0x8
114: 23670028 addu \$103,\$0,40
116: R_MMIX_REG \.MMIX\.reg_contents
118: 230d0018 addu \$13,\$0,24
11a: R_MMIX_REG \.MMIX\.reg_contents\+0x8
/reg3-op.s
0,0 → 1,32
# All-registers, '3'-type operands; third operand is
# register or constant.
Main MUL X,Y,Z
ADD $32,Y,Z
4ADDU Y,$32,Z
8ADDU $232,$133,Z
16ADDU X,Y,$73
SRU $31,Y,$233
CSN X,$38,$212
ZSNP $4,$175,$181
 
MULU X,Y,Z0
SL $32,Y,Z0
CMPU Y,$32,Z0
2ADDU $232,$133,Z0
MXOR X,Y,203
OR $31,Y,213
NAND X,$38,211
WDIF $4,$175,161
 
SADD X,Y,0
MXOR $32,Y,0
ORN Y,$32,0
ANDN $232,$133,0
16ADDU X,Y,0
SL $31,Y,0
ADDU X,$38,0
CMP $4,$175,0
X IS $23
Y IS $12
Z IS $67
Z0 IS 176
/geta-oprn.d
0,0 → 1,37
# objdump: -dr
# as: -linkrelax -no-expand
# source: geta-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fd000000 swym 0,0,0
 
0000000000000004 <here>:
4: fd000000 swym 0,0,0
8: f4190000 geta \$25,8 <here\+0x4>
8: R_MMIX_ADDR19 \.text\+0x4
 
000000000000000c <at>:
c: f4200000 geta \$32,c <at>
c: R_MMIX_ADDR19 \.text\+0xc
10: 424e0000 bz \$78,10 <at\+0x4>
10: R_MMIX_ADDR19 \.text\+0x30
14: f25b0000 pushj \$91,14 <at\+0x8>
14: R_MMIX_ADDR19 \.text\+0x4
18: f2870000 pushj \$135,18 <at\+0xc>
18: R_MMIX_ADDR19 \.text\+0x4
1c: f4870000 geta \$135,1c <at\+0x10>
1c: R_MMIX_ADDR19 \.text\+0x30
20: f2870000 pushj \$135,20 <at\+0x14>
20: R_MMIX_ADDR19 \.text\+0x30
24: f2490000 pushj \$73,24 <at\+0x18>
24: R_MMIX_ADDR19 \.text\+0x30
28: f2380000 pushj \$56,28 <at\+0x1c>
28: R_MMIX_ADDR19 \.text\+0x30
2c: 5e870000 pbev \$135,2c <at\+0x20>
2c: R_MMIX_ADDR19 \.text\+0x4
 
0000000000000030 <there>:
30: fd000000 swym 0,0,0
/sync-op.l
0,0 → 1,23
GAS for MMIX .*/sync-op\.s page 1
 
 
1 #.*
2 0000 FC6E6406 Main SYNC 7234566
3 0004 FC000000 SYNC 0
4 0008 FC000001 SYNC 1
5 000c FC000000 SYNC Zz
6 0010 FC000001 SYNC Zo
7 0014 FC7C2242 SYNC Z
8 Zz IS 0
9 Zo IS 1
10 Z IS 8135234
GAS for MMIX .*/sync-op\.s page 2
 
 
DEFINED SYMBOLS
.*/sync-op\.s:2 \.text:0000000000000000 Main
\*ABS\*:0000000000000000 Zz
\*ABS\*:0000000000000001 Zo
\*ABS\*:00000000007c2242 Z
 
NO UNDEFINED SYMBOLS
/regy-op.s
0,0 → 1,37
# For insns where Y is a constant: 'Y'-type operands.
# Only NEG and NEGU, actually.
Main NEG X,Y,Z
NEGU $32,Y,Z
NEG X,32,Z
NEGU $0,133,Z
NEG X,Y,$73
NEGU $130,Y,$233
NEG X,38,$212
NEGU $1,175,$181
 
NEG X,Y,Z0
NEGU $32,Y,Z0
NEG X,132,Z0
NEGU $232,133,Z0
NEG X,Y,203
NEGU $231,Y,213
NEG X,38,211
NEGU $4,175,161
 
NEG X,Y,0
NEGU $23,Y,0
NEG $2,Y,0
NEGU $232,133,0
 
NEG X,Z
NEGU $32,Z
NEG X,32
NEGU $232,133
NEG X,Z0
NEGU $32,Z0
NEG X,$32
NEGU $232,$133
X IS $123
Y IS 12
Z IS $67
Z0 IS 176
/comment-2.d
0,0 → 1,15
#objdump: -drt
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ g F \.text 0+ Main
 
 
Disassembly of section \.text:
 
0+ <Main>:
0: f801e240 pop 1,57920
/err-bspec-3.s
0,0 → 1,4
% { dg-do assemble { target mmix-*-* } }
Main SET $45,23
TETRA 4
ESPEC % { dg-error "ESPEC without preceding BSPEC" "" }
/sync-op.s
0,0 → 1,10
# Test operands for SYNC.
Main SYNC 7234566
SYNC 0
SYNC 1
SYNC Zz
SYNC Zo
SYNC Z
Zz IS 0
Zo IS 1
Z IS 8135234
/greg3.d
0,0 → 1,30
# objdump: -rst
 
# Check that we emit the right relocations for greg operands.
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
0+ g \.MMIX\.reg_contents 0+ areg
0+c g F \.text 0+ Main
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+2 R_MMIX_REG \.MMIX\.reg_contents
0+7 R_MMIX_REG_OR_BYTE \.MMIX\.reg_contents
0+a R_MMIX_REG \.MMIX\.reg_contents
 
RELOCATION RECORDS FOR \[\.MMIX\.reg_contents\]:
OFFSET TYPE VALUE
0+ R_MMIX_64 \.text\+0x0+10
 
Contents of section \.text:
0000 8f030010 8e030700 8f050004 fd000001 .*
0010 fd000002 fd000003 fd000004 fd000005 .*
0020 fd000006 .*
Contents of section \.MMIX\.reg_contents:
0000 00000000 00000000 .*
/op-0-2.d
0,0 → 1,26
#source: op-0-1.s
#as: -no-expand
#objdump: -srt
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ l \*ABS\* 0+ zero0
0+ l \*ABS\* 0+ zero1
0+ l \*ABS\* 0+ zero2
0+ g F \.text 0+ Main
 
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+ R_MMIX_ADDR27 \*ABS\*
0+4 R_MMIX_ADDR19 \*ABS\*
0+8 R_MMIX_ADDR19 \*ABS\*
 
 
Contents of section \.text:
0000 f0000000 f4070000 f2080000 .*
 
/err-bpo5.s
0,0 → 1,14
% { dg-do assemble { target mmix-*-* } }
 
# Base-plus-offset without -linker-allocated-gregs. Note the constant.
 
a IS 42
b IS 112
LDO $43,a+52 % { dg-error "no suitable GREG definition" "" }
LDA $47,a+112 % { dg-error "no suitable GREG definition" "" }
LDA $48,b+22 % { dg-error "no suitable GREG definition" "" }
LDO $43,c+2 % { dg-error "no suitable GREG definition" "" }
LDA $47,d+212 % { dg-error "no suitable GREG definition" "" }
LDA $48,c+21 % { dg-error "no suitable GREG definition" "" }
c IS 72
d IS 3
/roundi-op-r.d
0,0 → 1,22
# objdump: -dr
# as: -linkrelax
# source: roundi-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: 088701f4 flot \$135,ROUND_OFF,\$244
4: 0a8702e9 flotu \$135,ROUND_UP,\$233
8: 0d85005b sflot \$133,91
c: 0e7b04f4 sflotu \$123,ROUND_NEAR,\$244
10: 0c8500f4 sflot \$133,\$244
14: 0987005b flot \$135,91
18: 0f7b045b sflotu \$123,ROUND_NEAR,91
1c: 0987015b flot \$135,ROUND_OFF,91
20: 0aad02e9 flotu \$173,ROUND_UP,\$233
24: 0bad02d5 flotu \$173,ROUND_UP,213
28: 0c8700f4 sflot \$135,\$244
2c: 0b870277 flotu \$135,ROUND_UP,119
30: 0d87005b sflot \$135,91
34: 088700f4 flot \$135,\$244
/list-textfirst.l
0,0 → 1,17
GAS for MMIX .*/list-textfirst\.s page 1
 
 
1 \.data
2 here:
3 0000 0000002A tetra 42
4 \.text
5 there:
6 0000 EA \.byte 0xea
GAS for MMIX .*/list-textfirst\.s page 2
 
 
DEFINED SYMBOLS
.*/list-textfirst\.s:2 \.data:0000000000000000 here
.*/list-textfirst\.s:5 \.text:0000000000000000 there
 
NO UNDEFINED SYMBOLS
/comment-2.s
0,0 → 1,17
Main POP 123456 ignore; x y z
/prefix3.d
0,0 → 1,31
#objdump: -str
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+8 l \.text 0+ someplace
0+ l \.text 0+ bc:h
0+8 l \.MMIX\.reg_contents 0+ a1
0+ l \.MMIX\.reg_contents 0+ ba2
0+ l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
0+4 g F \.text 0+ Main
 
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+2 R_MMIX_REG \.MMIX\.reg_contents\+0x0+8
0+6 R_MMIX_REG \.MMIX\.reg_contents
 
 
RELOCATION RECORDS FOR \[\.MMIX\.reg_contents\]:
OFFSET TYPE VALUE
0+8 R_MMIX_64 \.text\+0x0+8
 
 
Contents of section \.text:
0000 81ff0000 81fe0000 .*
Contents of section \.MMIX\.reg_contents:
0000 00000000 0008aa52 00000000 00000000 .*
/err-loc-2.s
0,0 → 1,5
% { dg-do assemble { target mmix-*-* } }
LOC (#20 << 56) + #200
TETRA 1
LOC (#20 << 56) + #100 % { dg-error "LOC expression stepping backwards" "" }
TETRA 2
/reloclab-s.d
0,0 → 1,36
#objdump: -dr
#source: reloclab.s
#as: -x
 
.*: file format elf64-mmix
Disassembly of section \.text:
0000000000000000 <Main>:
0: f0000000 jmp 0 <Main>
0: R_MMIX_JMP foo\+0x8
4: fd000000 swym 0,0,0
8: fd000000 swym 0,0,0
c: fd000000 swym 0,0,0
10: fd000000 swym 0,0,0
14: f0000004 jmp 24 <here>
18: f4080003 geta \$8,24 <here>
1c: 46630002 bod \$99,24 <here>
20: fd000000 swym 0,0,0
0000000000000024 <here>:
24: 42de0000 bz \$222,24 <here>
24: R_MMIX_CBRANCH bar\+0x10
28: fd000000 swym 0,0,0
2c: fd000000 swym 0,0,0
30: fd000000 swym 0,0,0
34: fd000000 swym 0,0,0
38: fd000000 swym 0,0,0
000000000000003c <there>:
3c: f4040000 geta \$4,3c <there>
3c: R_MMIX_GETA baz
40: fd000000 swym 0,0,0
44: fd000000 swym 0,0,0
48: fd000000 swym 0,0,0
4c: f2070000 pushj \$7,4c <there\+0x10>
4c: R_MMIX_PUSHJ_STUBBABLE foobar
50: f1fffffb jmp 3c <there>
54: f558fffa geta \$88,3c <there>
58: 476ffff9 bod \$111,3c <there>
/list-textfirst.s
0,0 → 1,6
.data
here:
tetra 42
.text
there:
.byte 0xea
/greg3.s
0,0 → 1,11
.global areg
areg GREG Main+4
LDOU $3,areg,16
LDOU $3,$7,areg
LDOU $5,Main+8
Main SWYM 1
SWYM 2
SWYM 3
SWYM 4
SWYM 5
SWYM 6
/reg-op.d
0,0 → 1,14
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: 10170c43 fmul \$23,\$12,\$67
4: 01200c43 fcmp \$32,\$12,\$67
8: 040c2043 fadd \$12,\$32,\$67
c: 02e88543 fun \$232,\$133,\$67
10: 03170c49 feql \$23,\$12,\$73
14: 161f0ce9 frem \$31,\$12,\$233
18: 061726d4 fsub \$23,\$38,\$212
1c: 1304afb5 feqle \$4,\$175,\$181
/builtin3.d
0,0 → 1,24
# as: -fixed-special-register-names
# objdump: -dtr
# source: builtin1.s
 
# Make sure we don't look at the symbol table when parsing special
# register names.
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+14 l \*ABS\* 0+ rJ
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ g F \.text 0+ Main
 
 
Disassembly of section \.text:
 
0+ <Main>:
0: fe050004 get \$5,rJ
4: fe060004 get \$6,rJ
8: f6040007 put rJ,\$7
c: f6040008 put rJ,\$8
/basep-3.d
0,0 → 1,13
#objdump: -dr
 
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0+ <Main>:
0: bf2a0000 pushgo \$42,\$0,0
2: R_MMIX_REG \.MMIX\.reg_contents
4: fd000000 swym 0,0,0
 
0+8 <extfn>:
8: f8000000 pop 0,0
/relax1-r.d
0,0 → 1,145
#objdump: -dr
#as: -linkrelax -x
#source: relax1.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: f0020019 jmp 80064 <l6>
0: R_MMIX_ADDR27 \.text\+0x80064
 
0000000000000004 <l0>:
4: f0020018 jmp 80064 <l6>
4: R_MMIX_ADDR27 \.text\+0x80064
 
0000000000000008 <l1>:
8: f0020017 jmp 80064 <l6>
8: R_MMIX_ADDR27 \.text\+0x80064
 
000000000000000c <l01>:
c: f0020016 jmp 80064 <l6>
c: R_MMIX_ADDR27 \.text\+0x80064
10: f407ffff geta \$7,4000c <nearfar1>
10: R_MMIX_ADDR19 \.text\+0x4000c
14: f2bfffff pushj \$191,40010 <nearfar2>
14: R_MMIX_ADDR19 \.text\+0x40010
 
0000000000000018 <l2>:
18: f000fffe jmp 40010 <nearfar2>
18: R_MMIX_ADDR27 \.text\+0x40010
\.\.\.
40004: 4d480000 bnp \$72,4 <l0>
40004: R_MMIX_ADDR19 \.text\+0x4
40008: f5040000 geta \$4,8 <l1>
40008: R_MMIX_ADDR19 \.text\+0x8
 
000000000004000c <nearfar1>:
4000c: f3050000 pushj \$5,c <l01>
4000c: R_MMIX_ADDR19 \.text\+0xc
 
0000000000040010 <nearfar2>:
40010: f4090000 geta \$9,40010 <nearfar2>
40010: R_MMIX_GETA \.text\+0x8
40014: fd000000 swym 0,0,0
40018: fd000000 swym 0,0,0
4001c: fd000000 swym 0,0,0
40020: f20b0000 pushj \$11,40020 <nearfar2\+0x10>
40020: R_MMIX_PUSHJ \.text\+0x80030
40024: fd000000 swym 0,0,0
40028: fd000000 swym 0,0,0
4002c: fd000000 swym 0,0,0
40030: fd000000 swym 0,0,0
 
0000000000040034 <l4>:
40034: 4437ffff bp \$55,80030 <l3>
40034: R_MMIX_ADDR19 \.text\+0x80030
\.\.\.
8002c: f1fdfff7 jmp 8 <l1>
8002c: R_MMIX_ADDR27 \.text\+0x8
 
0000000000080030 <l3>:
80030: f1fdfff5 jmp 4 <l0>
80030: R_MMIX_ADDR27 \.text\+0x4
80034: 47580000 bod \$88,40034 <l4>
80034: R_MMIX_ADDR19 \.text\+0x40034
80038: 46580000 bod \$88,80038 <l3\+0x8>
80038: R_MMIX_CBRANCH \.text\+0x40034
8003c: fd000000 swym 0,0,0
80040: fd000000 swym 0,0,0
80044: fd000000 swym 0,0,0
80048: fd000000 swym 0,0,0
8004c: fd000000 swym 0,0,0
80050: f0000000 jmp 80050 <l3\+0x20>
80050: R_MMIX_JMP \.text\+0x4080060
80054: fd000000 swym 0,0,0
80058: fd000000 swym 0,0,0
8005c: fd000000 swym 0,0,0
80060: fd000000 swym 0,0,0
 
0000000000080064 <l6>:
80064: f0ffffff jmp 4080060 <l5>
80064: R_MMIX_ADDR27 \.text\+0x4080060
80068: 436ffff2 bz \$111,80030 <l3>
80068: R_MMIX_ADDR19 \.text\+0x80030
\.\.\.
 
0000000004080060 <l5>:
4080060: f000000d jmp 4080094 <l8>
4080060: R_MMIX_ADDR27 \.text\+0x4080094
4080064: f1000000 jmp 80064 <l6>
4080064: R_MMIX_ADDR27 \.text\+0x80064
4080068: f0000000 jmp 4080068 <l5\+0x8>
4080068: R_MMIX_JMP \.text\+0x80064
408006c: fd000000 swym 0,0,0
4080070: fd000000 swym 0,0,0
4080074: fd000000 swym 0,0,0
4080078: fd000000 swym 0,0,0
408007c: 482c0000 bnn \$44,408007c <l5\+0x1c>
408007c: R_MMIX_CBRANCH \.text\+0x40c0090
4080080: fd000000 swym 0,0,0
4080084: fd000000 swym 0,0,0
4080088: fd000000 swym 0,0,0
408008c: fd000000 swym 0,0,0
4080090: fd000000 swym 0,0,0
 
0000000004080094 <l8>:
4080094: 482cffff bnn \$44,40c0090 <l9>
4080094: R_MMIX_ADDR19 \.text\+0x40c0090
4080098: f1fffff2 jmp 4080060 <l5>
4080098: R_MMIX_ADDR27 \.text\+0x4080060
408009c: f1fffff1 jmp 4080060 <l5>
408009c: R_MMIX_ADDR27 \.text\+0x4080060
\.\.\.
 
00000000040c008c <l10>:
40c008c: f1fefff5 jmp 4080060 <l5>
40c008c: R_MMIX_ADDR27 \.text\+0x4080060
 
00000000040c0090 <l9>:
40c0090: f0000007 jmp 40c00ac <l11>
40c0090: R_MMIX_ADDR27 \.text\+0x40c00ac
 
00000000040c0094 <l7>:
40c0094: f3210000 pushj \$33,4080094 <l8>
40c0094: R_MMIX_ADDR19 \.text\+0x4080094
40c0098: f2210000 pushj \$33,40c0098 <l7\+0x4>
40c0098: R_MMIX_PUSHJ \.text\+0x4080094
40c009c: fd000000 swym 0,0,0
40c00a0: fd000000 swym 0,0,0
40c00a4: fd000000 swym 0,0,0
40c00a8: fd000000 swym 0,0,0
 
00000000040c00ac <l11>:
40c00ac: f1feffed jmp 4080060 <l5>
40c00ac: R_MMIX_ADDR27 \.text\+0x4080060
40c00b0: f1fefff9 jmp 4080094 <l8>
40c00b0: R_MMIX_ADDR27 \.text\+0x4080094
\.\.\.
41000ac: f53d0000 geta \$61,40c00ac <l11>
41000ac: R_MMIX_ADDR19 \.text\+0x40c00ac
41000b0: f4480000 geta \$72,41000b0 <l11\+0x40004>
41000b0: R_MMIX_GETA \.text\+0x40c00ac
41000b4: fd000000 swym 0,0,0
41000b8: fd000000 swym 0,0,0
41000bc: fd000000 swym 0,0,0
/prefix3.s
0,0 → 1,9
% Check that changing prefixes between the GREG definition, its use and
% the end of the assembly file does not change the GREG definition.
a1 GREG someplace
PREFIX b
a2 GREG 567890
PREFIX c:
h LDB $255,:a1
:Main LDB $254,:ba2
:someplace IS @
/reg-op.l
0,0 → 1,26
GAS for MMIX .*/reg-op\.s page 1
 
 
1 #.*
2 #.*
3 0000 10170C43 Main FMUL X,Y,Z
4 0004 01200C43 FCMP \$32,Y,Z
5 0008 040C2043 FADD Y,\$32,Z
6 000c 02E88543 FUN \$232,\$133,Z
7 0010 03170C49 FEQL X,Y,\$73
8 0014 161F0CE9 FREM \$31,Y,\$233
9 0018 061726D4 FSUB X,\$38,\$212
10 001c 1304AFB5 FEQLE \$4,\$175,\$181
11 X IS \$23
12 Y IS \$12
13 Z IS \$67
GAS for MMIX .*/reg-op\.s page 2
 
 
DEFINED SYMBOLS
.*/reg-op\.s:3 \.text:0000000000000000 Main
\*REG\*:0000000000000017 X
\*REG\*:000000000000000c Y
\*REG\*:0000000000000043 Z
 
NO UNDEFINED SYMBOLS
/reg-op.s
0,0 → 1,13
# All-registers, '$'-type operands.
#
Main FMUL X,Y,Z
FCMP $32,Y,Z
FADD Y,$32,Z
FUN $232,$133,Z
FEQL X,Y,$73
FREM $31,Y,$233
FSUB X,$38,$212
FEQLE $4,$175,$181
X IS $23
Y IS $12
Z IS $67
/basep-3.s
0,0 → 1,5
# PUSHGO is eligible for base-plus-offset addressing.
GREG fn
Main PUSHGO $42,fn
SWYM 0
extfn POP 0,0
/save-op.d
0,0 → 1,9
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fa2d0000 save \$45,0
4: fa1f0000 save \$31,0
8: fa000000 save \$0,0
/relocl-n.d
0,0 → 1,27
#objdump: -dr
#source: reloclab.s
#as: -no-expand
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: f0000000 jmp 0 <Main>
0: R_MMIX_ADDR27 foo\+0x8
4: f0000004 jmp 14 <here>
8: f4080003 geta \$8,14 <here>
c: 46630002 bod \$99,14 <here>
10: fd000000 swym 0,0,0
 
0000000000000014 <here>:
14: 42de0000 bz \$222,14 <here>
14: R_MMIX_ADDR19 bar\+0x10
 
0000000000000018 <there>:
18: f4040000 geta \$4,18 <there>
18: R_MMIX_ADDR19 baz
1c: f2070000 pushj \$7,1c <there\+0x4>
1c: R_MMIX_ADDR19 foobar
20: f1fffffe jmp 18 <there>
24: f558fffd geta \$88,18 <there>
28: 476ffffc bod \$111,18 <there>
/list-pseudoints.l
0,0 → 1,19
GAS for MMIX .*/list-pseudoints.s page 1
 
 
1 start
2 0000 424344EE tetra 0x424344ee
3 start2
4 0004 00000000 octa 0xde0045007821329e
4 DE004500
4 7821329E
5 0010 07D9 wyde 2009
6 0012 99 byte 0x99
GAS for MMIX .*/list-pseudoints.s page 2
 
 
DEFINED SYMBOLS
.*/list-pseudoints.s:1 .text:0000000000000000 start
.*/list-pseudoints.s:3 .text:0000000000000004 start2
 
NO UNDEFINED SYMBOLS
/save-op.l
0,0 → 1,18
GAS for MMIX .*/save-op.s page 1
 
 
1 #.*
2 0000 FA2D0000 Main SAVE \$45,0
3 0004 FA1F0000 SAVE X,0
4 0008 FA000000 SAVE X0,0
5 X IS \$31
6 X0 IS \$0
GAS for MMIX .*/save-op.s page 2
 
 
DEFINED SYMBOLS
.*/save-op.s:2 .text:0000000000000000 Main
\*REG\*:000000000000001f X
\*REG\*:0000000000000000 X0
 
NO UNDEFINED SYMBOLS
/hex-r.d
0,0 → 1,11
# objdump: -dr
# as: -linkrelax
# source: hex.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: e3362009 setl \$54,0x2009
4: e320125e setl \$32,0x125e
8: e31f00b1 setl \$31,0xb1
/list-textfirst
0,0 → 1,5
data
here:
tetra 42
.text
set $1,$2
/round2-op.d
0,0 → 1,17
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: 088700f4 flot \$135,\$244
4: 0a8700e9 flotu \$135,\$233
8: 0d85005b sflot \$133,91
c: 177b00f4 fint \$123,\$244
10: 0c8500f4 sflot \$133,\$244
14: 0987005b flot \$135,91
18: 0f7b005b sflotu \$123,91
1c: 05ad00e9 fix \$173,\$233
20: 0bad00d5 flotu \$173,213
24: 078700f4 fixu \$135,\$244
28: 0b870077 flotu \$135,119
/list-pseudoints.s
0,0 → 1,6
start
tetra 0x424344ee
start2
octa 0xde0045007821329e
wyde 2009
byte 0x99
/sync-op-r.d
0,0 → 1,14
# objdump: -dr
# as: -linkrelax
# source: sync-op.s
.*: file format elf64-mmix
 
Disassembly of section .text:
 
0000000000000000 <Main>:
0: fc6e6406 sync 7234566
4: fc000000 sync 0
8: fc000001 sync 1
c: fc000000 sync 0
10: fc000001 sync 1
14: fc7c2242 sync 8135234
/save-op.s
0,0 → 1,6
# Test the 's'-type operand, SAVE.
Main SAVE $45,0
SAVE X,0
SAVE X0,0
X IS $31
X0 IS $0
/op-0-1s.d
0,0 → 1,22
#objdump: -srt
#source: op-0-1.s
#as: -x
 
.*: file format elf64-mmix
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ l \*ABS\* 0+ zero0
0+ l \*ABS\* 0+ zero1
0+ l \*ABS\* 0+ zero2
0+ g F \.text 0+ Main
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+ R_MMIX_JMP \*ABS\*
0+14 R_MMIX_GETA \*ABS\*
0+24 R_MMIX_PUSHJ_STUBBABLE \*ABS\*
Contents of section \.text:
0000 f0000000 fd000000 fd000000 fd000000 .*
0010 fd000000 f4070000 fd000000 fd000000 .*
0020 fd000000 f2080000 .*
/round2-op.l
0,0 → 1,28
GAS for MMIX .*/round2-op\.s page 1
 
 
1 #.*
2 0000 088700F4 Main FLOT X,Z
3 0004 0A8700E9 FLOTU X,\$233
4 0008 0D85005B SFLOT \$133,Z0
5 000c 177B00F4 FINT \$123,Z
6 0010 0C8500F4 SFLOT \$133,Z
7 0014 0987005B FLOT X,Z0
8 0018 0F7B005B SFLOTU \$123,Z0
9 001c 05AD00E9 FIX \$173,\$233
10 0020 0BAD00D5 FLOTU \$173,213
11 0024 078700F4 FIXU X,Z
12 0028 0B870077 FLOTU X,119
13 X IS \$135
14 Z IS \$244
15 Z0 IS 91
GAS for MMIX .*/round2-op\.s page 2
 
 
DEFINED SYMBOLS
.*/round2-op\.s:2 \.text:0000000000000000 Main
\*REG\*:0000000000000087 X
\*REG\*:00000000000000f4 Z
\*ABS\*:000000000000005b Z0
 
NO UNDEFINED SYMBOLS
/comment-3.d
0,0 → 1,19
#objdump: -srt
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0000000000000000 l d \.text 0000000000000000 (|\.text)
0000000000000000 l d \.data 0000000000000000 (|\.data)
0000000000000000 l d \.bss 0000000000000000 (|\.bss)
0000000000000000 l \.MMIX\.reg_contents 0000000000000000 im
0000000000000000 l d \.MMIX\.reg_contents 0000000000000000 (|\.MMIX\.reg_contents)
 
 
RELOCATION RECORDS FOR \[\.MMIX\.reg_contents\]:
OFFSET TYPE VALUE
0000000000000000 R_MMIX_64 \.text
 
 
Contents of section \.MMIX\.reg_contents:
0000 00000000 00000000 .*
/err-bspec-4.s
0,0 → 1,7
% { dg-do assemble { target mmix-*-* } }
Main SET $45,23
BSPEC 2
TETRA 4
ESPEC
TETRA 5
ESPEC % { dg-error "ESPEC without preceding BSPEC" "" }
/round2-op.s
0,0 → 1,15
# Two-operand variants of "R" and "I".
Main FLOT X,Z
FLOTU X,$233
SFLOT $133,Z0
FINT $123,Z
SFLOT $133,Z
FLOT X,Z0
SFLOTU $123,Z0
FIX $173,$233
FLOTU $173,213
FIXU X,Z
FLOTU X,119
X IS $135
Z IS $244
Z0 IS 91
/odd-1.d
0,0 → 1,27
#objdump: -str
 
# A few odd mmixal compatibility cases.
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ l \.MMIX\.reg_contents 0+ small
0+ l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
0+ g F \.text 0+ Main
 
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+7 R_MMIX_REG_OR_BYTE \.MMIX\.reg_contents
0+f R_MMIX_REG \.MMIX\.reg_contents
0+15 R_MMIX_REG \.MMIX\.reg_contents
0+19 R_MMIX_REG \.MMIX\.reg_contents
 
Contents of section \.text:
0000 f9000000 ff016400 fb0000ff fb000000 .*
0010 00000001 33000408 c1000200 0004022a .*
Contents of section \.MMIX\.reg_contents:
0000 00000000 00000abc .*
/hex2.d
0,0 → 1,17
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0+ <x>:
[ ]+0:[ ]+fd000000[ ]+swym 0,0,0
[ ]+4:[ ]+e309001f[ ]+setl \$9,0x1f
[ ]+8:[ ]+e3081b2f[ ]+setl \$8,0x1b2f
[ ]+c:[ ]+e307ff9f[ ]+setl \$7,0xff9f
[ ]+10:[ ]+e3061f3a[ ]+setl \$6,0x1f3a
[ ]+14:[ ]+e305001b[ ]+setl \$5,0x1b
[ ]+18:[ ]+e3041a1b[ ]+setl \$4,0x1a1b
[ ]+1c:[ ]+e303009f[ ]+setl \$3,0x9f
[ ]+20:[ ]+e302009b[ ]+setl \$2,0x9b
[ ]+24:[ ]+e301001f[ ]+setl \$1,0x1f
[ ]+28:[ ]+e300001b[ ]+setl \$0,0x1b
/greg4.d
0,0 → 1,28
#objdump: -str
 
# Branches can have base-plus-offset operands too.
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+4 l \.text 0+ x
0+ l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
 
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+a R_MMIX_REG \.MMIX\.reg_contents
 
 
RELOCATION RECORDS FOR \[\.MMIX\.reg_contents\]:
OFFSET TYPE VALUE
0+ R_MMIX_64 \.text
 
 
Contents of section \.text:
0000 fd000000 fd000001 9f000004 .*
Contents of section \.MMIX\.reg_contents:
0000 00000000 00000000 .*
/pop-op-r.d
0,0 → 1,12
# objdump: -dr
# as: -linkrelax
# source: pop-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: f8840def pop 132,3567
4: f8845678 pop 132,22136
8: f8170def pop 23,3567
c: f8175678 pop 23,22136
/err-bpo6.s
0,0 → 1,21
% { dg-do assemble { target mmix-*-* } }
 
# Test that we handle COMM-type symbols with base-plus-offset relocs, but
# that we don't merge ones that may be separately merged with other
# symbols at link-time. Likewise for weak symbols.
.comm comm_symbol1,4,4
.lcomm comm_symbol3,4
GREG comm_symbol1
GREG comm_symbol3
GREG xx
.weak xx
xx:
LDA $47,yy % { dg-error "no suitable GREG definition" "" }
LDA $46,xx
LDA $42,comm_symbol1
LDA $43,comm_symbol2 % { dg-error "no suitable GREG definition" "" }
LDA $44,comm_symbol3
LDA $45,comm_symbol4
yy:
.comm comm_symbol2,4,4
.lcomm comm_symbol4,4
/regt-op-r.d
0,0 → 1,136
# objdump: -dr
# as: -linkrelax
# source: regt-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: 22170c43 addu \$23,\$12,\$67
4: 88200c43 ldt \$32,\$12,\$67
8: 820c2043 ldbu \$12,\$32,\$67
c: 8ae88543 ldtu \$232,\$133,\$67
10: 8c170c49 ldo \$23,\$12,\$73
14: 8e1f0ce9 ldou \$31,\$12,\$233
18: 841726d4 ldw \$23,\$38,\$212
1c: 8604afb5 ldwu \$4,\$175,\$181
20: 81170cb0 ldb \$23,\$12,176
24: 91200cb0 ldsf \$32,\$12,176
28: 990c20b0 ldvts \$12,\$32,176
2c: 97e885b0 ldunc \$232,\$133,176
30: b3170ccb stht \$23,\$12,203
34: 931f0cd5 ldht \$31,\$12,213
38: 951726d3 cswap \$23,\$38,211
3c: 9f04afa1 go \$4,\$175,161
40: 23170c00 addu \$23,\$12,0
44: 81170c00 ldb \$23,\$12,0
48: 89170c00 ldt \$23,\$12,0
4c: 83170c00 ldbu \$23,\$12,0
50: 8b170c00 ldtu \$23,\$12,0
54: 8d170c00 ldo \$23,\$12,0
58: 8f170c00 ldou \$23,\$12,0
5c: 85170c00 ldw \$23,\$12,0
60: 87170c00 ldwu \$23,\$12,0
64: 91170c00 ldsf \$23,\$12,0
68: 93170c00 ldht \$23,\$12,0
6c: 95170c00 cswap \$23,\$12,0
70: 97170c00 ldunc \$23,\$12,0
74: 99170c00 ldvts \$23,\$12,0
78: 9f170c00 go \$23,\$12,0
7c: a1170c00 stb \$23,\$12,0
80: a9170c00 stt \$23,\$12,0
84: a3170c00 stbu \$23,\$12,0
88: ab170c00 sttu \$23,\$12,0
8c: ad170c00 sto \$23,\$12,0
90: af170c00 stou \$23,\$12,0
94: a5170c00 stw \$23,\$12,0
98: a7170c00 stwu \$23,\$12,0
9c: b1170c00 stsf \$23,\$12,0
a0: b3170c00 stht \$23,\$12,0
a4: b7170c00 stunc \$23,\$12,0
a8: 23290c00 addu \$41,\$12,0
ac: 81790c00 ldb \$121,\$12,0
b0: 894e0c00 ldt \$78,\$12,0
b4: 837f0c00 ldbu \$127,\$12,0
b8: 8b310c00 ldtu \$49,\$12,0
bc: 8d340c00 ldo \$52,\$12,0
c0: 8f2a0c00 ldou \$42,\$12,0
c4: 857b0c00 ldw \$123,\$12,0
c8: 87ea0c00 ldwu \$234,\$12,0
cc: 91290c00 ldsf \$41,\$12,0
d0: 93590c00 ldht \$89,\$12,0
d4: 955d0c00 cswap \$93,\$12,0
d8: 972a0c00 ldunc \$42,\$12,0
dc: 99210c00 ldvts \$33,\$12,0
e0: 9f3b0c00 go \$59,\$12,0
e4: a13b0c00 stb \$59,\$12,0
e8: a93b0c00 stt \$59,\$12,0
ec: a33b0c00 stbu \$59,\$12,0
f0: ab3b0c00 sttu \$59,\$12,0
f4: ad3b0c00 sto \$59,\$12,0
f8: af3b0c00 stou \$59,\$12,0
fc: a53b0c00 stw \$59,\$12,0
100: a73b0c00 stwu \$59,\$12,0
104: b13b0c00 stsf \$59,\$12,0
108: b33b0c00 stht \$59,\$12,0
10c: b73b0c00 stunc \$59,\$12,0
110: 23171b00 addu \$23,\$27,0
114: 81173000 ldb \$23,\$48,0
118: 8917a800 ldt \$23,\$168,0
11c: 8317ea00 ldbu \$23,\$234,0
120: 8b17b000 ldtu \$23,\$176,0
124: 8d171d00 ldo \$23,\$29,0
128: 8f17de00 ldou \$23,\$222,0
12c: 8517de00 ldw \$23,\$222,0
130: 8717de00 ldwu \$23,\$222,0
134: 9117de00 ldsf \$23,\$222,0
138: 9317de00 ldht \$23,\$222,0
13c: 9517de00 cswap \$23,\$222,0
140: 9717de00 ldunc \$23,\$222,0
144: 9917de00 ldvts \$23,\$222,0
148: 9f17de00 go \$23,\$222,0
14c: a117de00 stb \$23,\$222,0
150: a917de00 stt \$23,\$222,0
154: a317de00 stbu \$23,\$222,0
158: ab17de00 sttu \$23,\$222,0
15c: ad17de00 sto \$23,\$222,0
160: af17de00 stou \$23,\$222,0
164: a517de00 stw \$23,\$222,0
168: a717de00 stwu \$23,\$222,0
16c: b117de00 stsf \$23,\$222,0
170: b317de00 stht \$23,\$222,0
174: b717de00 stunc \$23,\$222,0
178: 23dfdb00 addu \$223,\$219,0
17c: 81dfef00 ldb \$223,\$239,0
180: 89dfef00 ldt \$223,\$239,0
184: 83df1d00 ldbu \$223,\$29,0
188: 8bdfef00 ldtu \$223,\$239,0
18c: 8d17ef00 ldo \$23,\$239,0
190: 8fdfef00 ldou \$223,\$239,0
194: 85dfd100 ldw \$223,\$209,0
198: 877bef00 ldwu \$123,\$239,0
19c: 91dfef00 ldsf \$223,\$239,0
1a0: 93df1d00 ldht \$223,\$29,0
1a4: 95dfef00 cswap \$223,\$239,0
1a8: 977bef00 ldunc \$123,\$239,0
1ac: 99dfef00 ldvts \$223,\$239,0
1b0: 9fdfef00 go \$223,\$239,0
1b4: a1dfef00 stb \$223,\$239,0
1b8: a9dff900 stt \$223,\$249,0
1bc: a3cbef00 stbu \$203,\$239,0
1c0: ab49ef00 sttu \$73,\$239,0
1c4: addfef00 sto \$223,\$239,0
1c8: afdf2700 stou \$223,\$39,0
1cc: a5dfef00 stw \$223,\$239,0
1d0: a7e9ef00 stwu \$233,\$239,0
1d4: b1dfef00 stsf \$223,\$239,0
1d8: b3df1700 stht \$223,\$23,0
1dc: b7dfef00 stunc \$223,\$239,0
1e0: 9f170c00 go \$23,\$12,0
1e4: 99200c00 ldvts \$32,\$12,0
1e8: a10c2000 stb \$12,\$32,0
1ec: b7e88500 stunc \$232,\$133,0
1f0: a7170c00 stwu \$23,\$12,0
1f4: ad1f0c00 sto \$31,\$12,0
1f8: 9f172600 go \$23,\$38,0
1fc: 9504af00 cswap \$4,\$175,0
/reloclrn.d
0,0 → 1,33
# objdump: -dr
# as: -linkrelax -no-expand
# source: reloclab.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: f0000000 jmp 0 <Main>
0: R_MMIX_ADDR27 foo\+0x8
4: f0000000 jmp 4 <Main\+0x4>
4: R_MMIX_ADDR27 \.text\+0x14
8: f4080000 geta \$8,8 <Main\+0x8>
8: R_MMIX_ADDR19 \.text\+0x14
c: 46630000 bod \$99,c <Main\+0xc>
c: R_MMIX_ADDR19 \.text\+0x14
10: fd000000 swym 0,0,0
 
0000000000000014 <here>:
14: 42de0000 bz \$222,14 <here>
14: R_MMIX_ADDR19 bar\+0x10
 
0000000000000018 <there>:
18: f4040000 geta \$4,18 <there>
18: R_MMIX_ADDR19 baz
1c: f2070000 pushj \$7,1c <there\+0x4>
1c: R_MMIX_ADDR19 foobar
20: f0000000 jmp 20 <there\+0x8>
20: R_MMIX_ADDR27 \.text\+0x18
24: f4580000 geta \$88,24 <there\+0xc>
24: R_MMIX_ADDR19 \.text\+0x18
28: 466f0000 bod \$111,28 <there\+0x10>
28: R_MMIX_ADDR19 \.text\+0x18
/pushgo-op-r.d
0,0 → 1,64
# objdump: -dr
# as: -linkrelax
# source: pushgo-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: be170c43 pushgo \$23,\$12,\$67
4: becb0c43 pushgo \$203,\$12,\$67
8: be200c43 pushgo \$32,\$12,\$67
c: be200c43 pushgo \$32,\$12,\$67
10: be172043 pushgo \$23,\$32,\$67
14: becb2043 pushgo \$203,\$32,\$67
18: bee88543 pushgo \$232,\$133,\$67
1c: bee88543 pushgo \$232,\$133,\$67
20: be170c49 pushgo \$23,\$12,\$73
24: becb0c49 pushgo \$203,\$12,\$73
28: be1f0ce9 pushgo \$31,\$12,\$233
2c: be1f0ce9 pushgo \$31,\$12,\$233
30: be1726d4 pushgo \$23,\$38,\$212
34: becb26d4 pushgo \$203,\$38,\$212
38: be04afb5 pushgo \$4,\$175,\$181
3c: be04afb5 pushgo \$4,\$175,\$181
40: bf170cb0 pushgo \$23,\$12,176
44: bfcb0cb0 pushgo \$203,\$12,176
48: bf200cb0 pushgo \$32,\$12,176
4c: bf200cb0 pushgo \$32,\$12,176
50: bf1720b0 pushgo \$23,\$32,176
54: bfcb20b0 pushgo \$203,\$32,176
58: bfe885b0 pushgo \$232,\$133,176
5c: bfe885b0 pushgo \$232,\$133,176
60: bf170ccb pushgo \$23,\$12,203
64: bfcb0ccb pushgo \$203,\$12,203
68: bf1f0cd5 pushgo \$31,\$12,213
6c: bf1f0cd5 pushgo \$31,\$12,213
70: bf1726d3 pushgo \$23,\$38,211
74: bfcb26d3 pushgo \$203,\$38,211
78: bf04afa1 pushgo \$4,\$175,161
7c: bf04afa1 pushgo \$4,\$175,161
80: bf170c00 pushgo \$23,\$12,0
84: bfcb0c00 pushgo \$203,\$12,0
88: bf290c00 pushgo \$41,\$12,0
8c: bff10c00 pushgo \$241,\$12,0
90: bf171b00 pushgo \$23,\$27,0
94: bfcb3000 pushgo \$203,\$48,0
98: bfdfdb00 pushgo \$223,\$219,0
9c: bfdfe500 pushgo \$223,\$229,0
a0: bf170c00 pushgo \$23,\$12,0
a4: bfcb0c00 pushgo \$203,\$12,0
a8: bf200c00 pushgo \$32,\$12,0
ac: bf200c00 pushgo \$32,\$12,0
b0: bf172000 pushgo \$23,\$32,0
b4: bfcb2000 pushgo \$203,\$32,0
b8: bfe88500 pushgo \$232,\$133,0
bc: bfe88500 pushgo \$232,\$133,0
c0: bf170c00 pushgo \$23,\$12,0
c4: bfcb0c00 pushgo \$203,\$12,0
c8: bf1f0c00 pushgo \$31,\$12,0
cc: bf1f0c00 pushgo \$31,\$12,0
d0: bf172600 pushgo \$23,\$38,0
d4: bfcb2600 pushgo \$203,\$38,0
d8: bf04af00 pushgo \$4,\$175,0
dc: bf04af00 pushgo \$4,\$175,0
/comment-3.s
0,0 → 1,2
# If we aren't careful, '@' will be considered an operator.
im GREG @ home
/err-loc-3.s
0,0 → 1,4
% { dg-do assemble { target mmix-*-* } }
LOC (#20 << 56) + #202
TETRA 1
OCTA 1 % { dg-error "data item with alignment larger than location" "" }
/odd-1.s
0,0 → 1,9
small GREG #abc
Main RESUME
TRIP 1,$100,small
UNSAVE $255
UNSAVE small
TRAP 0,$1
CMPU small,$4,rC
SET small,$2
BYTE 0,4,rE,#2a
/hex2.s
0,0 → 1,15
x:
swym
0:
setl $9,#1F
1:
setl $8,#1B2F
setl $7,0xFF9F
setl $6,#1F3A
9:
setl $5,#1B
setl $4,#1A1B
setl $3,0x9F
setl $2,0x9B
setl $1,0x1F
setl $0,0x1b
/greg4.s
0,0 → 1,4
GREG @
SWYM 0
x SWYM 1
GO $0,x
/err-byte1.s
0,0 → 1,11
% { dg-do assemble { target mmix-*-* } }
% { dg-error "unterminated string|missing closing" "" { target mmix-*-* } 10 }
% { dg-bogus "end of file" "" { xfail mmix-*-* } 0 }
 
# Note that the error is detected in the preformatter, before the text
# gets to the assembler. It also gets confused about the unterminated
# string. Well, at least we get error messages for it, so no worries.
 
Main SWYM 0,0,0
BYTE 2,"no end
BYTE 0
/basep-4.d
0,0 → 1,14
#source: err-bpo2.s
#as: -linker-allocated-gregs
#objdump: -dr
 
# The -linker-allocated-gregs option validates omissions of GREG.
 
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0+ <a>:
0: 0000002a trap 0,0,42
4: 8d2b0000 ldo \$43,\$0,0
6: R_MMIX_BASE_PLUS_OFFSET \.text\+0x34
/jump-c.d
0,0 → 1,28
#as: -x
#objdump: -tdr
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d .text 0+ (|\.text)
0+ l d .data 0+ (|\.data)
0+ l d .bss 0+ (|\.bss)
ffff0000ffff0000 l \*ABS\* 0+ i1
ffff0000ffff0000 l \*ABS\* 0+ i2
0+ g F .text 0+ Main
 
Disassembly of section .text:
 
0+ <Main>:
0: f0000000 jmp 0 <Main>
0: R_MMIX_JMP \*ABS\*\+0xffff0000ffff0000
4: fd000000 swym 0,0,0
8: fd000000 swym 0,0,0
c: fd000000 swym 0,0,0
10: fd000000 swym 0,0,0
14: f0000000 jmp 14 <Main\+0x14>
14: R_MMIX_JMP i2
18: fd000000 swym 0,0,0
1c: fd000000 swym 0,0,0
20: fd000000 swym 0,0,0
24: fd000000 swym 0,0,0
/err-ser-1.s
0,0 → 1,10
% { dg-do assemble { target mmix-*-* } }
% { dg-bogus "bad expression" "" { xfail mmix-*-* } 9 }
% { dg-bogus "bad expression" "" { xfail mmix-*-* } 10 }
 
% Make sure we correctly diagnose the serial-number operator.
% We can't stop the "bad expression" error, though; hence the "bogus" errors.
 
a IS 42
Main TETRA &a<<8 { dg-error "serial number operator is not supported" "" }
TETRA 3+&a<<8 { dg-error "serial number operator is not supported" "" }
/basep-3b.d
0,0 → 1,17
#source: basep-3.s
#as: -linker-allocated-gregs
#objdump: -dr
 
# Check that this test isn't mistreated with -linker-allocated-gregs.
 
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0+ <Main>:
0: bf2a0000 pushgo \$42,\$0,0
2: R_MMIX_REG \.MMIX\.reg_contents
4: fd000000 swym 0,0,0
 
0+8 <extfn>:
8: f8000000 pop 0,0
/relocxrn.d
0,0 → 1,14
# objdump: -dr
# as: -no-expand -linkrelax
# source: reloc16.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: e3040000 setl \$4,0x0
2: R_MMIX_16 foo
4: f82d0000 pop 45,0
6: R_MMIX_16 bar\+0x2a
8: fd2a0000 swym 42,0,0
a: R_MMIX_16 baz\+0xfffffffffffff6d7
/list-in-rn.d
0,0 → 1,315
# objdump: -dr
# as: -no-expand -linkrelax
# source: list-insns.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: 00000003 trap 0,0,3
4: 00030405 trap 3,4,5
8: 010c17f1 fcmp \$12,\$23,\$241
c: 08700129 flot \$112,ROUND_OFF,\$41
10: 0970048d flot \$112,ROUND_NEAR,141
14: 08bf00f2 flot \$191,\$242
18: 09c3002a flot \$195,42
1c: 027acb04 fun \$122,\$203,\$4
20: 03661e28 feql \$102,\$30,\$40
24: 0a66000e flotu \$102,\$14
28: 0a84020e flotu \$132,ROUND_UP,\$14
2c: 0a660368 flotu \$102,ROUND_DOWN,\$104
30: 0aac048c flotu \$172,ROUND_NEAR,\$140
34: 0a010186 flotu \$1,ROUND_OFF,\$134
38: 0470df29 fadd \$112,\$223,\$41
3c: 05700129 fix \$112,ROUND_OFF,\$41
40: 050b008d fix \$11,\$141
44: 0c700129 sflot \$112,ROUND_OFF,\$41
48: 0d70048d sflot \$112,ROUND_NEAR,141
4c: 0670df29 fsub \$112,\$223,\$41
50: 0766000e fixu \$102,\$14
54: 0784020e fixu \$132,ROUND_UP,\$14
58: 0e0b008d sflotu \$11,\$141
5c: 0f70008d sflotu \$112,141
60: 0f70048d sflotu \$112,ROUND_NEAR,141
64: 0e700129 sflotu \$112,ROUND_OFF,\$41
68: 10661e28 fmul \$102,\$30,\$40
6c: 110cdf01 fcmpe \$12,\$223,\$1
70: 197acb2c mul \$122,\$203,44
74: 18661e28 mul \$102,\$30,\$40
78: 130cdf01 feqle \$12,\$223,\$1
7c: 120cdf0b fune \$12,\$223,\$11
80: 1b7ad52c mulu \$122,\$213,44
84: 1a841e28 mulu \$132,\$30,\$40
88: 140cdf0b fdiv \$12,\$223,\$11
8c: 1584020e fsqrt \$132,ROUND_UP,\$14
90: 150b008d fsqrt \$11,\$141
94: 1d7ad52c div \$122,\$213,44
98: 1c841e28 div \$132,\$30,\$40
9c: 160cdf0b frem \$12,\$223,\$11
a0: 1784020e fint \$132,ROUND_UP,\$14
a4: 170b008d fint \$11,\$141
a8: 1e0cdf01 divu \$12,\$223,\$1
ac: 1f7acbff divu \$122,\$203,255
b0: 200cdf01 add \$12,\$223,\$1
b4: 217acbff add \$122,\$203,255
b8: 280cdf0b 2addu \$12,\$223,\$11
bc: 297acb00 2addu \$122,\$203,0
c0: 237acbff addu \$122,\$203,255
c4: 220cdf0b addu \$12,\$223,\$11
c8: 237acbff addu \$122,\$203,255
cc: 220cdf0b addu \$12,\$223,\$11
d0: 2b7acbcd 4addu \$122,\$203,205
d4: 2a0cdf6f 4addu \$12,\$223,\$111
d8: 240cdf0b sub \$12,\$223,\$11
dc: 257acbcd sub \$122,\$203,205
e0: 2c0cdf0b 8addu \$12,\$223,\$11
e4: 2d7acbcd 8addu \$122,\$203,205
e8: 2602df0b subu \$2,\$223,\$11
ec: 270c14cd subu \$12,\$20,205
f0: 2e02df0b 16addu \$2,\$223,\$11
f4: 2f0c14cd 16addu \$12,\$20,205
f8: 3002df0b cmp \$2,\$223,\$11
fc: 310c14cd cmp \$12,\$20,205
100: 3802df0b sl \$2,\$223,\$11
104: 390c14cd sl \$12,\$20,205
108: 3202df0b cmpu \$2,\$223,\$11
10c: 330c14cd cmpu \$12,\$20,205
110: 3a02df0b slu \$2,\$223,\$11
114: 3b0c14cd slu \$12,\$20,205
118: 3402170b neg \$2,23,\$11
11c: 350c00cd neg \$12,0,205
120: 35c00acd neg \$192,10,205
124: 3d0c14cd sr \$12,\$20,205
128: 3c02df0b sr \$2,\$223,\$11
12c: 3602170b negu \$2,23,\$11
130: 370c00cd negu \$12,0,205
134: 3f0c14cd sru \$12,\$20,205
138: 3e02df0b sru \$2,\$223,\$11
13c: 40020000 bn \$2,.*
13c: R_MMIX_ADDR19 \.text\+0x140
140: 40020000 bn \$2,.*
140: R_MMIX_ADDR19 \.text\+0x13c
144: 48020000 bnn \$2,.*
144: R_MMIX_ADDR19 \.text\+0x140
148: 48020000 bnn \$2,.*
148: R_MMIX_ADDR19 \.text\+0x144
14c: 42ff0000 bz \$255,.*
14c: R_MMIX_ADDR19 \.text\+0x150
150: 42ff0000 bz \$255,.*
150: R_MMIX_ADDR19 \.text\+0x14c
154: 4aff0000 bnz \$255,.*
154: R_MMIX_ADDR19 \.text\+0x158
158: 4aff0000 bnz \$255,.*
158: R_MMIX_ADDR19 \.text\+0x154
15c: 44190000 bp \$25,.*
15c: R_MMIX_ADDR19 \.text\+0x160
160: 44190000 bp \$25,.*
160: R_MMIX_ADDR19 \.text\+0x15c
164: 4c190000 bnp \$25,.*
164: R_MMIX_ADDR19 \.text\+0x168
168: 4c190000 bnp \$25,.*
168: R_MMIX_ADDR19 \.text\+0x164
16c: 46190000 bod \$25,.*
16c: R_MMIX_ADDR19 \.text\+0x170
170: 46190000 bod \$25,.*
170: R_MMIX_ADDR19 \.text\+0x16c
174: 4e190000 bev \$25,.*
174: R_MMIX_ADDR19 \.text\+0x178
178: 4e190000 bev \$25,.*
178: R_MMIX_ADDR19 \.text\+0x174
17c: 50020000 pbn \$2,.*
17c: R_MMIX_ADDR19 \.text\+0x180
180: 50020000 pbn \$2,.*
180: R_MMIX_ADDR19 \.text\+0x17c
184: 58020000 pbnn \$2,.*
184: R_MMIX_ADDR19 \.text\+0x188
188: 58020000 pbnn \$2,.*
188: R_MMIX_ADDR19 \.text\+0x184
18c: 520c0000 pbz \$12,.*
18c: R_MMIX_ADDR19 \.text\+0x190
190: 52160000 pbz \$22,.*
190: R_MMIX_ADDR19 \.text\+0x18c
194: 5a200000 pbnz \$32,.*
194: R_MMIX_ADDR19 \.text\+0x198
198: 5a340000 pbnz \$52,.*
198: R_MMIX_ADDR19 \.text\+0x194
19c: 56190000 pbod \$25,.*
19c: R_MMIX_ADDR19 \.text\+0x1a0
1a0: 56190000 pbod \$25,.*
1a0: R_MMIX_ADDR19 \.text\+0x19c
1a4: 5e190000 pbev \$25,.*
1a4: R_MMIX_ADDR19 \.text\+0x1a8
1a8: 5e190000 pbev \$25,.*
1a8: R_MMIX_ADDR19 \.text\+0x1a4
1ac: 6002df0b csn \$2,\$223,\$11
1b0: 610c14cd csn \$12,\$20,205
1b4: 6802df0b csnn \$2,\$223,\$11
1b8: 690c14cd csnn \$12,\$20,205
1bc: 6202cb0b csz \$2,\$203,\$11
1c0: 630cc8cd csz \$12,\$200,205
1c4: 6a02cb0b csnz \$2,\$203,\$11
1c8: 6b0cc8cd csnz \$12,\$200,205
1cc: 6402cb0b csp \$2,\$203,\$11
1d0: 650cc8cd csp \$12,\$200,205
1d4: 6c02cb0b csnp \$2,\$203,\$11
1d8: 6d0cc8cd csnp \$12,\$200,205
1dc: 6602cb0b csod \$2,\$203,\$11
1e0: 670cc8cd csod \$12,\$200,205
1e4: 6e02cb0b csev \$2,\$203,\$11
1e8: 6f0cc8cd csev \$12,\$200,205
1ec: 7002df0b zsn \$2,\$223,\$11
1f0: 710c14cd zsn \$12,\$20,205
1f4: 7802df0b zsnn \$2,\$223,\$11
1f8: 790c14cd zsnn \$12,\$20,205
1fc: 7202cb0b zsz \$2,\$203,\$11
200: 730cc8cd zsz \$12,\$200,205
204: 7a02cb0b zsnz \$2,\$203,\$11
208: 7b0cc8cd zsnz \$12,\$200,205
20c: 7402cb0b zsp \$2,\$203,\$11
210: 750cc8cd zsp \$12,\$200,205
214: 7c02cb0b zsnp \$2,\$203,\$11
218: 7d0cc8cd zsnp \$12,\$200,205
21c: 7602cb0b zsod \$2,\$203,\$11
220: 770cc8cd zsod \$12,\$200,205
224: 7e02cb0b zsev \$2,\$203,\$11
228: 7f0cc8cd zsev \$12,\$200,205
22c: 8002000b ldb \$2,\$0,\$11
230: 810c14cd ldb \$12,\$20,205
234: 8802000b ldt \$2,\$0,\$11
238: 890c14cd ldt \$12,\$20,205
23c: 8202000b ldbu \$2,\$0,\$11
240: 830c14cd ldbu \$12,\$20,205
244: 8a02000b ldtu \$2,\$0,\$11
248: 8b0c14cd ldtu \$12,\$20,205
24c: 8402000b ldw \$2,\$0,\$11
250: 850c14cd ldw \$12,\$20,205
254: 8c02000b ldo \$2,\$0,\$11
258: 8d0c14cd ldo \$12,\$20,205
25c: 8602000b ldwu \$2,\$0,\$11
260: 870c14cd ldwu \$12,\$20,205
264: 8e02000b ldou \$2,\$0,\$11
268: 8f0c14cd ldou \$12,\$20,205
26c: 9802000b ldvts \$2,\$0,\$11
270: 990c14cd ldvts \$12,\$20,205
274: 9202000b ldht \$2,\$0,\$11
278: 930c14cd ldht \$12,\$20,205
27c: 9b7014cd preld 112,\$20,205
280: 9a7014e1 preld 112,\$20,\$225
284: 9402000b cswap \$2,\$0,\$11
288: 950c14cd cswap \$12,\$20,205
28c: 9d7014cd prego 112,\$20,205
290: 9c7014e1 prego 112,\$20,\$225
294: 9602000b ldunc \$2,\$0,\$11
298: 970c14cd ldunc \$12,\$20,205
29c: 9e02000b go \$2,\$0,\$11
2a0: 9f0c14cd go \$12,\$20,205
2a4: a0020a97 stb \$2,\$10,\$151
2a8: a10c14cd stb \$12,\$20,205
2ac: a8200a97 stt \$32,\$10,\$151
2b0: a90c14cd stt \$12,\$20,205
2b4: a2020a97 stbu \$2,\$10,\$151
2b8: a30c14cd stbu \$12,\$20,205
2bc: aa200a97 sttu \$32,\$10,\$151
2c0: ab0c14cd sttu \$12,\$20,205
2c4: a4020a97 stw \$2,\$10,\$151
2c8: a50cdccd stw \$12,\$220,205
2cc: ac20aa97 sto \$32,\$170,\$151
2d0: adb614f5 sto \$182,\$20,245
2d4: a6020a97 stwu \$2,\$10,\$151
2d8: a70cdccd stwu \$12,\$220,205
2dc: ae20aa97 stou \$32,\$170,\$151
2e0: afb614f5 stou \$182,\$20,245
2e4: b020aa97 stsf \$32,\$170,\$151
2e8: b1b614f5 stsf \$182,\$20,245
2ec: b97014cd syncd 112,\$20,205
2f0: b87014e1 syncd 112,\$20,\$225
2f4: b220aa97 stht \$32,\$170,\$151
2f8: b3b614f5 stht \$182,\$20,245
2fc: bb7014cd prest 112,\$20,205
300: ba7014e1 prest 112,\$20,\$225
304: b420aa97 stco 32,\$170,\$151
308: b5b614f5 stco 182,\$20,245
30c: bd7014cd syncid 112,\$20,205
310: bc0014e1 syncid 0,\$20,\$225
314: b620aa97 stunc \$32,\$170,\$151
318: b7b614f5 stunc \$182,\$20,245
31c: be20aa97 pushgo \$32,\$170,\$151
320: bfb614f5 pushgo \$182,\$20,245
324: c18ec800 set \$142,\$200
328: c020aa97 or \$32,\$170,\$151
32c: c1b614f5 or \$182,\$20,245
330: c820aa97 and \$32,\$170,\$151
334: c9b614f5 and \$182,\$20,245
338: c220aa97 orn \$32,\$170,\$151
33c: c3b614f5 orn \$182,\$20,245
340: ca20aa97 andn \$32,\$170,\$151
344: cbb614f5 andn \$182,\$20,245
348: c420aa97 nor \$32,\$170,\$151
34c: c5b614f5 nor \$182,\$20,245
350: cc20aa97 nand \$32,\$170,\$151
354: cdb614f5 nand \$182,\$20,245
358: c620aa97 xor \$32,\$170,\$151
35c: c7b614f5 xor \$182,\$20,245
360: ce20aa97 nxor \$32,\$170,\$151
364: cfb614f5 nxor \$182,\$20,245
368: d020aa97 bdif \$32,\$170,\$151
36c: d1b614f5 bdif \$182,\$20,245
370: d820aa97 mux \$32,\$170,\$151
374: d9b614f5 mux \$182,\$20,245
378: d220aa97 wdif \$32,\$170,\$151
37c: d3b614f5 wdif \$182,\$20,245
380: da20aa97 sadd \$32,\$170,\$151
384: dbb600f5 sadd \$182,\$0,245
388: d420aa97 tdif \$32,\$170,\$151
38c: d5b614f5 tdif \$182,\$20,245
390: dc20aa97 mor \$32,\$170,\$151
394: ddb614f5 mor \$182,\$20,245
398: d620aa97 odif \$32,\$170,\$151
39c: d7b614f5 odif \$182,\$20,245
3a0: de201197 mxor \$32,\$17,\$151
3a4: df52b418 mxor \$82,\$180,24
3a8: e004ffff seth \$4,0xffff
3ac: e05e0000 seth \$94,0x0
3b0: e00400ff seth \$4,0xff
3b4: e05e04d2 seth \$94,0x4d2
3b8: e15e04d2 setmh \$94,0x4d2
3bc: e85e04d2 orh \$94,0x4d2
3c0: e95e04d2 ormh \$94,0x4d2
3c4: e25e04d2 setml \$94,0x4d2
3c8: e35e04d2 setl \$94,0x4d2
3cc: ea5e04d2 orml \$94,0x4d2
3d0: eb5e04d2 orl \$94,0x4d2
3d4: e45e04d2 inch \$94,0x4d2
3d8: e55e04d2 incmh \$94,0x4d2
3dc: ec5e04d2 andnh \$94,0x4d2
3e0: ed5e04d2 andnmh \$94,0x4d2
3e4: e65e04d2 incml \$94,0x4d2
3e8: e75e04d2 incl \$94,0x4d2
3ec: ee5e04d2 andnml \$94,0x4d2
3f0: ef5e04d2 andnl \$94,0x4d2
3f4: f0000000 jmp .*
3f4: R_MMIX_ADDR27 \.text\+0x3f0
3f8: f0000000 jmp .*
3f8: R_MMIX_ADDR27 \.text\+0x3fc
3fc: f82afffe pop 42,65534
400: f90000ff resume 255
404: f9000000 resume 0
408: f9000001 resume 1
40c: f2190000 pushj \$25,.*
40c: R_MMIX_ADDR19 \.text\+0x410
410: f2190000 pushj \$25,.*
410: R_MMIX_ADDR19 \.text\+0x40c
414: fa040000 save \$4,0
418: fb0000ea unsave 0,\$234
41c: f4190000 geta \$25,.*
41c: R_MMIX_ADDR19 \.text\+0x420
420: f4190000 geta \$25,.*
420: R_MMIX_ADDR19 \.text\+0x41c
424: fc7a1201 sync 8000001
428: fd010203 swym 1,2,3
42c: fd000000 swym 0,0,0
430: f7040022 put rJ,34
434: f6040086 put rJ,\$134
438: feea0004 get \$234,rJ
43c: ff000000 trip 0,0,0
440: ff050607 trip 5,6,7
/1cjmp1b.d
0,0 → 1,10
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fd000000 swym 0,0,0
4: f0000001 jmp 8 <Main\+0x8>
8: f0000000 jmp 8 <Main\+0x8>
c: f1ffffff jmp 8 <Main\+0x8>
/1cjmp1b.l
0,0 → 1,14
GAS for MMIX .*/1cjmp1b.s page 1
 
 
1 0000 FD000000 Main SWYM 0,0,0
2 0004 F0000001 1: JMP 1f
3 0008 F0000000 1: JMP 1b
4 000c F1FFFFFF JMP 1b
GAS for MMIX .*/1cjmp1b.s page 2
 
 
DEFINED SYMBOLS
.*/1cjmp1b.s:1 .text:0000000000000000 Main
 
NO UNDEFINED SYMBOLS
/reloc16-n.d
0,0 → 1,14
# objdump: -dr
# as: -no-expand
# source: reloc16.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: e3040000 setl \$4,0x0
2: R_MMIX_16 foo
4: f82d0000 pop 45,0
6: R_MMIX_16 bar\+0x2a
8: fd2a0000 swym 42,0,0
a: R_MMIX_16 baz\+0xfffffffffffff6d7
/jump-c.s
0,0 → 1,5
% JMP with a large constant must not fail
i1 IS #ffff0000ffff0000
Main JMP i1
JMP i2
i2 IS #ffff0000ffff0000
/loc-1.d
0,0 → 1,45
#readelf: -Ssrx1 -x2
 
There are 7 section headers, starting at offset 0x90:
 
Section Headers:
\[Nr\] Name Type Address Offset
Size EntSize Flags Link Info Align
\[ 0\] NULL 0000000000000000 00000000
0000000000000000 0000000000000000 0 0 0
\[ 1\] \.text PROGBITS 0000000000000000 00000040
0000000000000020 0000000000000000 AX 0 0 4
\[ 2\] \.data PROGBITS 0000000000000000 00000060
0000000000000004 0000000000000000 WA 0 0 4
\[ 3\] \.bss NOBITS 0000000000000000 00000064
0000000000000000 0000000000000000 WA 0 0 1
\[ 4\] \.shstrtab STRTAB 0000000000000000 00000064
000000000000002c 0000000000000000 0 0 1
\[ 5\] \.symtab SYMTAB 0000000000000000 00000250
00000000000000c0 0000000000000018 6 6 8
\[ 6\] \.strtab STRTAB 0000000000000000 00000310
000000000000002a 0000000000000000 0 0 1
Key to Flags:
W \(write\), A \(alloc\), X \(execute\), M \(merge\), S \(strings\)
I \(info\), L \(link order\), G \(group\), x \(unknown\)
O \(extra OS processing required\) o \(OS specific\), p \(processor specific\)
 
There are no relocations in this file\.
 
Symbol table '\.symtab' contains 8 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 0+ 0 NOTYPE LOCAL DEFAULT UND
1: 0+ 0 SECTION LOCAL DEFAULT 1
2: 0+ 0 SECTION LOCAL DEFAULT 2
3: 0+ 0 SECTION LOCAL DEFAULT 3
4: 0+4 0 NOTYPE LOCAL DEFAULT 1 m2
5: 2000000000000000 0 NOTYPE LOCAL DEFAULT ABS Data_Segment
6: 0+ 0 FUNC GLOBAL DEFAULT 1 Main
7: 2000000000000000 0 NOTYPE GLOBAL DEFAULT ABS __\.MMIX\.start\.\.data
 
Hex dump of section '\.text':
0x00000000 fd000000 00000000 00000000 00000000 .*
0x00000010 00000000 00000000 00000000 fd010203 .*
 
Hex dump of section '\.data':
0x00000000 00000004 .*
/reloc16.d
0,0 → 1,12
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: e3040000 setl \$4,0x0
2: R_MMIX_16 foo
4: f82d0000 pop 45,0
6: R_MMIX_16 bar\+0x2a
8: fd2a0000 swym 42,0,0
a: R_MMIX_16 baz\+0xfffffffffffff6d7
/1cjmp1b.s
0,0 → 1,4
Main SWYM 0,0,0
1: JMP 1f
1: JMP 1b
JMP 1b
/expr-1.d
0,0 → 1,7
# objdump: -s
 
.*: file format elf64-mmix
 
Contents of section \.text:
0000 000000ab 00000100 .*
 
/reloc16.l
0,0 → 1,17
GAS for MMIX .*/reloc16\.s page 1
 
 
1 #.*
2 0000 E3040000 Main SETL \$4,foo
3 0004 F82D0000 POP 45,bar\+42
4 0008 FD2A0000 SWYM 42,baz-2345
GAS for MMIX .*/reloc16\.s page 2
 
 
DEFINED SYMBOLS
.*/reloc16\.s:2 \.text:0000000000000000 Main
 
UNDEFINED SYMBOLS
foo
bar
baz
/roundr-op.d
0,0 → 1,13
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section .text:
 
0000000000000000 <Main>:
0: 178701f4 fint \$135,ROUND_OFF,\$244
4: 058702e9 fix \$135,ROUND_UP,\$233
8: 178500f4 fint \$133,\$244
c: 157b04f4 fsqrt \$123,ROUND_NEAR,\$244
10: 17ad02e9 fint \$173,ROUND_UP,\$233
14: 058700f4 fix \$135,\$244
18: 078700f4 fixu \$135,\$244
/two-op.d
0,0 → 1,22
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: e0175840 seth \$23,0x5840
4: e12d5840 setmh \$45,0x5840
8: e8171ed4 orh \$23,0x1ed4
c: e92d3039 ormh \$45,0x3039
10: e2175840 setml \$23,0x5840
14: e32d5840 setl \$45,0x5840
18: ea171ed4 orml \$23,0x1ed4
1c: eb2d3039 orl \$45,0x3039
20: e42d3039 inch \$45,0x3039
24: e5171ed4 incmh \$23,0x1ed4
28: ec2d5840 andnh \$45,0x5840
2c: ed175840 andnmh \$23,0x5840
30: e6175840 incml \$23,0x5840
34: e72d5840 incl \$45,0x5840
38: ee171ed4 andnml \$23,0x1ed4
3c: ef2d3039 andnl \$45,0x3039
/loc-1.s
0,0 → 1,7
# Check that we don't get anything strange from a single LOC to data and a
# LOC back (with an offset).
Main SWYM 0,0,0
m2 LOC Data_Segment
TETRA 4
LOC m2+24
SWYM 1,2,3
/set-r.d
0,0 → 1,14
# objdump: -dr
# as: -linkrelax
# source: set.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: e32d0463 setl \$45,0x463
4: c1394300 set \$57,\$67
8: c14e1f00 set \$78,\$31
c: e3750463 setl \$117,0x463
10: c1754300 set \$117,\$67
14: c1751f00 set \$117,\$31
/reloc16.s
0,0 → 1,4
# Simple relocations against 16-bit extern symbols.
Main SETL $4,foo
POP 45,bar+42
SWYM 42,baz-2345
/expr-1.s
0,0 → 1,5
% Test expression example from TAOCP. Nothing problematic; does not have
% the known expression evaluation order mismatch problem.
 
k IS #cdef00
Main OCTA #ab<<32+k&~(k-1)
/roundr-op.l
0,0 → 1,22
GAS for MMIX .*/roundr-op\.s page 1
 
 
1 # Round-type "R"\.
2 0000 178701F4 Main FINT X,ROUND_OFF,Z
3 0004 058702E9 FIX X,2,\$233
4 0008 178500F4 FINT \$133,0,Z
5 000c 157B04F4 FSQRT \$123,ROUND_NEAR,Z
6 0010 17AD02E9 FINT \$173,2,\$233
7 0014 058700F4 FIX X,0,Z
8 0018 078700F4 FIXU X,ROUND_CURRENT,Z
9 X IS \$135
10 Z IS \$244
GAS for MMIX .*/roundr-op\.s page 2
 
 
DEFINED SYMBOLS
.*/roundr-op\.s:2 \.text:0000000000000000 Main
\*REG\*:0000000000000087 X
\*REG\*:00000000000000f4 Z
 
NO UNDEFINED SYMBOLS
/two-op.l
0,0 → 1,35
GAS for MMIX .*/two-op\.s page 1
 
 
1 #.*
2 #.*
3 0000 E0175840 Main SETH X,YZ
4 0004 E12D5840 SETMH \$45,YZ
5 0008 E8171ED4 ORH X,7892
6 000c E92D3039 ORMH \$45,12345
7
8 0010 E2175840 SETML X,YZ
9 0014 E32D5840 SETL \$45,YZ
10 0018 EA171ED4 ORML X,7892
11 001c EB2D3039 ORL \$45,12345
12
13 0020 E42D3039 INCH \$45,12345
14 0024 E5171ED4 INCMH X,7892
15 0028 EC2D5840 ANDNH \$45,YZ
16 002c ED175840 ANDNMH X,YZ
17
18 0030 E6175840 INCML X,YZ
19 0034 E72D5840 INCL \$45,YZ
20 0038 EE171ED4 ANDNML X,7892
21 003c EF2D3039 ANDNL \$45,12345
22 X IS \$23
23 YZ IS #5678\+456
GAS for MMIX .*/two-op\.s page 2
 
 
DEFINED SYMBOLS
.*/two-op\.s:3 \.text:0000000000000000 Main
\*REG\*:0000000000000017 X
\*ABS\*:0000000000005840 YZ
 
NO UNDEFINED SYMBOLS
/jmp-op-n.d
0,0 → 1,23
# objdump: -dr
# source: jmp-op.s
# as: -no-expand
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fd000000 swym 0,0,0
 
0000000000000004 <here>:
4: fd000000 swym 0,0,0
8: f1ffffff jmp 4 <here>
 
000000000000000c <at>:
c: f0000000 jmp c <at>
10: f0000004 jmp 20 <there>
14: f1fffffc jmp 4 <here>
18: f0000002 jmp 20 <there>
1c: f1fffffa jmp 4 <here>
 
0000000000000020 <there>:
20: fd000000 swym 0,0,0
/geta-c.d
0,0 → 1,26
#as: -x
#objdump: -tdr
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d .text 0+ (|\.text)
0+ l d .data 0+ (|\.data)
0+ l d .bss 0+ (|\.bss)
ffff0000ffff0000 l \*ABS\* 0+ i1
ffff0000ffff0000 l \*ABS\* 0+ i2
0+ g F .text 0+ Main
 
Disassembly of section .text:
 
0+ <Main>:
0: f4ff0000 geta \$255,0 <Main>
0: R_MMIX_GETA \*ABS\*\+0xffff0000ffff0000
4: fd000000 swym 0,0,0
8: fd000000 swym 0,0,0
c: fd000000 swym 0,0,0
10: f4ff0000 geta \$255,10 <Main\+0x10>
10: R_MMIX_GETA i2
14: fd000000 swym 0,0,0
18: fd000000 swym 0,0,0
1c: fd000000 swym 0,0,0
/byte-1.d
0,0 → 1,41
#readelf: -Ssrx1
There are 7 section headers, starting at offset 0x88:
 
Section Headers:
\[Nr\] Name Type Address Offset
Size EntSize Flags Link Info Align
\[ 0\] NULL 0000000000000000 00000000
0000000000000000 0000000000000000 0 0 0
\[ 1\] \.text PROGBITS 0000000000000000 00000040
0000000000000016 0000000000000000 AX 0 0 4
\[ 2\] \.data PROGBITS 0000000000000000 00000056
0000000000000000 0000000000000000 WA 0 0 1
\[ 3\] \.bss NOBITS 0000000000000000 00000056
0000000000000000 0000000000000000 WA 0 0 1
\[ 4\] \.shstrtab STRTAB 0000000000000000 00000056
000000000000002c 0000000000000000 0 0 1
\[ 5\] \.symtab SYMTAB 0000000000000000 00000248
00000000000000c0 0000000000000018 6 7 8
\[ 6\] \.strtab STRTAB 0000000000000000 00000308
0000000000000018 0000000000000000 0 0 1
Key to Flags:
W \(write\), A \(alloc\), X \(execute\), M \(merge\), S \(strings\)
I \(info\), L \(link order\), G \(group\), x \(unknown\)
O \(extra OS processing required\) o \(OS specific\), p \(processor specific\)
 
There are no relocations in this file\.
 
Symbol table '\.symtab' contains 8 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 0+ 0 NOTYPE LOCAL DEFAULT UND
1: 0+ 0 SECTION LOCAL DEFAULT 1
2: 0+ 0 SECTION LOCAL DEFAULT 2
3: 0+ 0 SECTION LOCAL DEFAULT 3
4: 0+2a 0 NOTYPE LOCAL DEFAULT ABS number
5: 0+4 0 NOTYPE LOCAL DEFAULT 1 label
6: 0+c 0 NOTYPE LOCAL DEFAULT 1 lab2
7: 0+ 0 FUNC GLOBAL DEFAULT 1 Main
 
Hex dump of section '\.text':
0x00000000 fd2b2a29 73747269 6e670aff 8e007374 .*
0x00000010 72696e67 320a .*
/err-bspec-5.s
0,0 → 1,21
% { dg-do assemble { target mmix-*-* } }
Main SET $45,23
here SWYM 0,0,0
BSPEC 0
TETRA 4
ESPEC
BSPEC 65535
TETRA 4
ESPEC
BSPEC 65536 % { dg-error "invalid BSPEC expression" "" }
TETRA 4
ESPEC
BSPEC forw % { dg-error "invalid BSPEC expression" "" }
TETRA 4
ESPEC
BSPEC here % { dg-error "invalid BSPEC expression" "" }
TETRA 4
ESPEC
BSPEC -1 % { dg-error "invalid BSPEC expression" "" }
TETRA 4
ESPEC
/roundr-op.s
0,0 → 1,10
# Round-type "R".
Main FINT X,ROUND_OFF,Z
FIX X,2,$233
FINT $133,0,Z
FSQRT $123,ROUND_NEAR,Z
FINT $173,2,$233
FIX X,0,Z
FIXU X,ROUND_CURRENT,Z
X IS $135
Z IS $244
/two-op.s
0,0 → 1,23
# Two-operand insns; 16-bit operand.
#
Main SETH X,YZ
SETMH $45,YZ
ORH X,7892
ORMH $45,12345
 
SETML X,YZ
SETL $45,YZ
ORML X,7892
ORL $45,12345
 
INCH $45,12345
INCMH X,7892
ANDNH $45,YZ
ANDNMH X,YZ
 
INCML X,YZ
INCL $45,YZ
ANDNML X,7892
ANDNL $45,12345
X IS $23
YZ IS #5678+456
/greg5.d
0,0 → 1,29
#objdump: -str
 
# GAS must know that .data and expressions around #20 << 56 can be
# equivalent for GREGs.
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ l \.text 0+ t
2000000000000004 l \*ABS\* 0+ x
2000000000000000 l \*ABS\* 0+ Data_Segment
0+ l \.data 0+ y
0+ l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
0+ g F \.text 0+ Main
2000000000000008 g \*ABS\* 0+ __\.MMIX\.start\.\.data
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+2 R_MMIX_REG \.MMIX\.reg_contents
 
Contents of section \.text:
0000 232c0004 .*
Contents of section \.data:
0000 00000000 00000021 .*
Contents of section \.MMIX\.reg_contents:
0000 20000000 00000004 .*
/unsave-op-r.d
0,0 → 1,11
# objdump: -dr
# as: -linkrelax
# source: unsave-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fb00002d unsave 0,\$45
4: fb00001f unsave 0,\$31
8: fb000000 unsave 0,\$0
/list-in-r.d
0,0 → 1,315
# objdump: -dr
# as: -linkrelax
# source: list-insns.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: 00000003 trap 0,0,3
4: 00030405 trap 3,4,5
8: 010c17f1 fcmp \$12,\$23,\$241
c: 08700129 flot \$112,ROUND_OFF,\$41
10: 0970048d flot \$112,ROUND_NEAR,141
14: 08bf00f2 flot \$191,\$242
18: 09c3002a flot \$195,42
1c: 027acb04 fun \$122,\$203,\$4
20: 03661e28 feql \$102,\$30,\$40
24: 0a66000e flotu \$102,\$14
28: 0a84020e flotu \$132,ROUND_UP,\$14
2c: 0a660368 flotu \$102,ROUND_DOWN,\$104
30: 0aac048c flotu \$172,ROUND_NEAR,\$140
34: 0a010186 flotu \$1,ROUND_OFF,\$134
38: 0470df29 fadd \$112,\$223,\$41
3c: 05700129 fix \$112,ROUND_OFF,\$41
40: 050b008d fix \$11,\$141
44: 0c700129 sflot \$112,ROUND_OFF,\$41
48: 0d70048d sflot \$112,ROUND_NEAR,141
4c: 0670df29 fsub \$112,\$223,\$41
50: 0766000e fixu \$102,\$14
54: 0784020e fixu \$132,ROUND_UP,\$14
58: 0e0b008d sflotu \$11,\$141
5c: 0f70008d sflotu \$112,141
60: 0f70048d sflotu \$112,ROUND_NEAR,141
64: 0e700129 sflotu \$112,ROUND_OFF,\$41
68: 10661e28 fmul \$102,\$30,\$40
6c: 110cdf01 fcmpe \$12,\$223,\$1
70: 197acb2c mul \$122,\$203,44
74: 18661e28 mul \$102,\$30,\$40
78: 130cdf01 feqle \$12,\$223,\$1
7c: 120cdf0b fune \$12,\$223,\$11
80: 1b7ad52c mulu \$122,\$213,44
84: 1a841e28 mulu \$132,\$30,\$40
88: 140cdf0b fdiv \$12,\$223,\$11
8c: 1584020e fsqrt \$132,ROUND_UP,\$14
90: 150b008d fsqrt \$11,\$141
94: 1d7ad52c div \$122,\$213,44
98: 1c841e28 div \$132,\$30,\$40
9c: 160cdf0b frem \$12,\$223,\$11
a0: 1784020e fint \$132,ROUND_UP,\$14
a4: 170b008d fint \$11,\$141
a8: 1e0cdf01 divu \$12,\$223,\$1
ac: 1f7acbff divu \$122,\$203,255
b0: 200cdf01 add \$12,\$223,\$1
b4: 217acbff add \$122,\$203,255
b8: 280cdf0b 2addu \$12,\$223,\$11
bc: 297acb00 2addu \$122,\$203,0
c0: 237acbff addu \$122,\$203,255
c4: 220cdf0b addu \$12,\$223,\$11
c8: 237acbff addu \$122,\$203,255
cc: 220cdf0b addu \$12,\$223,\$11
d0: 2b7acbcd 4addu \$122,\$203,205
d4: 2a0cdf6f 4addu \$12,\$223,\$111
d8: 240cdf0b sub \$12,\$223,\$11
dc: 257acbcd sub \$122,\$203,205
e0: 2c0cdf0b 8addu \$12,\$223,\$11
e4: 2d7acbcd 8addu \$122,\$203,205
e8: 2602df0b subu \$2,\$223,\$11
ec: 270c14cd subu \$12,\$20,205
f0: 2e02df0b 16addu \$2,\$223,\$11
f4: 2f0c14cd 16addu \$12,\$20,205
f8: 3002df0b cmp \$2,\$223,\$11
fc: 310c14cd cmp \$12,\$20,205
100: 3802df0b sl \$2,\$223,\$11
104: 390c14cd sl \$12,\$20,205
108: 3202df0b cmpu \$2,\$223,\$11
10c: 330c14cd cmpu \$12,\$20,205
110: 3a02df0b slu \$2,\$223,\$11
114: 3b0c14cd slu \$12,\$20,205
118: 3402170b neg \$2,23,\$11
11c: 350c00cd neg \$12,0,205
120: 35c00acd neg \$192,10,205
124: 3d0c14cd sr \$12,\$20,205
128: 3c02df0b sr \$2,\$223,\$11
12c: 3602170b negu \$2,23,\$11
130: 370c00cd negu \$12,0,205
134: 3f0c14cd sru \$12,\$20,205
138: 3e02df0b sru \$2,\$223,\$11
13c: 40020001 bn \$2,140 <Main\+0x140>
13c: R_MMIX_ADDR19 \.text\+0x140
140: 4102ffff bn \$2,13c <Main\+0x13c>
140: R_MMIX_ADDR19 \.text\+0x13c
144: 4902ffff bnn \$2,140 <Main\+0x140>
144: R_MMIX_ADDR19 \.text\+0x140
148: 4902ffff bnn \$2,144 <Main\+0x144>
148: R_MMIX_ADDR19 \.text\+0x144
14c: 42ff0001 bz \$255,150 <Main\+0x150>
14c: R_MMIX_ADDR19 \.text\+0x150
150: 43ffffff bz \$255,14c <Main\+0x14c>
150: R_MMIX_ADDR19 \.text\+0x14c
154: 4aff0001 bnz \$255,158 <Main\+0x158>
154: R_MMIX_ADDR19 \.text\+0x158
158: 4bffffff bnz \$255,154 <Main\+0x154>
158: R_MMIX_ADDR19 \.text\+0x154
15c: 44190001 bp \$25,160 <Main\+0x160>
15c: R_MMIX_ADDR19 \.text\+0x160
160: 4519ffff bp \$25,15c <Main\+0x15c>
160: R_MMIX_ADDR19 \.text\+0x15c
164: 4c190001 bnp \$25,168 <Main\+0x168>
164: R_MMIX_ADDR19 \.text\+0x168
168: 4d19ffff bnp \$25,164 <Main\+0x164>
168: R_MMIX_ADDR19 \.text\+0x164
16c: 46190001 bod \$25,170 <Main\+0x170>
16c: R_MMIX_ADDR19 \.text\+0x170
170: 4719ffff bod \$25,16c <Main\+0x16c>
170: R_MMIX_ADDR19 \.text\+0x16c
174: 4e190001 bev \$25,178 <Main\+0x178>
174: R_MMIX_ADDR19 \.text\+0x178
178: 4f19ffff bev \$25,174 <Main\+0x174>
178: R_MMIX_ADDR19 \.text\+0x174
17c: 50020001 pbn \$2,180 <Main\+0x180>
17c: R_MMIX_ADDR19 \.text\+0x180
180: 5102ffff pbn \$2,17c <Main\+0x17c>
180: R_MMIX_ADDR19 \.text\+0x17c
184: 58020001 pbnn \$2,188 <Main\+0x188>
184: R_MMIX_ADDR19 \.text\+0x188
188: 5902ffff pbnn \$2,184 <Main\+0x184>
188: R_MMIX_ADDR19 \.text\+0x184
18c: 520c0001 pbz \$12,190 <Main\+0x190>
18c: R_MMIX_ADDR19 \.text\+0x190
190: 5316ffff pbz \$22,18c <Main\+0x18c>
190: R_MMIX_ADDR19 \.text\+0x18c
194: 5a200001 pbnz \$32,198 <Main\+0x198>
194: R_MMIX_ADDR19 \.text\+0x198
198: 5b34ffff pbnz \$52,194 <Main\+0x194>
198: R_MMIX_ADDR19 \.text\+0x194
19c: 56190001 pbod \$25,1a0 <Main\+0x1a0>
19c: R_MMIX_ADDR19 \.text\+0x1a0
1a0: 5719ffff pbod \$25,19c <Main\+0x19c>
1a0: R_MMIX_ADDR19 \.text\+0x19c
1a4: 5e190001 pbev \$25,1a8 <Main\+0x1a8>
1a4: R_MMIX_ADDR19 \.text\+0x1a8
1a8: 5f19ffff pbev \$25,1a4 <Main\+0x1a4>
1a8: R_MMIX_ADDR19 \.text\+0x1a4
1ac: 6002df0b csn \$2,\$223,\$11
1b0: 610c14cd csn \$12,\$20,205
1b4: 6802df0b csnn \$2,\$223,\$11
1b8: 690c14cd csnn \$12,\$20,205
1bc: 6202cb0b csz \$2,\$203,\$11
1c0: 630cc8cd csz \$12,\$200,205
1c4: 6a02cb0b csnz \$2,\$203,\$11
1c8: 6b0cc8cd csnz \$12,\$200,205
1cc: 6402cb0b csp \$2,\$203,\$11
1d0: 650cc8cd csp \$12,\$200,205
1d4: 6c02cb0b csnp \$2,\$203,\$11
1d8: 6d0cc8cd csnp \$12,\$200,205
1dc: 6602cb0b csod \$2,\$203,\$11
1e0: 670cc8cd csod \$12,\$200,205
1e4: 6e02cb0b csev \$2,\$203,\$11
1e8: 6f0cc8cd csev \$12,\$200,205
1ec: 7002df0b zsn \$2,\$223,\$11
1f0: 710c14cd zsn \$12,\$20,205
1f4: 7802df0b zsnn \$2,\$223,\$11
1f8: 790c14cd zsnn \$12,\$20,205
1fc: 7202cb0b zsz \$2,\$203,\$11
200: 730cc8cd zsz \$12,\$200,205
204: 7a02cb0b zsnz \$2,\$203,\$11
208: 7b0cc8cd zsnz \$12,\$200,205
20c: 7402cb0b zsp \$2,\$203,\$11
210: 750cc8cd zsp \$12,\$200,205
214: 7c02cb0b zsnp \$2,\$203,\$11
218: 7d0cc8cd zsnp \$12,\$200,205
21c: 7602cb0b zsod \$2,\$203,\$11
220: 770cc8cd zsod \$12,\$200,205
224: 7e02cb0b zsev \$2,\$203,\$11
228: 7f0cc8cd zsev \$12,\$200,205
22c: 8002000b ldb \$2,\$0,\$11
230: 810c14cd ldb \$12,\$20,205
234: 8802000b ldt \$2,\$0,\$11
238: 890c14cd ldt \$12,\$20,205
23c: 8202000b ldbu \$2,\$0,\$11
240: 830c14cd ldbu \$12,\$20,205
244: 8a02000b ldtu \$2,\$0,\$11
248: 8b0c14cd ldtu \$12,\$20,205
24c: 8402000b ldw \$2,\$0,\$11
250: 850c14cd ldw \$12,\$20,205
254: 8c02000b ldo \$2,\$0,\$11
258: 8d0c14cd ldo \$12,\$20,205
25c: 8602000b ldwu \$2,\$0,\$11
260: 870c14cd ldwu \$12,\$20,205
264: 8e02000b ldou \$2,\$0,\$11
268: 8f0c14cd ldou \$12,\$20,205
26c: 9802000b ldvts \$2,\$0,\$11
270: 990c14cd ldvts \$12,\$20,205
274: 9202000b ldht \$2,\$0,\$11
278: 930c14cd ldht \$12,\$20,205
27c: 9b7014cd preld 112,\$20,205
280: 9a7014e1 preld 112,\$20,\$225
284: 9402000b cswap \$2,\$0,\$11
288: 950c14cd cswap \$12,\$20,205
28c: 9d7014cd prego 112,\$20,205
290: 9c7014e1 prego 112,\$20,\$225
294: 9602000b ldunc \$2,\$0,\$11
298: 970c14cd ldunc \$12,\$20,205
29c: 9e02000b go \$2,\$0,\$11
2a0: 9f0c14cd go \$12,\$20,205
2a4: a0020a97 stb \$2,\$10,\$151
2a8: a10c14cd stb \$12,\$20,205
2ac: a8200a97 stt \$32,\$10,\$151
2b0: a90c14cd stt \$12,\$20,205
2b4: a2020a97 stbu \$2,\$10,\$151
2b8: a30c14cd stbu \$12,\$20,205
2bc: aa200a97 sttu \$32,\$10,\$151
2c0: ab0c14cd sttu \$12,\$20,205
2c4: a4020a97 stw \$2,\$10,\$151
2c8: a50cdccd stw \$12,\$220,205
2cc: ac20aa97 sto \$32,\$170,\$151
2d0: adb614f5 sto \$182,\$20,245
2d4: a6020a97 stwu \$2,\$10,\$151
2d8: a70cdccd stwu \$12,\$220,205
2dc: ae20aa97 stou \$32,\$170,\$151
2e0: afb614f5 stou \$182,\$20,245
2e4: b020aa97 stsf \$32,\$170,\$151
2e8: b1b614f5 stsf \$182,\$20,245
2ec: b97014cd syncd 112,\$20,205
2f0: b87014e1 syncd 112,\$20,\$225
2f4: b220aa97 stht \$32,\$170,\$151
2f8: b3b614f5 stht \$182,\$20,245
2fc: bb7014cd prest 112,\$20,205
300: ba7014e1 prest 112,\$20,\$225
304: b420aa97 stco 32,\$170,\$151
308: b5b614f5 stco 182,\$20,245
30c: bd7014cd syncid 112,\$20,205
310: bc0014e1 syncid 0,\$20,\$225
314: b620aa97 stunc \$32,\$170,\$151
318: b7b614f5 stunc \$182,\$20,245
31c: be20aa97 pushgo \$32,\$170,\$151
320: bfb614f5 pushgo \$182,\$20,245
324: c18ec800 set \$142,\$200
328: c020aa97 or \$32,\$170,\$151
32c: c1b614f5 or \$182,\$20,245
330: c820aa97 and \$32,\$170,\$151
334: c9b614f5 and \$182,\$20,245
338: c220aa97 orn \$32,\$170,\$151
33c: c3b614f5 orn \$182,\$20,245
340: ca20aa97 andn \$32,\$170,\$151
344: cbb614f5 andn \$182,\$20,245
348: c420aa97 nor \$32,\$170,\$151
34c: c5b614f5 nor \$182,\$20,245
350: cc20aa97 nand \$32,\$170,\$151
354: cdb614f5 nand \$182,\$20,245
358: c620aa97 xor \$32,\$170,\$151
35c: c7b614f5 xor \$182,\$20,245
360: ce20aa97 nxor \$32,\$170,\$151
364: cfb614f5 nxor \$182,\$20,245
368: d020aa97 bdif \$32,\$170,\$151
36c: d1b614f5 bdif \$182,\$20,245
370: d820aa97 mux \$32,\$170,\$151
374: d9b614f5 mux \$182,\$20,245
378: d220aa97 wdif \$32,\$170,\$151
37c: d3b614f5 wdif \$182,\$20,245
380: da20aa97 sadd \$32,\$170,\$151
384: dbb600f5 sadd \$182,\$0,245
388: d420aa97 tdif \$32,\$170,\$151
38c: d5b614f5 tdif \$182,\$20,245
390: dc20aa97 mor \$32,\$170,\$151
394: ddb614f5 mor \$182,\$20,245
398: d620aa97 odif \$32,\$170,\$151
39c: d7b614f5 odif \$182,\$20,245
3a0: de201197 mxor \$32,\$17,\$151
3a4: df52b418 mxor \$82,\$180,24
3a8: e004ffff seth \$4,0xffff
3ac: e05e0000 seth \$94,0x0
3b0: e00400ff seth \$4,0xff
3b4: e05e04d2 seth \$94,0x4d2
3b8: e15e04d2 setmh \$94,0x4d2
3bc: e85e04d2 orh \$94,0x4d2
3c0: e95e04d2 ormh \$94,0x4d2
3c4: e25e04d2 setml \$94,0x4d2
3c8: e35e04d2 setl \$94,0x4d2
3cc: ea5e04d2 orml \$94,0x4d2
3d0: eb5e04d2 orl \$94,0x4d2
3d4: e45e04d2 inch \$94,0x4d2
3d8: e55e04d2 incmh \$94,0x4d2
3dc: ec5e04d2 andnh \$94,0x4d2
3e0: ed5e04d2 andnmh \$94,0x4d2
3e4: e65e04d2 incml \$94,0x4d2
3e8: e75e04d2 incl \$94,0x4d2
3ec: ee5e04d2 andnml \$94,0x4d2
3f0: ef5e04d2 andnl \$94,0x4d2
3f4: f1ffffff jmp 3f0 <Main\+0x3f0>
3f4: R_MMIX_ADDR27 \.text\+0x3f0
3f8: f0000001 jmp 3fc <Main\+0x3fc>
3f8: R_MMIX_ADDR27 \.text\+0x3fc
3fc: f82afffe pop 42,65534
400: f90000ff resume 255
404: f9000000 resume 0
408: f9000001 resume 1
40c: f2190001 pushj \$25,410 <Main\+0x410>
40c: R_MMIX_ADDR19 \.text\+0x410
410: f319ffff pushj \$25,40c <Main\+0x40c>
410: R_MMIX_ADDR19 \.text\+0x40c
414: fa040000 save \$4,0
418: fb0000ea unsave 0,\$234
41c: f4190001 geta \$25,420 <Main\+0x420>
41c: R_MMIX_ADDR19 \.text\+0x420
420: f519ffff geta \$25,41c <Main\+0x41c>
420: R_MMIX_ADDR19 \.text\+0x41c
424: fc7a1201 sync 8000001
428: fd010203 swym 1,2,3
42c: fd000000 swym 0,0,0
430: f7040022 put rJ,34
434: f6040086 put rJ,\$134
438: feea0004 get \$234,rJ
43c: ff000000 trip 0,0,0
440: ff050607 trip 5,6,7
/geta-c.s
0,0 → 1,5
% GETA with a large constant must not fail
i1 IS #ffff0000ffff0000
Main GETA $255,i1
GETA $255,i2
i2 IS #ffff0000ffff0000
/byte-1.s
0,0 → 1,6
# Test BYTE sequences, excercising code paths for valid input.
number IS 42
Main SWYM 43,number,41
 
label BYTE "string",#a,255
lab2 BYTE number+100,0,"string2",#a
/err-loc-4.s
0,0 → 1,4
% { dg-do assemble { target mmix-*-* } }
LOC #201
WYDE 1
SWYM 1 % { dg-error "specified location wasn't TETRA-aligned" "" }
/put-op.d
0,0 → 1,15
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: f604007b put rJ,\$123
4: f613002d put rG,\$45
8: f61f00f5 put rZZ,\$245
c: f604006f put rJ,\$111
10: f713002d put rG,45
14: f71f00f5 put rZZ,245
18: f7040000 put rJ,0
1c: f7130000 put rG,0
20: f71f0000 put rZZ,0
/reg-op-r.d
0,0 → 1,16
# objdump: -dr
# as: -linkrelax
# source: reg-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: 10170c43 fmul \$23,\$12,\$67
4: 01200c43 fcmp \$32,\$12,\$67
8: 040c2043 fadd \$12,\$32,\$67
c: 02e88543 fun \$232,\$133,\$67
10: 03170c49 feql \$23,\$12,\$73
14: 161f0ce9 frem \$31,\$12,\$233
18: 061726d4 fsub \$23,\$38,\$212
1c: 1304afb5 feqle \$4,\$175,\$181
/greg5.s
0,0 → 1,9
t IS @
x IS Data_Segment+4
 
LOC x+4
y OCTA 33
GREG x
 
LOC t
Main LDA $44,y
/bspec-1.d
0,0 → 1,27
#readelf: -Ssr -x1 -x4
There are 9 section headers, starting at offset 0x..:
#...
\[ 4\] \.MMIX\.spec_data\.2 PROGBITS 0+ 0+44
0+4 0+ 0 0 4
\[ 5\] \.rela\.MMIX\.spec_d RELA 0+ .*
0+18 0+18 7 4 8
#...
Relocation section '\.rela\.MMIX\.spec_data\.2' at offset 0x... contains 1 entries:
.*
0+ 0+500000004 R_MMIX_32 +0+ +forw +\+ 0
 
Symbol table '\.symtab' contains 6 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 0+ 0 NOTYPE LOCAL DEFAULT UND
1: 0+ 0 SECTION LOCAL DEFAULT 1
2: 0+ 0 SECTION LOCAL DEFAULT 2
3: 0+ 0 SECTION LOCAL DEFAULT 3
4: 0+ 0 SECTION LOCAL DEFAULT 4
5: 0+ 0 NOTYPE GLOBAL DEFAULT UND forw
 
Hex dump of section '\.text':
0x0+ fd010203 .*
 
Hex dump of section '\.MMIX\.spec_data\.2':
NOTE: This section has relocations against it, but these have NOT been applied to this dump.
0x0+ 00000000 .*
/err-byte2.s
0,0 → 1,17
% { dg-do assemble { target mmix-*-* } }
 
m1 IS -1
zero IS 0
zero2 IS 0
1H IS 42
2H IS 5
Main SWYM 0,0,0
BYTE 0
BYTE -1 % { dg-error "BYTE expression not in the range 0..255" "" }
BYTE m1 % { dg-error "BYTE expression not in the range 0..255" "" }
BYTE zero2
BYTE 1B+2B+55
BYTE zero+m1 % { dg-error "BYTE expression not in the range 0..255" "" }
BYTE 255
BYTE 256 % { dg-error "BYTE expression not in the range 0..255" "" }
BYTE unk+1 % { dg-error "BYTE expression not a pure number" "" }
/get-op.d
0,0 → 1,9
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fe7b0004 get \$123,rJ
4: fe2d0013 get \$45,rG
8: fef5001f get \$245,rZZ
/put-op.l
0,0 → 1,27
GAS for MMIX .*/put-op\.s page 1
 
 
1 #.*
2 #.*
3 0000 F604007B Main PUT rJ,X
4 0004 F613002D PUT rG,\$45
5 0008 F61F00F5 PUT rZZ,\$245
6 000c F604006F PUT rJ,X0
7 0010 F713002D PUT rG,45
8 0014 F71F00F5 PUT rZZ,245
9 0018 F7040000 PUT rJ,X00
10 001c F7130000 PUT rG,0
11 0020 F71F0000 PUT rZZ,0
12 X IS \$123
13 X0 IS \$111
14 X00 IS 0
GAS for MMIX .*/put-op\.s page 2
 
 
DEFINED SYMBOLS
.*/put-op\.s:3 \.text:0000000000000000 Main
\*REG\*:000000000000007b X
\*REG\*:000000000000006f X0
\*ABS\*:0000000000000000 X00
 
NO UNDEFINED SYMBOLS
/basep-5.d
0,0 → 1,26
#source: err-bpo3.s
#as: -linker-allocated-gregs
#objdump: -dr
 
# The -linker-allocated-gregs option validates omissions of GREG.
 
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0+ <a>:
0: 0000002a trap 0,0,42
4: 8d2b0000 ldo \$43,\$0,0
6: R_MMIX_BASE_PLUS_OFFSET \.text\+0x34
\.\.\.
 
0+108 <d>:
108: 0000001c trap 0,0,28
10c: 8d8f0000 ldo \$143,\$0,0
10e: R_MMIX_BASE_PLUS_OFFSET \.text\+0x114
110: 8df30000 ldo \$243,\$0,0
112: R_MMIX_BASE_PLUS_OFFSET \.text\+0xc
114: 23670000 addu \$103,\$0,0
116: R_MMIX_BASE_PLUS_OFFSET \.text\+0x130
118: 230d0000 addu \$13,\$0,0
11a: R_MMIX_BASE_PLUS_OFFSET \.text\+0x18
/jmp-oprn.d
0,0 → 1,29
# objdump: -dr
# as: -linkrelax -no-expand
# source: jmp-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fd000000 swym 0,0,0
 
0000000000000004 <here>:
4: fd000000 swym 0,0,0
8: f0000000 jmp 8 <here\+0x4>
8: R_MMIX_ADDR27 \.text\+0x4
 
000000000000000c <at>:
c: f0000000 jmp c <at>
c: R_MMIX_ADDR27 \.text\+0xc
10: f0000000 jmp 10 <at\+0x4>
10: R_MMIX_ADDR27 \.text\+0x20
14: f0000000 jmp 14 <at\+0x8>
14: R_MMIX_ADDR27 \.text\+0x4
18: f0000000 jmp 18 <at\+0xc>
18: R_MMIX_ADDR27 \.text\+0x20
1c: f0000000 jmp 1c <at\+0x10>
1c: R_MMIX_ADDR27 \.text\+0x4
 
0000000000000020 <there>:
20: fd000000 swym 0,0,0
/get-op.l
0,0 → 1,17
GAS for MMIX .*/get-op\.s page 1
 
 
1 #.*
2 #.*
3 0000 FE7B0004 Main GET X,rJ
4 0004 FE2D0013 GET \$45,rG
5 0008 FEF5001F GET \$245,rZZ
6 X IS \$123
GAS for MMIX .*/get-op\.s page 2
 
 
DEFINED SYMBOLS
.*/get-op\.s:3 \.text:0000000000000000 Main
\*REG\*:000000000000007b X
 
NO UNDEFINED SYMBOLS
/put-op.s
0,0 → 1,14
# For 'p'-type operands: PUT.
#
Main PUT rJ,X
PUT rG,$45
PUT rZZ,$245
PUT rJ,X0
PUT rG,45
PUT rZZ,245
PUT rJ,X00
PUT rG,0
PUT rZZ,0
X IS $123
X0 IS $111
X00 IS 0
/bspec-1.s
0,0 → 1,4
SWYM 1,2,3
BSPEC 2
TETRA forw
ESPEC
/get-op.s
0,0 → 1,6
# For 'g'-type operands: GET.
#
Main GET X,rJ
GET $45,rG
GET $245,rZZ
X IS $123
/loc-2.d
0,0 → 1,39
#readelf: -Ssrx1
 
There are 7 section headers, starting at offset 0x78:
 
Section Headers:
\[Nr\] Name Type Address Offset
Size EntSize Flags Link Info Align
\[ 0\] NULL 0000000000000000 00000000
0000000000000000 0000000000000000 0 0 0
\[ 1\] \.text PROGBITS 0000000000000000 00000040
0000000000000008 0000000000000000 AX 0 0 4
\[ 2\] \.data PROGBITS 0000000000000000 00000048
0000000000000000 0000000000000000 WA 0 0 1
\[ 3\] \.bss NOBITS 0000000000000000 00000048
0000000000000000 0000000000000000 WA 0 0 1
\[ 4\] \.shstrtab STRTAB 0000000000000000 00000048
000000000000002c 0000000000000000 0 0 1
\[ 5\] \.symtab SYMTAB 0000000000000000 00000238
0000000000000090 0000000000000018 6 4 8
\[ 6\] \.strtab STRTAB 0000000000000000 000002c8
000000000000001a 0000000000000000 0 0 1
Key to Flags:
W \(write\), A \(alloc\), X \(execute\), M \(merge\), S \(strings\)
I \(info\), L \(link order\), G \(group\), x \(unknown\)
O \(extra OS processing required\) o \(OS specific\), p \(processor specific\)
 
There are no relocations in this file\.
 
Symbol table '\.symtab' contains 6 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 0+ 0 NOTYPE LOCAL DEFAULT UND
1: 0+ 0 SECTION LOCAL DEFAULT 1
2: 0+ 0 SECTION LOCAL DEFAULT 2
3: 0+ 0 SECTION LOCAL DEFAULT 3
4: 0+4 0 FUNC GLOBAL DEFAULT 1 Main
5: 0+100 0 NOTYPE GLOBAL DEFAULT ABS __\.MMIX\.start\.\.text
 
Hex dump of section '\.text':
0x00000000 fd010102 fd000070 .*
/regy-op-r.d
0,0 → 1,36
# objdump: -dr
# as: -linkrelax
# source: regy-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: 347b0c43 neg \$123,12,\$67
4: 36200c43 negu \$32,12,\$67
8: 347b2043 neg \$123,32,\$67
c: 36008543 negu \$0,133,\$67
10: 347b0c49 neg \$123,12,\$73
14: 36820ce9 negu \$130,12,\$233
18: 347b26d4 neg \$123,38,\$212
1c: 3601afb5 negu \$1,175,\$181
20: 357b0cb0 neg \$123,12,176
24: 37200cb0 negu \$32,12,176
28: 357b84b0 neg \$123,132,176
2c: 37e885b0 negu \$232,133,176
30: 357b0ccb neg \$123,12,203
34: 37e70cd5 negu \$231,12,213
38: 357b26d3 neg \$123,38,211
3c: 3704afa1 negu \$4,175,161
40: 357b0c00 neg \$123,12,0
44: 37170c00 negu \$23,12,0
48: 35020c00 neg \$2,12,0
4c: 37e88500 negu \$232,133,0
50: 347b0043 neg \$123,0,\$67
54: 36200043 negu \$32,0,\$67
58: 357b0020 neg \$123,0,32
5c: 37e80085 negu \$232,0,133
60: 357b00b0 neg \$123,0,176
64: 372000b0 negu \$32,0,176
68: 347b0020 neg \$123,0,\$32
6c: 36e80085 negu \$232,0,\$133
/loc-2.s
0,0 → 1,5
# Check that a LOC before any code gets translated into the right
# symbol being set.
LOC 256
SWYM 1,1,2
Main SWYM 112
/zerop-1.d
0,0 → 1,20
#objdump: -drt
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ g F \.text 0+ Main
 
 
Disassembly of section \.text:
 
0+ <Main>:
0: 00000000 trap 0,0,0
4: fd000000 swym 0,0,0
8: ff000000 trip 0,0,0
c: f0000000 jmp c <Main\+0xc>
10: f801e240 pop 1,57920
14: f8000000 pop 0,0
/jmp-op.d
0,0 → 1,21
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fd000000 swym 0,0,0
 
0000000000000004 <here>:
4: fd000000 swym 0,0,0
8: f1ffffff jmp 4 <here>
 
000000000000000c <at>:
c: f0000000 jmp c <at>
10: f0000004 jmp 20 <there>
14: f1fffffc jmp 4 <here>
18: f0000002 jmp 20 <there>
1c: f1fffffa jmp 4 <here>
 
0000000000000020 <there>:
20: fd000000 swym 0,0,0
/1hjmp1b.d
0,0 → 1,10
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fd000000 swym 0,0,0
4: f0000001 jmp 8 <Main\+0x8>
8: f1ffffff jmp 4 <Main\+0x4>
c: f1ffffff jmp 8 <Main\+0x8>
/pushj-c.d
0,0 → 1,28
#as: -x --no-pushj-stubs
#objdump: -tdr
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d .text 0+ (|\.text)
0+ l d .data 0+ (|\.data)
0+ l d .bss 0+ (|\.bss)
ffff0000ffff0000 l \*ABS\* 0+ i1
ffff0000ffff0000 l \*ABS\* 0+ i2
0+ g F .text 0+ Main
 
Disassembly of section .text:
 
0+ <Main>:
0: f2010000 pushj \$1,0 <Main>
0: R_MMIX_PUSHJ \*ABS\*\+0xffff0000ffff0000
4: fd000000 swym 0,0,0
8: fd000000 swym 0,0,0
c: fd000000 swym 0,0,0
10: fd000000 swym 0,0,0
14: f2020000 pushj \$2,14 <Main\+0x14>
14: R_MMIX_PUSHJ i2
18: fd000000 swym 0,0,0
1c: fd000000 swym 0,0,0
20: fd000000 swym 0,0,0
24: fd000000 swym 0,0,0
/jmp-op.l
0,0 → 1,23
GAS for MMIX .*/jmp-op\.s page 1
 
 
1 #.*
2 0000 FD000000 Main SWYM 0,0,0
3 0004 FD000000 here SWYM 0,0,0
4 0008 F1FFFFFF JMP here
5 000c F0000000 at JMP at
6 0010 F0000004 JMP there
7 0014 F1FFFFFC JMP here
8 0018 F0000002 JMP there
9 001c F1FFFFFA JMP here
10 0020 FD000000 there SWYM 0,0,0
GAS for MMIX .*/jmp-op\.s page 2
 
 
DEFINED SYMBOLS
.*/jmp-op\.s:2 \.text:0000000000000000 Main
.*/jmp-op\.s:3 \.text:0000000000000004 here
.*/jmp-op\.s:5 \.text:000000000000000c at
.*/jmp-op\.s:10 \.text:0000000000000020 there
 
NO UNDEFINED SYMBOLS
/greg6.d
0,0 → 1,36
#objdump: -str
 
# GAS must know that .data and expressions around #20 << 56 can be
# equivalent for GREGs; like greg5 but the other way round.
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ l \.text 0+ t
2000000000000004 l \*ABS\* 0+ x
2000000000000000 l \*ABS\* 0+ Data_Segment
0+ l \.data 0+ y
0+ l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
0+ g F \.text 0+ Main
2000000000000008 g \*ABS\* 0+ __\.MMIX\.start\.\.data
 
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+2 R_MMIX_REG \.MMIX\.reg_contents
 
 
RELOCATION RECORDS FOR \[\.MMIX\.reg_contents\]:
OFFSET TYPE VALUE
0+ R_MMIX_64 \.data
 
 
Contents of section \.text:
0000 232c0054 .*
Contents of section \.data:
0000 00000000 00000021 .*
Contents of section \.MMIX\.reg_contents:
0000 00000000 00000000 .*
/1hjmp1b.l
0,0 → 1,14
GAS for MMIX .*/1hjmp1b.s page 1
 
 
1 0000 FD000000 Main SWYM 0,0,0
2 0004 F0000001 1H JMP 1F
3 0008 F1FFFFFF 1H JMP 1B
4 000c F1FFFFFF JMP 1B
GAS for MMIX .*/1hjmp1b.s page 2
 
 
DEFINED SYMBOLS
.*/1hjmp1b.s:1 .text:0000000000000000 Main
 
NO UNDEFINED SYMBOLS
/swym-op.d
0,0 → 1,14
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fd840def swym 132,13,239
4: ff840def trip 132,13,239
8: 00845678 trap 132,86,120
c: 00170def trap 23,13,239
10: 0023cace trap 35,202,206
14: ff170c43 trip 23,12,67
18: ff175678 trip 23,86,120
1c: fd12d687 swym 18,214,135
/zerop-1.s
0,0 → 1,9
# Check that we allow zero operands for some insns.
# Naked comments aren't supported when no operands are supplied; this
# matches mmixal behavior.
Main TRAP
SWYM
TRIP
JMP
POP 123456
POP
/roundi-op.d
0,0 → 1,20
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: 088701f4 flot \$135,ROUND_OFF,\$244
4: 0a8702e9 flotu \$135,ROUND_UP,\$233
8: 0d85005b sflot \$133,91
c: 0e7b04f4 sflotu \$123,ROUND_NEAR,\$244
10: 0c8500f4 sflot \$133,\$244
14: 0987005b flot \$135,91
18: 0f7b045b sflotu \$123,ROUND_NEAR,91
1c: 0987015b flot \$135,ROUND_OFF,91
20: 0aad02e9 flotu \$173,ROUND_UP,\$233
24: 0bad02d5 flotu \$173,ROUND_UP,213
28: 0c8700f4 sflot \$135,\$244
2c: 0b870277 flotu \$135,ROUND_UP,119
30: 0d87005b sflot \$135,91
34: 088700f4 flot \$135,\$244
/regt-op.d
0,0 → 1,134
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: 22170c43 addu \$23,\$12,\$67
4: 88200c43 ldt \$32,\$12,\$67
8: 820c2043 ldbu \$12,\$32,\$67
c: 8ae88543 ldtu \$232,\$133,\$67
10: 8c170c49 ldo \$23,\$12,\$73
14: 8e1f0ce9 ldou \$31,\$12,\$233
18: 841726d4 ldw \$23,\$38,\$212
1c: 8604afb5 ldwu \$4,\$175,\$181
20: 81170cb0 ldb \$23,\$12,176
24: 91200cb0 ldsf \$32,\$12,176
28: 990c20b0 ldvts \$12,\$32,176
2c: 97e885b0 ldunc \$232,\$133,176
30: b3170ccb stht \$23,\$12,203
34: 931f0cd5 ldht \$31,\$12,213
38: 951726d3 cswap \$23,\$38,211
3c: 9f04afa1 go \$4,\$175,161
40: 23170c00 addu \$23,\$12,0
44: 81170c00 ldb \$23,\$12,0
48: 89170c00 ldt \$23,\$12,0
4c: 83170c00 ldbu \$23,\$12,0
50: 8b170c00 ldtu \$23,\$12,0
54: 8d170c00 ldo \$23,\$12,0
58: 8f170c00 ldou \$23,\$12,0
5c: 85170c00 ldw \$23,\$12,0
60: 87170c00 ldwu \$23,\$12,0
64: 91170c00 ldsf \$23,\$12,0
68: 93170c00 ldht \$23,\$12,0
6c: 95170c00 cswap \$23,\$12,0
70: 97170c00 ldunc \$23,\$12,0
74: 99170c00 ldvts \$23,\$12,0
78: 9f170c00 go \$23,\$12,0
7c: a1170c00 stb \$23,\$12,0
80: a9170c00 stt \$23,\$12,0
84: a3170c00 stbu \$23,\$12,0
88: ab170c00 sttu \$23,\$12,0
8c: ad170c00 sto \$23,\$12,0
90: af170c00 stou \$23,\$12,0
94: a5170c00 stw \$23,\$12,0
98: a7170c00 stwu \$23,\$12,0
9c: b1170c00 stsf \$23,\$12,0
a0: b3170c00 stht \$23,\$12,0
a4: b7170c00 stunc \$23,\$12,0
a8: 23290c00 addu \$41,\$12,0
ac: 81790c00 ldb \$121,\$12,0
b0: 894e0c00 ldt \$78,\$12,0
b4: 837f0c00 ldbu \$127,\$12,0
b8: 8b310c00 ldtu \$49,\$12,0
bc: 8d340c00 ldo \$52,\$12,0
c0: 8f2a0c00 ldou \$42,\$12,0
c4: 857b0c00 ldw \$123,\$12,0
c8: 87ea0c00 ldwu \$234,\$12,0
cc: 91290c00 ldsf \$41,\$12,0
d0: 93590c00 ldht \$89,\$12,0
d4: 955d0c00 cswap \$93,\$12,0
d8: 972a0c00 ldunc \$42,\$12,0
dc: 99210c00 ldvts \$33,\$12,0
e0: 9f3b0c00 go \$59,\$12,0
e4: a13b0c00 stb \$59,\$12,0
e8: a93b0c00 stt \$59,\$12,0
ec: a33b0c00 stbu \$59,\$12,0
f0: ab3b0c00 sttu \$59,\$12,0
f4: ad3b0c00 sto \$59,\$12,0
f8: af3b0c00 stou \$59,\$12,0
fc: a53b0c00 stw \$59,\$12,0
100: a73b0c00 stwu \$59,\$12,0
104: b13b0c00 stsf \$59,\$12,0
108: b33b0c00 stht \$59,\$12,0
10c: b73b0c00 stunc \$59,\$12,0
110: 23171b00 addu \$23,\$27,0
114: 81173000 ldb \$23,\$48,0
118: 8917a800 ldt \$23,\$168,0
11c: 8317ea00 ldbu \$23,\$234,0
120: 8b17b000 ldtu \$23,\$176,0
124: 8d171d00 ldo \$23,\$29,0
128: 8f17de00 ldou \$23,\$222,0
12c: 8517de00 ldw \$23,\$222,0
130: 8717de00 ldwu \$23,\$222,0
134: 9117de00 ldsf \$23,\$222,0
138: 9317de00 ldht \$23,\$222,0
13c: 9517de00 cswap \$23,\$222,0
140: 9717de00 ldunc \$23,\$222,0
144: 9917de00 ldvts \$23,\$222,0
148: 9f17de00 go \$23,\$222,0
14c: a117de00 stb \$23,\$222,0
150: a917de00 stt \$23,\$222,0
154: a317de00 stbu \$23,\$222,0
158: ab17de00 sttu \$23,\$222,0
15c: ad17de00 sto \$23,\$222,0
160: af17de00 stou \$23,\$222,0
164: a517de00 stw \$23,\$222,0
168: a717de00 stwu \$23,\$222,0
16c: b117de00 stsf \$23,\$222,0
170: b317de00 stht \$23,\$222,0
174: b717de00 stunc \$23,\$222,0
178: 23dfdb00 addu \$223,\$219,0
17c: 81dfef00 ldb \$223,\$239,0
180: 89dfef00 ldt \$223,\$239,0
184: 83df1d00 ldbu \$223,\$29,0
188: 8bdfef00 ldtu \$223,\$239,0
18c: 8d17ef00 ldo \$23,\$239,0
190: 8fdfef00 ldou \$223,\$239,0
194: 85dfd100 ldw \$223,\$209,0
198: 877bef00 ldwu \$123,\$239,0
19c: 91dfef00 ldsf \$223,\$239,0
1a0: 93df1d00 ldht \$223,\$29,0
1a4: 95dfef00 cswap \$223,\$239,0
1a8: 977bef00 ldunc \$123,\$239,0
1ac: 99dfef00 ldvts \$223,\$239,0
1b0: 9fdfef00 go \$223,\$239,0
1b4: a1dfef00 stb \$223,\$239,0
1b8: a9dff900 stt \$223,\$249,0
1bc: a3cbef00 stbu \$203,\$239,0
1c0: ab49ef00 sttu \$73,\$239,0
1c4: addfef00 sto \$223,\$239,0
1c8: afdf2700 stou \$223,\$39,0
1cc: a5dfef00 stw \$223,\$239,0
1d0: a7e9ef00 stwu \$233,\$239,0
1d4: b1dfef00 stsf \$223,\$239,0
1d8: b3df1700 stht \$223,\$23,0
1dc: b7dfef00 stunc \$223,\$239,0
1e0: 9f170c00 go \$23,\$12,0
1e4: 99200c00 ldvts \$32,\$12,0
1e8: a10c2000 stb \$12,\$32,0
1ec: b7e88500 stunc \$232,\$133,0
1f0: a7170c00 stwu \$23,\$12,0
1f4: ad1f0c00 sto \$31,\$12,0
1f8: 9f172600 go \$23,\$38,0
1fc: 9504af00 cswap \$4,\$175,0
/err-case.s
0,0 → 1,8
% Check that lowercase pseudos with mmixal syntax (no dot prefix) aren't
% recognized. Since local is handled as an insn, it's actually
% misrecognized in lower case.
% { dg-do assemble { target mmix-*-* } }
Main SWYM 0,0,0
X is 42 % { dg-error "unknown opcode: \`is\'" "" }
local 56 % { dg-error "unknown opcode: \`fatal\'" "" { xfail *-*-* } }
a greg 94 % { dg-error "unknown opcode: \`greg\'" "" }
/jmp-op.s
0,0 → 1,10
# A small jumble of JMP:s.
Main SWYM 0,0,0
here SWYM 0,0,0
JMP here
at JMP at
JMP there
JMP here
JMP there
JMP here
there SWYM 0,0,0
/1hjmp1b.s
0,0 → 1,4
Main SWYM 0,0,0
1H JMP 1F
1H JMP 1B
JMP 1B
/reloclab.d
0,0 → 1,43
#objdump: -dr
#as: -x --no-stubs
 
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: f0000000 jmp 0 <Main>
0: R_MMIX_JMP foo\+0x8
4: fd000000 swym 0,0,0
8: fd000000 swym 0,0,0
c: fd000000 swym 0,0,0
10: fd000000 swym 0,0,0
14: f0000004 jmp 24 <here>
18: f4080003 geta \$8,24 <here>
1c: 46630002 bod \$99,24 <here>
20: fd000000 swym 0,0,0
 
0000000000000024 <here>:
24: 42de0000 bz \$222,24 <here>
24: R_MMIX_CBRANCH bar\+0x10
28: fd000000 swym 0,0,0
2c: fd000000 swym 0,0,0
30: fd000000 swym 0,0,0
34: fd000000 swym 0,0,0
38: fd000000 swym 0,0,0
 
000000000000003c <there>:
3c: f4040000 geta \$4,3c <there>
3c: R_MMIX_GETA baz
40: fd000000 swym 0,0,0
44: fd000000 swym 0,0,0
48: fd000000 swym 0,0,0
4c: f2070000 pushj \$7,4c <there\+0x10>
4c: R_MMIX_PUSHJ foobar
50: fd000000 swym 0,0,0
54: fd000000 swym 0,0,0
58: fd000000 swym 0,0,0
5c: fd000000 swym 0,0,0
60: f1fffff7 jmp 3c <there>
64: f558fff6 geta \$88,3c <there>
68: 476ffff5 bod \$111,3c <there>
/swym-op.l
0,0 → 1,30
GAS for MMIX .*/swym-op\.s page 1
 
 
1 #.*
2 #.*
3 0000 FD840DEF Main SWYM 132,3567
4 0004 FF840DEF TRIP 132,3567
5 0008 00845678 TRAP 132,YZ
6 000c 00170DEF TRAP X,3567
7 0010 0023CACE TRAP 2345678
8 0014 FF170C43 TRIP X,Y,Z
9 0018 FF175678 TRIP X,YZ
10 001c FD12D687 SWYM XYZ
11 X IS 23
12 Y IS 12
13 Z IS 67
14 YZ IS #5678
15 XYZ IS 1234567
GAS for MMIX .*/swym-op\.s page 2
 
 
DEFINED SYMBOLS
.*/swym-op\.s:3 \.text:0000000000000000 Main
\*ABS\*:0000000000005678 YZ
\*ABS\*:0000000000000017 X
\*ABS\*:000000000000000c Y
\*ABS\*:0000000000000043 Z
\*ABS\*:000000000012d687 XYZ
 
NO UNDEFINED SYMBOLS
/err-loc-5.s
0,0 → 1,4
% { dg-do assemble { target mmix-*-* } }
LOC (#20<<56)|1
.p2align 0
SWYM 1 % { dg-error "unaligned data at an absolute location" "" }
/roundi-op.l
0,0 → 1,31
GAS for MMIX .*/roundi-op\.s page 1
 
 
1 #.*
2 0000 088701F4 Main FLOT X,ROUND_OFF,Z
3 0004 0A8702E9 FLOTU X,2,\$233
4 0008 0D85005B SFLOT \$133,0,Z0
5 000c 0E7B04F4 SFLOTU \$123,ROUND_NEAR,Z
6 0010 0C8500F4 SFLOT \$133,0,Z
7 0014 0987005B FLOT X,ROUND_CURRENT,Z0
8 0018 0F7B045B SFLOTU \$123,ROUND_NEAR,Z0
9 001c 0987015B FLOT X,ROUND_OFF,Z0
10 0020 0AAD02E9 FLOTU \$173,2,\$233
11 0024 0BAD02D5 FLOTU \$173,2,213
12 0028 0C8700F4 SFLOT X,0,Z
13 002c 0B870277 FLOTU X,2,119
14 0030 0D87005B SFLOT X,0,Z0
15 0034 088700F4 FLOT X,ROUND_CURRENT,Z
16 X IS \$135
17 Z IS \$244
18 Z0 IS 91
GAS for MMIX .*/roundi-op\.s page 2
 
 
DEFINED SYMBOLS
.*/roundi-op\.s:2 \.text:0000000000000000 Main
\*REG\*:0000000000000087 X
\*REG\*:00000000000000f4 Z
\*ABS\*:000000000000005b Z0
 
NO UNDEFINED SYMBOLS
/regt-op.l
0,0 → 1,160
GAS for MMIX .*/regt-op\.s page 1
 
 
1 #.*
2 #.*
3 0000 22170C43 Main LDA X,Y,Z
4 0004 88200C43 LDT \$32,Y,Z
5 0008 820C2043 LDBU Y,\$32,Z
6 000c 8AE88543 LDTU \$232,\$133,Z
7 0010 8C170C49 LDO X,Y,\$73
8 0014 8E1F0CE9 LDOU \$31,Y,\$233
9 0018 841726D4 LDW X,\$38,\$212
10 001c 8604AFB5 LDWU \$4,\$175,\$181
11
12 0020 81170CB0 LDB X,Y,Z0
13 0024 91200CB0 LDSF \$32,Y,Z0
14 0028 990C20B0 LDVTS Y,\$32,Z0
15 002c 97E885B0 LDUNC \$232,\$133,Z0
16 0030 B3170CCB STHT X,Y,203
17 0034 931F0CD5 LDHT \$31,Y,213
18 0038 951726D3 CSWAP X,\$38,211
19 003c 9F04AFA1 GO \$4,\$175,161
20
21 0040 23170C00 LDA X,Y
22 0044 81170C00 LDB X,Y
23 0048 89170C00 LDT X,Y
24 004c 83170C00 LDBU X,Y
25 0050 8B170C00 LDTU X,Y
26 0054 8D170C00 LDO X,Y
27 0058 8F170C00 LDOU X,Y
28 005c 85170C00 LDW X,Y
29 0060 87170C00 LDWU X,Y
30 0064 91170C00 LDSF X,Y
31 0068 93170C00 LDHT X,Y
32 006c 95170C00 CSWAP X,Y
33 0070 97170C00 LDUNC X,Y
34 0074 99170C00 LDVTS X,Y
35 0078 9F170C00 GO X,Y
36 007c A1170C00 STB X,Y
37 0080 A9170C00 STT X,Y
38 0084 A3170C00 STBU X,Y
39 0088 AB170C00 STTU X,Y
40 008c AD170C00 STO X,Y
41 0090 AF170C00 STOU X,Y
42 0094 A5170C00 STW X,Y
43 0098 A7170C00 STWU X,Y
44 009c B1170C00 STSF X,Y
45 00a0 B3170C00 STHT X,Y
46 00a4 B7170C00 STUNC X,Y
47
48 00a8 23290C00 LDA \$41,Y
49 00ac 81790C00 LDB \$121,Y
50 00b0 894E0C00 LDT \$78,Y
51 00b4 837F0C00 LDBU \$127,Y
52 00b8 8B310C00 LDTU \$49,Y
53 00bc 8D340C00 LDO \$52,Y
54 00c0 8F2A0C00 LDOU \$42,Y
55 00c4 857B0C00 LDW \$123,Y
56 00c8 87EA0C00 LDWU \$234,Y
57 00cc 91290C00 LDSF \$41,Y
GAS for MMIX .*/regt-op\.s page 2
 
 
58 00d0 93590C00 LDHT \$89,Y
59 00d4 955D0C00 CSWAP \$93,Y
60 00d8 972A0C00 LDUNC \$42,Y
61 00dc 99210C00 LDVTS \$33,Y
62 00e0 9F3B0C00 GO \$59,Y
63 00e4 A13B0C00 STB \$59,Y
64 00e8 A93B0C00 STT \$59,Y
65 00ec A33B0C00 STBU \$59,Y
66 00f0 AB3B0C00 STTU \$59,Y
67 00f4 AD3B0C00 STO \$59,Y
68 00f8 AF3B0C00 STOU \$59,Y
69 00fc A53B0C00 STW \$59,Y
70 0100 A73B0C00 STWU \$59,Y
71 0104 B13B0C00 STSF \$59,Y
72 0108 B33B0C00 STHT \$59,Y
73 010c B73B0C00 STUNC \$59,Y
74
75 0110 23171B00 LDA X,\$27
76 0114 81173000 LDB X,\$48
77 0118 8917A800 LDT X,\$168
78 011c 8317EA00 LDBU X,\$234
79 0120 8B17B000 LDTU X,\$176
80 0124 8D171D00 LDO X,\$29
81 0128 8F17DE00 LDOU X,\$222
82 012c 8517DE00 LDW X,\$222
83 0130 8717DE00 LDWU X,\$222
84 0134 9117DE00 LDSF X,\$222
85 0138 9317DE00 LDHT X,\$222
86 013c 9517DE00 CSWAP X,\$222
87 0140 9717DE00 LDUNC X,\$222
88 0144 9917DE00 LDVTS X,\$222
89 0148 9F17DE00 GO X,\$222
90 014c A117DE00 STB X,\$222
91 0150 A917DE00 STT X,\$222
92 0154 A317DE00 STBU X,\$222
93 0158 AB17DE00 STTU X,\$222
94 015c AD17DE00 STO X,\$222
95 0160 AF17DE00 STOU X,\$222
96 0164 A517DE00 STW X,\$222
97 0168 A717DE00 STWU X,\$222
98 016c B117DE00 STSF X,\$222
99 0170 B317DE00 STHT X,\$222
100 0174 B717DE00 STUNC X,\$222
101
102 0178 23DFDB00 LDA \$223,\$219
103 017c 81DFEF00 LDB \$223,\$239
104 0180 89DFEF00 LDT \$223,\$239
105 0184 83DF1D00 LDBU \$223,\$29
106 0188 8BDFEF00 LDTU \$223,\$239
107 018c 8D17EF00 LDO \$23,\$239
108 0190 8FDFEF00 LDOU \$223,\$239
109 0194 85DFD100 LDW \$223,\$209
110 0198 877BEF00 LDWU \$123,\$239
111 019c 91DFEF00 LDSF \$223,\$239
112 01a0 93DF1D00 LDHT \$223,\$29
113 01a4 95DFEF00 CSWAP \$223,\$239
114 01a8 977BEF00 LDUNC \$123,\$239
GAS for MMIX .*/regt-op\.s page 3
 
 
115 01ac 99DFEF00 LDVTS \$223,\$239
116 01b0 9FDFEF00 GO \$223,\$239
117 01b4 A1DFEF00 STB \$223,\$239
118 01b8 A9DFF900 STT \$223,\$249
119 01bc A3CBEF00 STBU \$203,\$239
120 01c0 AB49EF00 STTU \$73,\$239
121 01c4 ADDFEF00 STO \$223,\$239
122 01c8 AFDF2700 STOU \$223,\$39
123 01cc A5DFEF00 STW \$223,\$239
124 01d0 A7E9EF00 STWU \$233,\$239
125 01d4 B1DFEF00 STSF \$223,\$239
126 01d8 B3DF1700 STHT \$223,\$23
127 01dc B7DFEF00 STUNC \$223,\$239
128
129 01e0 9F170C00 GO X,Y,0
130 01e4 99200C00 LDVTS \$32,Y,0
131 01e8 A10C2000 STB Y,\$32,0
132 01ec B7E88500 STUNC \$232,\$133,0
133 01f0 A7170C00 STWU X,Y,0
134 01f4 AD1F0C00 STO \$31,Y,0
135 01f8 9F172600 GO X,\$38,0
136 01fc 9504AF00 CSWAP \$4,\$175,0
137 X IS \$23
138 Y IS \$12
139 Z IS \$67
140 Z0 IS 176
GAS for MMIX .*/regt-op\.s page 4
 
 
DEFINED SYMBOLS
.*/regt-op\.s:3 \.text:0000000000000000 Main
\*REG\*:0000000000000017 X
\*REG\*:000000000000000c Y
\*REG\*:0000000000000043 Z
\*ABS\*:00000000000000b0 Z0
 
NO UNDEFINED SYMBOLS
/fb-1.d
0,0 → 1,20
#objdump: -str
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
 
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+2 R_MMIX_REG \.MMIX\.reg_contents
 
 
Contents of section \.text:
0+ dd2d0038 .*
Contents of section \.MMIX\.reg_contents:
0+ 00000000 aabbccdd 00000000 00112233 .*
/1cjmp1b-n.d
0,0 → 1,12
# objdump: -dr
# source: 1cjmp1b.s
# as: -no-expand
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fd000000 swym 0,0,0
4: f0000001 jmp 8 <Main\+0x8>
8: f0000000 jmp 8 <Main\+0x8>
c: f1ffffff jmp 8 <Main\+0x8>
/pushj-c.s
0,0 → 1,5
% PUSHJ far away must not fail
i1 IS #ffff0000ffff0000
Main PUSHJ $1,i1
PUSHJ $2,i2
i2 IS #ffff0000ffff0000
/greg6.s
0,0 → 1,9
t IS @
x IS Data_Segment+4
 
LOC x+4
y OCTA 33
GREG y
 
LOC t
Main LDA $44,x+88
/swym-op.s
0,0 → 1,15
# Check different type of operands to SWYM etc.
# No need to check the canonical three constants.
Main SWYM 132,3567
TRIP 132,3567
TRAP 132,YZ
TRAP X,3567
TRAP 2345678
TRIP X,Y,Z
TRIP X,YZ
SWYM XYZ
X IS 23
Y IS 12
Z IS 67
YZ IS #5678
XYZ IS 1234567
/geta-op-r.d
0,0 → 1,37
# objdump: -dr
# as: -linkrelax
# source: geta-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fd000000 swym 0,0,0
 
0000000000000004 <here>:
4: fd000000 swym 0,0,0
8: f519ffff geta \$25,4 <here>
8: R_MMIX_ADDR19 \.text\+0x4
 
000000000000000c <at>:
c: f4200000 geta \$32,c <at>
c: R_MMIX_ADDR19 \.text\+0xc
10: 424e0008 bz \$78,30 <there>
10: R_MMIX_ADDR19 \.text\+0x30
14: f35bfffc pushj \$91,4 <here>
14: R_MMIX_ADDR19 \.text\+0x4
18: f387fffb pushj \$135,4 <here>
18: R_MMIX_ADDR19 \.text\+0x4
1c: f4870005 geta \$135,30 <there>
1c: R_MMIX_ADDR19 \.text\+0x30
20: f2870004 pushj \$135,30 <there>
20: R_MMIX_ADDR19 \.text\+0x30
24: f2490003 pushj \$73,30 <there>
24: R_MMIX_ADDR19 \.text\+0x30
28: f2380002 pushj \$56,30 <there>
28: R_MMIX_ADDR19 \.text\+0x30
2c: 5f87fff6 pbev \$135,4 <here>
2c: R_MMIX_ADDR19 \.text\+0x4
 
0000000000000030 <there>:
30: fd000000 swym 0,0,0
/reloclab.l
0,0 → 1,42
GAS for MMIX .*/reloclab\.s page 1
 
 
1 #.*
2 #.*
3 #.*
4 0000 F0000000 Main JMP foo\+8
4 FD000000
4 FD000000
4 FD000000
4 FD000000
5 0014 F0000004 JMP here
6 0018 F4080003 GETA \$8,here
7 001c 46630002 BOD \$99,here
8 0020 FD000000 SWYM 0
9 0024 42DE0000 here BZ \$222,bar\+16
9 FD000000
9 FD000000
9 FD000000
9 FD000000
9 FD000000
10 003c F4040000 there GETA \$4,baz
10 FD000000
10 FD000000
10 FD000000
11 004c F2070000 PUSHJ \$7,foobar
12 0050 F1FFFFFB JMP there
13 0054 F558FFFA GETA \$88,there
14 0058 476FFFF9 BOD \$111,there
GAS for MMIX .*/reloclab\.s page 2
 
 
DEFINED SYMBOLS
.*/reloclab\.s:4 \.text:0000000000000000 Main
.*/reloclab\.s:9 \.text:0000000000000024 here
.*/reloclab\.s:10 \.text:000000000000003c there
 
UNDEFINED SYMBOLS
foo
bar
baz
foobar
/bspec-2.d
0,0 → 1,27
#readelf: -Sr -x1 -x4
There are 11 section headers, starting at offset 0x..:
#...
\[ 4\] \.MMIX\.spec_data\.2 PROGBITS 0+ 0+48
0+10 0+ 0 0 8
\[ 5\] \.rela\.MMIX\.spec_d RELA 0+ 0+4..
0+30 0+18 9 4 8
\[ 6\] \.MMIX\.spec_data\.3 PROGBITS 0+ 0+58
0+8 0+ 0 0 8
\[ 7\] \.rela\.MMIX\.spec_d RELA 0+ 0+4..
0+18 0+18 9 6 8
#...
Relocation section '\.rela\.MMIX\.spec_data\.2' at offset 0x4.. contains 2 entries:
.*
0+ 0+600000004 R_MMIX_32 +0+ +forw +\+ 0
0+8 0+700000005 R_MMIX_64 +0+ +other +\+ 0
 
Relocation section '\.rela\.MMIX\.spec_data\.3' at offset 0x4.. contains 1 entries:
.*
0+ 0+700000005 R_MMIX_64 +0+ +other +\+ 0
 
Hex dump of section '\.text':
0x0+ fd010203 .*
 
Hex dump of section '\.MMIX\.spec_data\.2':
NOTE: This section has relocations against it, but these have NOT been applied to this dump.
0x0+ 00000000 0000002a 00000000 00000000 .*
/roundi-op.s
0,0 → 1,18
# Round-type "R".
Main FLOT X,ROUND_OFF,Z
FLOTU X,2,$233
SFLOT $133,0,Z0
SFLOTU $123,ROUND_NEAR,Z
SFLOT $133,0,Z
FLOT X,ROUND_CURRENT,Z0
SFLOTU $123,ROUND_NEAR,Z0
FLOT X,ROUND_OFF,Z0
FLOTU $173,2,$233
FLOTU $173,2,213
SFLOT X,0,Z
FLOTU X,2,119
SFLOT X,0,Z0
FLOT X,ROUND_CURRENT,Z
X IS $135
Z IS $244
Z0 IS 91
/regt-op.s
0,0 → 1,140
# All-registers, 'T'-type operands; optional third operand is
# register or constant.
Main LDA X,Y,Z
LDT $32,Y,Z
LDBU Y,$32,Z
LDTU $232,$133,Z
LDO X,Y,$73
LDOU $31,Y,$233
LDW X,$38,$212
LDWU $4,$175,$181
 
LDB X,Y,Z0
LDSF $32,Y,Z0
LDVTS Y,$32,Z0
LDUNC $232,$133,Z0
STHT X,Y,203
LDHT $31,Y,213
CSWAP X,$38,211
GO $4,$175,161
 
LDA X,Y
LDB X,Y
LDT X,Y
LDBU X,Y
LDTU X,Y
LDO X,Y
LDOU X,Y
LDW X,Y
LDWU X,Y
LDSF X,Y
LDHT X,Y
CSWAP X,Y
LDUNC X,Y
LDVTS X,Y
GO X,Y
STB X,Y
STT X,Y
STBU X,Y
STTU X,Y
STO X,Y
STOU X,Y
STW X,Y
STWU X,Y
STSF X,Y
STHT X,Y
STUNC X,Y
 
LDA $41,Y
LDB $121,Y
LDT $78,Y
LDBU $127,Y
LDTU $49,Y
LDO $52,Y
LDOU $42,Y
LDW $123,Y
LDWU $234,Y
LDSF $41,Y
LDHT $89,Y
CSWAP $93,Y
LDUNC $42,Y
LDVTS $33,Y
GO $59,Y
STB $59,Y
STT $59,Y
STBU $59,Y
STTU $59,Y
STO $59,Y
STOU $59,Y
STW $59,Y
STWU $59,Y
STSF $59,Y
STHT $59,Y
STUNC $59,Y
 
LDA X,$27
LDB X,$48
LDT X,$168
LDBU X,$234
LDTU X,$176
LDO X,$29
LDOU X,$222
LDW X,$222
LDWU X,$222
LDSF X,$222
LDHT X,$222
CSWAP X,$222
LDUNC X,$222
LDVTS X,$222
GO X,$222
STB X,$222
STT X,$222
STBU X,$222
STTU X,$222
STO X,$222
STOU X,$222
STW X,$222
STWU X,$222
STSF X,$222
STHT X,$222
STUNC X,$222
 
LDA $223,$219
LDB $223,$239
LDT $223,$239
LDBU $223,$29
LDTU $223,$239
LDO $23,$239
LDOU $223,$239
LDW $223,$209
LDWU $123,$239
LDSF $223,$239
LDHT $223,$29
CSWAP $223,$239
LDUNC $123,$239
LDVTS $223,$239
GO $223,$239
STB $223,$239
STT $223,$249
STBU $203,$239
STTU $73,$239
STO $223,$239
STOU $223,$39
STW $223,$239
STWU $233,$239
STSF $223,$239
STHT $223,$23
STUNC $223,$239
 
GO X,Y,0
LDVTS $32,Y,0
STB Y,$32,0
STUNC $232,$133,0
STWU X,Y,0
STO $31,Y,0
GO X,$38,0
CSWAP $4,$175,0
X IS $23
Y IS $12
Z IS $67
Z0 IS 176
/relax1.d
0,0 → 1,118
#objdump: -dr
#as: -x
 
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: f0020019 jmp 80064 <l6>
 
0000000000000004 <l0>:
4: f0020018 jmp 80064 <l6>
 
0000000000000008 <l1>:
8: f0020017 jmp 80064 <l6>
 
000000000000000c <l01>:
c: f0020016 jmp 80064 <l6>
10: f407ffff geta \$7,4000c <nearfar1>
14: f2bfffff pushj \$191,40010 <nearfar2>
 
0000000000000018 <l2>:
18: f000fffe jmp 40010 <nearfar2>
\.\.\.
40004: 4d480000 bnp \$72,4 <l0>
40008: f5040000 geta \$4,8 <l1>
 
000000000004000c <nearfar1>:
4000c: f3050000 pushj \$5,c <l01>
 
0000000000040010 <nearfar2>:
40010: f4090000 geta \$9,40010 <nearfar2>
40010: R_MMIX_GETA \.text\+0x8
40014: fd000000 swym 0,0,0
40018: fd000000 swym 0,0,0
4001c: fd000000 swym 0,0,0
40020: f20b0000 pushj \$11,40020 <nearfar2\+0x10>
40020: R_MMIX_PUSHJ \.text\+0x80030
40024: fd000000 swym 0,0,0
40028: fd000000 swym 0,0,0
4002c: fd000000 swym 0,0,0
40030: fd000000 swym 0,0,0
 
0000000000040034 <l4>:
40034: 4437ffff bp \$55,80030 <l3>
\.\.\.
8002c: f1fdfff7 jmp 8 <l1>
 
0000000000080030 <l3>:
80030: f1fdfff5 jmp 4 <l0>
80034: 47580000 bod \$88,40034 <l4>
80038: 46580000 bod \$88,80038 <l3\+0x8>
80038: R_MMIX_CBRANCH \.text\+0x40034
8003c: fd000000 swym 0,0,0
80040: fd000000 swym 0,0,0
80044: fd000000 swym 0,0,0
80048: fd000000 swym 0,0,0
8004c: fd000000 swym 0,0,0
80050: f0000000 jmp 80050 <l3\+0x20>
80050: R_MMIX_JMP \.text\+0x4080060
80054: fd000000 swym 0,0,0
80058: fd000000 swym 0,0,0
8005c: fd000000 swym 0,0,0
80060: fd000000 swym 0,0,0
 
0000000000080064 <l6>:
80064: f0ffffff jmp 4080060 <l5>
80068: 436ffff2 bz \$111,80030 <l3>
\.\.\.
 
0000000004080060 <l5>:
4080060: f000000d jmp 4080094 <l8>
4080064: f1000000 jmp 80064 <l6>
4080068: f0000000 jmp 4080068 <l5\+0x8>
4080068: R_MMIX_JMP \.text\+0x80064
408006c: fd000000 swym 0,0,0
4080070: fd000000 swym 0,0,0
4080074: fd000000 swym 0,0,0
4080078: fd000000 swym 0,0,0
408007c: 482c0000 bnn \$44,408007c <l5\+0x1c>
408007c: R_MMIX_CBRANCH \.text\+0x40c0090
4080080: fd000000 swym 0,0,0
4080084: fd000000 swym 0,0,0
4080088: fd000000 swym 0,0,0
408008c: fd000000 swym 0,0,0
4080090: fd000000 swym 0,0,0
 
0000000004080094 <l8>:
4080094: 482cffff bnn \$44,40c0090 <l9>
4080098: f1fffff2 jmp 4080060 <l5>
408009c: f1fffff1 jmp 4080060 <l5>
\.\.\.
 
00000000040c008c <l10>:
40c008c: f1fefff5 jmp 4080060 <l5>
 
00000000040c0090 <l9>:
40c0090: f0000007 jmp 40c00ac <l11>
 
00000000040c0094 <l7>:
40c0094: f3210000 pushj \$33,4080094 <l8>
40c0098: f2210000 pushj \$33,40c0098 <l7\+0x4>
40c0098: R_MMIX_PUSHJ \.text\+0x4080094
40c009c: fd000000 swym 0,0,0
40c00a0: fd000000 swym 0,0,0
40c00a4: fd000000 swym 0,0,0
40c00a8: fd000000 swym 0,0,0
 
00000000040c00ac <l11>:
40c00ac: f1feffed jmp 4080060 <l5>
40c00b0: f1fefff9 jmp 4080094 <l8>
\.\.\.
41000ac: f53d0000 geta \$61,40c00ac <l11>
41000b0: f4480000 geta \$72,41000b0 <l11\+0x40004>
41000b0: R_MMIX_GETA \.text\+0x40c00ac
41000b4: fd000000 swym 0,0,0
41000b8: fd000000 swym 0,0,0
41000bc: fd000000 swym 0,0,0
/basep-6.d
0,0 → 1,17
#source: err-bpo4.s
#as: -linker-allocated-gregs
#objdump: -dr
 
# The -linker-allocated-gregs option validates omissions of GREG.
 
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0+ <Main>:
0: bf2a0000 pushgo \$42,\$0,0
2: R_MMIX_BASE_PLUS_OFFSET fn
4: fd000000 swym 0,0,0
 
0+8 <extfn>:
8: f8000000 pop 0,0
/reloclab.s
0,0 → 1,14
# Different relocations for extern labels: GETA, PUSHJ, Bcc, JMP.
# Mix in different accesses to local labels to see that relaxing works for
# this case.
Main JMP foo+8
JMP here
GETA $8,here
BOD $99,here
SWYM 0
here BZ $222,bar+16
there GETA $4,baz
PUSHJ $7,foobar
JMP there
GETA $88,there
BOD $111,there
/relax1.l
0,0 → 1,128
GAS for MMIX .*/relax1\.s page 1
 
 
1 #.*
2 #.*
3 #.*
4 0000 F0020019 Main JMP l6
5 0004 F0020018 l0 JMP l6
6 0008 F0020017 l1 JMP l6
7 000c F0020016 l01 JMP l6
8 0010 F407FFFF GETA \$7,nearfar1 % Within reach\.
9 0014 F2BFFFFF PUSHJ \$191,nearfar2 % Within reach\.
10 0018 F000FFFE l2 JMP nearfar2 % Dummy\.
11 001c 00000000 \.space 65530\*4,0
11 00000000
11 00000000
11 00000000
11 00000000
11 00000000
12 40004 4D480000 BNP \$72,l0 % Within reach
13 40008 F5040000 GETA \$4,l1 % Within reach\.
14 4000c F3050000 nearfar1 PUSHJ 5,l01 % Within reach\.
15 40010 F4090000 nearfar2 GETA \$9,l1 % Out of reach\.
15 FD000000
15 FD000000
15 FD000000
16 40020 F20B0000 PUSHJ \$11,l3 % Out of reach\.
16 FD000000
16 FD000000
16 FD000000
16 FD000000
17 40034 4437FFFF l4 BP \$55,l3 % Within reach\.
18 40038 00000000 \.space 65533\*4,0
18 00000000
18 00000000
18 00000000
18 00000000
18 00000000
19 8002c F1FDFFF7 JMP l1 % Dummy\.
20 80030 F1FDFFF5 l3 JMP l0 % Dummy\.
21 80034 47580000 BOD \$88,l4 % Within reach\.
22 80038 46580000 BOD \$88,l4 % Out of reach\.
22 FD000000
22 FD000000
22 FD000000
22 FD000000
22 FD000000
23 80050 F0000000 JMP l5 % Out of reach\.
23 FD000000
23 FD000000
23 FD000000
23 FD000000
24 80064 F0FFFFFF l6 JMP l5 % Within reach\.
25 80068 436FFFF2 BZ \$111,l3 % Dummy\.
26 8006c 00000000 \.space \(256\*256\*256-3\)\*4,0
26 00000000
26 00000000
26 00000000
26 00000000
26 00000000
GAS for MMIX .*/relax1\.s page 2
 
 
27 4080060 F000000D l5 JMP l8 % Dummy\.
28 4080064 F1000000 JMP l6 % Within reach
29 4080068 F0000000 JMP l6 % Out of reach\.
29 FD000000
29 FD000000
29 FD000000
29 FD000000
30 408007c 482C0000 BNN \$44,l9 % Out of reach\.
30 FD000000
30 FD000000
30 FD000000
30 FD000000
30 FD000000
31 4080094 482CFFFF l8 BNN \$44,l9 % Within reach\.
32 4080098 F1FFFFF2 JMP l5 % Dummy\.
33 408009c F1FFFFF1 JMP l5 % Dummy\.
34 40800a0 00000000 \.space 65531\*4,0
34 00000000
34 00000000
34 00000000
34 00000000
34 00000000
35 40c008c F1FEFFF5 l10 JMP l5 % Dummy\.
36 40c0090 F0000007 l9 JMP l11 % Dummy
37 40c0094 F3210000 l7 PUSHJ \$33,l8 % Within reach\.
38 40c0098 F2210000 PUSHJ \$33,l8 % Out of reach\.
38 FD000000
38 FD000000
38 FD000000
38 FD000000
39 40c00ac F1FEFFED l11 JMP l5 % Dummy\.
40 40c00b0 F1FEFFF9 JMP l8 % Dummy\.
41 40c00b4 00000000 \.space 65534\*4,0
41 00000000
41 00000000
41 00000000
41 00000000
41 00000000
42 41000ac F53D0000 GETA \$61,l11 % Within reach\.
43 41000b0 F4480000 GETA \$72,l11 % Out of reach\.
43 FD000000
43 FD000000
43 FD000000
GAS for MMIX .*/relax1\.s page 3
 
 
DEFINED SYMBOLS
.*/relax1\.s:4 \.text:0000000000000000 Main
.*/relax1\.s:24 \.text:0000000000080064 l6
.*/relax1\.s:5 \.text:0000000000000004 l0
.*/relax1\.s:6 \.text:0000000000000008 l1
.*/relax1\.s:7 \.text:000000000000000c l01
.*/relax1\.s:14 \.text:000000000004000c nearfar1
.*/relax1\.s:15 \.text:0000000000040010 nearfar2
.*/relax1\.s:10 \.text:0000000000000018 l2
.*/relax1\.s:20 \.text:0000000000080030 l3
.*/relax1\.s:17 \.text:0000000000040034 l4
.*/relax1\.s:27 \.text:0000000004080060 l5
.*/relax1\.s:31 \.text:0000000004080094 l8
.*/relax1\.s:36 \.text:00000000040c0090 l9
.*/relax1\.s:35 \.text:00000000040c008c l10
.*/relax1\.s:39 \.text:00000000040c00ac l11
.*/relax1\.s:37 \.text:00000000040c0094 l7
 
NO UNDEFINED SYMBOLS
/fb-1.s
0,0 → 1,4
# FB-labels are valid in GREG definitions.
9H GREG #112233
9H GREG #aabbccdd
1H MOR $45,9B,56
/greg1a.d
0,0 → 1,39
# source: greg1.s
# as: -no-merge-gregs
# objdump: -rst
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ l \.text 0+ D4
0+4 l \.text 0+ E6
0+ l \.MMIX\.reg_contents 0+ H9
0+8 l \.MMIX\.reg_contents 0+ G8
0+18 l \.MMIX\.reg_contents 0+ F7
0+28 l \.MMIX\.reg_contents 0+ D5
0+30 l \.MMIX\.reg_contents 0+ C3
0+38 l \.MMIX\.reg_contents 0+ B1
0+40 l \.MMIX\.reg_contents 0+ A0
0+0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
0+c g F \.text 0+ Main
 
 
RELOCATION RECORDS FOR \[\.MMIX\.reg_contents\]:
OFFSET TYPE VALUE
0+ R_MMIX_64 \.text\+0x0+8
0+10 R_MMIX_64 \.text\+0x0+8
0+18 R_MMIX_64 \.text\+0x0+8
0+20 R_MMIX_64 \.text\+0x0+1c
0+30 R_MMIX_64 .text
 
Contents of section \.text:
0000 e37b01c8 e3ea1edb fd020304 fd010203 .*
Contents of section \.MMIX\.reg_contents:
0000 00000000 00000000 00000000 000000f7 .*
0010 00000000 00000000 00000000 00000000 .*
0020 00000000 00000000 00000000 00000000 .*
0030 00000000 00000000 00000000 00000001 .*
0040 00000000 00000000 .*
/weak1.d
0,0 → 1,23
#as: -x --no-pushj-stubs
#objdump: -str
 
# Relaxation thought a weak symbol was within reach.
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ w \.text 0+ foo
0+4 g \.text 0+ main
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+18 R_MMIX_64 foo
0+4 R_MMIX_PUSHJ foo
 
Contents of section \.text:
0000 f8010000 f20f0000 fd000000 fd000000 .*
0010 fd000000 fd000000 00000000 00000000 .*
 
/basep-10.d
0,0 → 1,33
#as: -linker-allocated-gregs
#objdump: -srt
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+4 l \.text 0+ w4
0+10 l \.text 0+ w2
0+ l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
0+c w \.text 0+ w1
0+8 w \.text 0+ w3
 
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+6 R_MMIX_BASE_PLUS_OFFSET w1
0+a R_MMIX_REG \.MMIX\.reg_contents
0+e R_MMIX_REG \.MMIX\.reg_contents\+0x0+8
0+12 R_MMIX_REG \.MMIX\.reg_contents\+0x0+8
 
RELOCATION RECORDS FOR \[\.MMIX\.reg_contents\]:
OFFSET TYPE VALUE
0+ R_MMIX_64 w3
0+8 R_MMIX_64 \.text\+0x0+4
 
Contents of section \.text:
0000 fd000000 232a0000 232b0000 232c000c .*
0010 232d0000 .*
Contents of section \.MMIX\.reg_contents:
0000 00000000 00000000 00000000 00000000 .*
/save-op-r.d
0,0 → 1,11
# objdump: -dr
# as: -linkrelax
# source: save-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fa2d0000 save \$45,0
4: fa1f0000 save \$31,0
8: fa000000 save \$0,0
/err-greg1.s
0,0 → 1,10
% { dg-do assemble { target mmix-*-* } }
 
% One more than greg9.s is one too many.
% The error is reported on the wrong line. Methinks that error is
% attributable to the .rept machinery. No xfail+bogus for this one.
 
Main SWYM 0
.rept 223
GREG
.endr % { dg-error "too many GREG registers allocated" "" }
/bspec-2.s
0,0 → 1,11
SWYM 1,2,3
BSPEC 2
TETRA forw
ESPEC
BSPEC 3
OCTA other
ESPEC
BSPEC 2
TETRA 42
OCTA other
ESPEC
/relax1.s
0,0 → 1,43
# Relaxation border-cases: just-within reach, just-out-of-reach, forward
# and backward. Have a few variable-length thingies in-between so it
# doesn't get too easy.
Main JMP l6
l0 JMP l6
l1 JMP l6
l01 JMP l6
GETA $7,nearfar1 % Within reach.
PUSHJ $191,nearfar2 % Within reach.
l2 JMP nearfar2 % Dummy.
.space 65530*4,0
BNP $72,l0 % Within reach
GETA $4,l1 % Within reach.
nearfar1 PUSHJ 5,l01 % Within reach.
nearfar2 GETA $9,l1 % Out of reach.
PUSHJ $11,l3 % Out of reach.
l4 BP $55,l3 % Within reach.
.space 65533*4,0
JMP l1 % Dummy.
l3 JMP l0 % Dummy.
BOD $88,l4 % Within reach.
BOD $88,l4 % Out of reach.
JMP l5 % Out of reach.
l6 JMP l5 % Within reach.
BZ $111,l3 % Dummy.
.space (256*256*256-3)*4,0
l5 JMP l8 % Dummy.
JMP l6 % Within reach
JMP l6 % Out of reach.
BNN $44,l9 % Out of reach.
l8 BNN $44,l9 % Within reach.
JMP l5 % Dummy.
JMP l5 % Dummy.
.space 65531*4,0
l10 JMP l5 % Dummy.
l9 JMP l11 % Dummy
l7 PUSHJ $33,l8 % Within reach.
PUSHJ $33,l8 % Out of reach.
l11 JMP l5 % Dummy.
JMP l8 % Dummy.
.space 65534*4,0
GETA $61,l11 % Within reach.
GETA $72,l11 % Out of reach.
/loc-3.d
0,0 → 1,43
#readelf: -Ssrx1 -x2
There are 7 section headers, starting at offset 0x80:
 
Section Headers:
\[Nr\] Name Type Address Offset
Size EntSize Flags Link Info Align
\[ 0\] NULL 0000000000000000 00000000
0000000000000000 0000000000000000 0 0 0
\[ 1\] \.text PROGBITS 0000000000000000 00000040
000000000000000c 0000000000000000 AX 0 0 4
\[ 2\] \.data PROGBITS 0000000000000000 0000004c
0000000000000008 0000000000000000 WA 0 0 4
\[ 3\] \.bss NOBITS 0000000000000000 00000054
0000000000000000 0000000000000000 WA 0 0 1
\[ 4\] \.shstrtab STRTAB 0000000000000000 00000054
000000000000002c 0000000000000000 0 0 1
\[ 5\] \.symtab SYMTAB 0000000000000000 00000240
00000000000000c0 0000000000000018 6 5 8
\[ 6\] \.strtab STRTAB 0000000000000000 00000300
0000000000000030 0000000000000000 0 0 1
Key to Flags:
W \(write\), A \(alloc\), X \(execute\), M \(merge\), S \(strings\)
I \(info\), L \(link order\), G \(group\), x \(unknown\)
O \(extra OS processing required\) o \(OS specific\), p \(processor specific\)
 
There are no relocations in this file\.
 
Symbol table '\.symtab' contains 8 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 0+ 0 NOTYPE LOCAL DEFAULT UND
1: 0+ 0 SECTION LOCAL DEFAULT 1
2: 0+ 0 SECTION LOCAL DEFAULT 2
3: 0+ 0 SECTION LOCAL DEFAULT 3
4: 0+ 0 NOTYPE LOCAL DEFAULT 2 a
5: 0+4 0 FUNC GLOBAL DEFAULT 1 Main
6: 0+200 0 NOTYPE GLOBAL DEFAULT ABS __\.MMIX\.start\.\.text
7: 2000000000000000 0 NOTYPE GLOBAL DEFAULT ABS __\.MMIX\.start\.\.data
 
Hex dump of section '\.text':
0x00000000 fd00038f fd090101 fd000065 .*
 
Hex dump of section '\.data':
0x00000000 00000010 00000040 .*
/mmix.exp
0,0 → 1,38
# Copyright (C) 2001, 2007 Free Software Foundation, Inc.
 
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
if { ! [istarget "mmix-*"] } {
return
}
 
proc run_mmix_tests { } {
global srcdir subdir runtests
foreach test_name [lsort [find ${srcdir}/${subdir} *.d]] {
# Keep basename.
regsub -all ".*/\(\[^\.\]*\)\.d$" $test_name "\\1" test_name
 
run_dump_test $test_name
}
 
# FIXME: more tests needed.
# BFD_RELOC_MMIX_REG_OR_BYTE with symbol-difference with
# relaxable thing in between.
#
# Other normal reloc with symbol-difference with
# relaxable thing in between.
}
 
run_mmix_tests
/hex.d
0,0 → 1,9
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: e3362009 setl \$54,0x2009
4: e320125e setl \$32,0x125e
8: e31f00b1 setl \$31,0xb1
/weak1.s
0,0 → 1,7
.weak foo
foo:
POP 1,0
.global main
main:
PUSHJ $15,foo
.quad foo
/basep-10.s
0,0 → 1,16
# Test that we handle weak symbols with base-plus-offset relocs mixed with
# GREG defs.
.weak w1
.weak w3
GREG w4
GREG w3
SWYM
w4:
LDA $42,w1
w3:
LDA $43,w3
w1:
LDA $44,w2
w2:
LDA $45,w4
 
/align-1.d
0,0 → 1,18
#objdump: -srt
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0000000000000000 l d \.text 0000000000000000 (|\.text)
0000000000000000 l d \.data 0000000000000000 (|\.data)
0000000000000000 l d \.bss 0000000000000000 (|\.bss)
0000000000000002 l \.text 0000000000000000 a
0000000000000008 l \.text 0000000000000000 b
0000000000000010 l \.text 0000000000000000 c
000000000000001c g F \.text 0000000000000000 Main
 
 
Contents of section \.text:
0000 00000001 02000000 00000003 04000000 .*
0010 00000000 00000005 06000000 fd000102 .*
 
/reloc8-r.d
0,0 → 1,20
# objdump: -dr
# as: -linkrelax
# source: reloc8.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: b9002dea syncd 0,\$45,234
1: R_MMIX_8 foo
4: 372f002a negu \$47,0,42
6: R_MMIX_8 bar\+0x30
8: fd00b26e swym 0,178,110
9: R_MMIX_8 baz\+0xfffffffffffffffe
c: ff000000 trip 0,0,0
d: R_MMIX_8 fee\+0xffffffffffffffff
e: R_MMIX_8 fie\+0x1
f: R_MMIX_8 foe\+0x3
10: f9000000 resume 0
13: R_MMIX_8 foobar\+0x8
/loc-3.s
0,0 → 1,14
# Check that a little bit of LOC:ing back and forward between code and
# data section doesn't hurt.
LOC #20 << 56
a TETRA 4*4
 
LOC #200
SWYM 911
Main SWYM 9,1,1
 
LOC a+4
TETRA 8*8
 
LOC Main+4
SWYM 101
/hex.l
0,0 → 1,13
GAS for MMIX .*/hex\.s page 1
 
 
1 0000 E3362009 Main SETL \$54,#2009
2 0004 E320125E SETL \$32,42\+#1234
3 0008 E31F00B1 SETL \$31,#72\+63
GAS for MMIX .*/hex\.s page 2
 
 
DEFINED SYMBOLS
.*/hex\.s:1 \.text:0000000000000000 Main
 
NO UNDEFINED SYMBOLS
/pseudo-1.d
0,0 → 1,15
#objdump: -str
 
# Check that some pseudos get output right.
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ g F \.text 0+ Main
 
Contents of section \.text:
0000 00000020 00000020 00000020 00000020 .*
0010 0000000a 00000000 .*
/1cjmp1brn.d
0,0 → 1,15
# objdump: -dr
# source: 1cjmp1b.s
# as: -linkrelax -no-expand
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fd000000 swym 0,0,0
4: f0000000 jmp 4 <Main\+0x4>
4: R_MMIX_ADDR27 \.text\+0x8
8: f0000000 jmp 8 <Main\+0x8>
8: R_MMIX_ADDR27 \.text\+0x8
c: f0000000 jmp c <Main\+0xc>
c: R_MMIX_ADDR27 \.text\+0x8
/hex.s
0,0 → 1,3
Main SETL $54,#2009
SETL $32,42+#1234
SETL $31,#72+63
/sym-1.d
0,0 → 1,51
#objdump: -dt
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d .text 0+ (|\.text)
0+ l d .data 0+ (|\.data)
0+ l d .bss 0+ (|\.bss)
0+10 l .text 0+ scl1
0+14 l .text 0+ :scl2
0+20 l .text 0+ endcl1
0+24 l .text 0+ endcl2:
0+ g F .text 0+ Main
0+4 g .text 0+ scg1
0+8 g .text 0+ scg2
0+c g .text 0+ :scg3
0+18 g .text 0+ endcg1
0+1c g .text 0+ endcg2:
 
 
Disassembly of section .text:
 
0+ <Main>:
0: fd000410 swym 0,4,16
 
0+4 <scg1>:
4: fd100400 swym 16,4,0
 
0+8 <scg2>:
8: fda12a1e swym 161,42,30
 
0+c <:scg3>:
c: fda32a14 swym 163,42,20
 
0+10 <scl1>:
10: fd010203 swym 1,2,3
 
0+14 <:scl2>:
14: fd010204 swym 1,2,4
 
0+18 <endcg1>:
18: fd030201 swym 3,2,1
 
0+1c <endcg2:>:
1c: fd030201 swym 3,2,1
 
0+20 <endcl1>:
20: fd040302 swym 4,3,2
 
0+24 <endcl2:>:
24: fd040302 swym 4,3,2
/err-bpo1.s
0,0 → 1,12
% { dg-do assemble { target mmix-*-* } }
 
% SAVE, UNSAVE are not valid with base-plus-offset
 
.data
buffer OCTA 0,0,0
 
.text
GREG buffer
Main SWYM 0
SAVE buffer,0 % { dg-error "operands" "" }
UNSAVE 0,buffer % { dg-error "operands" "" }
/align-1.s
0,0 → 1,11
# Check that alignment is applied for instructions and pseudos, and that
# labels to such entities are aligned.
 
BYTE 0
a WYDE 1
BYTE 2
b TETRA 3
BYTE 4
c OCTA 5
BYTE 6
Main SWYM 0,1,2
/greg7.d
0,0 → 1,27
#objdump: -str
 
# GAS must know that .text and expressions around 0 can be equivalent for
# GREGs.
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ l \.text 0+ t
0+4 l \*ABS\* 0+ x
0+ l \.text 0+ y
0+ l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
0+8 g F \.text 0+ Main
0+8 g \*ABS\* 0+ __\.MMIX\.start\.\.text
 
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+a R_MMIX_REG \.MMIX\.reg_contents
 
Contents of section \.text:
0000 00000000 00000021 232c0004 .*
Contents of section \.MMIX\.reg_contents:
0000 00000000 00000004 .*
/pseudo-1.s
0,0 → 1,27
Main TETRA " ",#a,0
/unsave-op.d
0,0 → 1,9
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fb00002d unsave 0,\$45
4: fb00001f unsave 0,\$31
8: fb000000 unsave 0,\$0
/err-local1.s
0,0 → 1,6
% { dg-do assemble { target mmix-*-* } }
% Check that error handling for the restrictions on LOCAL works.
LOCAL 128 % { dg-error "LOCAL must be placed in code or data" "" }
 
LOC Data_Segment
OCTA 0
/sym-1.s
0,0 → 1,19
# Test beginning and starting with ":"; it should be stripped off, but
# only one. A trailing ":" is stripped off at a label only.
 
Main SWYM 0,4,16
.global :scg1
.global scg2
.global ::scg3
.global scg2
:scg1 SWYM 16,4,0
:scg2 SWYM 161,42,30
::scg3 SWYM 163,42,20
:scl1 SWYM 1,2,3
::scl2 SWYM 1,2,4
.global endcg1
.global endcg2:
endcg1: SWYM 3,2,1
endcg2:: SWYM 3,2,1
endcl1: SWYM 4,3,2
endcl2:: SWYM 4,3,2
/err-loc-6.s
0,0 → 1,4
% { dg-do assemble { target mmix-*-* } }
LOC #201
.p2align 0
SWYM 1 % { dg-error "unaligned data at an absolute location" "" }
/unsave-op.l
0,0 → 1,18
GAS for MMIX .*/unsave-op.s page 1
 
 
1 #.*
2 0000 FB00002D Main UNSAVE 0,\$45
3 0004 FB00001F UNSAVE 0,X
4 0008 FB000000 UNSAVE 0,X0
5 X IS \$31
6 X0 IS \$0
GAS for MMIX .*/unsave-op\.s page 2
 
 
DEFINED SYMBOLS
.*/unsave-op.s:2 \.text:0000000000000000 Main
\*REG\*:000000000000001f X
\*REG\*:0000000000000000 X0
 
NO UNDEFINED SYMBOLS
/fb-2.d
0,0 → 1,32
#objdump: -str
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
0+10 g \*ABS\* 0+ __\.MMIX\.start\.\.text
 
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+2a R_MMIX_REG \.MMIX\.reg_contents
0+30 R_MMIX_64 \.text\+0x0+28
0+38 R_MMIX_64 \.text\+0x0+40
 
 
RELOCATION RECORDS FOR \[\.MMIX\.reg_contents\]:
OFFSET TYPE VALUE
0+ R_MMIX_64 \.text\+0x0+5a
 
 
Contents of section \.text:
0000 05000000 00000000 00000000 00000000 .*
0010 00000000 00000000 00000000 00000000 .*
0020 00000000 fd000000 231e0000 00000000 .*
0030 00000000 00000000 00000000 00000000 .*
0040 fd000000 002a002b 002b002c .*
Contents of section \.MMIX\.reg_contents:
0000 00000000 00000000 .*
/relax1-n.d
0,0 → 1,90
#objdump: -dr
#as: -no-expand -x
#source: relax1.s
#
# This test-case assumes that out-of-range errors cause relocs to
# be emitted, rather than errors emitted. FIXME.
 
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: f0020009 jmp 80024 <l6>
 
0000000000000004 <l0>:
4: f0020008 jmp 80024 <l6>
 
0000000000000008 <l1>:
8: f0020007 jmp 80024 <l6>
 
000000000000000c <l01>:
c: f0020006 jmp 80024 <l6>
10: f407ffff geta \$7,4000c <nearfar1>
14: f2bfffff pushj \$191,40010 <nearfar2>
 
0000000000000018 <l2>:
18: f000fffe jmp 40010 <nearfar2>
\.\.\.
40004: 4d480000 bnp \$72,4 <l0>
40008: f5040000 geta \$4,8 <l1>
 
000000000004000c <nearfar1>:
4000c: f3050000 pushj \$5,c <l01>
 
0000000000040010 <nearfar2>:
40010: f4090000 geta \$9,40010 <nearfar2>
40010: R_MMIX_ADDR19 \.text\+0x8
40014: f20b0000 pushj \$11,40014 <nearfar2\+0x4>
40014: R_MMIX_ADDR19 \.text\+0x80014
 
0000000000040018 <l4>:
40018: 4437ffff bp \$55,80014 <l3>
...
80010: f1fdfffe jmp 8 <l1>
 
0000000000080014 <l3>:
80014: f1fdfffc jmp 4 <l0>
80018: 47580000 bod \$88,40018 <l4>
8001c: 46580000 bod \$88,8001c <l3\+0x8>
8001c: R_MMIX_ADDR19 \.text\+0x40018
80020: f0000000 jmp 80020 <l3\+0xc>
80020: R_MMIX_ADDR27 \.text\+0x4080020
 
0000000000080024 <l6>:
80024: f0ffffff jmp 4080020 <l5>
80028: 436ffffb bz \$111,80014 <l3>
\.\.\.
 
0000000004080020 <l5>:
4080020: f0000004 jmp 4080030 <l8>
4080024: f1000000 jmp 80024 <l6>
4080028: f0000000 jmp 4080028 <l5\+0x8>
4080028: R_MMIX_ADDR27 \.text\+0x80024
408002c: 482c0000 bnn \$44,408002c <l5\+0xc>
408002c: R_MMIX_ADDR19 \.text\+0x40c002c
 
0000000004080030 <l8>:
4080030: 482cffff bnn \$44,40c002c <l9>
4080034: f1fffffb jmp 4080020 <l5>
4080038: f1fffffa jmp 4080020 <l5>
\.\.\.
 
00000000040c0028 <l10>:
40c0028: f1fefffe jmp 4080020 <l5>
 
00000000040c002c <l9>:
40c002c: f0000003 jmp 40c0038 <l11>
 
00000000040c0030 <l7>:
40c0030: f3210000 pushj \$33,4080030 <l8>
40c0034: f2210000 pushj \$33,40c0034 <l7\+0x4>
40c0034: R_MMIX_ADDR19 \.text\+0x4080030
 
00000000040c0038 <l11>:
40c0038: f1fefffa jmp 4080020 <l5>
40c003c: f1fefffd jmp 4080030 <l8>
\.\.\.
4100038: f53d0000 geta \$61,40c0038 <l11>
410003c: f4480000 geta \$72,410003c <l11\+0x40004>
410003c: R_MMIX_ADDR19 \.text\+0x40c0038
/greg7.s
0,0 → 1,8
t IS @
x IS 4
 
LOC x+4
y OCTA 33
GREG x
 
Main LDA $44,y
/bz-c.d
0,0 → 1,30
#as: -x
#objdump: -tdr
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d .text 0+ (|\.text)
0+ l d .data 0+ (|\.data)
0+ l d .bss 0+ (|\.bss)
ffff0000ffff0000 l \*ABS\* 0+ i1
ffff0000ffff0000 l \*ABS\* 0+ i2
0+ g F .text 0+ Main
 
Disassembly of section .text:
 
0+ <Main>:
0: 42ff0000 bz \$255,0 <Main>
0: R_MMIX_CBRANCH \*ABS\*\+0xffff0000ffff0000
4: fd000000 swym 0,0,0
8: fd000000 swym 0,0,0
c: fd000000 swym 0,0,0
10: fd000000 swym 0,0,0
14: fd000000 swym 0,0,0
18: 42ff0000 bz \$255,18 <Main\+0x18>
18: R_MMIX_CBRANCH i2
1c: fd000000 swym 0,0,0
20: fd000000 swym 0,0,0
24: fd000000 swym 0,0,0
28: fd000000 swym 0,0,0
2c: fd000000 swym 0,0,0
/unsave-op.s
0,0 → 1,6
# Test the 'u'-type operand, UNSAVE.
Main UNSAVE 0,$45
UNSAVE 0,X
UNSAVE 0,X0
X IS $31
X0 IS $0
/relax2.d
0,0 → 1,251
#objdump: -r
#as: -x
 
.*: file format elf64-mmix
R.* \[\.text\.a0\]:
O.*
0+40004 R_MMIX_PUSHJ \.text\.a0
0+40018 R_MMIX_PUSHJ \.text\.a0\+0x0+4
R.* \[\.text\.b0\]:
O.*
0+40004 R_MMIX_PUSHJ \.text\.b0
0+40018 R_MMIX_PUSHJ \.text\.b0\+0x0+4
0+4002c R_MMIX_PUSHJ \.text\.b0\+0x0+8
R.* \[\.text\.c0\]:
O.*
0+ R_MMIX_PUSHJ ca0
0+14 R_MMIX_PUSHJ cb0
R.* \[\.text\.d0\]:
O.*
0+ R_MMIX_PUSHJ da0
0+14 R_MMIX_PUSHJ db0
0+28 R_MMIX_PUSHJ dc0
R.* \[\.text\.a1\]:
O.*
0+40004 R_MMIX_PUSHJ \.text\.a1
0+40018 R_MMIX_PUSHJ_STUBBABLE \.text\.a1\+0x0+4
R.* \[\.text\.b1\]:
O.*
0+40004 R_MMIX_PUSHJ \.text\.b1
0+40018 R_MMIX_PUSHJ \.text\.b1\+0x0+4
0+4002c R_MMIX_PUSHJ_STUBBABLE \.text\.b1\+0x0+8
R.* \[\.text\.c1\]:
O.*
0+ R_MMIX_PUSHJ ca1
0+14 R_MMIX_PUSHJ_STUBBABLE cb1
R.* \[\.text\.d1\]:
O.*
0+ R_MMIX_PUSHJ da1
0+14 R_MMIX_PUSHJ db1
0+28 R_MMIX_PUSHJ_STUBBABLE dc1
 
# The following shows a limitation of the PUSHJ relaxation code when
# PUSHJ:s are close, and about 256k away from the section limit: On the
# first relaxation iteration, the first (or second) PUSHJ looks like it
# could reach a stub. However, the last PUSHJ is expanded and on the
# second iteration, the stubbed PUSHJ has to be expanded too because it
# can't reach the stubs anymore. This continues for the next iterations,
# because the max stub size is five tetrabytes (4-bytes). At the expense
# of much more complex relaxation code (including the relaxation machinery
# in write.c), this is fixable. Anyway, as long as PUSHJ:s aren't closer
# than five instructions, the existing code does suffice; we're just here
# to check that the border case *works* and doesn't generate invalid code.
 
R.* \[\.text\.a2\]:
O.*
0+40004 R_MMIX_PUSHJ \.text\.a2
0+40018 R_MMIX_PUSHJ \.text\.a2\+0x0+4
R.* \[\.text\.b2\]:
O.*
0+40004 R_MMIX_PUSHJ \.text\.b2
0+40018 R_MMIX_PUSHJ \.text\.b2\+0x0+4
0+4002c R_MMIX_PUSHJ \.text\.b2\+0x0+8
R.* \[\.text\.c2\]:
O.*
0+ R_MMIX_PUSHJ ca2
0+14 R_MMIX_PUSHJ cb2
R.* \[\.text\.d2\]:
O.*
0+ R_MMIX_PUSHJ da2
0+14 R_MMIX_PUSHJ db2
0+28 R_MMIX_PUSHJ dc2
R.* \[\.text\.a3\]:
O.*
0+40004 R_MMIX_PUSHJ \.text\.a3
0+40018 R_MMIX_PUSHJ \.text\.a3\+0x0+4
R.* \[\.text\.b3\]:
O.*
0+40004 R_MMIX_PUSHJ \.text\.b3
0+40018 R_MMIX_PUSHJ \.text\.b3\+0x0+4
0+4002c R_MMIX_PUSHJ \.text\.b3\+0x0+8
R.* \[\.text\.c3\]:
O.*
0+ R_MMIX_PUSHJ ca3
0+14 R_MMIX_PUSHJ cb3
R.* \[\.text\.d3\]:
O.*
0+ R_MMIX_PUSHJ da3
0+14 R_MMIX_PUSHJ db3
0+28 R_MMIX_PUSHJ dc3
R.* \[\.text\.a4\]:
O.*
0+40004 R_MMIX_PUSHJ \.text\.a4
0+40018 R_MMIX_PUSHJ \.text\.a4\+0x0+4
R.* \[\.text\.b4\]:
O.*
0+40004 R_MMIX_PUSHJ \.text\.b4
0+40018 R_MMIX_PUSHJ \.text\.b4\+0x0+4
0+4002c R_MMIX_PUSHJ \.text\.b4\+0x0+8
R.* \[\.text\.c4\]:
O.*
0+ R_MMIX_PUSHJ ca4
0+14 R_MMIX_PUSHJ cb4
R.* \[\.text\.d4\]:
O.*
0+ R_MMIX_PUSHJ da4
0+14 R_MMIX_PUSHJ db4
0+28 R_MMIX_PUSHJ dc4
R.* \[\.text\.a5\]:
O.*
0+40004 R_MMIX_PUSHJ \.text\.a5
0+40018 R_MMIX_PUSHJ \.text\.a5\+0x0+4
R.* \[\.text\.b5\]:
O.*
0+40004 R_MMIX_PUSHJ \.text\.b5
0+40018 R_MMIX_PUSHJ \.text\.b5\+0x0+4
0+4002c R_MMIX_PUSHJ \.text\.b5\+0x0+8
R.* \[\.text\.c5\]:
O.*
0+ R_MMIX_PUSHJ ca5
0+14 R_MMIX_PUSHJ cb5
R.* \[\.text\.d5\]:
O.*
0+ R_MMIX_PUSHJ da5
0+14 R_MMIX_PUSHJ db5
0+28 R_MMIX_PUSHJ dc5
R.* \[\.text\.a6\]:
O.*
0+40004 R_MMIX_PUSHJ_STUBBABLE \.text\.a6
0+40008 R_MMIX_PUSHJ_STUBBABLE \.text\.a6\+0x0+4
R.* \[\.text\.b6\]:
O.*
0+40004 R_MMIX_PUSHJ \.text\.b6
0+40018 R_MMIX_PUSHJ \.text\.b6\+0x0+4
0+4002c R_MMIX_PUSHJ_STUBBABLE \.text\.b6\+0x0+8
R.* \[\.text\.c6\]:
O.*
0+ R_MMIX_PUSHJ_STUBBABLE ca6
0+4 R_MMIX_PUSHJ_STUBBABLE cb6
R.* \[\.text\.d6\]:
O.*
0+ R_MMIX_PUSHJ da6
0+14 R_MMIX_PUSHJ db6
0+28 R_MMIX_PUSHJ_STUBBABLE dc6
R.* \[\.text\.a7\]:
O.*
0+40004 R_MMIX_PUSHJ_STUBBABLE \.text\.a7
0+40008 R_MMIX_PUSHJ_STUBBABLE \.text\.a7\+0x0+4
R.* \[\.text\.b7\]:
O.*
0+40004 R_MMIX_PUSHJ \.text\.b7
0+40018 R_MMIX_PUSHJ \.text\.b7\+0x0+4
0+4002c R_MMIX_PUSHJ \.text\.b7\+0x0+8
R.* \[\.text\.c7\]:
O.*
0+ R_MMIX_PUSHJ_STUBBABLE ca7
0+4 R_MMIX_PUSHJ_STUBBABLE cb7
R.* \[\.text\.d7\]:
O.*
0+ R_MMIX_PUSHJ da7
0+14 R_MMIX_PUSHJ db7
0+28 R_MMIX_PUSHJ dc7
R.* \[\.text\.a8\]:
O.*
0+40004 R_MMIX_PUSHJ_STUBBABLE \.text\.a8
0+40008 R_MMIX_PUSHJ_STUBBABLE \.text\.a8\+0x0+4
R.* \[\.text\.b8\]:
O.*
0+40004 R_MMIX_PUSHJ \.text\.b8
0+40018 R_MMIX_PUSHJ \.text\.b8\+0x0+4
0+4002c R_MMIX_PUSHJ \.text\.b8\+0x0+8
R.* \[\.text\.c8\]:
O.*
0+ R_MMIX_PUSHJ_STUBBABLE ca8
0+4 R_MMIX_PUSHJ_STUBBABLE cb8
R.* \[\.text\.d8\]:
O.*
0+ R_MMIX_PUSHJ da8
0+14 R_MMIX_PUSHJ db8
0+28 R_MMIX_PUSHJ dc8
R.* \[\.text\.a9\]:
O.*
0+40004 R_MMIX_PUSHJ_STUBBABLE \.text\.a9
0+40008 R_MMIX_PUSHJ_STUBBABLE \.text\.a9\+0x0+4
R.* \[\.text\.b9\]:
O.*
0+40004 R_MMIX_PUSHJ \.text\.b9
0+40018 R_MMIX_PUSHJ \.text\.b9\+0x0+4
0+4002c R_MMIX_PUSHJ \.text\.b9\+0x0+8
R.* \[\.text\.c9\]:
O.*
0+ R_MMIX_PUSHJ_STUBBABLE ca9
0+4 R_MMIX_PUSHJ_STUBBABLE cb9
R.* \[\.text\.d9\]:
O.*
0+ R_MMIX_PUSHJ da9
0+14 R_MMIX_PUSHJ db9
0+28 R_MMIX_PUSHJ dc9
R.* \[\.text\.a10\]:
O.*
0+40004 R_MMIX_PUSHJ_STUBBABLE \.text\.a10
0+40008 R_MMIX_PUSHJ_STUBBABLE \.text\.a10\+0x0+4
R.* \[\.text\.b10\]:
O.*
0+40004 R_MMIX_PUSHJ \.text\.b10
0+40018 R_MMIX_PUSHJ \.text\.b10\+0x0+4
0+4002c R_MMIX_PUSHJ \.text\.b10\+0x0+8
R.* \[\.text\.c10\]:
O.*
0+ R_MMIX_PUSHJ_STUBBABLE ca10
0+4 R_MMIX_PUSHJ_STUBBABLE cb10
R.* \[\.text\.d10\]:
O.*
0+ R_MMIX_PUSHJ da10
0+14 R_MMIX_PUSHJ db10
0+28 R_MMIX_PUSHJ dc10
R.* \[\.text\.a11\]:
O.*
0+40004 R_MMIX_PUSHJ_STUBBABLE \.text\.a11
0+40008 R_MMIX_PUSHJ_STUBBABLE \.text\.a11\+0x0+4
R.* \[\.text\.b11\]:
O.*
0+40004 R_MMIX_PUSHJ_STUBBABLE \.text\.b11
0+40008 R_MMIX_PUSHJ_STUBBABLE \.text\.b11\+0x0+4
0+4000c R_MMIX_PUSHJ_STUBBABLE \.text\.b11\+0x0+8
R.* \[\.text\.c11\]:
O.*
0+ R_MMIX_PUSHJ_STUBBABLE ca11
0+4 R_MMIX_PUSHJ_STUBBABLE cb11
R.* \[\.text\.d11\]:
O.*
0+ R_MMIX_PUSHJ_STUBBABLE da11
0+4 R_MMIX_PUSHJ_STUBBABLE db11
0+8 R_MMIX_PUSHJ_STUBBABLE dc11
R.* \[\.text\.a12\]:
O.*
0+40004 R_MMIX_PUSHJ_STUBBABLE \.text\.a12
0+40008 R_MMIX_PUSHJ_STUBBABLE \.text\.a12\+0x0+4
R.* \[\.text\.b12\]:
O.*
0+40004 R_MMIX_PUSHJ_STUBBABLE \.text\.b12
0+40008 R_MMIX_PUSHJ_STUBBABLE \.text\.b12\+0x0+4
0+4000c R_MMIX_PUSHJ_STUBBABLE \.text\.b12\+0x0+8
R.* \[\.text\.c12\]:
O.*
0+ R_MMIX_PUSHJ_STUBBABLE ca12
0+4 R_MMIX_PUSHJ_STUBBABLE cb12
R.* \[\.text\.d12\]:
O.*
0+ R_MMIX_PUSHJ_STUBBABLE da12
0+4 R_MMIX_PUSHJ_STUBBABLE db12
0+8 R_MMIX_PUSHJ_STUBBABLE dc12
/basep-7.d
0,0 → 1,34
#source: err-bpo5.s
#as: -linker-allocated-gregs
#objdump: -drt
 
# The -linker-allocated-gregs option validates omissions of GREG.
# Note the inconsequence in relocs regarding forward and backward
# references (not specific to this functionality); they may change.
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+2a l \*ABS\* 0+ a
0+70 l \*ABS\* 0+ b
0+48 l \*ABS\* 0+ c
0+3 l \*ABS\* 0+ d
 
Disassembly of section \.text:
 
0+ <\.text>:
0: 8d2b0000 ldo \$43,\$0,0
2: R_MMIX_BASE_PLUS_OFFSET \*ABS\*\+0x5e
4: 232f0000 addu \$47,\$0,0
6: R_MMIX_BASE_PLUS_OFFSET \*ABS\*\+0x9a
8: 23300000 addu \$48,\$0,0
a: R_MMIX_BASE_PLUS_OFFSET \*ABS\*\+0x86
c: 8d2b0000 ldo \$43,\$0,0
e: R_MMIX_BASE_PLUS_OFFSET c\+0x2
10: 232f0000 addu \$47,\$0,0
12: R_MMIX_BASE_PLUS_OFFSET d\+0xd4
14: 23300000 addu \$48,\$0,0
16: R_MMIX_BASE_PLUS_OFFSET c\+0x15
/cons-1.d
0,0 → 1,7
#objdump: -sr
 
.*: file format elf64-mmix
 
Contents of section \.text:
0000 00000000 00000000 .*
 
/fb-2.s
0,0 → 1,19
# Test fb-label where the insn or pseudo on line with definition uses an
# argment with a same-number label.
1H IS 5
0H LOC #10
1H BYTE 1B
0H LOC 0B+#20+0F
0H IS 4
1H IS 50
1H GREG 1B+1F
SWYM
1H LDA $30,1B
1H OCTA 1B,1F
1H SWYM
 
9H IS 42
WYDE 9B,9F
9H IS 9B+1
WYDE 9B,9F
9H IS 9B+1
/basep-11.d
0,0 → 1,25
#as: -linker-allocated-gregs
#objdump: -srt
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+4 l \.text 0+ w4
0+10 l \.text 0+ w2
0+c w \.text 0+ w1
0+8 w \.text 0+ w3
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+6 R_MMIX_BASE_PLUS_OFFSET w1
0+a R_MMIX_BASE_PLUS_OFFSET w3
0+e R_MMIX_BASE_PLUS_OFFSET \.text\+0x0+10
0+12 R_MMIX_BASE_PLUS_OFFSET \.text\+0x0+4
 
Contents of section \.text:
0000 fd000000 232a0000 232b0000 232c0000 .*
0010 232d0000 .*
 
/geta-opn.d
0,0 → 1,27
# objdump: -dr
# source: geta-op.s
# as: -no-expand
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: fd000000 swym 0,0,0
 
0000000000000004 <here>:
4: fd000000 swym 0,0,0
8: f519ffff geta \$25,4 <here>
 
000000000000000c <at>:
c: f4200000 geta \$32,c <at>
10: 424e0008 bz \$78,30 <there>
14: f35bfffc pushj \$91,4 <here>
18: f387fffb pushj \$135,4 <here>
1c: f4870005 geta \$135,30 <there>
20: f2870004 pushj \$135,30 <there>
24: f2490003 pushj \$73,30 <there>
28: f2380002 pushj \$56,30 <there>
2c: 5f87fff6 pbev \$135,4 <here>
 
0000000000000030 <there>:
30: fd000000 swym 0,0,0
/bz-c.s
0,0 → 1,5
% BZ far away must not fail
i1 IS #ffff0000ffff0000
Main BZ $255,i1
BZ $255,i2
i2 IS #ffff0000ffff0000
/err-builtin.s
0,0 → 1,14
% { dg-do assemble { target mmix-*-* } }
% { dg-options "-no-predefined-syms" }
% When disallowing built-in names, we have to treat GET and PUT
% specially, so when parsing the special register operand we do
% not use the symbol table. Make sure an error is emitted for
% invalid registers despite there being a valid user label and
% the construct being valid without the -no-builtin-syms option.
% FIXME: Another option? Or is this just the consequence?
RJ IS 4
other IS 20
Main GET $5,RJ % { dg-error "invalid operands" "" }
PUT other,$7 % { dg-error "invalid operands" "" }
GET garbage % { dg-error "invalid operands" "" }
PUT garbage % { dg-error "invalid operands" "" }
/reg3-op-r.d
0,0 → 1,32
# objdump: -dr
# as: -linkrelax
# source: reg3-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: 18170c43 mul \$23,\$12,\$67
4: 20200c43 add \$32,\$12,\$67
8: 2a0c2043 4addu \$12,\$32,\$67
c: 2ce88543 8addu \$232,\$133,\$67
10: 2e170c49 16addu \$23,\$12,\$73
14: 3e1f0ce9 sru \$31,\$12,\$233
18: 601726d4 csn \$23,\$38,\$212
1c: 7c04afb5 zsnp \$4,\$175,\$181
20: 1b170cb0 mulu \$23,\$12,176
24: 39200cb0 sl \$32,\$12,176
28: 330c20b0 cmpu \$12,\$32,176
2c: 29e885b0 2addu \$232,\$133,176
30: df170ccb mxor \$23,\$12,203
34: c11f0cd5 or \$31,\$12,213
38: cd1726d3 nand \$23,\$38,211
3c: d304afa1 wdif \$4,\$175,161
40: db170c00 sadd \$23,\$12,0
44: df200c00 mxor \$32,\$12,0
48: c30c2000 orn \$12,\$32,0
4c: cbe88500 andn \$232,\$133,0
50: 2f170c00 16addu \$23,\$12,0
54: 391f0c00 sl \$31,\$12,0
58: 23172600 addu \$23,\$38,0
5c: 3104af00 cmp \$4,\$175,0
/resume-op-r.d
0,0 → 1,12
# objdump: -dr
# as: -linkrelax
# source: resume-op.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: f9000001 resume 1
4: f9000000 resume 0
8: f9000001 resume 1
c: f9000000 resume 0
/relax2.s
0,0 → 1,41
# PUSHJ stub border-cases: two with either or both stubs unreachable,
# local symbols, ditto non-local labels, similar with three PUSHJs.
# Note the absence of ":" on labels: because it's a symbol-character,
# it's concatenated with the parameter macro name and parsed as "\x:".
# This happens before gas deals with ":" as it usually does; not being
# part of the name when ending a label at the beginning of a line.
# (Since we're LABELS_WITHOUT_COLONS it inserts one for us, but
# that would be disabled with --gnu-syntax.)
 
Main SWYM
 
.irp x,0,1,2,3,4,5,6,7,8,9,10,11,12
 
.section .text.a\x,"ax"
aa\x .space 4,0
a\x .space 65536*4,0
PUSHJ $33,aa\x
PUSHJ $22,a\x
.space 65535*4-4*\x
 
.section .text.b\x,"ax"
bbb\x .space 4,0
bb\x .space 4,0
b\x .space 65535*4
PUSHJ $12,bbb\x
PUSHJ $13,bb\x
PUSHJ $14,b\x
.space 65535*4-4*\x
 
.section .text.c\x,"ax"
c\x PUSHJ $100,ca\x
PUSHJ $101,cb\x
.space 65535*4-4*\x
 
.section .text.d\x,"ax"
d\x PUSHJ $99,da\x
PUSHJ $98,db\x
PUSHJ $97,dc\x
.space 65535*4-4*\x
 
.endr
/loc-4.d
0,0 → 1,44
#readelf: -Ssrx1 -x2
There are 7 section headers, starting at offset 0x88:
 
Section Headers:
\[Nr\] Name Type Address Offset
Size EntSize Flags Link Info Align
\[ 0\] NULL 0000000000000000 00000000
0000000000000000 0000000000000000 0 0 0
\[ 1\] \.text PROGBITS 0000000000000000 00000040
0000000000000018 0000000000000000 AX 0 0 4
\[ 2\] \.data PROGBITS 0000000000000000 00000058
0000000000000004 0000000000000000 WA 0 0 4
\[ 3\] \.bss NOBITS 0000000000000000 0000005c
0000000000000000 0000000000000000 WA 0 0 1
\[ 4\] \.shstrtab STRTAB 0000000000000000 0000005c
000000000000002c 0000000000000000 0 0 1
\[ 5\] \.symtab SYMTAB 0000000000000000 00000248
00000000000000c0 0000000000000018 6 5 8
\[ 6\] \.strtab STRTAB 0000000000000000 00000308
000000000000003b 0000000000000000 0 0 1
Key to Flags:
W \(write\), A \(alloc\), X \(execute\), M \(merge\), S \(strings\)
I \(info\), L \(link order\), G \(group\), x \(unknown\)
O \(extra OS processing required\) o \(OS specific\), p \(processor specific\)
 
There are no relocations in this file\.
 
Symbol table '\.symtab' contains 8 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 0+ 0 NOTYPE LOCAL DEFAULT UND
1: 0+ 0 SECTION LOCAL DEFAULT 1
2: 0+ 0 SECTION LOCAL DEFAULT 2
3: 0+ 0 SECTION LOCAL DEFAULT 3
4: 2000000000000000 0 NOTYPE LOCAL DEFAULT ABS Data_Segment
5: 0+14 0 FUNC GLOBAL DEFAULT 1 Main
6: 0+ 0 NOTYPE GLOBAL DEFAULT ABS __\.MMIX\.start\.\.text
7: 2000000000000000 0 NOTYPE GLOBAL DEFAULT ABS __\.MMIX\.start\.\.data
 
Hex dump of section '\.text':
0x00000000 fd001807 00000000 00000000 00000000 .*
0x00000010 fd00038f fd090101 .*
 
Hex dump of section '\.data':
0x00000000 00000100 .*
/cons-1.s
0,0 → 1,2
# Empty expressions are a single zero.
d OCTA
/locall1.d
0,0 → 1,15
# objdump: -t
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+14 l \.text 0+ L9
0+18 l \.text 0+ L12
0+1c l \.text 0+ L21
0+20 l \.text 0+ LC32
0+24 l \.text 0+ LC23
0+8 g \.text 0+ L:21
0+10 g \.text 0+ LC:23
/basep-11.s
0,0 → 1,13
# Test that we handle weak symbols with base-plus-offset relocs.
.weak w1
.weak w3
SWYM
w4:
LDA $42,w1
w3:
LDA $43,w3
w1:
LDA $44,w2
w2:
LDA $45,w4
 
/pushj-cs.d
0,0 → 1,18
#as: -x
#source: pushj-c.s
#objdump: -tdr
 
.*: file format elf64-mmix
SYMBOL TABLE:
0+ l d .text 0+ (|\.text)
0+ l d .data 0+ (|\.data)
0+ l d .bss 0+ (|\.bss)
ffff0000ffff0000 l \*ABS\* 0+ i1
ffff0000ffff0000 l \*ABS\* 0+ i2
0+ g F .text 0+ Main
Disassembly of section \.text:
0+ <Main>:
0: f2010000 pushj \$1,0 <Main>
0: R_MMIX_PUSHJ_STUBBABLE \*ABS\*\+0xffff0000ffff0000
4: f2020000 pushj \$2,4 <Main\+0x4>
4: R_MMIX_PUSHJ_STUBBABLE i2
/loc-4.s
0,0 → 1,8
# Hit a few remaining code-paths.
SWYM 0,24,7
LOC Data_Segment
TETRA 4*4*4*4
 
LOC #10
SWYM 911
Main SWYM 9,1,1
/locall1.s
0,0 → 1,14
% Get rid of labels that look compiler-generated, matching: "L.*:[0-9]+".
% Only if they're local, of course.
.global L:21
.global LC:23
L:9 SWYM 0
L:12 SWYM 1
L:21 SWYM 2
LC:32 SWYM 3
LC:23 SWYM 4
L9 SWYM 10
L12 SWYM 11
L21 SWYM 12
LC32 SWYM 13
LC23 SWYM 14
/greg2a.d
0,0 → 1,39
# source: greg2.s
# as: -no-merge-gregs
# objdump: -rst
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ l \.text 0+ D4
0+4 l \.text 0+ E6
0+ l \.MMIX\.reg_contents 0+ H9
0+8 l \.MMIX\.reg_contents 0+ G8
0+18 l \.MMIX\.reg_contents 0+ F7
0+28 l \.MMIX\.reg_contents 0+ D5
0+30 l \.MMIX\.reg_contents 0+ C3
0+38 l \.MMIX\.reg_contents 0+ B1
0+40 l \.MMIX\.reg_contents 0+ A0
0+0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
0+c g F \.text 0+ Main
 
 
RELOCATION RECORDS FOR \[\.MMIX\.reg_contents\]:
OFFSET TYPE VALUE
0+ R_MMIX_64 \.text\+0x0+8
0+10 R_MMIX_64 \.text\+0x0+8
0+18 R_MMIX_64 \.text\+0x0+8
0+20 R_MMIX_64 \.text\+0x0+1c
0+30 R_MMIX_64 .text
 
Contents of section \.text:
0000 e37b01c8 e3ea1edb fd020304 fd010203 .*
Contents of section \.MMIX\.reg_contents:
0000 00000000 00000000 00000000 000000f7 .*
0010 00000000 00000000 00000000 00000000 .*
0020 00000000 00000000 00000000 00000000 .*
0030 00000000 00000000 00000000 00000001 .*
0040 00000000 00000000 .*
/err-bpo2.s
0,0 → 1,6
% { dg-do assemble { target mmix-*-* } }
 
# Check that base-plus-offset relocs without suitable GREGs are not passed
# through (without -linker-allocated-gregs).
a TETRA 42
LDO $43,a+52 % { dg-error "no suitable GREG definition" "" }
/mmix-err.exp
0,0 → 1,30
# Copyright (C) 2001, 2007 Free Software Foundation, Inc.
 
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
if { ! [istarget "mmix-*"] } {
return
}
 
proc run_mmix_err_tests { } {
global srcdir subdir runtests
 
load_lib gas-dg.exp
dg-init
dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/err-*.s]] "" ""
dg-finish
}
 
run_mmix_err_tests
/is-1.d
0,0 → 1,12
#objdump: -str
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
 
Contents of section \.text:
0+ 00000026 0000001f 0000000d 0000001e .*
 
/greg8.d
0,0 → 1,32
#objdump: -str
 
# GAS must know that .text and expressions around 0 can be
# equivalent for GREGs; like greg7 but the other way round.
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ l \.text 0+ t
0+4 l \*ABS\* 0+ x
0+ l \.text 0+ y
0+ l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
0+8 g F \.text 0+ Main
0+8 g \*ABS\* 0+ __\.MMIX\.start\.\.text
 
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+a R_MMIX_REG \.MMIX\.reg_contents
 
 
RELOCATION RECORDS FOR \[\.MMIX\.reg_contents\]:
OFFSET TYPE VALUE
0+ R_MMIX_64 \.text
 
Contents of section \.text:
0000 00000000 00000021 232c0054 .*
Contents of section \.MMIX\.reg_contents:
0000 00000000 00000000 .*
/err-local2.s
0,0 → 1,3
% { dg-do assemble { target mmix-*-* } }
% Check that error handling for the restrictions on LOCAL works.
LOCAL 128 % { dg-error "LOCAL must be placed in code or data" "" }
/regx-op.d
0,0 → 1,34
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: 9a7b0c43 preld 123,\$12,\$67
4: 9c200c43 prego 32,\$12,\$67
8: b87b2043 syncd 123,\$32,\$67
c: ba008543 prest 0,\$133,\$67
10: b47b0c49 stco 123,\$12,\$73
14: bc820ce9 syncid 130,\$12,\$233
18: 9a7b26d4 preld 123,\$38,\$212
1c: 9c01afb5 prego 1,\$175,\$181
20: b97b0cb0 syncd 123,\$12,176
24: bb200cb0 prest 32,\$12,176
28: b57b84b0 stco 123,\$132,176
2c: bde885b0 syncid 232,\$133,176
30: 9b7b0ccb preld 123,\$12,203
34: 9de70cd5 prego 231,\$12,213
38: b97b26d3 syncd 123,\$38,211
3c: bb04afa1 prest 4,\$175,161
40: b57b0c00 stco 123,\$12,0
44: bd170c00 syncid 23,\$12,0
48: 9b020c00 preld 2,\$12,0
4c: 9de88500 prego 232,\$133,0
50: b97b0c00 syncd 123,\$12,0
54: bb0d0c00 prest 13,\$12,0
58: b57b2600 stco 123,\$38,0
5c: bd04af00 syncid 4,\$175,0
60: 9b7b0c00 preld 123,\$12,0
64: 9d200c00 prego 32,\$12,0
68: b97b2000 syncd 123,\$32,0
6c: bbe88500 prest 232,\$133,0
/err-loc-7.s
0,0 → 1,4
% { dg-do assemble { target mmix-*-* } }
LOC (#20<<56)|1
.p2align 0
TETRA 1 % { dg-error "unaligned data at an absolute location" "" }
/is-1.s
0,0 → 1,7
# IS must handle a here-label.
9H IS 30
7H IS 8F+7
6H IS 2F
TETRA 7B,8F,6B,9B
8H IS 9B+1
2H IS 13
/local-1.d
0,0 → 1,37
# objdump: -xsr
 
.*: file format elf64-mmix
.*
architecture: mmix, flags 0x00000011:
HAS_RELOC, HAS_SYMS
start address 0x0000000000000000
 
Sections:
Idx Name Size VMA LMA File off Algn
0 \.text 00000004 0000000000000000 0000000000000000 00000040 2\*\*2
CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
1 \.data 00000000 0000000000000000 0000000000000000 00000044 2\*\*0
CONTENTS, ALLOC, LOAD, DATA
2 \.bss 00000000 0000000000000000 0000000000000000 00000044 2\*\*0
ALLOC
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+90 l \*REG\* 0+ reghere
0+2d l \*ABS\* 0+ consthere
0+ \*UND\* 0+ extreg
 
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+ R_MMIX_LOCAL extreg
0+ R_MMIX_LOCAL reghere
0+ R_MMIX_LOCAL consthere
0+ R_MMIX_LOCAL \*ABS\*\+0x0000000000000064
0+ R_MMIX_LOCAL \*ABS\*\+0x00000000000000c8
 
 
Contents of section \.text:
0000 fd000000 .*
 
/regx-op.l
0,0 → 1,51
GAS for MMIX .*/regx-op\.s page 1
 
 
1 #.*
2 #.*
3 0000 9A7B0C43 Main PRELD X,Y,Z
4 0004 9C200C43 PREGO 32,Y,Z
5 0008 B87B2043 SYNCD X,\$32,Z
6 000c BA008543 PREST 0,\$133,Z
7 0010 B47B0C49 STCO X,Y,\$73
8 0014 BC820CE9 SYNCID 130,Y,\$233
9 0018 9A7B26D4 PRELD X,\$38,\$212
10 001c 9C01AFB5 PREGO 1,\$175,\$181
11
12 0020 B97B0CB0 SYNCD X,Y,Z0
13 0024 BB200CB0 PREST 32,Y,Z0
14 0028 B57B84B0 STCO X,\$132,Z0
15 002c BDE885B0 SYNCID 232,\$133,Z0
16 0030 9B7B0CCB PRELD X,Y,203
17 0034 9DE70CD5 PREGO 231,Y,213
18 0038 B97B26D3 SYNCD X,\$38,211
19 003c BB04AFA1 PREST 4,\$175,161
20
21 0040 B57B0C00 STCO X,Y,0
22 0044 BD170C00 SYNCID 23,Y,0
23 0048 9B020C00 PRELD 2,Y,0
24 004c 9DE88500 PREGO 232,\$133,0
25 0050 B97B0C00 SYNCD X,Y,0
26 0054 BB0D0C00 PREST 13,Y,0
27 0058 B57B2600 STCO X,\$38,0
28 005c BD04AF00 SYNCID 4,\$175,0
29
30 0060 9B7B0C00 PRELD X,Y
31 0064 9D200C00 PREGO 32,Y
32 0068 B97B2000 SYNCD X,\$32
33 006c BBE88500 PREST 232,\$133
34 X IS 123
35 Y IS \$12
36 Z IS \$67
37 Z0 IS 176
GAS for MMIX .*/regx-op\.s page 2
 
 
DEFINED SYMBOLS
.*/regx-op\.s:3 \.text:0000000000000000 Main
\*ABS\*:000000000000007b X
\*REG\*:000000000000000c Y
\*REG\*:0000000000000043 Z
\*ABS\*:00000000000000b0 Z0
 
NO UNDEFINED SYMBOLS
/greg8.s
0,0 → 1,8
t IS @
x IS 4
 
LOC x+4
y OCTA 33
GREG y
 
Main LDA $44,x+88
/basep-8.d
0,0 → 1,30
#as: -linker-allocated-gregs
#objdump: -drt
 
# Since we don't merge BPO-relocs until linking with
# -linker-allocated-gregs, we automatically correctly handle the two
# seemingly neighboring comm-symbols that don't merge well at
# assembly-time.
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ l O \.bss 0+4 comm_symbol3
0+4 l O \.bss 0+4 comm_symbol4
0+4 O \*COM\* 0+4 comm_symbol1
0+4 O \*COM\* 0+4 comm_symbol2
 
Disassembly of section \.text:
 
0+ <\.text>:
0: 232a0000 addu \$42,\$0,0
2: R_MMIX_BASE_PLUS_OFFSET comm_symbol1
4: 232b0000 addu \$43,\$0,0
6: R_MMIX_BASE_PLUS_OFFSET comm_symbol2
8: 232c0000 addu \$44,\$0,0
a: R_MMIX_BASE_PLUS_OFFSET \.bss
c: 232d0000 addu \$45,\$0,0
e: R_MMIX_BASE_PLUS_OFFSET \.bss\+0x4
/err-set.s
0,0 → 1,7
% { dg-do assemble { target mmix-*-* } }
Main SET $45,23
SET $57,$67 % Valid, Z is 0.
SET $78,X % Valid, Z is 0.
SET $7,Y % { dg-error "invalid operands.*value of 967 too large" "" }
X IS $31
Y IS 967
/regx-op.s
0,0 → 1,37
# For insns where X is a constant: 'X'-type operands.
#
Main PRELD X,Y,Z
PREGO 32,Y,Z
SYNCD X,$32,Z
PREST 0,$133,Z
STCO X,Y,$73
SYNCID 130,Y,$233
PRELD X,$38,$212
PREGO 1,$175,$181
 
SYNCD X,Y,Z0
PREST 32,Y,Z0
STCO X,$132,Z0
SYNCID 232,$133,Z0
PRELD X,Y,203
PREGO 231,Y,213
SYNCD X,$38,211
PREST 4,$175,161
 
STCO X,Y,0
SYNCID 23,Y,0
PRELD 2,Y,0
PREGO 232,$133,0
SYNCD X,Y,0
PREST 13,Y,0
STCO X,$38,0
SYNCID 4,$175,0
 
PRELD X,Y
PREGO 32,Y
SYNCD X,$32
PREST 232,$133
X IS 123
Y IS $12
Z IS $67
Z0 IS 176
/cons-2.d
0,0 → 1,14
#objdump: -str
 
.*: file format elf64-mmix
 
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ g F \.text 0+ Main
 
Contents of section \.text:
0000 61623b00 00000000 00000000 00000064 .*
0010 00000000 00000065 .*
 
/list-insns.d
0,0 → 1,279
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: 00000003 trap 0,0,3
4: 00030405 trap 3,4,5
8: 010c17f1 fcmp \$12,\$23,\$241
c: 08700129 flot \$112,ROUND_OFF,\$41
10: 0970048d flot \$112,ROUND_NEAR,141
14: 08bf00f2 flot \$191,\$242
18: 09c3002a flot \$195,42
1c: 027acb04 fun \$122,\$203,\$4
20: 03661e28 feql \$102,\$30,\$40
24: 0a66000e flotu \$102,\$14
28: 0a84020e flotu \$132,ROUND_UP,\$14
2c: 0a660368 flotu \$102,ROUND_DOWN,\$104
30: 0aac048c flotu \$172,ROUND_NEAR,\$140
34: 0a010186 flotu \$1,ROUND_OFF,\$134
38: 0470df29 fadd \$112,\$223,\$41
3c: 05700129 fix \$112,ROUND_OFF,\$41
40: 050b008d fix \$11,\$141
44: 0c700129 sflot \$112,ROUND_OFF,\$41
48: 0d70048d sflot \$112,ROUND_NEAR,141
4c: 0670df29 fsub \$112,\$223,\$41
50: 0766000e fixu \$102,\$14
54: 0784020e fixu \$132,ROUND_UP,\$14
58: 0e0b008d sflotu \$11,\$141
5c: 0f70008d sflotu \$112,141
60: 0f70048d sflotu \$112,ROUND_NEAR,141
64: 0e700129 sflotu \$112,ROUND_OFF,\$41
68: 10661e28 fmul \$102,\$30,\$40
6c: 110cdf01 fcmpe \$12,\$223,\$1
70: 197acb2c mul \$122,\$203,44
74: 18661e28 mul \$102,\$30,\$40
78: 130cdf01 feqle \$12,\$223,\$1
7c: 120cdf0b fune \$12,\$223,\$11
80: 1b7ad52c mulu \$122,\$213,44
84: 1a841e28 mulu \$132,\$30,\$40
88: 140cdf0b fdiv \$12,\$223,\$11
8c: 1584020e fsqrt \$132,ROUND_UP,\$14
90: 150b008d fsqrt \$11,\$141
94: 1d7ad52c div \$122,\$213,44
98: 1c841e28 div \$132,\$30,\$40
9c: 160cdf0b frem \$12,\$223,\$11
a0: 1784020e fint \$132,ROUND_UP,\$14
a4: 170b008d fint \$11,\$141
a8: 1e0cdf01 divu \$12,\$223,\$1
ac: 1f7acbff divu \$122,\$203,255
b0: 200cdf01 add \$12,\$223,\$1
b4: 217acbff add \$122,\$203,255
b8: 280cdf0b 2addu \$12,\$223,\$11
bc: 297acb00 2addu \$122,\$203,0
c0: 237acbff addu \$122,\$203,255
c4: 220cdf0b addu \$12,\$223,\$11
c8: 237acbff addu \$122,\$203,255
cc: 220cdf0b addu \$12,\$223,\$11
d0: 2b7acbcd 4addu \$122,\$203,205
d4: 2a0cdf6f 4addu \$12,\$223,\$111
d8: 240cdf0b sub \$12,\$223,\$11
dc: 257acbcd sub \$122,\$203,205
e0: 2c0cdf0b 8addu \$12,\$223,\$11
e4: 2d7acbcd 8addu \$122,\$203,205
e8: 2602df0b subu \$2,\$223,\$11
ec: 270c14cd subu \$12,\$20,205
f0: 2e02df0b 16addu \$2,\$223,\$11
f4: 2f0c14cd 16addu \$12,\$20,205
f8: 3002df0b cmp \$2,\$223,\$11
fc: 310c14cd cmp \$12,\$20,205
100: 3802df0b sl \$2,\$223,\$11
104: 390c14cd sl \$12,\$20,205
108: 3202df0b cmpu \$2,\$223,\$11
10c: 330c14cd cmpu \$12,\$20,205
110: 3a02df0b slu \$2,\$223,\$11
114: 3b0c14cd slu \$12,\$20,205
118: 3402170b neg \$2,23,\$11
11c: 350c00cd neg \$12,0,205
120: 35c00acd neg \$192,10,205
124: 3d0c14cd sr \$12,\$20,205
128: 3c02df0b sr \$2,\$223,\$11
12c: 3602170b negu \$2,23,\$11
130: 370c00cd negu \$12,0,205
134: 3f0c14cd sru \$12,\$20,205
138: 3e02df0b sru \$2,\$223,\$11
13c: 40020001 bn \$2,140 <Main\+0x140>
140: 4102ffff bn \$2,13c <Main\+0x13c>
144: 4902ffff bnn \$2,140 <Main\+0x140>
148: 4902ffff bnn \$2,144 <Main\+0x144>
14c: 42ff0001 bz \$255,150 <Main\+0x150>
150: 43ffffff bz \$255,14c <Main\+0x14c>
154: 4aff0001 bnz \$255,158 <Main\+0x158>
158: 4bffffff bnz \$255,154 <Main\+0x154>
15c: 44190001 bp \$25,160 <Main\+0x160>
160: 4519ffff bp \$25,15c <Main\+0x15c>
164: 4c190001 bnp \$25,168 <Main\+0x168>
168: 4d19ffff bnp \$25,164 <Main\+0x164>
16c: 46190001 bod \$25,170 <Main\+0x170>
170: 4719ffff bod \$25,16c <Main\+0x16c>
174: 4e190001 bev \$25,178 <Main\+0x178>
178: 4f19ffff bev \$25,174 <Main\+0x174>
17c: 50020001 pbn \$2,180 <Main\+0x180>
180: 5102ffff pbn \$2,17c <Main\+0x17c>
184: 58020001 pbnn \$2,188 <Main\+0x188>
188: 5902ffff pbnn \$2,184 <Main\+0x184>
18c: 520c0001 pbz \$12,190 <Main\+0x190>
190: 5316ffff pbz \$22,18c <Main\+0x18c>
194: 5a200001 pbnz \$32,198 <Main\+0x198>
198: 5b34ffff pbnz \$52,194 <Main\+0x194>
19c: 56190001 pbod \$25,1a0 <Main\+0x1a0>
1a0: 5719ffff pbod \$25,19c <Main\+0x19c>
1a4: 5e190001 pbev \$25,1a8 <Main\+0x1a8>
1a8: 5f19ffff pbev \$25,1a4 <Main\+0x1a4>
1ac: 6002df0b csn \$2,\$223,\$11
1b0: 610c14cd csn \$12,\$20,205
1b4: 6802df0b csnn \$2,\$223,\$11
1b8: 690c14cd csnn \$12,\$20,205
1bc: 6202cb0b csz \$2,\$203,\$11
1c0: 630cc8cd csz \$12,\$200,205
1c4: 6a02cb0b csnz \$2,\$203,\$11
1c8: 6b0cc8cd csnz \$12,\$200,205
1cc: 6402cb0b csp \$2,\$203,\$11
1d0: 650cc8cd csp \$12,\$200,205
1d4: 6c02cb0b csnp \$2,\$203,\$11
1d8: 6d0cc8cd csnp \$12,\$200,205
1dc: 6602cb0b csod \$2,\$203,\$11
1e0: 670cc8cd csod \$12,\$200,205
1e4: 6e02cb0b csev \$2,\$203,\$11
1e8: 6f0cc8cd csev \$12,\$200,205
1ec: 7002df0b zsn \$2,\$223,\$11
1f0: 710c14cd zsn \$12,\$20,205
1f4: 7802df0b zsnn \$2,\$223,\$11
1f8: 790c14cd zsnn \$12,\$20,205
1fc: 7202cb0b zsz \$2,\$203,\$11
200: 730cc8cd zsz \$12,\$200,205
204: 7a02cb0b zsnz \$2,\$203,\$11
208: 7b0cc8cd zsnz \$12,\$200,205
20c: 7402cb0b zsp \$2,\$203,\$11
210: 750cc8cd zsp \$12,\$200,205
214: 7c02cb0b zsnp \$2,\$203,\$11
218: 7d0cc8cd zsnp \$12,\$200,205
21c: 7602cb0b zsod \$2,\$203,\$11
220: 770cc8cd zsod \$12,\$200,205
224: 7e02cb0b zsev \$2,\$203,\$11
228: 7f0cc8cd zsev \$12,\$200,205
22c: 8002000b ldb \$2,\$0,\$11
230: 810c14cd ldb \$12,\$20,205
234: 8802000b ldt \$2,\$0,\$11
238: 890c14cd ldt \$12,\$20,205
23c: 8202000b ldbu \$2,\$0,\$11
240: 830c14cd ldbu \$12,\$20,205
244: 8a02000b ldtu \$2,\$0,\$11
248: 8b0c14cd ldtu \$12,\$20,205
24c: 8402000b ldw \$2,\$0,\$11
250: 850c14cd ldw \$12,\$20,205
254: 8c02000b ldo \$2,\$0,\$11
258: 8d0c14cd ldo \$12,\$20,205
25c: 8602000b ldwu \$2,\$0,\$11
260: 870c14cd ldwu \$12,\$20,205
264: 8e02000b ldou \$2,\$0,\$11
268: 8f0c14cd ldou \$12,\$20,205
26c: 9802000b ldvts \$2,\$0,\$11
270: 990c14cd ldvts \$12,\$20,205
274: 9202000b ldht \$2,\$0,\$11
278: 930c14cd ldht \$12,\$20,205
27c: 9b7014cd preld 112,\$20,205
280: 9a7014e1 preld 112,\$20,\$225
284: 9402000b cswap \$2,\$0,\$11
288: 950c14cd cswap \$12,\$20,205
28c: 9d7014cd prego 112,\$20,205
290: 9c7014e1 prego 112,\$20,\$225
294: 9602000b ldunc \$2,\$0,\$11
298: 970c14cd ldunc \$12,\$20,205
29c: 9e02000b go \$2,\$0,\$11
2a0: 9f0c14cd go \$12,\$20,205
2a4: a0020a97 stb \$2,\$10,\$151
2a8: a10c14cd stb \$12,\$20,205
2ac: a8200a97 stt \$32,\$10,\$151
2b0: a90c14cd stt \$12,\$20,205
2b4: a2020a97 stbu \$2,\$10,\$151
2b8: a30c14cd stbu \$12,\$20,205
2bc: aa200a97 sttu \$32,\$10,\$151
2c0: ab0c14cd sttu \$12,\$20,205
2c4: a4020a97 stw \$2,\$10,\$151
2c8: a50cdccd stw \$12,\$220,205
2cc: ac20aa97 sto \$32,\$170,\$151
2d0: adb614f5 sto \$182,\$20,245
2d4: a6020a97 stwu \$2,\$10,\$151
2d8: a70cdccd stwu \$12,\$220,205
2dc: ae20aa97 stou \$32,\$170,\$151
2e0: afb614f5 stou \$182,\$20,245
2e4: b020aa97 stsf \$32,\$170,\$151
2e8: b1b614f5 stsf \$182,\$20,245
2ec: b97014cd syncd 112,\$20,205
2f0: b87014e1 syncd 112,\$20,\$225
2f4: b220aa97 stht \$32,\$170,\$151
2f8: b3b614f5 stht \$182,\$20,245
2fc: bb7014cd prest 112,\$20,205
300: ba7014e1 prest 112,\$20,\$225
304: b420aa97 stco 32,\$170,\$151
308: b5b614f5 stco 182,\$20,245
30c: bd7014cd syncid 112,\$20,205
310: bc0014e1 syncid 0,\$20,\$225
314: b620aa97 stunc \$32,\$170,\$151
318: b7b614f5 stunc \$182,\$20,245
31c: be20aa97 pushgo \$32,\$170,\$151
320: bfb614f5 pushgo \$182,\$20,245
324: c18ec800 set \$142,\$200
328: c020aa97 or \$32,\$170,\$151
32c: c1b614f5 or \$182,\$20,245
330: c820aa97 and \$32,\$170,\$151
334: c9b614f5 and \$182,\$20,245
338: c220aa97 orn \$32,\$170,\$151
33c: c3b614f5 orn \$182,\$20,245
340: ca20aa97 andn \$32,\$170,\$151
344: cbb614f5 andn \$182,\$20,245
348: c420aa97 nor \$32,\$170,\$151
34c: c5b614f5 nor \$182,\$20,245
350: cc20aa97 nand \$32,\$170,\$151
354: cdb614f5 nand \$182,\$20,245
358: c620aa97 xor \$32,\$170,\$151
35c: c7b614f5 xor \$182,\$20,245
360: ce20aa97 nxor \$32,\$170,\$151
364: cfb614f5 nxor \$182,\$20,245
368: d020aa97 bdif \$32,\$170,\$151
36c: d1b614f5 bdif \$182,\$20,245
370: d820aa97 mux \$32,\$170,\$151
374: d9b614f5 mux \$182,\$20,245
378: d220aa97 wdif \$32,\$170,\$151
37c: d3b614f5 wdif \$182,\$20,245
380: da20aa97 sadd \$32,\$170,\$151
384: dbb600f5 sadd \$182,\$0,245
388: d420aa97 tdif \$32,\$170,\$151
38c: d5b614f5 tdif \$182,\$20,245
390: dc20aa97 mor \$32,\$170,\$151
394: ddb614f5 mor \$182,\$20,245
398: d620aa97 odif \$32,\$170,\$151
39c: d7b614f5 odif \$182,\$20,245
3a0: de201197 mxor \$32,\$17,\$151
3a4: df52b418 mxor \$82,\$180,24
3a8: e004ffff seth \$4,0xffff
3ac: e05e0000 seth \$94,0x0
3b0: e00400ff seth \$4,0xff
3b4: e05e04d2 seth \$94,0x4d2
3b8: e15e04d2 setmh \$94,0x4d2
3bc: e85e04d2 orh \$94,0x4d2
3c0: e95e04d2 ormh \$94,0x4d2
3c4: e25e04d2 setml \$94,0x4d2
3c8: e35e04d2 setl \$94,0x4d2
3cc: ea5e04d2 orml \$94,0x4d2
3d0: eb5e04d2 orl \$94,0x4d2
3d4: e45e04d2 inch \$94,0x4d2
3d8: e55e04d2 incmh \$94,0x4d2
3dc: ec5e04d2 andnh \$94,0x4d2
3e0: ed5e04d2 andnmh \$94,0x4d2
3e4: e65e04d2 incml \$94,0x4d2
3e8: e75e04d2 incl \$94,0x4d2
3ec: ee5e04d2 andnml \$94,0x4d2
3f0: ef5e04d2 andnl \$94,0x4d2
3f4: f1ffffff jmp 3f0 <Main\+0x3f0>
3f8: f0000001 jmp 3fc <Main\+0x3fc>
3fc: f82afffe pop 42,65534
400: f90000ff resume 255
404: f9000000 resume 0
408: f9000001 resume 1
40c: f2190001 pushj \$25,410 <Main\+0x410>
410: f319ffff pushj \$25,40c <Main\+0x40c>
414: fa040000 save \$4,0
418: fb0000ea unsave 0,\$234
41c: f4190001 geta \$25,420 <Main\+0x420>
420: f519ffff geta \$25,41c <Main\+0x41c>
424: fc7a1201 sync 8000001
428: fd010203 swym 1,2,3
42c: fd000000 swym 0,0,0
430: f7040022 put rJ,34
434: f6040086 put rJ,\$134
438: feea0004 get \$234,rJ
43c: ff000000 trip 0,0,0
440: ff050607 trip 5,6,7
/reloclab-rs.d
0,0 → 1,42
#objdump: -dr
#as: -linkrelax -x
#source: reloclab.s
 
.*: file format elf64-mmix
Disassembly of section \.text:
0000000000000000 <Main>:
0: f0000000 jmp 0 <Main>
0: R_MMIX_JMP foo\+0x8
4: fd000000 swym 0,0,0
8: fd000000 swym 0,0,0
c: fd000000 swym 0,0,0
10: fd000000 swym 0,0,0
14: f0000004 jmp 24 <here>
14: R_MMIX_ADDR27 \.text\+0x24
18: f4080003 geta \$8,24 <here>
18: R_MMIX_ADDR19 \.text\+0x24
1c: 46630002 bod \$99,24 <here>
1c: R_MMIX_ADDR19 \.text\+0x24
20: fd000000 swym 0,0,0
0000000000000024 <here>:
24: 42de0000 bz \$222,24 <here>
24: R_MMIX_CBRANCH bar\+0x10
28: fd000000 swym 0,0,0
2c: fd000000 swym 0,0,0
30: fd000000 swym 0,0,0
34: fd000000 swym 0,0,0
38: fd000000 swym 0,0,0
000000000000003c <there>:
3c: f4040000 geta \$4,3c <there>
3c: R_MMIX_GETA baz
40: fd000000 swym 0,0,0
44: fd000000 swym 0,0,0
48: fd000000 swym 0,0,0
4c: f2070000 pushj \$7,4c <there\+0x10>
4c: R_MMIX_PUSHJ_STUBBABLE foobar
50: f1fffffb jmp 3c <there>
50: R_MMIX_ADDR27 \.text\+0x3c
54: f558fffa geta \$88,3c <there>
54: R_MMIX_ADDR19 \.text\+0x3c
58: 476ffff9 bod \$111,3c <there>
58: R_MMIX_ADDR19 \.text\+0x3c
/local-1.s
0,0 → 1,12
LOCAL extreg
LOCAL reghere
LOCAL consthere
LOCAL 100
LOCAL $200
 
reghere IS $144
consthere IS 45
 
# Restrictions on the implementation means we have to have the LOCAL in
# code or data.
SWYM 0,0,0
/weak1-s.d
0,0 → 1,19
#as: -x
#source: weak1.s
#objdump: -str
 
# Like weak1, but with PUSHJ stubs.
 
.*: file format elf64-mmix
SYMBOL TABLE:
0+ l d \.text 0+ (|\.text)
0+ l d \.data 0+ (|\.data)
0+ l d \.bss 0+ (|\.bss)
0+ w \.text 0+ foo
0+4 g \.text 0+ main
RELOCATION RECORDS FOR \[\.text\]:
OFFSET TYPE VALUE
0+8 R_MMIX_64 foo
0+4 R_MMIX_PUSHJ_STUBBABLE foo
Contents of section \.text:
0000 f8010000 f20f0000 00000000 00000000 .*
/reloc16-r.d
0,0 → 1,14
# objdump: -dr
# as: -linkrelax
# source: reloc16.s
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: e3040000 setl \$4,0x0
2: R_MMIX_16 foo
4: f82d0000 pop 45,0
6: R_MMIX_16 bar\+0x2a
8: fd2a0000 swym 42,0,0
a: R_MMIX_16 baz\+0xfffffffffffff6d7
/list-insns.l
0,0 → 1,301
GAS for MMIX .*/list-insns.s page 1
 
 
1 #.*
2 #.*
3 #.*
4 #.*
5 #.*
6 #.*
7 0000 00000003 Main TETRA 3
8 0004 00030405 TRAP 3,4,5
9 0008 010C17F1 FCMP \$12,\$23,\$241
10 000c 08700129 FLOT \$112,ROUND_OFF,\$41
11 0010 0970048D FLOT \$112,ROUND_NEAR,141
12 0014 08BF00F2 FLOT \$191,\$242
13 0018 09C3002A FLOT \$195,42
14 001c 027ACB04 FUN \$122,\$203,\$4
15 0020 03661E28 FEQL \$102,\$30,\$40
16 0024 0A66000E FLOTU \$102,\$14
17 0028 0A84020E FLOTU \$132,ROUND_UP,\$14
18 002c 0A660368 FLOTU \$102,ROUND_DOWN,\$104
19 0030 0AAC048C FLOTU \$172,ROUND_NEAR,\$140
20 0034 0A010186 FLOTU \$1,ROUND_OFF,\$134
21 0038 0470DF29 FADD \$112,\$223,\$41
22 003c 05700129 FIX \$112,ROUND_OFF,\$41
23 0040 050B008D FIX \$11,\$141
24 0044 0C700129 SFLOT \$112,ROUND_OFF,\$41
25 0048 0D70048D SFLOT \$112,ROUND_NEAR,141
26 004c 0670DF29 FSUB \$112,\$223,\$41
27 0050 0766000E FIXU \$102,\$14
28 0054 0784020E FIXU \$132,ROUND_UP,\$14
29 0058 0E0B008D SFLOTU \$11,\$141
30 005c 0F70008D SFLOTU \$112,141
31 0060 0F70048D SFLOTU \$112,ROUND_NEAR,141
32 0064 0E700129 SFLOTU \$112,ROUND_OFF,\$41
33 0068 10661E28 FMUL \$102,\$30,\$40
34 006c 110CDF01 FCMPE \$12,\$223,\$1
35 0070 197ACB2C MUL \$122,\$203,44
36 0074 18661E28 MUL \$102,\$30,\$40
37 0078 130CDF01 FEQLE \$12,\$223,\$1
38 007c 120CDF0B FUNE \$12,\$223,\$11
39 0080 1B7AD52C MULU \$122,\$213,44
40 0084 1A841E28 MULU \$132,\$30,\$40
41 0088 140CDF0B FDIV \$12,\$223,\$11
42 008c 1584020E FSQRT \$132,ROUND_UP,\$14
43 0090 150B008D FSQRT \$11,\$141
44 0094 1D7AD52C DIV \$122,\$213,44
45 0098 1C841E28 DIV \$132,\$30,\$40
46 009c 160CDF0B FREM \$12,\$223,\$11
47 00a0 1784020E FINT \$132,ROUND_UP,\$14
48 00a4 170B008D FINT \$11,\$141
49 00a8 1E0CDF01 DIVU \$12,\$223,\$1
50 00ac 1F7ACBFF DIVU \$122,\$203,255
51 00b0 200CDF01 ADD \$12,\$223,\$1
52 00b4 217ACBFF ADD \$122,\$203,255
53 00b8 280CDF0B 2ADDU \$12,\$223,\$11
54 00bc 297ACB00 2ADDU \$122,\$203,0
55 00c0 237ACBFF ADDU \$122,\$203,255
56 00c4 220CDF0B ADDU \$12,\$223,\$11
57 00c8 237ACBFF LDA \$122,\$203,255
GAS for MMIX .*/list-insns.s page 2
 
 
58 00cc 220CDF0B LDA \$12,\$223,\$11
59 00d0 2B7ACBCD 4ADDU \$122,\$203,205
60 00d4 2A0CDF6F 4ADDU \$12,\$223,\$111
61 00d8 240CDF0B SUB \$12,\$223,\$11
62 00dc 257ACBCD SUB \$122,\$203,205
63 00e0 2C0CDF0B 8ADDU \$12,\$223,\$11
64 00e4 2D7ACBCD 8ADDU \$122,\$203,205
65 00e8 2602DF0B SUBU \$2,\$223,\$11
66 00ec 270C14CD SUBU \$12,\$20,205
67 00f0 2E02DF0B 16ADDU \$2,\$223,\$11
68 00f4 2F0C14CD 16ADDU \$12,\$20,205
69 00f8 3002DF0B CMP \$2,\$223,\$11
70 00fc 310C14CD CMP \$12,\$20,205
71 0100 3802DF0B SL \$2,\$223,\$11
72 0104 390C14CD SL \$12,\$20,205
73 0108 3202DF0B CMPU \$2,\$223,\$11
74 010c 330C14CD CMPU \$12,\$20,205
75 0110 3A02DF0B SLU \$2,\$223,\$11
76 0114 3B0C14CD SLU \$12,\$20,205
77 0118 3402170B NEG \$2,23,\$11
78 011c 350C00CD NEG \$12,0,205
79 0120 35C00ACD NEG \$192,10,205
80 0124 3D0C14CD SR \$12,\$20,205
81 0128 3C02DF0B SR \$2,\$223,\$11
82 012c 3602170B NEGU \$2,23,\$11
83 0130 370C00CD NEGU \$12,0,205
84 0134 3F0C14CD SRU \$12,\$20,205
85 0138 3E02DF0B SRU \$2,\$223,\$11
86 013c 40020001 1H BN \$2,2F
87 0140 4102FFFF 2H BN \$2,1B
88 0144 4902FFFF 1H BNN \$2,2B
89 0148 4902FFFF 2H BNN \$2,1B
90 014c 42FF0001 1H BZ \$255,2F
91 0150 43FFFFFF 2H BZ \$255,1B
92 0154 4AFF0001 1H BNZ \$255,2F
93 0158 4BFFFFFF 2H BNZ \$255,1B
94 015c 44190001 1H BP \$25,2F
95 0160 4519FFFF 2H BP \$25,1B
96 0164 4C190001 1H BNP \$25,2F
97 0168 4D19FFFF 2H BNP \$25,1B
98 016c 46190001 1H BOD \$25,2F
99 0170 4719FFFF 2H BOD \$25,1B
100 0174 4E190001 1H BEV \$25,2F
101 0178 4F19FFFF 2H BEV \$25,1B
102 017c 50020001 1H PBN \$2,2F
103 0180 5102FFFF 2H PBN \$2,1B
104 0184 58020001 1H PBNN \$2,2F
105 0188 5902FFFF 2H PBNN \$2,1B
106 018c 520C0001 1H PBZ \$12,2F
107 0190 5316FFFF 2H PBZ \$22,1B
108 0194 5A200001 1H PBNZ \$32,2F
109 0198 5B34FFFF 2H PBNZ \$52,1B
110 019c 56190001 1H PBOD \$25,2F
111 01a0 5719FFFF 2H PBOD \$25,1B
112 01a4 5E190001 1H PBEV \$25,2F
113 01a8 5F19FFFF 2H PBEV \$25,1B
114 01ac 6002DF0B CSN \$2,\$223,\$11
GAS for MMIX .*/list-insns.s page 3
 
 
115 01b0 610C14CD CSN \$12,\$20,205
116 01b4 6802DF0B CSNN \$2,\$223,\$11
117 01b8 690C14CD CSNN \$12,\$20,205
118 01bc 6202CB0B CSZ \$2,\$203,\$11
119 01c0 630CC8CD CSZ \$12,\$200,205
120 01c4 6A02CB0B CSNZ \$2,\$203,\$11
121 01c8 6B0CC8CD CSNZ \$12,\$200,205
122 01cc 6402CB0B CSP \$2,\$203,\$11
123 01d0 650CC8CD CSP \$12,\$200,205
124 01d4 6C02CB0B CSNP \$2,\$203,\$11
125 01d8 6D0CC8CD CSNP \$12,\$200,205
126 01dc 6602CB0B CSOD \$2,\$203,\$11
127 01e0 670CC8CD CSOD \$12,\$200,205
128 01e4 6E02CB0B CSEV \$2,\$203,\$11
129 01e8 6F0CC8CD CSEV \$12,\$200,205
130 01ec 7002DF0B ZSN \$2,\$223,\$11
131 01f0 710C14CD ZSN \$12,\$20,205
132 01f4 7802DF0B ZSNN \$2,\$223,\$11
133 01f8 790C14CD ZSNN \$12,\$20,205
134 01fc 7202CB0B ZSZ \$2,\$203,\$11
135 0200 730CC8CD ZSZ \$12,\$200,205
136 0204 7A02CB0B ZSNZ \$2,\$203,\$11
137 0208 7B0CC8CD ZSNZ \$12,\$200,205
138 020c 7402CB0B ZSP \$2,\$203,\$11
139 0210 750CC8CD ZSP \$12,\$200,205
140 0214 7C02CB0B ZSNP \$2,\$203,\$11
141 0218 7D0CC8CD ZSNP \$12,\$200,205
142 021c 7602CB0B ZSOD \$2,\$203,\$11
143 0220 770CC8CD ZSOD \$12,\$200,205
144 0224 7E02CB0B ZSEV \$2,\$203,\$11
145 0228 7F0CC8CD ZSEV \$12,\$200,205
146 022c 8002000B LDB \$2,\$0,\$11
147 0230 810C14CD LDB \$12,\$20,205
148 0234 8802000B LDT \$2,\$0,\$11
149 0238 890C14CD LDT \$12,\$20,205
150 023c 8202000B LDBU \$2,\$0,\$11
151 0240 830C14CD LDBU \$12,\$20,205
152 0244 8A02000B LDTU \$2,\$0,\$11
153 0248 8B0C14CD LDTU \$12,\$20,205
154 024c 8402000B LDW \$2,\$0,\$11
155 0250 850C14CD LDW \$12,\$20,205
156 0254 8C02000B LDO \$2,\$0,\$11
157 0258 8D0C14CD LDO \$12,\$20,205
158 025c 8602000B LDWU \$2,\$0,\$11
159 0260 870C14CD LDWU \$12,\$20,205
160 0264 8E02000B LDOU \$2,\$0,\$11
161 0268 8F0C14CD LDOU \$12,\$20,205
162 026c 9802000B LDVTS \$2,\$0,\$11
163 0270 990C14CD LDVTS \$12,\$20,205
164 0274 9202000B LDHT \$2,\$0,\$11
165 0278 930C14CD LDHT \$12,\$20,205
166 027c 9B7014CD PRELD 112,\$20,205
167 0280 9A7014E1 PRELD 112,\$20,\$225
168 0284 9402000B CSWAP \$2,\$0,\$11
169 0288 950C14CD CSWAP \$12,\$20,205
170 028c 9D7014CD PREGO 112,\$20,205
171 0290 9C7014E1 PREGO 112,\$20,\$225
GAS for MMIX .*/list-insns.s page 4
 
 
172 0294 9602000B LDUNC \$2,\$0,\$11
173 0298 970C14CD LDUNC \$12,\$20,205
174 029c 9E02000B GO \$2,\$0,\$11
175 02a0 9F0C14CD GO \$12,\$20,205
176 02a4 A0020A97 STB \$2,\$10,\$151
177 02a8 A10C14CD STB \$12,\$20,205
178 02ac A8200A97 STT \$32,\$10,\$151
179 02b0 A90C14CD STT \$12,\$20,205
180 02b4 A2020A97 STBU \$2,\$10,\$151
181 02b8 A30C14CD STBU \$12,\$20,205
182 02bc AA200A97 STTU \$32,\$10,\$151
183 02c0 AB0C14CD STTU \$12,\$20,205
184 02c4 A4020A97 STW \$2,\$10,\$151
185 02c8 A50CDCCD STW \$12,\$220,205
186 02cc AC20AA97 STO \$32,\$170,\$151
187 02d0 ADB614F5 STO \$182,\$20,245
188 02d4 A6020A97 STWU \$2,\$10,\$151
189 02d8 A70CDCCD STWU \$12,\$220,205
190 02dc AE20AA97 STOU \$32,\$170,\$151
191 02e0 AFB614F5 STOU \$182,\$20,245
192 02e4 B020AA97 STSF \$32,\$170,\$151
193 02e8 B1B614F5 STSF \$182,\$20,245
194 02ec B97014CD SYNCD 112,\$20,205
195 02f0 B87014E1 SYNCD 112,\$20,\$225
196 02f4 B220AA97 STHT \$32,\$170,\$151
197 02f8 B3B614F5 STHT \$182,\$20,245
198 02fc BB7014CD PREST 112,\$20,205
199 0300 BA7014E1 PREST 112,\$20,\$225
200 0304 B420AA97 STCO 32,\$170,\$151
201 0308 B5B614F5 STCO 182,\$20,245
202 030c BD7014CD SYNCID 112,\$20,205
203 0310 BC0014E1 SYNCID 0,\$20,\$225
204 0314 B620AA97 STUNC \$32,\$170,\$151
205 0318 B7B614F5 STUNC \$182,\$20,245
206 031c BE20AA97 PUSHGO \$32,\$170,\$151
207 0320 BFB614F5 PUSHGO \$182,\$20,245
208 0324 C18EC800 SET \$142,\$200
209 0328 C020AA97 OR \$32,\$170,\$151
210 032c C1B614F5 OR \$182,\$20,245
211 0330 C820AA97 AND \$32,\$170,\$151
212 0334 C9B614F5 AND \$182,\$20,245
213 0338 C220AA97 ORN \$32,\$170,\$151
214 033c C3B614F5 ORN \$182,\$20,245
215 0340 CA20AA97 ANDN \$32,\$170,\$151
216 0344 CBB614F5 ANDN \$182,\$20,245
217 0348 C420AA97 NOR \$32,\$170,\$151
218 034c C5B614F5 NOR \$182,\$20,245
219 0350 CC20AA97 NAND \$32,\$170,\$151
220 0354 CDB614F5 NAND \$182,\$20,245
221 0358 C620AA97 XOR \$32,\$170,\$151
222 035c C7B614F5 XOR \$182,\$20,245
223 0360 CE20AA97 NXOR \$32,\$170,\$151
224 0364 CFB614F5 NXOR \$182,\$20,245
225 0368 D020AA97 BDIF \$32,\$170,\$151
226 036c D1B614F5 BDIF \$182,\$20,245
227 0370 D820AA97 MUX \$32,\$170,\$151
228 0374 D9B614F5 MUX \$182,\$20,245
GAS for MMIX .*/list-insns.s page 5
 
 
229 0378 D220AA97 WDIF \$32,\$170,\$151
230 037c D3B614F5 WDIF \$182,\$20,245
231 0380 DA20AA97 SADD \$32,\$170,\$151
232 0384 DBB600F5 SADD \$182,\$0,245
233 0388 D420AA97 TDIF \$32,\$170,\$151
234 038c D5B614F5 TDIF \$182,\$20,245
235 0390 DC20AA97 MOR \$32,\$170,\$151
236 0394 DDB614F5 MOR \$182,\$20,245
237 0398 D620AA97 ODIF \$32,\$170,\$151
238 039c D7B614F5 ODIF \$182,\$20,245
239 03a0 DE201197 MXOR \$32,\$17,\$151
240 03a4 DF52B418 MXOR \$82,\$180,24
241 03a8 E004FFFF SETH \$4,65535
242 03ac E05E0000 SETH \$94,0
243 03b0 E00400FF SETH \$4,255
244 03b4 E05E04D2 SETH \$94,1234
245 03b8 E15E04D2 SETMH \$94,1234
246 03bc E85E04D2 ORH \$94,1234
247 03c0 E95E04D2 ORMH \$94,1234
248 03c4 E25E04D2 SETML \$94,1234
249 03c8 E35E04D2 SETL \$94,1234
250 03cc EA5E04D2 ORML \$94,1234
251 03d0 EB5E04D2 ORL \$94,1234
252 03d4 E45E04D2 INCH \$94,1234
253 03d8 E55E04D2 INCMH \$94,1234
254 03dc EC5E04D2 ANDNH \$94,1234
255 03e0 ED5E04D2 ANDNMH \$94,1234
256 03e4 E65E04D2 INCML \$94,1234
257 03e8 E75E04D2 INCL \$94,1234
258 03ec EE5E04D2 ANDNML \$94,1234
259 03f0 EF5E04D2 0H ANDNL \$94,1234
260 03f4 F1FFFFFF JMP 0B
261 03f8 F0000001 JMP 0F
262 03fc F82AFFFE 0H POP 42,65534
263 0400 F90000FF RESUME 255
264 0404 F9000000 RESUME 0
265 0408 F9000001 RESUME 1
266 040c F2190001 1H PUSHJ \$25,2F
267 0410 F319FFFF 2H PUSHJ \$25,1B
268 0414 FA040000 SAVE \$4,0
269 0418 FB0000EA UNSAVE 0,\$234
270 041c F4190001 1H GETA \$25,2F
271 0420 F519FFFF 2H GETA \$25,1B
272 0424 FC7A1201 SYNC 8000001
273 0428 FD010203 SWYM 1,2,3
274 042c FD000000 SWYM 0,0,0
275 0430 F7040022 PUT rJ,34
276 0434 F6040086 PUT rJ,\$134
277 0438 FEEA0004 GET \$234,rJ
278 043c FF000000 TRIP 0,0,0
279 0440 FF050607 TRIP 5,6,7
GAS for MMIX .*/list-insns.s page 6
 
 
DEFINED SYMBOLS
.*/list-insns.s:7 .text:0000000000000000 Main
 
NO UNDEFINED SYMBOLS
/err-insn.s
0,0 → 1,5
% { dg-do assemble { target mmix-*-* } }
Main SWYM 0,0,0
FLOT $112,$223,$41 % { dg-error "invalid operands" "Y field of FLOT 1" }
FLOT $112,$223,141 % { dg-error "invalid operands" "Y field of FLOT 2" }
LDA $122,$203,256 % { dg-error "invalid operands" "Z field too large" }
/basep-8.s
0,0 → 1,9
# Test that we handle COMM-type symbols with base-plus-offset relocs.
.comm comm_symbol1,4,4
.lcomm comm_symbol3,4
LDA $42,comm_symbol1
LDA $43,comm_symbol2
LDA $44,comm_symbol3
LDA $45,comm_symbol4
.comm comm_symbol2,4,4
.lcomm comm_symbol4,4
/loc-5.d
0,0 → 1,45
#readelf: -Ssrx1 -x2
There are 7 section headers, starting at offset 0x98:
 
Section Headers:
\[Nr\] Name Type Address Offset
Size EntSize Flags Link Info Align
\[ 0\] NULL 0+ 0+
0+ 0+ 0 0 0
\[ 1\] \.text PROGBITS 0+ 0+40
0+8 0+ AX 0 0 4
\[ 2\] \.data PROGBITS 0+ 0+48
0+24 0+ WA 0 0 4
\[ 3\] \.bss NOBITS 0+ 0+6c
0+ 0+ WA 0 0 1
\[ 4\] \.shstrtab STRTAB 0+ 0+6c
0+2c 0+ 0 0 1
\[ 5\] \.symtab SYMTAB 0+ 0+258
0+c0 0+18 6 6 8
\[ 6\] \.strtab STRTAB 0+ 0+318
0+29 0+ 0 0 1
Key to Flags:
W \(write\), A \(alloc\), X \(execute\), M \(merge\), S \(strings\)
I \(info\), L \(link order\), G \(group\), x \(unknown\)
O \(extra OS processing required\) o \(OS specific\), p \(processor specific\)
 
There are no relocations in this file\.
 
Symbol table '\.symtab' contains 8 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 0+ 0 NOTYPE LOCAL DEFAULT UND
1: 0+ 0 SECTION LOCAL DEFAULT 1
2: 0+ 0 SECTION LOCAL DEFAULT 2
3: 0+ 0 SECTION LOCAL DEFAULT 3
4: 0+ 0 NOTYPE LOCAL DEFAULT 1 t
5: 2000000000000000 0 NOTYPE LOCAL DEFAULT ABS Data_Segment
6: 0+4 0 FUNC GLOBAL DEFAULT 1 Main
7: 2000000000000000 0 NOTYPE GLOBAL DEFAULT ABS __\.MMIX\.start\.\.data
 
Hex dump of section '\.text':
0x0+ fd001807 fd090101 .*
 
Hex dump of section '\.data':
0x0+ 00000100 00000000 00000000 00000000 .*
0x00000010 00000000 00000000 00000000 00000000 .*
0x00000020 00000038 .*
/cons-2.s
0,0 → 1,4
# Character constants. We actually see e.g. 'b' as 98, so ww just check
# that we get the right output with this test.
Main BYTE 'a','b',';'
OCTA 'd','e'
/list-insns.s
0,0 → 1,279
#
# Somewhat complete instruction set and operand type check. No
# relocations or deferred register definitions here.
#
#
#
Main TETRA 3
TRAP 3,4,5
FCMP $12,$23,$241
FLOT $112,ROUND_OFF,$41
FLOT $112,ROUND_NEAR,141
FLOT $191,$242
FLOT $195,42
FUN $122,$203,$4
FEQL $102,$30,$40
FLOTU $102,$14
FLOTU $132,ROUND_UP,$14
FLOTU $102,ROUND_DOWN,$104
FLOTU $172,ROUND_NEAR,$140
FLOTU $1,ROUND_OFF,$134
FADD $112,$223,$41
FIX $112,ROUND_OFF,$41
FIX $11,$141
SFLOT $112,ROUND_OFF,$41
SFLOT $112,ROUND_NEAR,141
FSUB $112,$223,$41
FIXU $102,$14
FIXU $132,ROUND_UP,$14
SFLOTU $11,$141
SFLOTU $112,141
SFLOTU $112,ROUND_NEAR,141
SFLOTU $112,ROUND_OFF,$41
FMUL $102,$30,$40
FCMPE $12,$223,$1
MUL $122,$203,44
MUL $102,$30,$40
FEQLE $12,$223,$1
FUNE $12,$223,$11
MULU $122,$213,44
MULU $132,$30,$40
FDIV $12,$223,$11
FSQRT $132,ROUND_UP,$14
FSQRT $11,$141
DIV $122,$213,44
DIV $132,$30,$40
FREM $12,$223,$11
FINT $132,ROUND_UP,$14
FINT $11,$141
DIVU $12,$223,$1
DIVU $122,$203,255
ADD $12,$223,$1
ADD $122,$203,255
2ADDU $12,$223,$11
2ADDU $122,$203,0
ADDU $122,$203,255
ADDU $12,$223,$11
LDA $122,$203,255
LDA $12,$223,$11
4ADDU $122,$203,205
4ADDU $12,$223,$111
SUB $12,$223,$11
SUB $122,$203,205
8ADDU $12,$223,$11
8ADDU $122,$203,205
SUBU $2,$223,$11
SUBU $12,$20,205
16ADDU $2,$223,$11
16ADDU $12,$20,205
CMP $2,$223,$11
CMP $12,$20,205
SL $2,$223,$11
SL $12,$20,205
CMPU $2,$223,$11
CMPU $12,$20,205
SLU $2,$223,$11
SLU $12,$20,205
NEG $2,23,$11
NEG $12,0,205
NEG $192,10,205
SR $12,$20,205
SR $2,$223,$11
NEGU $2,23,$11
NEGU $12,0,205
SRU $12,$20,205
SRU $2,$223,$11
1H BN $2,2F
2H BN $2,1B
1H BNN $2,2B
2H BNN $2,1B
1H BZ $255,2F
2H BZ $255,1B
1H BNZ $255,2F
2H BNZ $255,1B
1H BP $25,2F
2H BP $25,1B
1H BNP $25,2F
2H BNP $25,1B
1H BOD $25,2F
2H BOD $25,1B
1H BEV $25,2F
2H BEV $25,1B
1H PBN $2,2F
2H PBN $2,1B
1H PBNN $2,2F
2H PBNN $2,1B
1H PBZ $12,2F
2H PBZ $22,1B
1H PBNZ $32,2F
2H PBNZ $52,1B
1H PBOD $25,2F
2H PBOD $25,1B
1H PBEV $25,2F
2H PBEV $25,1B
CSN $2,$223,$11
CSN $12,$20,205
CSNN $2,$223,$11
CSNN $12,$20,205
CSZ $2,$203,$11
CSZ $12,$200,205
CSNZ $2,$203,$11
CSNZ $12,$200,205
CSP $2,$203,$11
CSP $12,$200,205
CSNP $2,$203,$11
CSNP $12,$200,205
CSOD $2,$203,$11
CSOD $12,$200,205
CSEV $2,$203,$11
CSEV $12,$200,205
ZSN $2,$223,$11
ZSN $12,$20,205
ZSNN $2,$223,$11
ZSNN $12,$20,205
ZSZ $2,$203,$11
ZSZ $12,$200,205
ZSNZ $2,$203,$11
ZSNZ $12,$200,205
ZSP $2,$203,$11
ZSP $12,$200,205
ZSNP $2,$203,$11
ZSNP $12,$200,205
ZSOD $2,$203,$11
ZSOD $12,$200,205
ZSEV $2,$203,$11
ZSEV $12,$200,205
LDB $2,$0,$11
LDB $12,$20,205
LDT $2,$0,$11
LDT $12,$20,205
LDBU $2,$0,$11
LDBU $12,$20,205
LDTU $2,$0,$11
LDTU $12,$20,205
LDW $2,$0,$11
LDW $12,$20,205
LDO $2,$0,$11
LDO $12,$20,205
LDWU $2,$0,$11
LDWU $12,$20,205
LDOU $2,$0,$11
LDOU $12,$20,205
LDVTS $2,$0,$11
LDVTS $12,$20,205
LDHT $2,$0,$11
LDHT $12,$20,205
PRELD 112,$20,205
PRELD 112,$20,$225
CSWAP $2,$0,$11
CSWAP $12,$20,205
PREGO 112,$20,205
PREGO 112,$20,$225
LDUNC $2,$0,$11
LDUNC $12,$20,205
GO $2,$0,$11
GO $12,$20,205
STB $2,$10,$151
STB $12,$20,205
STT $32,$10,$151
STT $12,$20,205
STBU $2,$10,$151
STBU $12,$20,205
STTU $32,$10,$151
STTU $12,$20,205
STW $2,$10,$151
STW $12,$220,205
STO $32,$170,$151
STO $182,$20,245
STWU $2,$10,$151
STWU $12,$220,205
STOU $32,$170,$151
STOU $182,$20,245
STSF $32,$170,$151
STSF $182,$20,245
SYNCD 112,$20,205
SYNCD 112,$20,$225
STHT $32,$170,$151
STHT $182,$20,245
PREST 112,$20,205
PREST 112,$20,$225
STCO 32,$170,$151
STCO 182,$20,245
SYNCID 112,$20,205
SYNCID 0,$20,$225
STUNC $32,$170,$151
STUNC $182,$20,245
PUSHGO $32,$170,$151
PUSHGO $182,$20,245
SET $142,$200
OR $32,$170,$151
OR $182,$20,245
AND $32,$170,$151
AND $182,$20,245
ORN $32,$170,$151
ORN $182,$20,245
ANDN $32,$170,$151
ANDN $182,$20,245
NOR $32,$170,$151
NOR $182,$20,245
NAND $32,$170,$151
NAND $182,$20,245
XOR $32,$170,$151
XOR $182,$20,245
NXOR $32,$170,$151
NXOR $182,$20,245
BDIF $32,$170,$151
BDIF $182,$20,245
MUX $32,$170,$151
MUX $182,$20,245
WDIF $32,$170,$151
WDIF $182,$20,245
SADD $32,$170,$151
SADD $182,$0,245
TDIF $32,$170,$151
TDIF $182,$20,245
MOR $32,$170,$151
MOR $182,$20,245
ODIF $32,$170,$151
ODIF $182,$20,245
MXOR $32,$17,$151
MXOR $82,$180,24
SETH $4,65535
SETH $94,0
SETH $4,255
SETH $94,1234
SETMH $94,1234
ORH $94,1234
ORMH $94,1234
SETML $94,1234
SETL $94,1234
ORML $94,1234
ORL $94,1234
INCH $94,1234
INCMH $94,1234
ANDNH $94,1234
ANDNMH $94,1234
INCML $94,1234
INCL $94,1234
ANDNML $94,1234
0H ANDNL $94,1234
JMP 0B
JMP 0F
0H POP 42,65534
RESUME 255
RESUME 0
RESUME 1
1H PUSHJ $25,2F
2H PUSHJ $25,1B
SAVE $4,0
UNSAVE 0,$234
1H GETA $25,2F
2H GETA $25,1B
SYNC 8000001
SWYM 1,2,3
SWYM 0,0,0
PUT rJ,34
PUT rJ,$134
GET $234,rJ
TRIP 0,0,0
TRIP 5,6,7
/err-fb-1.s
0,0 → 1,7
% { dg-do assemble { target mmix-*-* } }
% { dg-error "may not appear alone on a line" "" { target mmix-*-* } 5 }
% { dg-error "may not appear alone on a line" "" { target mmix-*-* } 6 }
0H .local 32 % { dg-error "do not mix with dot-pseudos" "" }
1H
2H
3H .set s,32 % { dg-error "do not mix with dot-pseudos" "" }
/set.d
0,0 → 1,12
# objdump: -dr
.*: file format elf64-mmix
 
Disassembly of section \.text:
 
0000000000000000 <Main>:
0: e32d0463 setl \$45,0x463
4: c1394300 set \$57,\$67
8: c14e1f00 set \$78,\$31
c: e3750463 setl \$117,0x463
10: c1754300 set \$117,\$67
14: c1751f00 set \$117,\$31

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