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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

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  • This comparison shows the changes necessary to convert path 
    /openrisc/trunk/gnu-src/binutils-2.18.50/ld/testsuite/ld-h8300
    from Rev 132 to Rev 156
    ↔ Reverse comparison
  •

Rev 132 → Rev 156

/relax-4.s
0,0 → 1,72
; Relaxation is possible for following bit manipulation instructions
; BAND, BCLR, BIAND, BILD, BIOR, BIST, BIXOR, BLD, BNOT, BOR, BSET, BST, BTST, BXOR
.h8300s
.globl _start
_start:
# s3-s6 aren't valid 16-bit addresses.
mov.b #0x3,r0l
mov.b #0x5,r2l
;
; Relaxation of aa:16
;
bset r0l,@s10:16
bset r2l,@s9:16
btst r2l,@s10:16
btst r0l,@s9:16
bset #5,@s1:16
bset #5,@s2:16
bset #5,@s7:16
bset #5,@s8:16
bset #5,@s9:16
bset #5,@s10:16
band #5,@s1:16
band #5,@s2:16
band #5,@s7:16
band #5,@s8:16
band #5,@s9:16
band #5,@s10:16
;
; Relaxation of aa:32
;
bset r2l,@s10:32
bset r0l,@s9:32
btst r0l,@s10:32
btst r2l,@s9:32
bset #6,@s1:32
bset #6,@s2:32
bset #6,@s3:32
bset #6,@s4:32
bset #6,@s5:32
bset #6,@s6:32
bset #6,@s7:32
bset #6,@s8:32
bset #6,@s9:32
bset #6,@s10:32
band #6,@s1:32
band #6,@s2:32
band #6,@s3:32
band #6,@s4:32
band #6,@s5:32
band #6,@s6:32
band #6,@s7:32
band #6,@s8:32
band #6,@s9:32
band #6,@s10:32
.equ s1,0
.equ s2,0x7fff
.equ s3,0x8000
.equ s4,0xff00
.equ s5,0xffff00
.equ s6,0xffff7fff
.equ s7,0xffff8000
.equ s8,0xfffffeff
.equ s9,0xffffff00
.equ s10,0xffffffff
.end
/relax-6.s
0,0 → 1,5
.h8300s
.global _start
_start:
mov.b r2l,@0xFFFFFFBD:32
rts
/gcsection.s
0,0 → 1,43
.h8300h
.section .text.functionWeUse,"ax",@progbits
.align 1
.global _functionWeUse
_functionWeUse:
mov.l er6,@-er7
mov.l er7,er6
subs #4,er7
mov.w r0,@(-2,er6)
mov.w @(-2,er6),r2
mov.w r2,r0
adds #4,er7
mov.l @er7+,er6
rts
.size _functionWeUse, .-_functionWeUse
.section .text.functionWeDontUse,"ax",@progbits
.align 1
.global _functionWeDontUse
_functionWeDontUse:
mov.l er6,@-er7
mov.l er7,er6
subs #4,er7
mov.w r0,@(-2,er6)
mov.w @(-2,er6),r2
mov.w r2,r0
adds #4,er7
mov.l @er7+,er6
rts
.size _functionWeDontUse, .-_functionWeDontUse
.section .text.start,"ax",@progbits
.align 1
.global _start
_start:
mov.l er6,@-er7
mov.l er7,er6
mov.w #75,r0
jsr @_functionWeUse
mov.w r0,r2
mov.w r2,r0
mov.l @er7+,er6
rts
.size _start, .-_start
.end
/relax-2.d
0,0 → 1,11
# name: H8300 Relaxation Test 2
# ld: --relax -m h8300helf
# objdump: -d --no-show-raw-insn
 
.*: file format .*-h8300
 
Disassembly of section .text:
 
00000100 <_start>:
*100: mov.b @0x67:8,r0l
*102: mov.b @0x4321:16,r0l
/relax.d
0,0 → 1,21
# name: H8300 Relaxation Test
# ld: --relax
# objdump: -d
 
# Based on the test case reported by Kazu Hirata:
# http://sources.redhat.com/ml/binutils/2002-11/msg00301.html
 
.*: file format .*-h8300
 
Disassembly of section .text:
 
00000100 <_start>:
100: 0d 00.*mov.w r0,r0
102: 47 02.*beq .+2 \(0x106\)
104: 55 02.*bsr .+2 \(0x108\)
 
00000106 <.L1>:
106: 54 70.*rts
 
00000108 <_bar>:
108: 54 70.*rts
/h8300.exp
0,0 → 1,44
# Expect script for ld-h8300 tests
# Copyright 2002, 2003, 2004, 2007 Free Software Foundation, Inc.
#
# This file is part of the GNU Binutils.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
# MA 02110-1301, USA.
#
# Written by Nick Clifton <nickc@redhat.com>
#
 
# Test h8300
 
if ![istarget h8300-*-*] {
return
}
 
run_dump_test relax
 
if {[istarget *-elf]} {
run_dump_test relax-2
run_dump_test relax-3
run_dump_test relax-4
run_dump_test relax-5
run_dump_test relax-6
run_dump_test gcsection
} else {
run_dump_test relax-3-coff
run_dump_test relax-4-coff
run_dump_test relax-5-coff
run_dump_test relax-6-coff
}
/relax-3.d
0,0 → 1,35
# name: H8300 Relaxation Test 3
# ld: --relax -m h8300self
# objdump: -d
 
.*: file format .*-h8300
 
Disassembly of section .text:
 
00000100 <_start>:
#
# Relaxation of aa:16
#
.*: 6a 08 00 00 mov.b @0x0:16,r0l
.*: 6a 08 7f ff mov.b @0x7fff:16,r0l
.*: 6a 08 80 00 mov.b @0x8000:16,r0l
.*: 6a 08 fe ff mov.b @0xfeff:16,r0l
.*: 28 00 * mov.b @0x0:8,r0l
.*: 28 ff * mov.b @0xff:8,r0l
#
# Relaxation of aa:32
#
.*: 6a 08 00 00 mov.b @0x0:16,r0l
.*: 6a 08 7f ff mov.b @0x7fff:16,r0l
.*: 6a 28 00 00 mov.b @0x8000:32,r0l
.*: 80 00
.*: 6a 28 00 00 mov.b @0xff00:32,r0l
.*: ff 00
.*: 6a 28 00 ff mov.b @0xffff00:32,r0l
.*: ff 00
.*: 6a 28 ff ff mov.b @0xffff7fff:32,r0l
.*: 7f ff
.*: 6a 08 80 00 mov.b @0x8000:16,r0l
.*: 6a 08 fe ff mov.b @0xfeff:16,r0l
.*: 28 00 * mov.b @0x0:8,r0l
.*: 28 ff * mov.b @0xff:8,r0l
/relax-4.d
0,0 → 1,51
# name: H8300 Relaxation Test 4
# ld: --relax -m h8300self
# objdump: -d --no-show-raw-insn
 
.*: file format .*-h8300
 
Disassembly of section .text:
 
00000100 <_start>:
100: mov.b #0x3,r0l
102: mov.b #0x5,r2l
104: bset r0l,@0xff:8
108: bset r2l,@0x0:8
10c: btst r2l,@0xff:8
110: btst r0l,@0x0:8
114: bset #0x5,@0x0:16
11a: bset #0x5,@0x7fff:16
120: bset #0x5,@0x8000:16
126: bset #0x5,@0xfeff:16
12c: bset #0x5,@0x0:8
130: bset #0x5,@0xff:8
134: band #0x5,@0x0:16
13a: band #0x5,@0x7fff:16
140: band #0x5,@0x8000:16
146: band #0x5,@0xfeff:16
14c: band #0x5,@0x0:8
150: band #0x5,@0xff:8
154: bset r2l,@0xff:8
158: bset r0l,@0x0:8
15c: btst r0l,@0xff:8
160: btst r2l,@0x0:8
164: bset #0x6,@0x0:16
16a: bset #0x6,@0x7fff:16
170: bset #0x6,@0x8000:32
178: bset #0x6,@0xff00:32
180: bset #0x6,@0xffff00:32
188: bset #0x6,@0xffff7fff:32
190: bset #0x6,@0x8000:16
196: bset #0x6,@0xfeff:16
19c: bset #0x6,@0x0:8
1a0: bset #0x6,@0xff:8
1a4: band #0x6,@0x0:16
1aa: band #0x6,@0x7fff:16
1b0: band #0x6,@0x8000:32
1b8: band #0x6,@0xff00:32
1c0: band #0x6,@0xffff00:32
1c8: band #0x6,@0xffff7fff:32
1d0: band #0x6,@0x8000:16
1d6: band #0x6,@0xfeff:16
1dc: band #0x6,@0x0:8
1e0: band #0x6,@0xff:8
/relax-5.d
0,0 → 1,50
# name: H8300 Relaxation Test 5
# source: relax-5.s
# ld: --relax -m h8300self
# objdump: -d --no-show-raw-insn
 
.*: file format .*-h8300
 
Disassembly of section .text:
 
00000100 <_start>:
100: ldc @0x0:16,ccr
106: ldc @0x7fff:16,ccr
10c: ldc @0x8000:32,ccr
114: ldc @0xff00:32,ccr
11c: ldc @0xffff00:32,ccr
124: ldc @0xffff7fff:32,ccr
12c: ldc @0x8000:16,ccr
132: ldc @0xfeff:16,ccr
138: ldc @0xff00:16,ccr
13e: ldc @0xffff:16,ccr
144: stc ccr,@0x0:16
14a: stc ccr,@0x7fff:16
150: stc ccr,@0x8000:32
158: stc ccr,@0xff00:32
160: stc ccr,@0xffff00:32
168: stc ccr,@0xffff7fff:32
170: stc ccr,@0x8000:16
176: stc ccr,@0xfeff:16
17c: stc ccr,@0xff00:16
182: stc ccr,@0xffff:16
188: ldc @0x0:16,exr
18e: ldc @0x7fff:16,exr
194: ldc @0x8000:32,exr
19c: ldc @0xff00:32,exr
1a4: ldc @0xffff00:32,exr
1ac: ldc @0xffff7fff:32,exr
1b4: ldc @0x8000:16,exr
1ba: ldc @0xfeff:16,exr
1c0: ldc @0xff00:16,exr
1c6: ldc @0xffff:16,exr
1cc: stc exr,@0x0:16
1d2: stc exr,@0x7fff:16
1d8: stc exr,@0x8000:32
1e0: stc exr,@0xff00:32
1e8: stc exr,@0xffff00:32
1f0: stc exr,@0xffff7fff:32
1f8: stc exr,@0x8000:16
1fe: stc exr,@0xfeff:16
204: stc exr,@0xff00:16
20a: stc exr,@0xffff:16
/gcsection.d
0,0 → 1,27
# name: H8300 GCC section test case
# ld: --gc-sections -m h8300helf
# objdump: -d --no-show-raw-insn
.*: file format .*-h8300
 
Disassembly of section .text:
 
00000100 <_functionWeUse>:
100: mov.l er6,@-er7
104: mov.l er7,er6
106: subs #4,er7
108: mov.w r0,@\(0xfffe:16,er6\)
10c: mov.w @\(0xfffe:16,er6\),r2
110: mov.w r2,r0
112: adds #4,er7
114: mov.l @er7\+,er6
118: rts
 
0000011a <_start>:
11a: mov.l er6,@-er7
11e: mov.l er7,er6
120: mov.w #0x4b,r0
124: jsr @0x100:24
128: mov.w r0,r2
12a: mov.w r2,r0
12c: mov.l @er7\+,er6
130: rts
/relax-6.d
0,0 → 1,11
# name: H8300 Relaxation Test 6
# source: relax-6.s
# ld: --relax -m h8300self
# objdump: -d --no-show-raw-insn
 
.*: file format .*-h8300
Disassembly of section .text:
 
00000100 <_start>:
100: mov.b r2l,@0xbd:8
102: rts
/relax-3-coff.d
0,0 → 1,36
# name: H8300 Relaxation Test 3 (for COFF)
# source: relax-3.s
# ld: --relax -m h8300s
# objdump: -d
 
.*: file format .*-h8300
 
Disassembly of section .text:
 
00000100 <_start>:
#
# Relaxation of aa:16
#
.*: 6a 08 00 00.*mov.b @0x0:16,r0l
.*: 6a 08 7f ff.*mov.b @0x7fff:16,r0l
.*: 6a 08 80 00.*mov.b @0x8000:16,r0l
.*: 6a 08 fe ff.*mov.b @0xfeff:16,r0l
.*: 28 00 .*mov.b @0x0:8,r0l
.*: 28 ff .*mov.b @0xff:8,r0l
#
# Relaxation of aa:32
#
.*: 6a 08 00 00.*mov.b @0x0:16,r0l
.*: 6a 08 7f ff.*mov.b @0x7fff:16,r0l
.*: 6a 28 00 00.*mov.b @0x8000:32,r0l
.*: 80 00
.*: 6a 28 00 00.*mov.b @0xff00:32,r0l
.*: ff 00
.*: 6a 28 00 ff.*mov.b @0xffff00:32,r0l
.*: ff 00
.*: 6a 28 ff ff.*mov.b @0xffff7fff:32,r0l
.*: 7f ff
.*: 6a 08 80 00.*mov.b @0x8000:16,r0l
.*: 6a 08 fe ff.*mov.b @0xfeff:16,r0l
.*: 28 00 .*mov.b @0x0:8,r0l
.*: 28 ff .*mov.b @0xff:8,r0l
/relax-4-coff.d
0,0 → 1,76
# name: H8300 Relaxation Test 4 (for COFF)
# source: relax-4.s
# ld: --relax -m h8300s
# objdump: -d
 
.*: file format .*-h8300
 
Disassembly of section .text:
 
00000100 <_start>:
100: f8 03.*mov.b #0x3,r0l
102: fa 05.*mov.b #0x5,r2l
104: 7f ff 60 80.*bset r0l,@0xff:8
108: 7f 00 60 a0.*bset r2l,@0x0:8
10c: 7e ff 63 a0.*btst r2l,@0xff:8
110: 7e 00 63 80.*btst r0l,@0x0:8
114: 6a 18 00 00.*bset #0x5,@0x0:16
118: 70 50
11a: 6a 18 7f ff.*bset #0x5,@0x7fff:16
11e: 70 50
120: 6a 18 80 00.*bset #0x5,@0x8000:16
124: 70 50
126: 6a 18 fe ff.*bset #0x5,@0xfeff:16
12a: 70 50
12c: 7f 00 70 50.*bset #0x5,@0x0:8
130: 7f ff 70 50.*bset #0x5,@0xff:8
134: 6a 10 00 00.*band #0x5,@0x0:16
138: 76 50
13a: 6a 10 7f ff.*band #0x5,@0x7fff:16
13e: 76 50
140: 6a 10 80 00.*band #0x5,@0x8000:16
144: 76 50
146: 6a 10 fe ff.*band #0x5,@0xfeff:16
14a: 76 50
14c: 7e 00 76 50.*band #0x5,@0x0:8
150: 7e ff 76 50.*band #0x5,@0xff:8
154: 7f ff 60 a0.*bset r2l,@0xff:8
158: 7f 00 60 80.*bset r0l,@0x0:8
15c: 7e ff 63 80.*btst r0l,@0xff:8
160: 7e 00 63 a0.*btst r2l,@0x0:8
164: 6a 18 00 00.*bset #0x6,@0x0:16
168: 70 60
16a: 6a 18 7f ff.*bset #0x6,@0x7fff:16
16e: 70 60
170: 6a 38 00 00.*bset #0x6,@0x8000:32
174: 80 00 70 60
178: 6a 38 00 00.*bset #0x6,@0xff00:32
17c: ff 00 70 60
180: 6a 38 00 ff.*bset #0x6,@0xffff00:32
184: ff 00 70 60
188: 6a 38 ff ff.*bset #0x6,@0xffff7fff:32
18c: 7f ff 70 60
190: 6a 18 80 00.*bset #0x6,@0x8000:16
194: 70 60
196: 6a 18 fe ff.*bset #0x6,@0xfeff:16
19a: 70 60
19c: 7f 00 70 60.*bset #0x6,@0x0:8
1a0: 7f ff 70 60.*bset #0x6,@0xff:8
1a4: 6a 10 00 00.*band #0x6,@0x0:16
1a8: 76 60
1aa: 6a 10 7f ff.*band #0x6,@0x7fff:16
1ae: 76 60
1b0: 6a 30 00 00.*band #0x6,@0x8000:32
1b4: 80 00 76 60
1b8: 6a 30 00 00.*band #0x6,@0xff00:32
1bc: ff 00 76 60
1c0: 6a 30 00 ff.*band #0x6,@0xffff00:32
1c4: ff 00 76 60
1c8: 6a 30 ff ff.*band #0x6,@0xffff7fff:32
1cc: 7f ff 76 60
1d0: 6a 10 80 00.*band #0x6,@0x8000:16
1d4: 76 60
1d6: 6a 10 fe ff.*band #0x6,@0xfeff:16
1da: 76 60
1dc: 7e 00 76 60.*band #0x6,@0x0:8
1e0: 7e ff 76 60.*band #0x6,@0xff:8
/relax-5-coff.d
0,0 → 1,50
# name: H8300 Relaxation Test 5 (for COFF)
# source: relax-5.s
# ld: --relax -m h8300s
# objdump: -d --no-show-raw-insn
 
.*: file format .*-h8300
 
Disassembly of section .text:
 
00000100 <_start>:
100:.*ldc @0x0:16,ccr
106:.*ldc @0x7fff:16,ccr
10c:.*ldc @0x8000:32,ccr
114:.*ldc @0xff00:32,ccr
11c:.*ldc @0xffff00:32,ccr
124:.*ldc @0xffff7fff:32,ccr
12c:.*ldc @0x8000:16,ccr
132:.*ldc @0xfeff:16,ccr
138:.*ldc @0xff00:16,ccr
13e:.*ldc @0xffff:16,ccr
144:.*stc ccr,@0x0:16
14a:.*stc ccr,@0x7fff:16
150:.*stc ccr,@0x8000:32
158:.*stc ccr,@0xff00:32
160:.*stc ccr,@0xffff00:32
168:.*stc ccr,@0xffff7fff:32
170:.*stc ccr,@0x8000:16
176:.*stc ccr,@0xfeff:16
17c:.*stc ccr,@0xff00:16
182:.*stc ccr,@0xffff:16
188:.*ldc @0x0:16,exr
18e:.*ldc @0x7fff:16,exr
194:.*ldc @0x8000:32,exr
19c:.*ldc @0xff00:32,exr
1a4:.*ldc @0xffff00:32,exr
1ac:.*ldc @0xffff7fff:32,exr
1b4:.*ldc @0x8000:16,exr
1ba:.*ldc @0xfeff:16,exr
1c0:.*ldc @0xff00:16,exr
1c6:.*ldc @0xffff:16,exr
1cc:.*stc exr,@0x0:16
1d2:.*stc exr,@0x7fff:16
1d8:.*stc exr,@0x8000:32
1e0:.*stc exr,@0xff00:32
1e8:.*stc exr,@0xffff00:32
1f0:.*stc exr,@0xffff7fff:32
1f8:.*stc exr,@0x8000:16
1fe:.*stc exr,@0xfeff:16
204:.*stc exr,@0xff00:16
20a:.*stc exr,@0xffff:16
/relax-2.s
0,0 → 1,8
.h8300h
.globl _start
_start:
mov.b @foo:16,r0l
mov.b @bar:32,r0l
 
.equ foo,0xffff67
.equ bar,0x4321
/relax-6-coff.d
0,0 → 1,11
# name: H8300 Relaxation Test 6
# source: relax-6.s
# ld: --relax -m h8300s
# objdump: -d --no-show-raw-insn
 
.*: file format .*-h8300
Disassembly of section .text:
 
00000100 <_start>:
100: mov.b r2l,@0xbd:8
102: rts
/relax-3.s
0,0 → 1,32
.h8300s
.globl _start
_start:
# s3-s6 aren't valid 16-bit addresses.
mov.b @s1:16,r0l
mov.b @s2:16,r0l
mov.b @s7:16,r0l
mov.b @s8:16,r0l
mov.b @s9:16,r0l
mov.b @s10:16,r0l
 
mov.b @s1:32,r0l
mov.b @s2:32,r0l
mov.b @s3:32,r0l
mov.b @s4:32,r0l
mov.b @s5:32,r0l
mov.b @s6:32,r0l
mov.b @s7:32,r0l
mov.b @s8:32,r0l
mov.b @s9:32,r0l
mov.b @s10:32,r0l
 
.equ s1,0
.equ s2,0x7fff
.equ s3,0x8000
.equ s4,0xff00
.equ s5,0xffff00
.equ s6,0xffff7fff
.equ s7,0xffff8000
.equ s8,0xfffffeff
.equ s9,0xffffff00
.equ s10,0xffffffff
/relax.s
0,0 → 1,10
.text
.global _start
_start:
mov.w r0,r0
beq .L1
jsr @_bar
.L1:
rts
_bar:
rts
/relax-5.s
0,0 → 1,66
; Relaxation is possible from @aa:32 to @aa:16 for following instructions
; ldc.w @@aa:32,ccr
; stc.w ccr,@@aa:32
; ldc.w @aa:32,exr
; stc.w exr,@aa:32
.h8300s
.globl _start
;
; Relaxation of aa:32
;
_start:
ldc @s1:32,ccr
ldc @s2:32,ccr
ldc @s3:32,ccr
ldc @s4:32,ccr
ldc @s5:32,ccr
ldc @s6:32,ccr
ldc @s7:32,ccr
ldc @s8:32,ccr
ldc @s9:32,ccr
ldc @s10:32,ccr
 
stc ccr,@s1:32
stc ccr,@s2:32
stc ccr,@s3:32
stc ccr,@s4:32
stc ccr,@s5:32
stc ccr,@s6:32
stc ccr,@s7:32
stc ccr,@s8:32
stc ccr,@s9:32
stc ccr,@s10:32
ldc @s1:32,exr
ldc @s2:32,exr
ldc @s3:32,exr
ldc @s4:32,exr
ldc @s5:32,exr
ldc @s6:32,exr
ldc @s7:32,exr
ldc @s8:32,exr
ldc @s9:32,exr
ldc @s10:32,exr
 
stc exr,@s1:32
stc exr,@s2:32
stc exr,@s3:32
stc exr,@s4:32
stc exr,@s5:32
stc exr,@s6:32
stc exr,@s7:32
stc exr,@s8:32
stc exr,@s9:32
stc exr,@s10:32
.equ s1,0
.equ s2,0x7fff
.equ s3,0x8000
.equ s4,0xff00
.equ s5,0xffff00
.equ s6,0xffff7fff
.equ s7,0xffff8000
.equ s8,0xfffffeff
.equ s9,0xffffff00
.equ s10,0xffffffff
.end

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