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    /openrisc/trunk/gnu-src/gdb-6.8/include
    from Rev 157 to Rev 225
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  •

Rev 157 → Rev 225

/ChangeLog-9103
2533,7 → 2533,7
 
Thu Oct 24 22:11:11 1991 John Gilmore (gnu at cygnus.com)
 
 
RS/6000 support, by Metin G. Ozisik, Mimi Phûông-Thåo Võ, and
John Gilmore.
 
* a.out.gnu.h: Update slightly.
/dyn-string.h
1,5 → 1,6
/* An abstract string datatype.
Copyright (C) 1998, 1999, 2000, 2002, 2004 Free Software Foundation, Inc.
Copyright (C) 1998, 1999, 2000, 2002, 2004, 2005, 2009
Free Software Foundation, Inc.
Contributed by Mark Mitchell (mark@markmitchell.com).
 
This file is part of GCC.
19,7 → 20,13
the Free Software Foundation, 51 Franklin Street - Fifth Floor,
Boston, MA 02110-1301, USA. */
 
#ifndef DYN_STRING_H
#define DYN_STRING_H
 
#ifdef __cplusplus
extern "C" {
#endif
 
typedef struct dyn_string
{
int allocated; /* The amount of space allocated for the string. */
58,3 → 65,9
extern int dyn_string_append_char (dyn_string_t, int);
extern int dyn_string_substring (dyn_string_t, dyn_string_t, int, int);
extern int dyn_string_eq (dyn_string_t, dyn_string_t);
 
#ifdef __cplusplus
}
#endif
 
#endif /* !defined (DYN_STRING_H) */
/nlm/sparc32-ext.h
1,5 → 1,5
/* SPARC NLM (NetWare Loadable Module) support for BFD.
Copyright 1993 Free Software Foundation, Inc.
Copyright 1993, 2005 Free Software Foundation, Inc.
 
This file is part of BFD, the Binary File Descriptor library.
 
/nlm/internal.h
1,5 → 1,5
/* NLM (NetWare Loadable Module) support for BFD.
Copyright 1993, 1994, 2003 Free Software Foundation, Inc.
Copyright 1993, 1994, 2003, 2005 Free Software Foundation, Inc.
 
Written by Fred Fish @ Cygnus Support.
 
/nlm/ppc-ext.h
1,5 → 1,5
/* PowerPC NLM (NetWare Loadable Module) support for BFD.
Copyright (C) 1994 Free Software Foundation, Inc.
Copyright (C) 1994, 2005 Free Software Foundation, Inc.
 
This file is part of BFD, the Binary File Descriptor library.
 
/nlm/external.h
1,5 → 1,5
/* NLM (NetWare Loadable Module) support for BFD.
Copyright 1993, 1994 Free Software Foundation, Inc.
Copyright 1993, 1994, 2005 Free Software Foundation, Inc.
 
Written by Fred Fish @ Cygnus Support
 
/nlm/alpha-ext.h
1,5 → 1,5
/* Alpha NLM (NetWare Loadable Module) support for BFD.
Copyright 1993 Free Software Foundation, Inc.
Copyright 1993, 2005 Free Software Foundation, Inc.
By Ian Lance Taylor, Cygnus Support
 
This file is part of BFD, the Binary File Descriptor library.
/nlm/i386-ext.h
1,5 → 1,5
/* i386 NLM (NetWare Loadable Module) support for BFD.
Copyright 1993 Free Software Foundation, Inc.
Copyright 1993, 2005 Free Software Foundation, Inc.
 
This file is part of BFD, the Binary File Descriptor library.
 
/nlm/common.h
1,5 → 1,5
/* NLM (NetWare Loadable Module) support for BFD.
Copyright 1993, 2001 Free Software Foundation, Inc.
Copyright 1993, 2001, 2005 Free Software Foundation, Inc.
 
Written by Fred Fish @ Cygnus Support
 
/safe-ctype.h
35,10 → 35,6
#ifndef SAFE_CTYPE_H
#define SAFE_CTYPE_H
 
#ifdef isalpha
#error "safe-ctype.h and ctype.h may not be used simultaneously"
#endif
 
/* Determine host character set. */
#define HOST_CHARSET_UNKNOWN 0
#define HOST_CHARSET_ASCII 1
116,4 → 112,39
#define TOUPPER(c) _sch_toupper[(c) & 0xff]
#define TOLOWER(c) _sch_tolower[(c) & 0xff]
 
/* Prevent the users of safe-ctype.h from accidently using the routines
from ctype.h. Initially, the approach was to produce an error when
detecting that ctype.h has been included. But this was causing
trouble as ctype.h might get indirectly included as a result of
including another system header (for instance gnulib's stdint.h).
So we include ctype.h here and then immediately redefine its macros. */
 
#include <ctype.h>
#undef isalpha
#define isalpha(c) do_not_use_isalpha_with_safe_ctype
#undef isalnum
#define isalnum(c) do_not_use_isalnum_with_safe_ctype
#undef iscntrl
#define iscntrl(c) do_not_use_iscntrl_with_safe_ctype
#undef isdigit
#define isdigit(c) do_not_use_isdigit_with_safe_ctype
#undef isgraph
#define isgraph(c) do_not_use_isgraph_with_safe_ctype
#undef islower
#define islower(c) do_not_use_islower_with_safe_ctype
#undef isprint
#define isprint(c) do_not_use_isprint_with_safe_ctype
#undef ispunct
#define ispunct(c) do_not_use_ispunct_with_safe_ctype
#undef isspace
#define isspace(c) do_not_use_isspace_with_safe_ctype
#undef isupper
#define isupper(c) do_not_use_isupper_with_safe_ctype
#undef isxdigit
#define isxdigit(c) do_not_use_isxdigit_with_safe_ctype
#undef toupper
#define toupper(c) do_not_use_toupper_with_safe_ctype
#undef tolower
#define tolower(c) do_not_use_tolower_with_safe_ctype
 
#endif /* SAFE_CTYPE_H */
/filenames.h
26,6 → 26,10
#ifndef FILENAMES_H
#define FILENAMES_H
 
#ifdef __cplusplus
extern "C" {
#endif
 
#if defined(__MSDOS__) || defined(_WIN32) || defined(__OS2__) || defined (__CYGWIN__)
 
#ifndef HAVE_DOS_BASED_FILE_SYSTEM
49,4 → 53,8
extern int filename_cmp (const char *s1, const char *s2);
#define FILENAME_CMP(s1, s2) filename_cmp(s1, s2)
 
#ifdef __cplusplus
}
#endif
 
#endif /* FILENAMES_H */
/xtensa-isa.h
1,5 → 1,5
/* Interface definition for configurable Xtensa ISA support.
Copyright 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
Copyright 2003, 2004, 2005, 2006, 2008 Free Software Foundation, Inc.
 
This file is part of BFD, the Binary File Descriptor library.
 
15,7 → 15,8
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301,
USA. */
 
#ifndef XTENSA_LIBISA_H
#define XTENSA_LIBISA_H
686,6 → 687,13
xtensa_state_is_exported (xtensa_isa isa, xtensa_state st);
 
 
/* Check for a "shared_or" state. Returns 0 if the condition is false,
1 if the condition is true, and XTENSA_UNDEFINED on error. */
 
extern int
xtensa_state_is_shared_or (xtensa_isa isa, xtensa_state st);
 
 
/* Sysregs ("special registers" and "user registers"). */
 
/md5.h
72,6 → 72,10
typedef unsigned long int md5_uintptr;
#endif
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* Structure to save state of computation between the single steps. */
struct md5_ctx
{
138,4 → 142,8
digest. */
extern void *md5_buffer (const char *buffer, size_t len, void *resblock);
 
#ifdef __cplusplus
}
#endif
 
#endif
/obstack.h
1,6 → 1,6
/* obstack.h - object stack macros
Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1996, 1997, 1998,
1999, 2000, 2001, 2002, 2003, 2004, 2005
1999, 2000, 2001, 2002, 2003, 2004, 2005, 2008
Free Software Foundation, Inc.
 
 
527,7 → 527,7
> (h)->chunk_limit - (char *) (h)->chunk) \
? ((h)->next_free = (h)->chunk_limit) : 0), \
(h)->object_base = (h)->next_free, \
__INT_TO_PTR ((h)->temp))
(void *) __INT_TO_PTR ((h)->temp))
 
# define obstack_free(h,obj) \
( (h)->temp = (char *) (obj) - (char *) (h)->chunk, \
/dis-asm.h
1,6 → 1,6
/* Interface between the opcode library and its callers.
 
Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2009
Free Software Foundation, Inc.
 
This program is free software; you can redistribute it and/or modify
39,14 → 39,14
 
enum dis_insn_type
{
dis_noninsn, /* Not a valid instruction */
dis_nonbranch, /* Not a branch instruction */
dis_branch, /* Unconditional branch */
dis_condbranch, /* Conditional branch */
dis_jsr, /* Jump to subroutine */
dis_condjsr, /* Conditional jump to subroutine */
dis_dref, /* Data reference instruction */
dis_dref2 /* Two data references in instruction */
dis_noninsn, /* Not a valid instruction. */
dis_nonbranch, /* Not a branch instruction. */
dis_branch, /* Unconditional branch. */
dis_condbranch, /* Conditional branch. */
dis_jsr, /* Jump to subroutine. */
dis_condjsr, /* Conditional jump to subroutine. */
dis_dref, /* Data reference instruction. */
dis_dref2 /* Two data references in instruction. */
};
 
/* This struct is passed into the instruction decoding routine,
76,6 → 76,8
unsigned long mach;
/* Endianness (for bi-endian cpus). Mono-endian cpus can ignore this. */
enum bfd_endian endian;
/* Endianness of code, for mixed-endian situations such as ARM BE8. */
enum bfd_endian endian_code;
/* An arch/mach-specific bitmask of selected instruction subsets, mainly
for processors with run-time-switchable instruction sets. The default,
zero, means that there is no constraint. CGEN-based opcodes ports
106,7 → 108,16
The top 16 bits are reserved for public use (and are documented here).
The bottom 16 bits are for the internal use of the disassembler. */
unsigned long flags;
#define INSN_HAS_RELOC 0x80000000
/* Set if the disassembler has determined that there are one or more
relocations associated with the instruction being disassembled. */
#define INSN_HAS_RELOC (1 << 31)
/* Set if the user has requested the disassembly of data as well as code. */
#define DISASSEMBLE_DATA (1 << 30)
/* Set if the user has specifically set the machine type encoded in the
mach field of this structure. */
#define USER_SPECIFIED_MACHINE_TYPE (1 << 29)
 
/* Use internally by the target specific disassembly code. */
void *private_data;
 
/* Function used to get bytes to disassemble. MEMADDR is the
243,6 → 254,7
extern int print_insn_little_or32 (bfd_vma, disassemble_info *);
extern int print_insn_little_powerpc (bfd_vma, disassemble_info *);
extern int print_insn_little_score (bfd_vma, disassemble_info *);
extern int print_insn_lm32 (bfd_vma, disassemble_info *);
extern int print_insn_m32c (bfd_vma, disassemble_info *);
extern int print_insn_m32r (bfd_vma, disassemble_info *);
extern int print_insn_m68hc11 (bfd_vma, disassemble_info *);
253,9 → 265,11
extern int print_insn_maxq_little (bfd_vma, disassemble_info *);
extern int print_insn_mcore (bfd_vma, disassemble_info *);
extern int print_insn_mep (bfd_vma, disassemble_info *);
extern int print_insn_microblaze (bfd_vma, disassemble_info *);
extern int print_insn_mmix (bfd_vma, disassemble_info *);
extern int print_insn_mn10200 (bfd_vma, disassemble_info *);
extern int print_insn_mn10300 (bfd_vma, disassemble_info *);
extern int print_insn_moxie (bfd_vma, disassemble_info *);
extern int print_insn_msp430 (bfd_vma, disassemble_info *);
extern int print_insn_mt (bfd_vma, disassemble_info *);
extern int print_insn_ns32k (bfd_vma, disassemble_info *);
291,6 → 305,7
extern void print_ppc_disassembler_options (FILE *);
extern void print_arm_disassembler_options (FILE *);
extern void parse_arm_disassembler_option (char *);
extern void print_s390_disassembler_options (FILE *);
extern int get_arm_regname_num_options (void);
extern int set_arm_regname_option (int);
extern int get_arm_regnames (int, const char **, const char **, const char *const **);
/fibheap.h
1,5 → 1,6
/* A Fibonacci heap datatype.
Copyright 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2009
Free Software Foundation, Inc.
Contributed by Daniel Berlin (dan@cgsoftware.com).
 
This file is part of GCC.
42,6 → 43,10
 
#include "ansidecl.h"
 
#ifdef __cplusplus
extern "C" {
#endif
 
typedef long fibheapkey_t;
 
typedef struct fibheap
83,4 → 88,8
extern void fibheap_delete (fibheap_t);
extern fibheap_t fibheap_union (fibheap_t, fibheap_t);
 
#ifdef __cplusplus
}
#endif
 
#endif /* _FIBHEAP_H_ */
/ChangeLog
1,3 → 1,290
2009-10-09 Rafael Espindola <espindola@google.com>
 
* plugin-api.h (ld_plugin_add_input_library): Change argument name to
libname.
 
2008-10-03 Rafael Espindola <espindola@google.com>
 
* plugin-api.h: New.
* lto-symtab.h: New.
 
2009-09-09 Martin Thuresson <martin@mtme.org>
 
* bfdlink.h (struct bfd_link_hash_common_entry): Move to top
level.
 
2009-09-04 Jie Zhang <jie.zhang@analog.com>
 
* opcode/bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp.
(PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define.
(PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask,
PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask):
Adjust accordingly.
(init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and
PseudoDbg_Assert_grp_mask.
 
2009-08-06 Michael Eager <eager@eagercon.com>
 
* dis-asm.h: Decl print_insn_microblaze().
 
2009-07-24 Ian Lance Taylor <iant@google.com>
 
* libiberty.h (crc32): Declare.
 
2009-07-20 Cary Coutant <ccoutant@google.com>
Doug Evans <dje@google.com>
 
Add some dwarf4 values.
* dwarf2.h (enum dwarf_tag): Add DW_TAG_type_unit.
(enum dwarf_form): Add DW_FORM_sec_offset, DW_FORM_exprloc,
DW_FORM_flag_present, DW_FORM_sig8.
(enum dwarf_attribute): Add DW_AT_signature.
 
2009-07-17 Jan Kratochvil <jan.kratochvil@redhat.com>
 
* demangle.h
(enum demangle_component_type <DEMANGLE_COMPONENT_GLOBAL_CONSTRUCTORS>)
(enum demangle_component_type <DEMANGLE_COMPONENT_GLOBAL_DESTRUCTORS>):
New.
 
2009-07-10 Tom Tromey <tromey@redhat.com>
 
* dwarf2.h: New file, moved from elf/.
 
2009-07-09 Jakub Jelinek <jakub@redhat.com>
 
* dwarf2.h (enum dwarf_location_atom): Add DW_OP_implicit_value
and DW_OP_stack_value.
 
2009-07-09 Tom Tromey <tromey@redhat.com>
 
* elf/dwarf2.h: Remove, renaming to...
* dwarf2.h: ... this.
 
2009-06-29 Tom Tromey <tromey@redhat.com>
 
* elf/dwarf2.h: New file. Merged with gdb.
 
2009-06-18 Nick Clifton <nickc@redhat.com>
 
* dis-asm.h (USER_SPECIFIED_MACHINE_TYPE): New value for the flags
field of struct disassemble_info.
 
2009-06-09 Ian Lance Taylor <ian@airs.com>
 
* ansidecl.h (ATTRIBUTE_UNUSED_LABEL): Define for C++.
 
2009-06-15 Nick Clifton <nickc@redhat.com>
 
* dis-asm.h (DISASSEMBLE_DATA): New value for the flags field of
struct disassemble_info.
 
2009-06-02 Ian Lance Taylor <iant@google.com>
 
* ansidecl.h (EXPORTED_CONST): Define.
 
2009-05-31 Ian Lance Taylor <iant@google.com>
 
* ansidecl.h: Add extern "C" when compiling with C++. Treat C++
the way we treat an ISO C compiler. Don't define inline as a
macdro when compiling with C++.
* dyn-string.h: Add header guard DYN_STRING_H. Add extern "C"
when compiling with C++.
* fibheap.h: Add extern "C" when compiling with C++.
 
2009-05-25 Tristan Gingold <gingold@adacore.com>
 
* fopen-vms.h (FOPEN_RB, FOPEN_WB, FOPEN_AB, FOPEN_RUB, FOPEN_WUB,
FOPEN_AUB): Use "rfm=udf,rat=none" attribute.
 
2009-04-22 Taras Glek <tglek@mozilla.com>
 
* hashtab.h: Update GTY annotations to new syntax.
* splay-tree.h: Likewise.
 
2009-04-08 H.J. Lu <hongjiu.lu@intel.com>
 
* bfdlink.h (bfd_link_info): Add warn_alternate_em.
 
2009-03-18 Alan Modra <amodra@bigpond.net.au>
 
* alloca-conf.h: Revise based on autoconf-2.61, autoconf-2.13
documentation.
 
2009-03-17 Jason Merrill <jason@redhat.com>
 
* demangle.h (enum demangle_component_type): Add
DEMANGLE_COMPONENT_FUNCTION_PARAM.
 
2008-12-01 Cary Coutant <ccoutant@google.com>
 
* plugin-api.h (LDPS_BAD_HANDLE): New constant.
(ld_plugin_get_input_file): New typedef.
(ld_plugin_release_input_file): New typedef.
(LDPT_GET_INPUT_FILE, LDPT_RELEASE_INPUT_FILE): New constants.
(struct ld_plugin_tv): Add two new fields.
 
2008-12-23 Jon Beniston <jon@beniston.com>
 
* dis-asm.h: Add LM32 disassembler function prototype.
 
2008-12-10 Jason Merrill <jason@redhat.com>
 
* demangle.h (enum demangle_component_type): Add
DEMANGLE_COMPONENT_FIXED_TYPE.
 
2008-12-01 Cary Coutant <ccoutant@google.com>
 
* plugin-api.h (ld_plugin_message): Change format parameter to const.
 
2008-12-01 Cary Coutant <ccoutant@google.com>
 
* plugin-api.h: Fix syntax error when compiling with C++.
 
2008-11-26 Alan Modra <amodra@bigpond.net.au>
 
PR 7047
* bfdlink.h (struct bfd_elf_version_expr): Delete "symbol".
Add "literal".
 
2008-11-21 Sterling Augustine <sterling@tensilica.com>
 
* xtensa-isa-internal.h (XTENSA_STATE_IS_SHARED_OR): New flag.
* xtensa-isa.h (xtensa_state_is_shared_or): New prototype.
 
2008-11-19 Bob Wilson <bob.wilson@acm.org>
* xtensa-config.h (XCHAL_HAVE_MUL16, XCHAL_HAVE_MUL32, XCHAL_HAVE_DIV32)
(XCHAL_HAVE_MINMAX, XCHAL_HAVE_SEXT, XCHAL_HAVE_THREADPTR)
(XCHAL_HAVE_RELEASE_SYNC, XCHAL_HAVE_S32C1I): Change to 1.
(XCHAL_NUM_AREGS): Change to 32.
(XCHAL_ICACHE_SIZE, XCHAL_DCACHE_SIZE): Change to 16K.
(XCHAL_ICACHE_LINESIZE, XCHAL_DCACHE_LINESIZE): Change to 32.
(XCHAL_ICACHE_LINEWIDTH, XCHAL_DCACHE_LINEWIDTH): Change to 5.
(XCHAL_DCACHE_IS_WRITEBACK): Change to 1.
(XCHAL_DEBUGLEVEL): Change to 6.
2008-11-14 Tristan Gingold <gingold@adacore.com>
 
* fopen-vms.h (FOPEN_RB): Use a single string to match the
standard prototype.
(FOPEN_WB): Ditto.
(FOPEN_AB): Ditto.
(FOPEN_RUB): Ditto.
(FOPEN_WUB): Ditto.
(FOPEN_AUB): Ditto.
 
2008-10-21 Alan Modra <amodra@bigpond.net.au>
 
* obstack.h (obstack_finish <!__GNUC__>): Cast result to void *.
 
2008-10-06 Jason Merrill <jason@redhat.com>
 
* demangle.h (enum demangle_component_type): Add
DEMANGLE_COMPONENT_PACK_EXPANSION.
 
2008-09-24 Richard Henderson <rth@redhat.com>
 
* elf/dwarf2.h (DW_OP_GNU_encoded_addr): New.
 
2008-09-22 Rafael Espindola <espindola@google.com>
 
* plugin-api.h (ld_plugin_status): Remove comma from the last item.
Use C style comment.
(ld_plugin_api_version, ld_plugin_output_file_type,
ld_plugin_symbol_kind, ld_plugin_symbol_visibility,
ld_plugin_symbol_resolution, ld_plugin_level, ld_plugin_tag): Remove
comma from the last item.
 
2008-09-18 Cary Coutant <ccoutant@google.com>
 
Add plugin functionality for link-time optimization (LTO).
* plugin-api.h: New file.
 
2008-09-09 Jason Merrill <jason@redhat.com>
 
* demangle.h (enum demangle_component_type): Add
DEMANGLE_COMPONENT_DECLTYPE.
 
2008-08-25 Alan Modra <amodra@bigpond.net.au>
 
* binary-io.h: New file, imported from gnulib, but don't
#include <fcntl.h> or <stdio.h>.
 
2008-08-17 Alan Modra <amodra@bigpond.net.au>
 
* bfdlink.h (bfd_generic_link_read_symbols): Declare.
 
2008-08-08 Anatoly Sokolov <aesok@post.ru>
 
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
 
2008-07-12 Jie Zhang <jie.zhang@analog.com>
 
Revert
2008-07-12 Jie Zhang <jie.zhang@analog.com>
* bfdlink.h (struct bfd_link_info): Add sep_code member
variable.
* elf/bfin.h (EF_BFIN_CODE_IN_L1): Define.
(EF_BFIN_DATA_IN_L1): Define.
 
2008-07-12 Jie Zhang <jie.zhang@analog.com>
 
* bfdlink.h (struct bfd_link_info): Add sep_code member
variable.
* elf/bfin.h (EF_BFIN_CODE_IN_L1): Define.
(EF_BFIN_DATA_IN_L1): Define.
 
2008-07-07 Stan Shebs <stan@codesourcery.com>
 
* dis-asm.h (struct disassemble_info): Add endian_code field.
 
2008-07-07 Joel Brobecker <brobecker@adacore.com>
 
* safe-ctype.h: Add #include of ctype.h before redefining
the ctype.h macros.
 
2008-07-04 Joel Brobecker <brobecker@adacore.com>
 
* safe-ctype.h: Remove #error when detecting that ctype.h has been
included. Redefine the various macros provided by ctype.h as
undefined variables.
 
2008-06-23 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
 
* libiberty.h (XALLOCA, XDUP, XALLOCAVEC, XDUPVEC, XALLOCAVAR,
XDUPVAR, XOBNEWVEC, XOBNEWVAR): New.
 
2008-06-06 Alan Modra <amodra@bigpond.net.au>
 
* bfdlink.h (struct bfd_link_info): Add "path_separator".
 
2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
 
* dis-asm.h (print_s390_disassembler_options):
Prototype added.
 
2008-03-24 Ian Lance Taylor <iant@google.com>
 
* sha1.h: New file, from gnulib.
 
* md5.h: Add extern "C" when compiled with C++.
 
2008-03-24 Ian Lance Taylor <iant@google.com>
 
* md5.h: Add extern "C" when compiled with C++.
 
2008-03-21 Ian Lance Taylor <iant@google.com>
 
* filenames.h: Add extern "C" when compiled with C++.
 
2008-02-15 Alan Modra <amodra@bigpond.net.au>
 
* bfdlink.h (struct bfd_link_hash_table): Delete creator field.
16,20 → 303,6
DEMANGLE_COMPONENT_CHARACTER as new enum values.
(demangle_component): Add struct s_character to union u.
 
2008-01-23 Eric B. Weddington <eric.weddington@atmel.com>
 
* opcode/avr.h (AVR_ISA_RF401): Add new opcode set for at86rf401.
 
2008-01-03 Eric B. Weddington <eric.weddington@atmel.com>
 
* opcode/avr.h (AVR_ISA_USB162): Add new opcode set.
(AVR_ISA_AVR3): Likewise.
 
2007-11-17 Thiemo Seufer <ths@mips.com>
 
* elf/mips.h (Tag_GNU_MIPS_ABI_FP): Mention -mips32r2 -mfp64 variant
in comment.
 
2007-11-07 Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
 
36,10 → 309,6
* floatformat.h (struct floatformat): Add split_half field.
(floatformat_ibm_long_double): New.
 
2007-11-05 Danny Smith <dannysmith@users.sourceforge.net>
 
* coff/pe.h (COFF_ENCODE_ALIGNMENT) Define.
 
2007-09-06 Tom Tromey <tromey@redhat.com>
 
* libiberty.h (pex_free): Document process killing.
197,10 → 466,6
 
* dis-asm.h (print_insn_spu): Declare.
 
2006-10-17 Mark Shinwell <shinwell@codesourcery.com>
 
* elf/arm.h: Define TAG_CPU_ARCH_* constants.
 
2006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
 
* dis-asm.h: Add prototypes for Score disassembler routines.
228,21 → 493,6
* bfdlink.h (bfd_link_info): Replace need_relax_finalize with
relax_pass.
 
2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
 
* elf/bfin.h (R_BFIN_GOT17M4, R_BFIN_GOTHI, R_BFIN_GOTLO,
R_BFIN_FUNCDESC, R_BFIN_FUNCDESC_GOT17M4, R_BFIN_FUNCDESC_GOTHI,
R_BFIN_FUNCDESC_GOTLO, R_BFIN_FUNCDESC_VALUE,
R_BFIN_FUNCDESC_GOTOFF17M4, R_BFIN_FUNCDESC_GOTOFFHI,
R_BFIN_FUNCDESC_GOTOFFLO, R_BFIN_GOTOFF17M4, R_BFIN_GOTOFFHI,
R_BFIN_GOTOFFLO): New relocs.
(EF_BFIN_PIC, EF_BFIN_FDPIC, EF_BFIN_PIC_FLAGS): New macros.
 
2006-03-23 Michael Matz <matz@suse.de>
 
* elf/x86-64.h: Add the new relocations with their official
numbers.
 
2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
Anil Paranjape <anilp1@kpitcummins.com>
Shilin Shakti <shilins@kpitcummins.com>
249,10 → 499,6
 
* dis-asm.h (print_insn_xc16c): New prototype.
 
2006-02-06 Steve Ellcey <sje@cup.hp.com>
 
* elf/ia64.h (SHF_IA_64_HP_TLS): New.
 
2006-01-18 DJ Delorie <dj@redhat.com>
 
* md5.h: Include ansidecl.h
276,10 → 522,6
Second part of ms1 to mt renaming.
* dis-asm.h (print_insn_mt): Renamed.
 
2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
 
* elf/mt.h: Renamed from ms1.h
 
2005-12-10 Terry Laurenzo <tlaurenzo@gmail.com>
 
PR java/9861
286,15 → 528,6
* demangle.h : Add DMGL_RET_POSTFIX define to enable alternative
output format for return types
 
2005-11-07 Nathan Sidwell <nathan@codesourcery.com>
 
Add ms2.
* elf/ms1.h (EF_MS1_CPU_MS2): New.
 
2005-11-06 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
 
* elf/hppa.h (R_PARISC_DIR64WR, R_PARISC_DIR64DR): Remove relocs.
 
2005-11-03 Alan Modra <amodra@bigpond.net.au>
 
* bfdlink.h (struct bfd_link_order): Tweak comment.
320,7 → 553,6
2005-09-30 Catherine Moore <clm@cm00re.com>
 
* dis-asm.h (print_insn_bfin): Declare.
* opcode/bfin.h: New file.
 
2005-09-26 Mark Mitchell <mark@codesourcery.com>
 
330,7 → 562,6
 
* bfdlink.h: Remove mention of a29k.
* dis-asm.h: Remove a29k support.
* aout/encap.h: Likewise.
 
2005-08-17 Mark Kettenis <kettenis@gnu.org>
 
/xtensa-config.h
1,5 → 1,5
/* Xtensa configuration settings.
Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007
Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
Free Software Foundation, Inc.
Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
 
50,37 → 50,37
#define XCHAL_HAVE_MAC16 0
 
#undef XCHAL_HAVE_MUL16
#define XCHAL_HAVE_MUL16 0
#define XCHAL_HAVE_MUL16 1
 
#undef XCHAL_HAVE_MUL32
#define XCHAL_HAVE_MUL32 0
#define XCHAL_HAVE_MUL32 1
 
#undef XCHAL_HAVE_MUL32_HIGH
#define XCHAL_HAVE_MUL32_HIGH 0
 
#undef XCHAL_HAVE_DIV32
#define XCHAL_HAVE_DIV32 0
#define XCHAL_HAVE_DIV32 1
 
#undef XCHAL_HAVE_NSA
#define XCHAL_HAVE_NSA 1
 
#undef XCHAL_HAVE_MINMAX
#define XCHAL_HAVE_MINMAX 0
#define XCHAL_HAVE_MINMAX 1
 
#undef XCHAL_HAVE_SEXT
#define XCHAL_HAVE_SEXT 0
#define XCHAL_HAVE_SEXT 1
 
#undef XCHAL_HAVE_LOOPS
#define XCHAL_HAVE_LOOPS 1
 
#undef XCHAL_HAVE_THREADPTR
#define XCHAL_HAVE_THREADPTR 0
#define XCHAL_HAVE_THREADPTR 1
 
#undef XCHAL_HAVE_RELEASE_SYNC
#define XCHAL_HAVE_RELEASE_SYNC 0
#define XCHAL_HAVE_RELEASE_SYNC 1
 
#undef XCHAL_HAVE_S32C1I
#define XCHAL_HAVE_S32C1I 0
#define XCHAL_HAVE_S32C1I 1
 
#undef XCHAL_HAVE_BOOLEANS
#define XCHAL_HAVE_BOOLEANS 0
104,7 → 104,7
#define XCHAL_HAVE_WINDOWED 1
 
#undef XCHAL_NUM_AREGS
#define XCHAL_NUM_AREGS 64
#define XCHAL_NUM_AREGS 32
 
#undef XCHAL_HAVE_WIDE_BRANCHES
#define XCHAL_HAVE_WIDE_BRANCHES 0
114,25 → 114,25
 
 
#undef XCHAL_ICACHE_SIZE
#define XCHAL_ICACHE_SIZE 8192
#define XCHAL_ICACHE_SIZE 16384
 
#undef XCHAL_DCACHE_SIZE
#define XCHAL_DCACHE_SIZE 8192
#define XCHAL_DCACHE_SIZE 16384
 
#undef XCHAL_ICACHE_LINESIZE
#define XCHAL_ICACHE_LINESIZE 16
#define XCHAL_ICACHE_LINESIZE 32
 
#undef XCHAL_DCACHE_LINESIZE
#define XCHAL_DCACHE_LINESIZE 16
#define XCHAL_DCACHE_LINESIZE 32
 
#undef XCHAL_ICACHE_LINEWIDTH
#define XCHAL_ICACHE_LINEWIDTH 4
#define XCHAL_ICACHE_LINEWIDTH 5
 
#undef XCHAL_DCACHE_LINEWIDTH
#define XCHAL_DCACHE_LINEWIDTH 4
#define XCHAL_DCACHE_LINEWIDTH 5
 
#undef XCHAL_DCACHE_IS_WRITEBACK
#define XCHAL_DCACHE_IS_WRITEBACK 0
#define XCHAL_DCACHE_IS_WRITEBACK 1
 
 
#undef XCHAL_HAVE_MMU
152,7 → 152,7
#define XCHAL_NUM_DBREAK 2
 
#undef XCHAL_DEBUGLEVEL
#define XCHAL_DEBUGLEVEL 4
#define XCHAL_DEBUGLEVEL 6
 
 
#undef XCHAL_MAX_INSTRUCTION_SIZE
/gdb/sim-m32c.h
1,5 → 1,5
/* This file defines the interface between the m32c simulator and gdb.
Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
Copyright (C) 2005, 2007, 2008, 2009 Free Software Foundation, Inc.
 
This file is part of GDB.
 
/gdb/callback.h
1,5 → 1,5
/* Remote target system call callback support.
Copyright 1997, 2007, 2008 Free Software Foundation, Inc.
Copyright 1997, 2007, 2008, 2009 Free Software Foundation, Inc.
Contributed by Cygnus Solutions.
 
This file is part of GDB.
124,7 → 124,11
/* Print an error message and "exit".
In the case of gdb "exiting" means doing a longjmp back to the main
command loop. */
void (*error) PARAMS ((host_callback *, const char *, ...));
void (*error) PARAMS ((host_callback *, const char *, ...))
#ifdef __GNUC__
__attribute__ ((__noreturn__))
#endif
;
 
int last_errno; /* host format */
 
/gdb/signals.h
1,6 → 1,7
/* Target signal numbers for GDB and the GDB remote protocol.
Copyright 1986, 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
1998, 1999, 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
1998, 1999, 2000, 2001, 2002, 2007, 2008, 2009
Free Software Foundation, Inc.
 
This file is part of GDB.
 
/gdb/sim-d10v.h
1,6 → 1,6
/* This file defines the interface between the d10v simulator and gdb.
 
Copyright 1999, 2002, 2007, 2008 Free Software Foundation, Inc.
Copyright 1999, 2002, 2007, 2008, 2009 Free Software Foundation, Inc.
 
This file is part of GDB.
 
/gdb/sim-sh.h
1,5 → 1,6
/* This file defines the interface between the sh simulator and gdb.
Copyright (C) 2000, 2002, 2004, 2007, 2008 Free Software Foundation, Inc.
Copyright (C) 2000, 2002, 2004, 2007, 2008, 2009
Free Software Foundation, Inc.
 
This file is part of GDB.
 
/gdb/ChangeLog
1,3 → 1,16
2009-05-18 Jon Beniston <jon@beniston.com>
 
* sim-lm32.h: New file.
 
2009-01-07 Hans-Peter Nilsson <hp@axis.com>
 
* callback.h (struct host_callback_struct): Mark member error as
pointing to a noreturn function.
 
2008-02-12 M Ranga Swami Reddy <MR.Swami.Reddy@nsc.com>
 
* sim-cr16.h: New file.
 
2008-01-01 Daniel Jacobowitz <dan@codesourcery.com>
 
Updated copyright notices for most files.
/gdb/remote-sim.h
1,6 → 1,6
/* This file defines the interface between the simulator and gdb.
 
Copyright 1993, 1994, 1996, 1997, 1998, 2000, 2002, 2007, 2008
Copyright 1993, 1994, 1996, 1997, 1998, 2000, 2002, 2007, 2008, 2009
Free Software Foundation, Inc.
 
This file is part of GDB.
/gdb/sim-frv.h
1,6 → 1,6
/* This file defines the interface between the FR-V simulator and GDB.
 
Copyright 2003, 2007, 2008 Free Software Foundation, Inc.
Copyright 2003, 2007, 2008, 2009 Free Software Foundation, Inc.
 
Contributed by Red Hat.
 
/gdb/sim-arm.h
1,6 → 1,6
/* This file defines the interface between the Arm simulator and GDB.
 
Copyright 2002, 2003, 2007, 2008 Free Software Foundation, Inc.
Copyright 2002, 2003, 2007, 2008, 2009 Free Software Foundation, Inc.
 
Contributed by Red Hat.
 
/gdb/fileio.h
1,6 → 1,6
/* Hosted File I/O interface definitions, for GDB, the GNU Debugger.
 
Copyright 2003, 2007, 2008 Free Software Foundation, Inc.
Copyright 2003, 2007, 2008, 2009 Free Software Foundation, Inc.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
/gdb/sim-h8300.h
1,5 → 1,5
/* This file defines the interface between the h8300 simulator and gdb.
Copyright (C) 2002, 2007, 2008 Free Software Foundation, Inc.
Copyright (C) 2002, 2007, 2008, 2009 Free Software Foundation, Inc.
 
This file is part of GDB.
 
/gdb/sim-ppc.h
1,6 → 1,6
/* sim-ppc.h --- interface between PowerPC simulator and GDB.
 
Copyright 2004, 2007, 2008 Free Software Foundation, Inc.
Copyright 2004, 2007, 2008, 2009 Free Software Foundation, Inc.
 
Contributed by Red Hat.
 
/bfdlink.h
1,6 → 1,6
/* bfdlink.h -- header file for BFD link routines
Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
Written by Steve Chamberlain and Ian Lance Taylor, Cygnus Support.
 
This file is part of BFD, the Binary File Descriptor library.
75,6 → 75,12
bfd_link_common_skip_all
};
 
struct bfd_link_hash_common_entry
{
unsigned int alignment_power; /* Alignment. */
asection *section; /* Symbol section. */
};
 
/* The linking routines use a hash table which uses this structure for
its elements. */
 
143,11 → 149,7
directly because we don't want to increase the size of
the union; this structure is a major space user in the
linker. */
struct bfd_link_hash_common_entry
{
unsigned int alignment_power; /* Alignment. */
asection *section; /* Symbol section. */
} *p;
struct bfd_link_hash_common_entry *p;
bfd_size_type size; /* Common symbol size. */
} c;
} u;
198,6 → 200,9
extern void bfd_link_repair_undef_list
(struct bfd_link_hash_table *table);
 
/* Read symbols and cache symbol pointer array in outsymbols. */
extern bfd_boolean bfd_generic_link_read_symbols (bfd *);
 
struct bfd_sym_chain
{
struct bfd_sym_chain *next;
319,6 → 324,9
/* TRUE if we should warn when adding a DT_TEXTREL to a shared object. */
unsigned int warn_shared_textrel: 1;
 
/* TRUE if we should warn alternate ELF machine code. */
unsigned int warn_alternate_em: 1;
 
/* TRUE if unreferenced sections should be removed. */
unsigned int gc_sections: 1;
 
372,6 → 380,9
wrap_hash. Used by PowerPC Linux for 'dot' symbols. */
char wrap_char;
 
/* Separator between archive and filename in linker script filespecs. */
char path_separator;
 
/* Function callbacks. */
const struct bfd_link_callbacks *callbacks;
 
701,8 → 712,8
struct bfd_elf_version_expr *next;
/* Glob pattern. */
const char *pattern;
/* NULL for a glob pattern, otherwise a straight symbol. */
const char *symbol;
/* Set if pattern is not a glob. */
unsigned int literal : 1;
/* Defined by ".symver". */
unsigned int symver : 1;
/* Defined by version script. */
/fopen-vms.h
9,12 → 9,12
the application unable to be configured for both "same" and "binary"
variant systems. */
 
#define FOPEN_RB "rb","rfm=var"
#define FOPEN_WB "wb","rfm=var"
#define FOPEN_AB "ab","rfm=var"
#define FOPEN_RUB "r+b","rfm=var"
#define FOPEN_WUB "w+b","rfm=var"
#define FOPEN_AUB "a+b","rfm=var"
#define FOPEN_RB "rb,rfm=udf,rat=none"
#define FOPEN_WB "wb,rfm=udf,rat=none"
#define FOPEN_AB "ab,rfm=udf,rat=none"
#define FOPEN_RUB "r+b,rfm=udf,rat=none"
#define FOPEN_WUB "w+b,rfm=udf,rat=none"
#define FOPEN_AUB "a+b,rfm=udf,rat=none"
 
#define FOPEN_RT "r"
#define FOPEN_WT "w"
/hashtab.h
1,5 → 1,6
/* An expandable hash tables datatype.
Copyright (C) 1999, 2000, 2002, 2003, 2004 Free Software Foundation, Inc.
Copyright (C) 1999, 2000, 2002, 2003, 2004, 2005, 2009
Free Software Foundation, Inc.
Contributed by Vladimir Makarov (vmakarov@cygnus.com).
 
This program is free software; you can redistribute it and/or modify
96,8 → 97,7
functions mentioned below. The size of this structure is subject to
change. */
 
struct htab GTY(())
{
struct GTY(()) htab {
/* Pointer to hash function. */
htab_hash hash_f;
 
/demangle.h
1,6 → 1,6
/* Defs for interface to demanglers.
Copyright 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000, 2001, 2002,
2003, 2004, 2005, 2007 Free Software Foundation, Inc.
2003, 2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU Library General Public License
221,6 → 221,8
/* A template parameter. This holds a number, which is the template
parameter index. */
DEMANGLE_COMPONENT_TEMPLATE_PARAM,
/* A function parameter. This holds a number, which is the index. */
DEMANGLE_COMPONENT_FUNCTION_PARAM,
/* A constructor. This holds a name and the kind of
constructor. */
DEMANGLE_COMPONENT_CTOR,
319,6 → 321,8
and the right subtree is the member type. CV-qualifiers appear
on the latter. */
DEMANGLE_COMPONENT_PTRMEM_TYPE,
/* A fixed-point type. */
DEMANGLE_COMPONENT_FIXED_TYPE,
/* An argument list. The left subtree is the current argument, and
the right subtree is either NULL or another ARGLIST node. */
DEMANGLE_COMPONENT_ARGLIST,
370,7 → 374,15
subtree is the first part and the right subtree the second. */
DEMANGLE_COMPONENT_COMPOUND_NAME,
/* A name formed by a single character. */
DEMANGLE_COMPONENT_CHARACTER
DEMANGLE_COMPONENT_CHARACTER,
/* A decltype type. */
DEMANGLE_COMPONENT_DECLTYPE,
/* Global constructors keyed to name. */
DEMANGLE_COMPONENT_GLOBAL_CONSTRUCTORS,
/* Global destructors keyed to name. */
DEMANGLE_COMPONENT_GLOBAL_DESTRUCTORS,
/* A pack expansion. */
DEMANGLE_COMPONENT_PACK_EXPANSION
};
 
/* Types which are only used internally. */
415,6 → 427,17
struct demangle_component *name;
} s_extended_operator;
 
/* For DEMANGLE_COMPONENT_FIXED_TYPE. */
struct
{
/* The length, indicated by a C integer type name. */
struct demangle_component *length;
/* _Accum or _Fract? */
short accum;
/* Saturating or not? */
short sat;
} s_fixed;
 
/* For DEMANGLE_COMPONENT_CTOR. */
struct
{
449,10 → 472,10
int len;
} s_string;
 
/* For DEMANGLE_COMPONENT_TEMPLATE_PARAM. */
/* For DEMANGLE_COMPONENT_*_PARAM. */
struct
{
/* Template parameter index. */
/* Parameter index. */
long number;
} s_number;
 
/alloca-conf.h
1,24 → 1,44
#include "config.h"
 
#if defined(__GNUC__) && !defined(C_ALLOCA)
# ifndef alloca
# define alloca __builtin_alloca
# endif
#else /* ! defined (__GNUC__) */
# ifdef _AIX
#pragma alloca
/* This is a merge of code recommended in the autoconf-2.61 documentation
with that recommended in the autoconf-2.13 documentation, with added
tweaks to heed C_ALLOCA. */
 
#if defined HAVE_ALLOCA_H && !defined C_ALLOCA
# include <alloca.h>
#else
# if defined __GNUC__ && !defined C_ALLOCA
# if !defined alloca
# define alloca __builtin_alloca
# endif
# else
# if defined _AIX
/* Indented so that pre-ansi C compilers will ignore it, rather than
choke on it. Some versions of AIX require this to be the first
thing in the file except for comments and preprocessor directives. */
#pragma alloca
# else
# if defined(HAVE_ALLOCA_H) && !defined(C_ALLOCA)
# include <alloca.h>
# else /* ! defined (HAVE_ALLOCA_H) */
# ifdef __STDC__
extern PTR alloca (size_t);
# else /* ! defined (__STDC__) */
extern PTR alloca ();
# endif /* ! defined (__STDC__) */
# endif /* ! defined (HAVE_ALLOCA_H) */
# ifdef _WIN32
# include <malloc.h>
# if defined _MSC_VER && !defined C_ALLOCA
# include <malloc.h>
# define alloca _alloca
# else
# if !defined alloca
# if defined __STDC__ || defined __hpux
# if defined HAVE_STDDEF_H
# include <stddef.h>
# if defined __cplusplus
extern "C" void *alloca (size_t);
# else
extern void *alloca (size_t);
# endif
# else
extern void *alloca ();
# endif
# else
extern char *alloca ();
# endif
# endif
# endif
# endif
# endif /* ! defined (_AIX) */
#endif /* ! defined (__GNUC__) */
# endif
#endif
/elf/i386.h
1,5 → 1,5
/* ix86 ELF support for BFD.
Copyright 1998, 1999, 2000, 2002, 2004, 2005, 2006
Copyright 1998, 1999, 2000, 2002, 2004, 2005, 2006, 2009
Free Software Foundation, Inc.
 
This file is part of BFD, the Binary File Descriptor library.
66,6 → 66,7
RELOC_NUMBER (R_386_TLS_GOTDESC, 39)
RELOC_NUMBER (R_386_TLS_DESC_CALL,40)
RELOC_NUMBER (R_386_TLS_DESC, 41)
RELOC_NUMBER (R_386_IRELATIVE, 42) /* Adjust indirectly by program base */
 
/* Used by Intel. */
RELOC_NUMBER (R_386_USED_BY_INTEL_200, 200)
/elf/ppc64.h
1,5 → 1,5
/* PPC64 ELF support for BFD.
Copyright 2003 Free Software Foundation, Inc.
Copyright 2003, 2005, 2009 Free Software Foundation, Inc.
 
This file is part of BFD, the Binary File Descriptor library.
 
136,7 → 136,19
RELOC_NUMBER (R_PPC64_DTPREL16_HIGHERA, 104)
RELOC_NUMBER (R_PPC64_DTPREL16_HIGHEST, 105)
RELOC_NUMBER (R_PPC64_DTPREL16_HIGHESTA, 106)
RELOC_NUMBER (R_PPC64_TLSGD, 107)
RELOC_NUMBER (R_PPC64_TLSLD, 108)
 
/* Support STT_GNU_IFUNC plt calls. */
RELOC_NUMBER (R_PPC64_JMP_IREL, 247)
RELOC_NUMBER (R_PPC64_IRELATIVE, 248)
 
/* These are GNU extensions used in PIC code sequences. */
RELOC_NUMBER (R_PPC64_REL16, 249)
RELOC_NUMBER (R_PPC64_REL16_LO, 250)
RELOC_NUMBER (R_PPC64_REL16_HI, 251)
RELOC_NUMBER (R_PPC64_REL16_HA, 252)
 
/* These are GNU extensions to enable C++ vtable garbage collection. */
RELOC_NUMBER (R_PPC64_GNU_VTINHERIT, 253)
RELOC_NUMBER (R_PPC64_GNU_VTENTRY, 254)
153,4 → 165,7
#define DT_PPC64_OPD (DT_LOPROC + 1)
#define DT_PPC64_OPDSZ (DT_LOPROC + 2)
 
/* Specify that tls descriptors should be optimized. */
#define DT_PPC64_TLSOPT (DT_LOPROC + 3)
 
#endif /* _ELF_PPC64_H */
/elf/cris.h
91,6 → 91,86
The BFD equivalent is BFD_RELOC_CRIS_32_PLT_PCREL. */
RELOC_NUMBER (R_CRIS_32_PLT_PCREL, 19)
 
/* An assembler-generated-only relocation, instructing the linker to
reserve two GOT slots, carrying the R_CRIS_DTP relocation for the
symbol (pointing to the first slot, the relocation fills in
both). The value is a 32-bit-value, relative to the start of the
GOT. Assembly syntax: "sym:GDGOTREL". */
RELOC_NUMBER (R_CRIS_32_GOT_GD, 20)
 
/* Similar to R_CRIS_32_GOT_GD, but the value is a 16-bit unsigned
number, limiting access to 65536/4 global symbols per module (or
65536/8 thread variables; loosely speaking G*4+T*8 < 65536, where
T is the number of thread variables and G is the number of other
external global variables and functions). Assembly syntax:
"sym:GDGOTREL16". */
RELOC_NUMBER (R_CRIS_16_GOT_GD, 21)
 
/* Similar to R_CRIS_32_GOT_GD, but the value is the absolute
address of the GOT entry. Disallowed in DSOs created with
-shared. Assembly syntax: "sym:GD". */
RELOC_NUMBER (R_CRIS_32_GD, 22)
 
/* A linker-generated-only relocation, instructing the dynamic
linker to fill in the module ID and module-relative-TLS-block
offset of the symbol in question, used for GOT entries. Note
that this relocation instructs to fill in two 32-bit values. */
RELOC_NUMBER (R_CRIS_DTP, 23)
 
/* An assembler-generated-only relocation, instructing the linker to
reserve the first two GOT slots, and attach the R_CRIS_DTPMOD
relocation(*) for the module to the first slot, the second
containing zero. The value is 32 bits, the offset from the start
of the TLS block of the module to the thread-local symbol
mentioned in the relocation. This relocation must only be applied
to module-local symbols. Assembly syntax: "expr:DTPREL". */
RELOC_NUMBER (R_CRIS_32_DTPREL, 24)
 
/* Similar to R_CRIS_32_DTPREL, but the value is a 16-bit signed
number, limiting the size of thread-variables of the DSO to 32768
bytes. (Note: matches both model 1 and 2 and allows use of addo.w
as the instruction where this relocation is used.) Assembly
syntax: "expr:DTPREL16". */
RELOC_NUMBER (R_CRIS_16_DTPREL, 25)
 
/* An assembler-generated-only relocation, instructing the linker to
reserve a GOT slot and attach the R_CRIS_32_TPREL relocation for
the symbol in question. The value is 32 bits, which is the
GOT-relative offset of the slot. Assembly syntax:
"sym:TPOFFGOT". */
RELOC_NUMBER (R_CRIS_32_GOT_TPREL, 26)
 
/* Similar to R_CRIS_32_TPREL, but the value is a 16-bit positive
number, limiting the number of thread- and global variables of
the DSO to 32768/4. Assembly syntax: "sym:TPOFFGOT16". */
RELOC_NUMBER (R_CRIS_16_GOT_TPREL, 27)
 
/* An assembler- and linker-generated relocation, instructing to
resolve the symbol in question yielding the TLS offset of the
thread variable, relative to the global TLS block. Not allowed
as input when generating a DSO. Assembly syntax:
"expr:TPOFF". */
RELOC_NUMBER (R_CRIS_32_TPREL, 28)
 
/* Similar to R_CRIS_32_TPREL, but only applicable to executables
compiled with -msmall-tls. Not allowed in a DSO. The value is a
16-bit signed number, limiting the size of thread-variables of
the executable to 32768 bytes. (Note: being signed makes it match
both model 1 and 2 and allows use of addo.w as the instruction
where this relocation is applied.) Assembly syntax:
"expr:TPOFF16". */
RELOC_NUMBER (R_CRIS_16_TPREL, 29)
 
/* A linker-generated-only relocation, instructing the dynamic
linker to fill in the current module ID, used for GOT entries
(usually the fourth one). */
RELOC_NUMBER (R_CRIS_DTPMOD, 30)
 
/* Similar to R_CRIS_32_GOT_TPREL, but the value is the absolute
address of the GOT entry. Disallowed in DSOs created with
-shared. Assembly syntax: "sym:IE". */
RELOC_NUMBER (R_CRIS_32_IE, 31)
 
/* No other relocs must be visible outside the assembler. */
 
END_RELOC_NUMBERS (R_CRIS_max)
/elf/v850.h
1,5 → 1,5
/* V850 ELF support for BFD.
Copyright 1997, 1998, 2000, 2002, 2003, 2004, 2007
Copyright 1997, 1998, 2000, 2002, 2003, 2004, 2007, 2008
Free Software Foundation, Inc.
Created by Michael Meissner, Cygnus Support <meissner@cygnus.com>
 
88,13 → 88,13
values have a special meaning. */
 
/* Small data area common symbol. */
#define SHN_V850_SCOMMON 0xff00
#define SHN_V850_SCOMMON SHN_LORESERVE
 
/* Tiny data area common symbol. */
#define SHN_V850_TCOMMON 0xff01
#define SHN_V850_TCOMMON (SHN_LORESERVE + 1)
 
/* Zero data area common symbol. */
#define SHN_V850_ZCOMMON 0xff02
#define SHN_V850_ZCOMMON (SHN_LORESERVE + 2)
 
/* Processor specific section types. */
/elf/sh.h
54,7 → 54,7
bfd_mach_* are defined in bfd_in2.h (generated from
archures.c). */
#define EF_SH_BFD_TABLE \
/* EF_SH_UNKNOWN */ bfd_mach_sh3 , \
/* EF_SH_UNKNOWN */ bfd_mach_sh , \
/* EF_SH1 */ bfd_mach_sh , \
/* EF_SH2 */ bfd_mach_sh2 , \
/* EF_SH3 */ bfd_mach_sh3 , \
/elf/cr16.h
54,6 → 54,9
RELOC_NUMBER (R_CR16_SWITCH8, 26)
RELOC_NUMBER (R_CR16_SWITCH16, 27)
RELOC_NUMBER (R_CR16_SWITCH32, 28)
RELOC_NUMBER (R_CR16_GOT_REGREL20, 29)
RELOC_NUMBER (R_CR16_GOTC_REGREL20, 30)
RELOC_NUMBER (R_CR16_GLOB_DAT, 31)
END_RELOC_NUMBERS(R_CR16_MAX)
#endif /* _ELF_CR16_H */
/elf/score.h
1,6 → 1,7
/* Score ELF support for BFD.
Copyright 2006 Free Software Foundation, Inc.
Copyright 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
Contributed by
Brain.lin (brain.lin@sunplusct.com)
Mei Ligang (ligang@sunnorth.com.cn)
Pei-Lin Tsai (pltsai@sunplus.com)
 
8,7 → 9,7
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
35,6 → 36,10
#define GP_DISP_LABEL "_gp_disp"
 
/* Processor specific flags for the ELF header e_flags field: */
#define EF_SCORE_MACH 0xffff0000
#define EF_OMIT_PIC_FIXDD 0x0fff0000
#define E_SCORE_MACH_SCORE3 0x00030000
#define E_SCORE_MACH_SCORE7 0x00070000
 
/* File contains position independent code. */
#define EF_SCORE_PIC 0x80000000
44,10 → 49,10
 
/* Defined and allocated common symbol. Value is virtual address. If
relocated, alignment must be preserved. */
#define SHN_SCORE_TEXT 0xff01
#define SHN_SCORE_DATA 0xff02
#define SHN_SCORE_TEXT (SHN_LORESERVE + 1)
#define SHN_SCORE_DATA (SHN_LORESERVE + 2)
/* Small common symbol. */
#define SHN_SCORE_SCOMMON 0xff03
#define SHN_SCORE_SCOMMON (SHN_LORESERVE + 3)
 
/* Processor specific section flags. */
 
101,7 → 106,7
RELOC_NUMBER (R_SCORE_NONE, 0)
RELOC_NUMBER (R_SCORE_HI16, 1)
RELOC_NUMBER (R_SCORE_LO16, 2)
RELOC_NUMBER (R_SCORE_DUMMY1, 3)
RELOC_NUMBER (R_SCORE_BCMP, 3)
RELOC_NUMBER (R_SCORE_24, 4)
RELOC_NUMBER (R_SCORE_PC19, 5)
RELOC_NUMBER (R_SCORE16_11, 6)
118,6 → 123,8
RELOC_NUMBER (R_SCORE_GPREL32, 17)
RELOC_NUMBER (R_SCORE_REL32, 18)
RELOC_NUMBER (R_SCORE_DUMMY_HI16, 19)
RELOC_NUMBER (R_SCORE_IMM30, 20)
RELOC_NUMBER (R_SCORE_IMM32, 21)
END_RELOC_NUMBERS (R_SCORE_max)
 
#endif /* _ELF_SCORE_H */
/elf/x86-64.h
1,5 → 1,5
/* x86_64 ELF support for BFD.
Copyright (C) 2000, 2001, 2002, 2004, 2005, 2006
Copyright (C) 2000, 2001, 2002, 2004, 2005, 2006, 2008, 2009
Free Software Foundation, Inc.
Contributed by Jan Hubicka <jh@suse.cz>
 
71,6 → 71,7
RELOC_NUMBER (R_X86_64_TLSDESC_CALL, 35) /* Relaxable call through TLS
descriptor. */
RELOC_NUMBER (R_X86_64_TLSDESC, 36) /* 2x64-bit TLS descriptor. */
RELOC_NUMBER (R_X86_64_IRELATIVE, 37) /* Adjust indirectly by program base */
RELOC_NUMBER (R_X86_64_GNU_VTINHERIT, 250) /* GNU C++ hack */
RELOC_NUMBER (R_X86_64_GNU_VTENTRY, 251) /* GNU C++ hack */
END_RELOC_NUMBERS (R_X86_64_max)
81,7 → 82,7
 
/* Like SHN_COMMON but the symbol will be allocated in the .lbss
section. */
#define SHN_X86_64_LCOMMON 0xff02
#define SHN_X86_64_LCOMMON (SHN_LORESERVE + 2)
 
#define SHF_X86_64_LARGE 0x10000000
#endif
/elf/bfin.h
1,5 → 1,5
/* Blackfin ELF support for BFD.
Copyright (C) 2005 Free Software Foundation, Inc.
Copyright (C) 2005, 2006, 2009 Free Software Foundation, Inc.
 
This file is part of BFD, the Binary File Descriptor library.
 
19,30 → 19,30
 
#ifndef _ELF_BFIN_H
#define _ELF_BFIN_H
 
#include "elf/reloc-macros.h"
 
START_RELOC_NUMBERS (elf_bfin_reloc_type)
RELOC_NUMBER (R_unused0, 0x00) /* relocation type 0 is not defined*/
RELOC_NUMBER (R_pcrel5m2, 0x01) /*LSETUP part a*/
RELOC_NUMBER (R_unused1, 0x02) /* relocation type 2 is not defined*/
RELOC_NUMBER (R_pcrel10, 0x03) /* type 3, 0x00) if cc jump <target> */
RELOC_NUMBER (R_pcrel12_jump, 0x04) /* type 4, 0x00) jump <target> */
RELOC_NUMBER (R_rimm16, 0x05) /* type 0x5, 0x00) rN = <target> */
RELOC_NUMBER (R_luimm16, 0x06) /* # 0x6, 0x00) preg.l=<target> Load imm 16 to lower half */
RELOC_NUMBER (R_huimm16, 0x07) /* # 0x7, 0x00) preg.h=<target> Load imm 16 to upper half*/
RELOC_NUMBER (R_pcrel12_jump_s, 0x08) /* # 0x8 jump.s <target> */
RELOC_NUMBER (R_pcrel24_jump_x, 0x09) /* # 0x9 jump.x <target> */
RELOC_NUMBER (R_pcrel24, 0x0a) /* # 0xa call <target> , 0x00) not expandable*/
RELOC_NUMBER (R_unusedb, 0x0b) /* # 0xb not generated */
RELOC_NUMBER (R_unusedc, 0x0c) /* # 0xc not used */
RELOC_NUMBER (R_pcrel24_jump_l, 0x0d) /*0xd jump.l <target>*/
RELOC_NUMBER (R_pcrel24_call_x, 0x0e) /* 0xE, 0x00) call.x <target> if <target> is above 24 bit limit call through P1 */
RELOC_NUMBER (R_var_eq_symb, 0x0f) /* 0xf, 0x00) linker should treat it same as 0x12 */
RELOC_NUMBER (R_byte_data, 0x10) /* 0x10, 0x00) .byte var = symbol */
RELOC_NUMBER (R_byte2_data, 0x11) /* 0x11, 0x00) .byte2 var = symbol */
RELOC_NUMBER (R_byte4_data, 0x12) /* 0x12, 0x00) .byte4 var = symbol and .var var=symbol */
RELOC_NUMBER (R_pcrel11, 0x13) /* 0x13, 0x00) lsetup part b */
RELOC_NUMBER (R_BFIN_UNUSED0, 0x00) /* relocation type 0 is not defined */
RELOC_NUMBER (R_BFIN_PCREL5M2, 0x01) /* LSETUP part a */
RELOC_NUMBER (R_BFIN_UNUSED1, 0x02) /* relocation type 2 is not defined */
RELOC_NUMBER (R_BFIN_PCREL10, 0x03) /* type 3, 0x00) if cc jump <target> */
RELOC_NUMBER (R_BFIN_PCREL12_JUMP, 0x04) /* type 4, 0x00) jump <target> */
RELOC_NUMBER (R_BFIN_RIMM16, 0x05) /* type 0x5, 0x00) rN = <target> */
RELOC_NUMBER (R_BFIN_LUIMM16, 0x06) /* # 0x6, 0x00) preg.l=<target> Load imm 16 to lower half */
RELOC_NUMBER (R_BFIN_HUIMM16, 0x07) /* # 0x7, 0x00) preg.h=<target> Load imm 16 to upper half */
RELOC_NUMBER (R_BFIN_PCREL12_JUMP_S, 0x08) /* # 0x8 jump.s <target> */
RELOC_NUMBER (R_BFIN_PCREL24_JUMP_X, 0x09) /* # 0x9 jump.x <target> */
RELOC_NUMBER (R_BFIN_PCREL24, 0x0a) /* # 0xa call <target> , 0x00) not expandable */
RELOC_NUMBER (R_BFIN_UNUSEDB, 0x0b) /* # 0xb not generated */
RELOC_NUMBER (R_BFIN_UNUSEDC, 0x0c) /* # 0xc not used */
RELOC_NUMBER (R_BFIN_PCREL24_JUMP_L, 0x0d) /* 0xd jump.l <target> */
RELOC_NUMBER (R_BFIN_PCREL24_CALL_X, 0x0e) /* 0xE, 0x00) call.x <target> if <target> is above 24 bit limit call through P1 */
RELOC_NUMBER (R_BFIN_VAR_EQ_SYMB, 0x0f) /* 0xf, 0x00) linker should treat it same as 0x12 */
RELOC_NUMBER (R_BFIN_BYTE_DATA, 0x10) /* 0x10, 0x00) .byte var = symbol */
RELOC_NUMBER (R_BFIN_BYTE2_DATA, 0x11) /* 0x11, 0x00) .byte2 var = symbol */
RELOC_NUMBER (R_BFIN_BYTE4_DATA, 0x12) /* 0x12, 0x00) .byte4 var = symbol and .var var=symbol */
RELOC_NUMBER (R_BFIN_PCREL11, 0x13) /* 0x13, 0x00) lsetup part b */
RELOC_NUMBER (R_BFIN_GOT17M4, 0x14)
RELOC_NUMBER (R_BFIN_GOTHI, 0x15)
RELOC_NUMBER (R_BFIN_GOTLO, 0x16)
58,31 → 58,31
RELOC_NUMBER (R_BFIN_GOTOFFHI, 0x20)
RELOC_NUMBER (R_BFIN_GOTOFFLO, 0x21)
 
RELOC_NUMBER (R_push, 0xE0)
RELOC_NUMBER (R_const, 0xE1)
RELOC_NUMBER (R_add, 0xE2)
RELOC_NUMBER (R_sub, 0xE3)
RELOC_NUMBER (R_mult, 0xE4)
RELOC_NUMBER (R_div, 0xE5)
RELOC_NUMBER (R_mod, 0xE6)
RELOC_NUMBER (R_lshift, 0xE7)
RELOC_NUMBER (R_rshift, 0xE8)
RELOC_NUMBER (R_and, 0xE9)
RELOC_NUMBER (R_or, 0xEA)
RELOC_NUMBER (R_xor, 0xEB)
RELOC_NUMBER (R_land, 0xEC)
RELOC_NUMBER (R_lor, 0xED)
RELOC_NUMBER (R_len, 0xEE)
RELOC_NUMBER (R_neg, 0xEF)
RELOC_NUMBER (R_comp, 0xF0)
RELOC_NUMBER (R_page, 0xF1)
RELOC_NUMBER (R_hwpage, 0xF2)
RELOC_NUMBER (R_addr, 0xF3)
RELOC_NUMBER (R_pltpc, 0x40) /* PLT gnu only relocation */
RELOC_NUMBER (R_got, 0x41) /* GOT gnu only relocation */
RELOC_NUMBER (R_BFIN_PUSH, 0xE0)
RELOC_NUMBER (R_BFIN_CONST, 0xE1)
RELOC_NUMBER (R_BFIN_ADD, 0xE2)
RELOC_NUMBER (R_BFIN_SUB, 0xE3)
RELOC_NUMBER (R_BFIN_MULT, 0xE4)
RELOC_NUMBER (R_BFIN_DIV, 0xE5)
RELOC_NUMBER (R_BFIN_MOD, 0xE6)
RELOC_NUMBER (R_BFIN_LSHIFT, 0xE7)
RELOC_NUMBER (R_BFIN_RSHIFT, 0xE8)
RELOC_NUMBER (R_BFIN_AND, 0xE9)
RELOC_NUMBER (R_BFIN_OR, 0xEA)
RELOC_NUMBER (R_BFIN_XOR, 0xEB)
RELOC_NUMBER (R_BFIN_LAND, 0xEC)
RELOC_NUMBER (R_BFIN_LOR, 0xED)
RELOC_NUMBER (R_BFIN_LEN, 0xEE)
RELOC_NUMBER (R_BFIN_NEG, 0xEF)
RELOC_NUMBER (R_BFIN_COMP, 0xF0)
RELOC_NUMBER (R_BFIN_PAGE, 0xF1)
RELOC_NUMBER (R_BFIN_HWPAGE, 0xF2)
RELOC_NUMBER (R_BFIN_ADDR, 0xF3)
RELOC_NUMBER (R_BFIN_PLTPC, 0x40) /* PLT gnu only relocation */
RELOC_NUMBER (R_BFIN_GOT, 0x41) /* GOT gnu only relocation */
RELOC_NUMBER (R_BFIN_GNU_VTINHERIT, 0x42) /* C++, gnu only */
RELOC_NUMBER (R_BFIN_GNU_VTENTRY, 0x43) /* C++, gnu only */
END_RELOC_NUMBERS (R_max)
END_RELOC_NUMBERS (R_BFIN_max)
 
/* Processor specific flags for the ELF header e_flags field. */
#define EF_BFIN_PIC 0x00000001 /* -fpic */
/elf/arm.h
1,5 → 1,5
/* ARM ELF support for BFD.
Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004
Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2009
Free Software Foundation, Inc.
 
This file is part of BFD, the Binary File Descriptor library.
41,9 → 41,9
#define PT_ARM_EXIDX (PT_LOPROC + 1)
 
/* Other constants defined in the ARM ELF spec. version B-01. */
#define EF_ARM_SYMSARESORTED 0x04 /* NB conflicts with EF_INTERWORK */
#define EF_ARM_DYNSYMSUSESEGIDX 0x08 /* NB conflicts with EF_APCS26 */
#define EF_ARM_MAPSYMSFIRST 0x10 /* NB conflicts with EF_APCS_FLOAT */
#define EF_ARM_SYMSARESORTED 0x04 /* NB conflicts with EF_INTERWORK. */
#define EF_ARM_DYNSYMSUSESEGIDX 0x08 /* NB conflicts with EF_APCS26. */
#define EF_ARM_MAPSYMSFIRST 0x10 /* NB conflicts with EF_APCS_FLOAT. */
#define EF_ARM_EABIMASK 0xFF000000
 
/* Constants defined in AAELF. */
71,9 → 71,11
#define STT_ARM_16BIT STT_HIPROC /* A Thumb label. */
 
/* Additional section types. */
#define SHT_ARM_EXIDX 0x70000001 /* Section holds ARM unwind info. */
#define SHT_ARM_PREEMPTMAP 0x70000002 /* Section pre-emption details. */
#define SHT_ARM_ATTRIBUTES 0x70000003 /* Section holds attributes. */
#define SHT_ARM_EXIDX 0x70000001 /* Section holds ARM unwind info. */
#define SHT_ARM_PREEMPTMAP 0x70000002 /* Section pre-emption details. */
#define SHT_ARM_ATTRIBUTES 0x70000003 /* Section holds attributes. */
#define SHT_ARM_DEBUGOVERLAY 0x70000004 /* Section holds overlay debug info. */
#define SHT_ARM_OVERLAYSECTION 0x70000005 /* Section holds GDB and overlay integration info. */
 
/* ARM-specific values for sh_flags. */
#define SHF_ENTRYSECT 0x10000000 /* Section contains an entry point. */
85,17 → 87,23
#define PF_ARM_ABS 0x40000000 /* Segment must be loaded at its base address. */
 
/* Values for the Tag_CPU_arch EABI attribute. */
#define TAG_CPU_ARCH_PRE_V4 0
#define TAG_CPU_ARCH_V4 1
#define TAG_CPU_ARCH_V4T 2
#define TAG_CPU_ARCH_V5T 3
#define TAG_CPU_ARCH_V5TE 4
#define TAG_CPU_ARCH_V5TEJ 5
#define TAG_CPU_ARCH_V6 6
#define TAG_CPU_ARCH_V6KZ 7
#define TAG_CPU_ARCH_V6T2 8
#define TAG_CPU_ARCH_V6K 9
#define TAG_CPU_ARCH_V7 10
#define TAG_CPU_ARCH_PRE_V4 0
#define TAG_CPU_ARCH_V4 1
#define TAG_CPU_ARCH_V4T 2
#define TAG_CPU_ARCH_V5T 3
#define TAG_CPU_ARCH_V5TE 4
#define TAG_CPU_ARCH_V5TEJ 5
#define TAG_CPU_ARCH_V6 6
#define TAG_CPU_ARCH_V6KZ 7
#define TAG_CPU_ARCH_V6T2 8
#define TAG_CPU_ARCH_V6K 9
#define TAG_CPU_ARCH_V7 10
#define TAG_CPU_ARCH_V6_M 11
#define TAG_CPU_ARCH_V6S_M 12
#define MAX_TAG_CPU_ARCH 12
/* Pseudo-architecture to allow objects to be compatible with the subset of
armv4t and armv6-m. This value should never be stored in object files. */
#define TAG_CPU_ARCH_V4T_PLUS_V6_M (MAX_TAG_CPU_ARCH + 1)
 
/* Relocation types. */
 
234,8 → 242,9
FAKE_RELOC (R_ARM_GOT32, R_ARM_GOT_BREL) /* 32 bit GOT entry. */
FAKE_RELOC (R_ARM_ROSEGREL32, R_ARM_SBREL31) /* ??? */
FAKE_RELOC (R_ARM_AMP_VCALL9, R_ARM_BREL_ADJ) /* Thumb-something. Not used. */
END_RELOC_NUMBERS (R_ARM_max)
 
END_RELOC_NUMBERS (R_ARM_max = 256)
 
#ifdef BFD_ARCH_SIZE
/* EABI object attributes. */
 
250,7 → 259,7
Tag_THUMB_ISA_use,
Tag_VFP_arch,
Tag_WMMX_arch,
Tag_NEON_arch,
Tag_Advanced_SIMD_arch,
Tag_PCS_config,
Tag_ABI_PCS_R9_use,
Tag_ABI_PCS_RW_data,
270,7 → 279,21
Tag_ABI_WMMX_args,
Tag_ABI_optimization_goals,
Tag_ABI_FP_optimization_goals,
/* 32 is generic. */
/* 32 is generic (Tag_compatibility). */
Tag_undefined33 = 33,
Tag_CPU_unaligned_access,
Tag_undefined35,
Tag_VFP_HP_extension,
Tag_undefined37,
Tag_ABI_FP_16bit_format,
Tag_undefined39,
Tag_nodefaults = 64,
Tag_also_compatible_with,
Tag_T2EE_use,
Tag_conformance,
Tag_Virtualization_use,
Tag_undefined69,
Tag_MPextension_use
};
 
#endif
/elf/ppc.h
1,6 → 1,6
/* PPC ELF support for BFD.
Copyright 1995, 1996, 1998, 2000, 2001, 2002, 2003, 2005
Free Software Foundation, Inc.
Copyright 1995, 1996, 1998, 2000, 2001, 2002, 2003, 2005, 2007, 2008,
2009 Free Software Foundation, Inc.
 
By Michael Meissner, Cygnus Support, <meissner@cygnus.com>, from information
in the System V Application Binary Interface, PowerPC Processor Supplement
71,6 → 71,13
RELOC_NUMBER (R_PPC_SECTOFF_HA, 36)
RELOC_NUMBER (R_PPC_ADDR30, 37)
 
#ifndef RELOC_MACROS_GEN_FUNC
/* Fake relocations for branch stubs, only used internally by ld. */
RELOC_NUMBER (R_PPC_RELAX, 48)
RELOC_NUMBER (R_PPC_RELAX_PLT, 49)
RELOC_NUMBER (R_PPC_RELAX_PLTREL24, 50)
#endif
 
/* Relocs added to support TLS. */
RELOC_NUMBER (R_PPC_TLS, 67)
RELOC_NUMBER (R_PPC_DTPMOD32, 68)
100,6 → 107,8
RELOC_NUMBER (R_PPC_GOT_DTPREL16_LO, 92)
RELOC_NUMBER (R_PPC_GOT_DTPREL16_HI, 93)
RELOC_NUMBER (R_PPC_GOT_DTPREL16_HA, 94)
RELOC_NUMBER (R_PPC_TLSGD, 95)
RELOC_NUMBER (R_PPC_TLSLD, 96)
 
/* The remaining relocs are from the Embedded ELF ABI, and are not
in the SVR4 ELF ABI. */
120,11 → 129,8
RELOC_NUMBER (R_PPC_EMB_BIT_FLD, 115)
RELOC_NUMBER (R_PPC_EMB_RELSDA, 116)
 
/* Fake relocations for branch stubs, only used internally by ld. */
#define R_PPC_RELAX32 245
#define R_PPC_RELAX32PC 246
#define R_PPC_RELAX32_PLT 247
#define R_PPC_RELAX32PC_PLT 248
/* Support STT_GNU_IFUNC plt calls. */
RELOC_NUMBER (R_PPC_IRELATIVE, 248)
 
/* These are GNU extensions used in PIC code sequences. */
RELOC_NUMBER (R_PPC_REL16, 249)
146,8 → 152,11
((R) >= R_PPC_TLS && (R) <= R_PPC_GOT_DTPREL16_HA)
 
/* Specify the value of _GLOBAL_OFFSET_TABLE_. */
#define DT_PPC_GOT DT_LOPROC
#define DT_PPC_GOT (DT_LOPROC)
 
/* Specify that tls descriptors should be optimized. */
#define DT_PPC_TLSOPT (DT_LOPROC + 1)
 
/* Processor specific flags for the ELF header e_flags field. */
 
#define EF_PPC_EMB 0x80000000 /* PowerPC embedded flag. */
177,7 → 186,8
{
/* 0-3 are generic. */
Tag_GNU_Power_ABI_FP = 4, /* Value 1 for hard-float, 2 for
soft-float; 0 for not tagged or not
soft-float, 3 for single=precision
hard-float; 0 for not tagged or not
using any ABIs affected by the
differences. */
 
185,6 → 195,11
registers, 3 for SPE registers; 0 for not tagged or not using any
ABIs affected by the differences. */
Tag_GNU_Power_ABI_Vector = 8,
 
/* Value 1 for ABIs using r3/r4 for returning structures <= 8 bytes,
2 for ABIs using memory; 0 for not tagged or not using any ABIs
affected by the differences. */
Tag_GNU_Power_ABI_Struct_Return = 12
};
 
#endif /* _ELF_PPC_H */
/elf/or32.h
1,4 → 1,4
/* OR1K ELF support for BFD. Derived from ppc.h.
/* OR32 ELF support for BFD. Derived from ppc.h.
Copyright (C) 2002 Free Software Foundation, Inc.
Contributed by Ivan Guzvinec <ivang@opencores.org>
 
18,8 → 18,8
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
 
#ifndef _ELF_OR1K_H
#define _ELF_OR1K_H
#ifndef _ELF_OR32_H
#define _ELF_OR32_H
 
#include "elf/reloc-macros.h"
 
59,4 → 59,4
builds when those objects \
are not to be furhter \
relocated. */
#endif /* _ELF_OR1K_H */
#endif /* _ELF_OR32_H */
/elf/reloc-macros.h
43,6 → 43,34
R_foo_count
};
 
Note: The value of the symbol defined in the END_RELOC_NUMBERS
macro (R_foo_count in the case of the example above) will be
set to the value of the whichever *_RELOC macro preceeds it plus
one. Therefore if you intend to use the symbol as a sentinel for
the highest valid macro value you should make sure that the
preceeding *_RELOC macro is the highest valid number. ie a
declaration like this:
 
START_RELOC_NUMBERS (foo)
RELOC_NUMBER (R_foo_NONE, 0)
RELOC_NUMBER (R_foo_32, 1)
FAKE_RELOC (R_foo_illegal, 9)
FAKE_RELOC (R_foo_synonym, 0)
END_RELOC_NUMBERS (R_foo_count)
 
will result in R_foo_count having a value of 1 (R_foo_synonym + 1)
rather than 10 or 2 as might be expected.
 
Alternatively you can assign a value to END_RELOC_NUMBERS symbol
explicitly, like this:
 
START_RELOC_NUMBERS (foo)
RELOC_NUMBER (R_foo_NONE, 0)
RELOC_NUMBER (R_foo_32, 1)
FAKE_RELOC (R_foo_illegal, 9)
FAKE_RELOC (R_foo_synonym, 0)
END_RELOC_NUMBERS (R_foo_count = 2)
 
If RELOC_MACROS_GEN_FUNC *is* defined, then instead the
following function will be generated:
 
/elf/avr.h
24,7 → 24,7
#include "elf/reloc-macros.h"
 
/* Processor specific flags for the ELF header e_flags field. */
#define EF_AVR_MACH 0xf
#define EF_AVR_MACH 0x7F
 
/* If bit #7 is set, it is assumed that the elf file uses local symbols
as reference for the relocations so that linker relaxation is possible. */
32,9 → 32,13
 
#define E_AVR_MACH_AVR1 1
#define E_AVR_MACH_AVR2 2
#define E_AVR_MACH_AVR25 25
#define E_AVR_MACH_AVR3 3
#define E_AVR_MACH_AVR31 31
#define E_AVR_MACH_AVR35 35
#define E_AVR_MACH_AVR4 4
#define E_AVR_MACH_AVR5 5
#define E_AVR_MACH_AVR51 51
#define E_AVR_MACH_AVR6 6
 
/* Relocations. */
/elf/ChangeLog
1,3 → 1,362
2009-12-17 Alan Modra <amodra@bigpond.net.au>
 
* ppc.h (R_PPC_RELAX32, R_PPC_RELAX32PC, R_PPC_RELAX32_PLT,
R_PPC_RELAX32PC_PLT): Delete.
(R_PPC_RELAX, R_PPC_RELAX_PLT, R_PPC_RELAX_PLTREL24): Define.
 
2009-09-21 Alan Modra <amodra@bigpond.net.au>
 
* ppc.h (DT_PPC_TLSOPT): Define.
* ppc64.h (DT_PPC64_TLSOPT): Define.
 
2009-08-10 Daniel Gutson <dgutson@codesourcery.com>
 
* arm.h: (SHT_ARM_DEBUGOVERLAY): New define.
(SHT_ARM_OVERLAYSECTION): New define.
 
2006-08-09 Bernd Schmidt <bernd.schmidt@analog.com>
 
From Mike Frysinger <michael.frysinger@analog.com>
* bfin.h (R_BFIN_UNUSED, R_BFIN_PCREL5M2, R_BFIN_UNUSED1,
R_BFIN_PCREL10, R_BFIN_PCREL12_JUMP, R_BFIN_RIMM16,
R_BFIN_LUIMM16, R_BFIN_HUIMM16, R_BFIN_PCREL12_JUMP_S,
R_BFIN_PCREL24_JUMP_X, R_BFIN_PCREL24, R_BFIN_UNUSEDB,
R_BFIN_UNUSEDC, R_BFIN_PCREL24_JUMP_L, R_BFIN_PCREL24_CALL_X,
R_BFIN_VAR_EQ_SYMB, R_BFIN_BYTE_DATA, R_BFIN_BYTE2_DATA,
R_BFIN_BYTE4_DATA, R_BFIN_PCREL11, R_BFIN_PUSH, R_BFIN_CONST,
R_BFIN_ADD, R_BFIN_SUB, R_BFIN_MULT, R_BFIN_DIV, R_BFIN_MOD,
R_BFIN_LSHIFT, R_BFIN_RSHIFT, R_BFIN_AND, R_BFIN_OR, R_BFIN_XOR,
R_BFIN_LAND, R_BFIN_LOR, R_BFIN_LEN, R_BFIN_NEG, R_BFIN_COMP,
R_BFIN_PAGE, R_BFIN_HWPAGE, R_BFIN_ADDR, R_BFIN_PLTPLC,
R_BFIN_GOT, R_BFIN_MAX): Renamed from R_unused0, R_pcrel5ms,
R_unused1, R_pcrel10, R_pcrel12_jump, R_rimm16, R_luimm16,
R_huimm16, R_pcrel12_jump_s, R_pcrel24_jump_x, R_pcrel24,
R_unusedb, R_unusedc, R_pcrel24_jump_l, R_pcrel24_call_x,
R_var_eq_symb, R_byte_data, R_byte2_data, R_byte4_data, R_pcrel11,
R_push, R_const, R_add, R_sub, R_mult, R_div, R_mod, R_lshift,
R_rshift, R_and, R_or, R_xor, R_land, R_lor, R_len, R_neg, R_comp,
R_page, R_hwpage, R_addr, R_pltpc, R_got.
2009-08-09 Michael Eager <eager@eagercon.com>
 
* elf/common.h: Define EM_resnnn reserved values. Add EM_AVR32,
EM_STM8, EM_TILE64, EM_TILEPRO. Change EM_MICROBLAZE.
 
2009-08-06 Michael Eager <eager@eagercon.com>
 
* elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
* elf/microblaze.h: New reloc definitions.
 
2009-07-30 Alan Modra <amodra@bigpond.net.au>
 
* ppc64.h: Add R_PPC64_JMP_IREL, R_PPC64_REL16, R_PPC64_REL16_LO,
R_PPC64_REL16_HI, R_PPC64_REL16_HA.
 
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
 
* common.h (EM_L1OM): New.
 
2009-07-24 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
Alan Modra <amodra@bigpond.net.au>
 
* spu.h (R_SPU_ADD_PIC): New.
 
2009-07-23 Ulrich Drepper <drepper@redhat.com>
 
* common.h (STB_GNU_UNIQUE): Define.
 
2009-07-10 Tom Tromey <tromey@redhat.com>
 
* dwarf2.h: Move to `..'.
 
2009-07-10 H.J. Lu <hongjiu.lu@intel.com>
 
* dwarf2.h: Just include ../dwarf2.h.
 
2009-07-10 Alan Modra <amodra@bigpond.net.au>
 
* ppc.h (R_PPC_IRELATIVE): Add.
(R_PPC_RELAX32, R_PPC_RELAX32PC,
R_PPC_RELAX32_PLT, R_PPC_RELAX32PC_PLT): Renumber.
* ppc64.h (R_PPC64_IRELATIVE): Add.
 
2009-07-03 Jakub Jelinek <jakub@redhat.com>
 
* dwarf2.h (enum dwarf_location_atom): Add DW_OP_implicit_value
and DW_OP_stack_value.
 
2009-06-22 Alan Modra <amodra@bigpond.net.au>
 
* ppc.h (R_PPC_RELAX*): Define as enum.
 
2009-06-11 Anthony Green <green@moxielogic.org>
 
* moxie.h (R_MOXIE_PCREL10): New.
 
2009-06-01 H.J. Lu <hongjiu.lu@intel.com>
 
PR ld/10205
* i386.h (R_386_IRELATIVE): New.
* x86-64.h (R_X86_64_IRELATIVE): Likewise.
 
2009-05-27 H.J. Lu <hongjiu.lu@intel.com>
 
* common.h: Update comments for dynamic tag ranges.
 
2009-04-30 DJ Delorie <dj@redhat.com>
 
* mep.h (EF_MEP_COP_*): New.
(EF_MEP_ALL_FLAGS): Add them.
 
2009-04-30 Nick Clifton <nickc@redhat.com>
 
* common.h (STT_GNU_IFUNC): Define.
 
2009-04-24 Cary Coutant <ccoutant@google.com>
 
* dwarf2.h (DW_LNE_set_discriminator): New enum value.
 
2009-04-15 Anthony Green <green@moxielogic.com>
 
* common.h (EM_MOXIE): Define.
* moxie.h: New file.
 
2009-04-07 DJ Delorie <dj@redhat.com>
 
* mep.h (EF_MEP_CPU_C5): New.
 
2009-04-01 H.J. Lu <hongjiu.lu@intel.com>
 
* common.h (EM_INTEL178): Removed.
(EM_INTEL179): Likewise.
(EM_ETPU): New.
(EM_SLE9X): Likewise.
(EM_INTEL181): Likewise.
(EM_INTEL182): Likewise.
 
2009-03-31 H.J. Lu <hongjiu.lu@intel.com>
 
* common.h (EM_INTEL178): New.
(EM_INTEL179): Likewise.
(EM_INTEL180): Likewise.
 
2009-03-20 Mikolaj Zalewski <mikolajz@google.com>
 
* common.h (SHT_GNU_INCREMENTAL_INPUTS): Define.
 
2009-03-14 Mark Kettenis <kettenis@gnu.org>
 
* common.h (NT_OPENBSD_PROCINFO, NT_OPENBSD_AUXV)
(NT_OPENBSD_REGS, NT_OPENBSD_FPREGS, NT_OPENBSD_XFPREGS)
(NT_OPENBSD_WCOOKIE): New defines.
 
2009-03-16 Jan Kratochvil <jan.kratochvil@redhat.com>
 
* common.h (AT_RANDOM): Define.
 
2009-03-04 Alan Modra <amodra@bigpond.net.au>
 
* ppc.h (R_PPC_TLSGD, R_PPC_TLSLD): Add new relocs.
* ppc64.h (R_PPC64_TLSGD, R_PPC64_TLSLD): Add new relocs.
 
2009-03-02 Qinwei <qinwei@sunnorth.com.cn>
 
* score.h (RELOC_NUMBER): Add R_SCORE_IMM32.
* common.h (EM_SCORE_OLD): Define.
 
2009-02-23 H.J. Lu <hongjiu.lu@intel.com>
 
* common.h (STB_LOPROC): Replace Application-specific with
Processor-specific in comments.
(STB_HIPROC): Likewise.
(STT_LOPROC): Likewise.
(STT_HIPROC): Likewise.
 
2009-02-03 Sandip Matte <sandip@rmicorp.com>
 
* mips.h (E_MIPS_MACH_XLR): Define.
 
2009-02-03 Maxim Kuvyrkov <maxim@codesourcery.com>
 
* m68k.h: Map TLS relocations to numbers.
 
2009-01-15 Andrew Stubbs <ams@codesourcery.com>
Julian Brown <julian@codesourcery.com>
 
* arm.h (TAG_CPU_ARCH_V6_M, TAG_CPU_ARCH_V6S_M): New defines.
(MAX_TAG_CPU_ARCH, TAG_CPU_ARCH_V4T_PLUS_V6_M): New defines.
(Tag_NEON_arch): Rename to Tag_Advanced_SIMD_arch to match ARM ABI
version 2.07.
(Tag_undefined39, Tag_nodefaults): New enum values.
(Tag_also_compatible_with, Tag_T2EE_use): Likewise.
(Tag_conformance, Tag_Virtualization_use): Likewise.
(Tag_undefined69, Tag_MPextension_use): Likewise.
 
2009-01-15 Douglas B Rupp <rupp@gnat.com>
 
* ia64.h (SHT_IA_64_VMS_DISPLAY_NAME_INFO, EF_IA_64_ARCHVER_1):
New macros. Minor reformatting.
 
2008-12-23 Jon Beniston <jon@beniston.com>
 
* lm32.h: New file.
 
2008-12-23 Nick Clifton <nickc@redhat.com>
 
* commmon.h (STT_IFUNC): Delete.
 
2008-12-20 Hans-Peter Nilsson <hp@axis.com>
 
* cris.h (R_CRIS_32_IE): New relocation.
 
2008-12-03 Nick Clifton <nickc@redhat.com>
 
* common.h (STT_IFUNC): Define.
 
2008-11-27 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 
* cr16.h (R_CR16_GOT_REGREL20, R_CR16_GOTC_REGREL20 and
R_CR16_GLOB_DAT): New relocations.
 
2008-11-25 Hans-Peter Nilsson <hp@axis.com>
 
* cris.h (R_CRIS_32_TPREL): Correct comment.
(R_CRIS_DTPMOD): Open up for use elsewhere than the fourth GOT entry.
 
2008-11-18 Catherine Moore <clm@codesourcery.com>
 
* arm.h (Tag_ABI_FP_16bit_format): Define.
 
2008-11-14 Nathan Sidwell <nathan@codesourcery.com>
 
* internal.h (struct elf_segment_map): Add header_size field.
2008-10-13 Ulrich Weigand <uweigand@de.ibm.com>
 
* common.h (AT_BASE_PLATFORM, AT_EXECFN): Define.
 
2008-10-10 Nathan Froyd <froydnj@codesourcery.com>
 
* ppc.h: Add Tag_GNU_Power_ABI_Struct_Return.
 
2008-10-04 Hans-Peter Nilsson <hp@axis.com>
 
* cris.h (R_CRIS_32_GOT_GD, R_CRIS_16_GOT_GD, R_CRIS_32_GD)
(R_CRIS_DTP, R_CRIS_32_DTPREL, R_CRIS_16_DTPREL, R_CRIS_DTPMOD)
(R_CRIS_32_GOT_TPREL, R_CRIS_16_GOT_TPREL, R_CRIS_32_TPREL)
(R_CRIS_16_TPREL): New relocations.
 
2008-08-20 Bob Wilson <bob.wilson@acm.org>
 
* xtensa.h (R_XTENSA_TLSDESC_FN, R_XTENSA_TLSDESC_ARG)
(R_XTENSA_TLS_DTPOFF, R_XTENSA_TLS_TPOFF, R_XTENSA_TLS_FUNC)
(R_XTENSA_TLS_ARG, R_XTENSA_TLS_CALL): New.
 
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
 
* mips.h (STO_MIPS_PLT, ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT)
(STO_MIPS_PIC, DT_MIPS_PLTGOT, DT_MIPS_RWPLT): New macros.
 
2008-08-04 Markus Weiss <weissms@aros.org>
 
* common.h (ELFOSABI_AROS): Update comment.
 
2008-07-26 Michael Eager <eager@eagercon.com>
 
* ppc.h: Add description of single-precision.
 
2008-07-21 Luis Machado <luisgpm@br.ibm.com>
 
* common.h: Define NT_PPC_VSX.
 
2008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
 
* mips.h (ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): New macros.
 
2008-06-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 
* common.h (EM_CR16): Correct value.
(EM_CR16): Rename to EM_CR16_OLD.
 
2008-06-12 DJ Delorie <dj@redhat.com>
 
* common.h (EM_M32C_NEW): Rename to EM_M32C.
(EM_M32C): Rename to EM_M32C_OLD.
 
2008-06-12 Joseph Myers <joseph@codesourcery.com>
 
* common.h: Update e_machine table.
 
2008-06-09 Takashi Yoshii <yoshii.takashi@renesas.com>
 
* sh.h (EF_SH_BFD_TABLE): Set bfd_mach_sh for EF_SH_UNKNOWN.
 
2008-06-09 Joseph Myers <joseph@codesourcery.com>
 
* common.h: Change registry@caldera.com to registry@sco.com.
 
2008-05-21 Nick Clifton <nickc@redhat.com>
 
* reloc-macros.h: Add a comment about the use of the
END_RELOC_NUMBERS symbol as a sentinel value.
 
2008-05-15 Christophe Lyon <christophe.lyon@st.com>
* arm.h (END_RELOC_NUMBERS): Provide a maximum value.
 
2008-04-16 David S. Miller <davem@davemloft.net>
 
* elf/sparc.h (R_SPARC_GOTDATA_HIX22,
R_SPARC_GOTDATA_LOX10, R_SPARC_GOTDATA_OP_HIX22,
R_SPARC_GOTDATA_OP_LOX10, R_SPARC_GOTDATA_OP,
R_SPARC_H34, R_SPARC_SIZE32, R_SPARC_SIZE64): New relocs.
 
2008-03-24 Ian Lance Taylor <iant@google.com>
 
* common.h (NT_GNU_GOLD_VERSION): Define.
 
2008-03-13 Alan Modra <amodra@bigpond.net.au>
 
* internal.h (Elf_Internal_Shdr): Change sh_link and sh_info from
unsigned long to unsigned int. Change sh_addralign to bfd_vma.
Order struct as for external version.
 
2008-03-12 Alan Modra <amodra@bigpond.net.au>
 
PR 5900
* common.h (SHN_BAD): Delete.
(SHN_LORESERVE .. SHN_HIRESERVE): Move to..
* external.h: ..here.
* internal.h (SHN_LORESERVE, SHN_HIRESERVE): Define.
(SHN_LOPROC, SHN_HIPROC, SHN_LOOS, SHN_HIOS): Define.
(SHN_ABS, SHN_COMMON, SHN_XINDEX, SHN_BAD): Define.
 
2008-03-12 Alan Modra <amodra@bigpond.net.au>
 
* cr16c.h (SHN_CR16C_FCOMMON): Define using SHN_LORESERVE.
(SHN_CR16C_NCOMMON): Likewise.
* hppa.h (SHN_PARISC_ANSI_COMMON): Likewise.
(SHN_PARISC_HUGE_COMMON): Likewise.
* ia64.h (SHN_IA_64_ANSI_COMMON): Likewise.
(SHN_IA_64_VMS_SYMVEC): Define using SHN_LOOS.
* m32r.h (SHN_M32R_SCOMMON): Define using SHN_LORESERVE.
* mips.h (SHN_MIPS_ACOMMON, SHN_MIPS_TEXT): Likewise.
(SHN_MIPS_DATA, SHN_MIPS_SCOMMON, SHN_MIPS_SUNDEFINED): Likewise.
* score.h (SHN_SCORE_TEXT, SHN_SCORE_DATA): Likewise.
(SHN_SCORE_SCOMMON): Likewise.
* sparc.h (SHN_BEFORE, SHN_AFTER): Likewise.
* v850.h (SHN_V850_SCOMMON, SHN_V850_TCOMMON): Likewise.
(SHN_V850_ZCOMMON): Likewise.
* x86-64.h (SHN_X86_64_LCOMMON): Likewise.
 
2008-03-03 Pallavi Tambay <pallavi.tambay@amd.com>
 
* dwarf2.h: (enum dwarf_location_atom): Add new DW_OP:
DW_OP_PGI_omp_thread_num.
 
2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
 
* mips.h: Update copyright.
6,27 → 365,27
2008-01-30 Tristan Gingold <gingold@adacore.com>
 
Add OpenVMS extensions.
* ia64.h (SHF_IA_64_VMS_GLOBAL, SHF_IA_64_VMS_OVERLAID)
(SHF_IA_64_VMS_SHARED, SHF_IA_64_VMS_VECTOR)
* ia64.h (SHF_IA_64_VMS_GLOBAL, SHF_IA_64_VMS_OVERLAID)
(SHF_IA_64_VMS_SHARED, SHF_IA_64_VMS_VECTOR)
(SHF_IA_64_VMS_ALLOC_64BIT, SHF_IA_64_VMS_PROTECTED)
(SHT_IA_64_VMS_TRACE, SHT_IA_64_VMS_TIE_SIGNATURES)
(SHT_IA_64_VMS_DEBUG, SHT_IA_64_VMS_DEBUG_STR)
(SHT_IA_64_VMS_LINKAGES, SHT_IA_64_VMS_SYMBOL_VECTOR)
(SHT_IA_64_VMS_FIXUP, DT_IA_64_VMS_SUBTYPE)
(DT_IA_64_VMS_IMGIOCNT, DT_IA_64_VMS_LNKFLAGS)
(DT_IA_64_VMS_VIR_MEM_BLK_SIZ, DT_IA_64_VMS_IDENT)
(DT_IA_64_VMS_NEEDED_IDENT, DT_IA_64_VMS_IMG_RELA_CNT)
(DT_IA_64_VMS_SEG_RELA_CNT, DT_IA_64_VMS_FIXUP_RELA_CNT)
(DT_IA_64_VMS_FIXUP_NEEDED, DT_IA_64_VMS_SYMVEC_CNT)
(DT_IA_64_VMS_XLATED, DT_IA_64_VMS_STACKSIZE)
(DT_IA_64_VMS_UNWINDSZ, DT_IA_64_VMS_UNWIND_CODSEG)
(DT_IA_64_VMS_UNWIND_INFOSEG, DT_IA_64_VMS_LINKTIME)
(DT_IA_64_VMS_SEG_NO, DT_IA_64_VMS_SYMVEC_OFFSET)
(DT_IA_64_VMS_SYMVEC_SEG, DT_IA_64_VMS_UNWIND_OFFSET)
(DT_IA_64_VMS_UNWIND_SEG, DT_IA_64_VMS_STRTAB_OFFSET)
(DT_IA_64_VMS_SYSVER_OFFSET, DT_IA_64_VMS_IMG_RELA_OFF)
(DT_IA_64_VMS_SEG_RELA_OFF, DT_IA_64_VMS_FIXUP_RELA_OFF)
(DT_IA_64_VMS_PLTGOT_OFFSET, DT_IA_64_VMS_PLTGOT_SEG)
(SHT_IA_64_VMS_TRACE, SHT_IA_64_VMS_TIE_SIGNATURES)
(SHT_IA_64_VMS_DEBUG, SHT_IA_64_VMS_DEBUG_STR)
(SHT_IA_64_VMS_LINKAGES, SHT_IA_64_VMS_SYMBOL_VECTOR)
(SHT_IA_64_VMS_FIXUP, DT_IA_64_VMS_SUBTYPE)
(DT_IA_64_VMS_IMGIOCNT, DT_IA_64_VMS_LNKFLAGS)
(DT_IA_64_VMS_VIR_MEM_BLK_SIZ, DT_IA_64_VMS_IDENT)
(DT_IA_64_VMS_NEEDED_IDENT, DT_IA_64_VMS_IMG_RELA_CNT)
(DT_IA_64_VMS_SEG_RELA_CNT, DT_IA_64_VMS_FIXUP_RELA_CNT)
(DT_IA_64_VMS_FIXUP_NEEDED, DT_IA_64_VMS_SYMVEC_CNT)
(DT_IA_64_VMS_XLATED, DT_IA_64_VMS_STACKSIZE)
(DT_IA_64_VMS_UNWINDSZ, DT_IA_64_VMS_UNWIND_CODSEG)
(DT_IA_64_VMS_UNWIND_INFOSEG, DT_IA_64_VMS_LINKTIME)
(DT_IA_64_VMS_SEG_NO, DT_IA_64_VMS_SYMVEC_OFFSET)
(DT_IA_64_VMS_SYMVEC_SEG, DT_IA_64_VMS_UNWIND_OFFSET)
(DT_IA_64_VMS_UNWIND_SEG, DT_IA_64_VMS_STRTAB_OFFSET)
(DT_IA_64_VMS_SYSVER_OFFSET, DT_IA_64_VMS_IMG_RELA_OFF)
(DT_IA_64_VMS_SEG_RELA_OFF, DT_IA_64_VMS_FIXUP_RELA_OFF)
(DT_IA_64_VMS_PLTGOT_OFFSET, DT_IA_64_VMS_PLTGOT_SEG)
(DT_IA_64_VMS_FPMODE, SHN_IA_64_VMS_SYMVEC): Define
 
2008-01-16 Mark Kettenis <kettenis@gnu.org>
38,9 → 397,9
* dwarf2.h (DW_AT_hi_user): Correct value.
 
2007-12-07 Bob Wilson <bob.wilson@acm.org>
 
* xtensa.h (R_XTENSA_32_PCREL): New.
 
2007-11-29 Mark Shinwell <shinwell@codesourcery.com>
 
* mips.h (E_MIPS_MACH_LS2E): New.
51,6 → 410,11
* internal.h (ELF_IS_SECTION_IN_SEGMENT): Adjust to cope with
segments at the end of memory.
 
2007-11-17 Thiemo Seufer <ths@mips.com>
 
* mips.h (Tag_GNU_MIPS_ABI_FP): Mention -mips32r2 -mfp64 variant
in comment.
 
2007-11-16 Nick Clifton <nickc@redhat.com>
 
* dwarf2.h: Mention the location of the DWARF3 spec on the web.
242,6 → 606,10
(EF_SCORE_FIXDEP): Redefine EF_SCORE_FIXDEP as 0x40000000.
(EF_SCORE_HASENTRY): Delete.
 
2006-10-17 Mark Shinwell <shinwell@codesourcery.com>
 
* arm.h: Define TAG_CPU_ARCH_* constants.
 
2006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
 
* score.h: New file.
277,6 → 645,21
 
* avr.h: Add E_AVR_MACH_AVR6, R_AVR_LO8_LDI_GS and R_AVR_HI8_LDI_GS.
 
2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
 
* bfin.h (R_BFIN_GOT17M4, R_BFIN_GOTHI, R_BFIN_GOTLO,
R_BFIN_FUNCDESC, R_BFIN_FUNCDESC_GOT17M4, R_BFIN_FUNCDESC_GOTHI,
R_BFIN_FUNCDESC_GOTLO, R_BFIN_FUNCDESC_VALUE,
R_BFIN_FUNCDESC_GOTOFF17M4, R_BFIN_FUNCDESC_GOTOFFHI,
R_BFIN_FUNCDESC_GOTOFFLO, R_BFIN_GOTOFF17M4, R_BFIN_GOTOFFHI,
R_BFIN_GOTOFFLO): New relocs.
(EF_BFIN_PIC, EF_BFIN_FDPIC, EF_BFIN_PIC_FLAGS): New macros.
 
2006-03-23 Michael Matz <matz@suse.de>
 
* x86-64.h: Add the new relocations with their official
numbers.
 
2006-03-22 Richard Sandiford <richard@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Phil Edwards <phil@codesourcery.com>
336,6 → 719,10
(DW_LANG_PLI, DW_LANG_ObjC, DW_LANG_ObjC_plus_plus, DW_LANG_UPC,
DW_LANG_D): New.
 
2006-02-06 Steve Ellcey <sje@cup.hp.com>
 
* ia64.h (SHF_IA_64_HP_TLS): New.
 
2006-02-24 DJ Delorie <dj@redhat.com>
 
* m32c.h: Add relax relocs.
385,6 → 772,10
* common.h (EM_MT): Renamed.
* mt.h: Rename relocs, cpu & other defines.
 
2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
 
* mt.h: Renamed from ms1.h
 
2005-12-12 Paul Brook <paul@codesourcery.com>
 
* arm.h (elf32_arm_get_eabi_attr_int): Add prototype.
395,6 → 786,15
* mips.h (STO_OPTIONAL): Define.
(ELF_MIPS_IS_OPTIONAL): Define.
 
2005-11-07 Nathan Sidwell <nathan@codesourcery.com>
 
Add ms2.
* ms1.h (EF_MS1_CPU_MS2): New.
 
2005-11-06 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
 
* hppa.h (R_PARISC_DIR64WR, R_PARISC_DIR64DR): Remove relocs.
 
2005-09-30 Catherine Moore <clm@cm00re.com>
 
* bfin.h: New file.
451,6 → 851,10
* common.h (EM_M32C): New machine number.
* m32c.h: New file.
 
2005-06-17 Jakub Jelinek <jakub@redhat.com>
 
* external.h (GRP_ENTRY_SIZE): Define.
 
2005-06-17 Jan Beulich <jbeulich@novell.com>
 
* x86-64.h (elf_x86_64_reloc_type): Adjust comment for
/elf/xtensa.h
1,5 → 1,5
/* Xtensa ELF support for BFD.
Copyright 2003, 2004, 2007 Free Software Foundation, Inc.
Copyright 2003, 2004, 2007, 2008 Free Software Foundation, Inc.
Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
 
This file is part of BFD, the Binary File Descriptor library.
76,6 → 76,13
RELOC_NUMBER (R_XTENSA_SLOT12_ALT, 47)
RELOC_NUMBER (R_XTENSA_SLOT13_ALT, 48)
RELOC_NUMBER (R_XTENSA_SLOT14_ALT, 49)
RELOC_NUMBER (R_XTENSA_TLSDESC_FN, 50)
RELOC_NUMBER (R_XTENSA_TLSDESC_ARG, 51)
RELOC_NUMBER (R_XTENSA_TLS_DTPOFF, 52)
RELOC_NUMBER (R_XTENSA_TLS_TPOFF, 53)
RELOC_NUMBER (R_XTENSA_TLS_FUNC, 54)
RELOC_NUMBER (R_XTENSA_TLS_ARG, 55)
RELOC_NUMBER (R_XTENSA_TLS_CALL, 56)
END_RELOC_NUMBERS (R_XTENSA_max)
 
/* Processor-specific flags for the ELF header e_flags field. */
/elf/ia64.h
1,5 → 1,5
/* IA-64 ELF support for BFD.
Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2008
Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2008, 2009
Free Software Foundation, Inc.
Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
 
24,8 → 24,9
 
/* Bits in the e_flags field of the Elf64_Ehdr: */
 
#define EF_IA_64_MASKOS 0x0000000f /* OS-specific flags. */
#define EF_IA_64_ARCH 0xff000000 /* Arch. version mask. */
#define EF_IA_64_MASKOS 0x0000000f /* OS-specific flags. */
#define EF_IA_64_ARCH 0xff000000 /* Arch. version mask. */
#define EF_IA_64_ARCHVER_1 (1 << 24) /* Arch. version level 1 compat. */
 
/* ??? These four definitions are not part of the SVR4 ABI.
They were present in David's initial code drop, so it is probable
84,22 → 85,24
/* OpenVMS section types. */
/* The section contains PC-to-source correlation information for use by the
VMS RTL's traceback facility. */
#define SHT_IA_64_VMS_TRACE 0x60000000
#define SHT_IA_64_VMS_TRACE 0x60000000
/* The section contains routine signature information for use by the
translated image executive. */
#define SHT_IA_64_VMS_TIE_SIGNATURES 0x60000001
#define SHT_IA_64_VMS_TIE_SIGNATURES 0x60000001
/* The section contains dwarf-3 information. */
#define SHT_IA_64_VMS_DEBUG 0x60000002
#define SHT_IA_64_VMS_DEBUG 0x60000002
/* The section contains the dwarf-3 string table. */
#define SHT_IA_64_VMS_DEBUG_STR 0x60000003
#define SHT_IA_64_VMS_DEBUG_STR 0x60000003
/* The section contains linkage information to perform consistency checking
accross object modules. */
#define SHT_IA_64_VMS_LINKAGES 0x60000004
#define SHT_IA_64_VMS_LINKAGES 0x60000004
/* The section allows the symbol vector in an image to be location through
the section table. */
#define SHT_IA_64_VMS_SYMBOL_VECTOR 0x60000005
#define SHT_IA_64_VMS_SYMBOL_VECTOR 0x60000005
/* The section contains inter-image fixups. */
#define SHT_IA_64_VMS_FIXUP 0x60000006
#define SHT_IA_64_VMS_FIXUP 0x60000006
/* The section contains unmangled name info. */
#define SHT_IA_64_VMS_DISPLAY_NAME_INFO 0x60000007
 
/* Bits in the p_flags field of Elf64_Phdr: */
 
158,11 → 161,11
/* This section only used by HP-UX, The HP linker gives weak symbols
precedence over regular common symbols. We want common to override
weak. Using this common instead of SHN_COMMON does that. */
#define SHN_IA_64_ANSI_COMMON 0xFF00
#define SHN_IA_64_ANSI_COMMON SHN_LORESERVE
 
/* This section is only used by OpenVMS. Symbol is defined in the symbol
vector (only possible for image files). */
#define SHN_IA_64_VMS_SYMVEC 0xff20
#define SHN_IA_64_VMS_SYMVEC SHN_LOOS
 
/* IA64-specific relocation types: */
 
/elf/spu.h
1,6 → 1,6
/* SPU ELF support for BFD.
 
Copyright 2006, 2007 Free Software Foundation, Inc.
Copyright 2006, 2007, 2009 Free Software Foundation, Inc.
 
This file is part of BFD, the Binary File Descriptor library.
 
42,6 → 42,7
RELOC_NUMBER (R_SPU_ADDR16X, 14)
RELOC_NUMBER (R_SPU_PPU32, 15)
RELOC_NUMBER (R_SPU_PPU64, 16)
RELOC_NUMBER (R_SPU_ADD_PIC, 17)
END_RELOC_NUMBERS (R_SPU_max)
 
/* Program header extensions */
/elf/mips.h
1,6 → 1,6
/* MIPS ELF support for BFD.
Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
2003, 2004, 2005, 2008
2003, 2004, 2005, 2008, 2009
Free Software Foundation, Inc.
 
By Ian Lance Taylor, Cygnus Support, <ian@cygnus.com>, from
214,6 → 214,7
#define E_MIPS_MACH_4111 0x00880000
#define E_MIPS_MACH_SB1 0x008a0000
#define E_MIPS_MACH_OCTEON 0x008b0000
#define E_MIPS_MACH_XLR 0x008c0000
#define E_MIPS_MACH_5400 0x00910000
#define E_MIPS_MACH_5500 0x00980000
#define E_MIPS_MACH_9000 0x00990000
226,21 → 227,21
 
/* Defined and allocated common symbol. Value is virtual address. If
relocated, alignment must be preserved. */
#define SHN_MIPS_ACOMMON 0xff00
#define SHN_MIPS_ACOMMON SHN_LORESERVE
 
/* Defined and allocated text symbol. Value is virtual address.
Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables. */
#define SHN_MIPS_TEXT 0xff01
#define SHN_MIPS_TEXT (SHN_LORESERVE + 1)
 
/* Defined and allocated data symbol. Value is virtual address.
Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables. */
#define SHN_MIPS_DATA 0xff02
#define SHN_MIPS_DATA (SHN_LORESERVE + 2)
 
/* Small common symbol. */
#define SHN_MIPS_SCOMMON 0xff03
#define SHN_MIPS_SCOMMON (SHN_LORESERVE + 3)
 
/* Small undefined symbol. */
#define SHN_MIPS_SUNDEFINED 0xff04
#define SHN_MIPS_SUNDEFINED (SHN_LORESERVE + 4)
/* Processor specific section types. */
 
662,6 → 663,12
 
/* Address of auxiliary .dynamic. */
#define DT_MIPS_AUX_DYNAMIC 0x70000031
 
/* Address of the base of the PLTGOT. */
#define DT_MIPS_PLTGOT 0x70000032
 
/* Points to the base of a writable PLT. */
#define DT_MIPS_RWPLT 0x70000034
/* Flags which may appear in a DT_MIPS_FLAGS entry. */
 
723,8 → 730,24
#define STO_HIDDEN STV_HIDDEN
#define STO_PROTECTED STV_PROTECTED
 
/* The MIPS psABI was updated in 2008 with support for PLTs and copy
relocs. There are therefore two types of nonzero SHN_UNDEF functions:
PLT entries and traditional MIPS lazy binding stubs. We mark the former
with STO_MIPS_PLT to distinguish them from the latter. */
#define STO_MIPS_PLT 0x8
 
/* This value is used to mark PIC functions in an object that mixes
PIC and non-PIC. */
#define STO_MIPS_PIC 0x20
#define ELF_ST_IS_MIPS_PIC(OTHER) \
(((OTHER) & ~ELF_ST_VISIBILITY (-1)) == STO_MIPS_PIC)
#define ELF_ST_SET_MIPS_PIC(OTHER) \
(STO_MIPS_PIC | ELF_ST_VISIBILITY (OTHER))
 
/* This value is used for a mips16 .text symbol. */
#define STO_MIPS16 0xf0
#define ELF_ST_IS_MIPS16(OTHER) (((OTHER) & 0xf0) == STO_MIPS16)
#define ELF_ST_SET_MIPS16(OTHER) (((OTHER) & ~0xf0) | STO_MIPS16)
 
/* This bit is used on Irix to indicate a symbol whose definition
is optional - if, at final link time, it cannot be found, no
/elf/sparc.h
1,5 → 1,5
/* SPARC ELF support for BFD.
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2003
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2008
Free Software Foundation, Inc.
By Doug Evans, Cygnus Support, <dje@cygnus.com>.
 
45,8 → 45,8
 
/* Section indices. */
 
#define SHN_BEFORE 0xff00 /* used with SHF_ORDERED */
#define SHN_AFTER 0xff01 /* used with SHF_ORDERED */
#define SHN_BEFORE SHN_LORESERVE /* used with SHF_ORDERED */
#define SHN_AFTER (SHN_LORESERVE + 1) /* used with SHF_ORDERED */
 
/* Section flags. */
 
151,6 → 151,16
RELOC_NUMBER (R_SPARC_TLS_DTPOFF64, 77)
RELOC_NUMBER (R_SPARC_TLS_TPOFF32, 78)
RELOC_NUMBER (R_SPARC_TLS_TPOFF64, 79)
 
RELOC_NUMBER (R_SPARC_GOTDATA_HIX22, 80)
RELOC_NUMBER (R_SPARC_GOTDATA_LOX10, 81)
RELOC_NUMBER (R_SPARC_GOTDATA_OP_HIX22, 82)
RELOC_NUMBER (R_SPARC_GOTDATA_OP_LOX10, 83)
RELOC_NUMBER (R_SPARC_GOTDATA_OP, 84)
 
RELOC_NUMBER (R_SPARC_H34, 85)
RELOC_NUMBER (R_SPARC_SIZE32, 86)
RELOC_NUMBER (R_SPARC_SIZE64, 87)
EMPTY_RELOC (R_SPARC_max_std)
 
/elf/internal.h
1,6 → 1,6
/* ELF support for BFD.
Copyright 1991, 1992, 1993, 1994, 1995, 1997, 1998, 2000, 2001, 2002,
2003, 2006, 2007 Free Software Foundation, Inc.
2003, 2006, 2007, 2008 Free Software Foundation, Inc.
 
Written by Fred Fish @ Cygnus Support, from information published
in "UNIX System V Release 4, Programmers Guide: ANSI C and
37,6 → 37,31
#ifndef _ELF_INTERNAL_H
#define _ELF_INTERNAL_H
 
/* Special section indices, which may show up in st_shndx fields, among
other places. */
 
#undef SHN_UNDEF
#undef SHN_LORESERVE
#undef SHN_LOPROC
#undef SHN_HIPROC
#undef SHN_LOOS
#undef SHN_HIOS
#undef SHN_ABS
#undef SHN_COMMON
#undef SHN_XINDEX
#undef SHN_HIRESERVE
#define SHN_UNDEF 0 /* Undefined section reference */
#define SHN_LORESERVE (-0x100u) /* Begin range of reserved indices */
#define SHN_LOPROC (-0x100u) /* Begin range of appl-specific */
#define SHN_HIPROC (-0xE1u) /* End range of appl-specific */
#define SHN_LOOS (-0xE0u) /* OS specific semantics, lo */
#define SHN_HIOS (-0xC1u) /* OS specific semantics, hi */
#define SHN_ABS (-0xFu) /* Associated symbol is absolute */
#define SHN_COMMON (-0xEu) /* Associated symbol is in common */
#define SHN_XINDEX (-0x1u) /* Section index is held elsewhere */
#define SHN_HIRESERVE (-0x1u) /* End range of reserved indices */
#define SHN_BAD (-0x101u) /* Used internally by bfd */
 
/* ELF Header */
 
#define EI_NIDENT 16 /* Size of e_ident[] */
80,12 → 105,12
unsigned int sh_type; /* Type of section */
bfd_vma sh_flags; /* Miscellaneous section attributes */
bfd_vma sh_addr; /* Section virtual addr at execution */
file_ptr sh_offset; /* Section file offset */
bfd_size_type sh_size; /* Size of section in bytes */
unsigned int sh_link; /* Index of another section */
unsigned int sh_info; /* Additional section information */
bfd_vma sh_addralign; /* Section alignment */
bfd_size_type sh_entsize; /* Entry size if section holds table */
unsigned long sh_link; /* Index of another section */
unsigned long sh_info; /* Additional section information */
file_ptr sh_offset; /* Section file offset */
unsigned int sh_addralign; /* Section alignment */
 
/* The internal rep also has some cached info associated with it. */
asection * bfd_section; /* Associated BFD section. */
241,6 → 266,8
bfd_vma p_align;
/* Segment size in file and memory */
bfd_vma p_size;
/* Required size of filehdr + phdrs, if non-zero */
bfd_vma header_size;
/* Whether the p_flags field is valid; if not, the flags are based
on the section flags. */
unsigned int p_flags_valid : 1;
/elf/cr16c.h
1,5 → 1,5
/* CR16C ELF support for BFD.
Copyright 2004 Free Software Foundation, Inc.
Copyright 2004, 2008 Free Software Foundation, Inc.
 
This file is part of BFD, the Binary File Descriptor library.
 
246,8 → 246,8
values have a special meaning. */
 
/* Far common symbol. */
#define SHN_CR16C_FCOMMON 0xff00
#define SHN_CR16C_NCOMMON 0xff01
#define SHN_CR16C_FCOMMON SHN_LORESERVE
#define SHN_CR16C_NCOMMON (SHN_LORESERVE + 1)
 
typedef struct reloc_map
{
/elf/mep.h
1,5 → 1,5
/* Toshiba MeP ELF support for BFD.
Copyright (C) 2001, 2004, 2005 Free Software Foundation, Inc.
Copyright (C) 2001, 2004, 2005, 2007, 2009 Free Software Foundation, Inc.
 
This file is part of BFD, the Binary File Descriptor library.
 
73,12 → 73,22
#define EF_MEP_CPU_C2 0x01000000 /* MEP c2 */
#define EF_MEP_CPU_C3 0x02000000 /* MEP c3 */
#define EF_MEP_CPU_C4 0x04000000 /* MEP c4 */
/* 5..7 are reseved */
#define EF_MEP_CPU_C5 0x08000000 /* MEP c5 */
#define EF_MEP_CPU_H1 0x10000000 /* MEP h1 */
 
#define EF_MEP_COP_MASK 0x00ff0000
#define EF_MEP_COP_NONE 0x00000000
#define EF_MEP_COP_AVC 0x00010000
#define EF_MEP_COP_AVC2 0x00020000
#define EF_MEP_COP_FMAX 0x00030000
/* 4..5 are reserved. */
#define EF_MEP_COP_IVC2 0x00060000
 
#define EF_MEP_LIBRARY 0x00000100 /* Built as a library */
 
#define EF_MEP_INDEX_MASK 0x000000ff /* Configuration index */
 
#define EF_MEP_ALL_FLAGS 0xff0001ff
#define EF_MEP_ALL_FLAGS 0xffff01ff
 
#endif /* _ELF_MEP_H */
/elf/external.h
1,6 → 1,6
/* ELF support for BFD.
Copyright 1991, 1992, 1993, 1995, 1997, 1998, 1999, 2001, 2003, 2005
Free Software Foundation, Inc.
Copyright 1991, 1992, 1993, 1995, 1997, 1998, 1999, 2001, 2003, 2005,
2008 Free Software Foundation, Inc.
 
Written by Fred Fish @ Cygnus Support, from information published
in "UNIX System V Release 4, Programmers Guide: ANSI C and
35,6 → 35,19
#ifndef _ELF_EXTERNAL_H
#define _ELF_EXTERNAL_H
 
/* Special section indices, which may show up in st_shndx fields, among
other places. */
 
#define SHN_LORESERVE 0xFF00 /* Begin range of reserved indices */
#define SHN_LOPROC 0xFF00 /* Begin range of appl-specific */
#define SHN_HIPROC 0xFF1F /* End range of appl-specific */
#define SHN_LOOS 0xFF20 /* OS specific semantics, lo */
#define SHN_HIOS 0xFF3F /* OS specific semantics, hi */
#define SHN_ABS 0xFFF1 /* Associated symbol is absolute */
#define SHN_COMMON 0xFFF2 /* Associated symbol is in common */
#define SHN_XINDEX 0xFFFF /* Section index is held elsewhere */
#define SHN_HIRESERVE 0xFFFF /* End range of reserved indices */
 
/* ELF Header (32-bit implementations) */
 
typedef struct {
/elf/m32r.h
1,5 → 1,6
/* M32R ELF support for BFD.
Copyright 1996, 1997, 1998, 1999, 2000, 2003, 2004 Free Software Foundation, Inc.
Copyright 1996, 1997, 1998, 1999, 2000, 2003, 2004, 2008
Free Software Foundation, Inc.
 
This file is part of BFD, the Binary File Descriptor library.
 
80,7 → 81,7
values have a special meaning. */
 
/* Small common symbol. */
#define SHN_M32R_SCOMMON 0xff00
#define SHN_M32R_SCOMMON SHN_LORESERVE
 
/* Processor specific section flags. */
 
/elf/m68k.h
1,5 → 1,6
/* MC68k ELF support for BFD.
Copyright 1998, 1999, 2000, 2002, 2005, 2006 Free Software Foundation, Inc.
Copyright 1998, 1999, 2000, 2002, 2005, 2006, 2007, 2009
Free Software Foundation, Inc.
 
This file is part of BFD, the Binary File Descriptor library.
 
50,6 → 51,25
/* These are GNU extensions to enable C++ vtable garbage collection. */
RELOC_NUMBER (R_68K_GNU_VTINHERIT, 23)
RELOC_NUMBER (R_68K_GNU_VTENTRY, 24)
/* TLS static relocations. */
RELOC_NUMBER (R_68K_TLS_GD32, 25)
RELOC_NUMBER (R_68K_TLS_GD16, 26)
RELOC_NUMBER (R_68K_TLS_GD8, 27)
RELOC_NUMBER (R_68K_TLS_LDM32, 28)
RELOC_NUMBER (R_68K_TLS_LDM16, 29)
RELOC_NUMBER (R_68K_TLS_LDM8, 30)
RELOC_NUMBER (R_68K_TLS_LDO32, 31)
RELOC_NUMBER (R_68K_TLS_LDO16, 32)
RELOC_NUMBER (R_68K_TLS_LDO8, 33)
RELOC_NUMBER (R_68K_TLS_IE32, 34)
RELOC_NUMBER (R_68K_TLS_IE16, 35)
RELOC_NUMBER (R_68K_TLS_IE8, 36)
RELOC_NUMBER (R_68K_TLS_LE32, 37)
RELOC_NUMBER (R_68K_TLS_LE16, 38)
RELOC_NUMBER (R_68K_TLS_LE8, 39)
RELOC_NUMBER (R_68K_TLS_DTPMOD32, 40)
RELOC_NUMBER (R_68K_TLS_DTPREL32, 41)
RELOC_NUMBER (R_68K_TLS_TPREL32, 42)
END_RELOC_NUMBERS (R_68K_max)
 
/* We use the top 24 bits to encode information about the
/elf/hppa.h
1,5 → 1,5
/* HPPA ELF support for BFD.
Copyright 1993, 1994, 1995, 1998, 1999, 2000, 2005, 2006
Copyright 1993, 1994, 1995, 1998, 1999, 2000, 2005, 2006, 2008
Free Software Foundation, Inc.
 
This file is part of BFD, the Binary File Descriptor library.
54,11 → 54,11
/* Special section indices. */
/* A symbol that has been declared as a tentative definition in an ANSI C
compilation. */
#define SHN_PARISC_ANSI_COMMON 0xff00
#define SHN_PARISC_ANSI_COMMON SHN_LORESERVE
 
/* A symbol that has been declared as a common block using the
huge memory model. */
#define SHN_PARISC_HUGE_COMMON 0xff01
#define SHN_PARISC_HUGE_COMMON (SHN_LORESERVE + 1)
 
/* Processor specific section types. */
 
/elf/common.h
1,6 → 1,6
/* ELF support for BFD.
Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
2001, 2002, 2003, 2004, 2005, 2006, 2007
2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
Free Software Foundation, Inc.
 
Written by Fred Fish @ Cygnus Support, from information published
73,7 → 73,7
#define ELFOSABI_OPENBSD 12 /* OpenBSD */
#define ELFOSABI_OPENVMS 13 /* OpenVMS */
#define ELFOSABI_NSK 14 /* Hewlett-Packard Non-Stop Kernel */
#define ELFOSABI_AROS 15 /* Amiga Research OS */
#define ELFOSABI_AROS 15 /* AROS */
#define ELFOSABI_ARM 97 /* ARM */
#define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */
 
95,7 → 95,7
#define ET_HIPROC 0xFFFF /* Processor-specific */
 
/* Values for e_machine, which identifies the architecture. These numbers
are officially assigned by registry@caldera.com. See below for a list of
are officially assigned by registry@sco.com. See below for a list of
ad-hoc numbers used during initial development. */
 
#define EM_NONE 0 /* No machine */
109,9 → 109,12
#define EM_MIPS 8 /* MIPS R3000 (officially, big-endian only) */
#define EM_S370 9 /* IBM System/370 */
#define EM_MIPS_RS3_LE 10 /* MIPS R3000 little-endian (Oct 4 1999 Draft) Deprecated */
 
#define EM_res011 11 /* Reserved */
#define EM_res012 12 /* Reserved */
#define EM_res013 13 /* Reserved */
#define EM_res014 14 /* Reserved */
#define EM_PARISC 15 /* HPPA */
 
#define EM_res016 16 /* Reserved */
#define EM_VPP550 17 /* Fujitsu VPP500 */
#define EM_SPARC32PLUS 18 /* Sun's "v8plus" */
#define EM_960 19 /* Intel 80960 */
119,7 → 122,18
#define EM_PPC64 21 /* 64-bit PowerPC */
#define EM_S390 22 /* IBM S/390 */
#define EM_SPU 23 /* Sony/Toshiba/IBM SPU */
 
#define EM_res024 24 /* Reserved */
#define EM_res025 25 /* Reserved */
#define EM_res026 26 /* Reserved */
#define EM_res027 27 /* Reserved */
#define EM_res028 28 /* Reserved */
#define EM_res029 29 /* Reserved */
#define EM_res030 30 /* Reserved */
#define EM_res031 31 /* Reserved */
#define EM_res032 32 /* Reserved */
#define EM_res033 33 /* Reserved */
#define EM_res034 34 /* Reserved */
#define EM_res035 35 /* Reserved */
#define EM_V800 36 /* NEC V800 series */
#define EM_FR20 37 /* Fujitsu FR20 */
#define EM_RH32 38 /* TRW RH32 */
148,7 → 162,7
#define EM_ST100 60 /* STMicroelectronics ST100 processor */
#define EM_TINYJ 61 /* Advanced Logic Corp. TinyJ embedded processor */
#define EM_X86_64 62 /* Advanced Micro Devices X86-64 processor */
 
#define EM_PDSP 63 /* Sony DSP Processor */
#define EM_PDP10 64 /* Digital Equipment Corp. PDP-10 */
#define EM_PDP11 65 /* Digital Equipment Corp. PDP-11 */
#define EM_FX66 66 /* Siemens FX66 microcontroller */
180,14 → 194,103
#define EM_OPENRISC 92 /* OpenRISC 32-bit embedded processor */
#define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */
#define EM_XTENSA 94 /* Tensilica Xtensa Architecture */
#define EM_VIDEOCORE 95 /* Alphamosaic VideoCore processor */
#define EM_TMM_GPP 96 /* Thompson Multimedia General Purpose Processor */
#define EM_NS32K 97 /* National Semiconductor 32000 series */
#define EM_TPC 98 /* Tenor Network TPC processor */
#define EM_SNP1K 99 /* Trebia SNP 1000 processor */
#define EM_ST200 100 /* STMicroelectronics ST200 microcontroller */
#define EM_IP2K 101 /* Ubicom IP2022 micro controller */
#define EM_MAX 102 /* MAX Processor */
#define EM_CR 103 /* National Semiconductor CompactRISC */
#define EM_F2MC16 104 /* Fujitsu F2MC16 */
#define EM_MSP430 105 /* TI msp430 micro controller */
#define EM_BLACKFIN 106 /* ADI Blackfin */
#define EM_SE_C33 107 /* S1C33 Family of Seiko Epson processors */
#define EM_SEP 108 /* Sharp embedded microprocessor */
#define EM_ARCA 109 /* Arca RISC Microprocessor */
#define EM_UNICORE 110 /* Microprocessor series from PKU-Unity Ltd. and MPRC of Peking University */
#define EM_EXCESS 111 /* eXcess: 16/32/64-bit configurable embedded CPU */
#define EM_DXP 112 /* Icera Semiconductor Inc. Deep Execution Processor */
#define EM_ALTERA_NIOS2 113 /* Altera Nios II soft-core processor */
#define EM_CRX 114 /* National Semiconductor CRX */
#define EM_CR16 115 /* National Semiconductor CompactRISC - CR16 */
#define EM_SCORE 135 /* Sunplus Score */
#define EM_XGATE 115 /* Motorola XGATE embedded processor */
#define EM_C166 116 /* Infineon C16x/XC16x processor */
#define EM_M16C 117 /* Renesas M16C series microprocessors */
#define EM_DSPIC30F 118 /* Microchip Technology dsPIC30F Digital Signal Controller */
#define EM_CE 119 /* Freescale Communication Engine RISC core */
#define EM_M32C 120 /* Renesas M32C series microprocessors */
#define EM_res121 121 /* Reserved */
#define EM_res122 122 /* Reserved */
#define EM_res123 123 /* Reserved */
#define EM_res124 124 /* Reserved */
#define EM_res125 125 /* Reserved */
#define EM_res126 126 /* Reserved */
#define EM_res127 127 /* Reserved */
#define EM_res128 128 /* Reserved */
#define EM_res129 129 /* Reserved */
#define EM_res130 130 /* Reserved */
#define EM_TSK3000 131 /* Altium TSK3000 core */
#define EM_RS08 132 /* Freescale RS08 embedded processor */
#define EM_res133 133 /* Reserved */
#define EM_ECOG2 134 /* Cyan Technology eCOG2 microprocessor */
#define EM_SCORE 135 /* Sunplus Score */
#define EM_SCORE7 135 /* Sunplus S+core7 RISC processor */
#define EM_DSP24 136 /* New Japan Radio (NJR) 24-bit DSP Processor */
#define EM_VIDEOCORE3 137 /* Broadcom VideoCore III processor */
#define EM_LATTICEMICO32 138 /* RISC processor for Lattice FPGA architecture */
#define EM_SE_C17 139 /* Seiko Epson C17 family */
#define EM_res140 140 /* Reserved */
#define EM_res141 141 /* Reserved */
#define EM_res142 142 /* Reserved */
#define EM_res143 143 /* Reserved */
#define EM_res144 144 /* Reserved */
#define EM_res145 145 /* Reserved */
#define EM_res146 146 /* Reserved */
#define EM_res147 147 /* Reserved */
#define EM_res148 148 /* Reserved */
#define EM_res149 149 /* Reserved */
#define EM_res150 150 /* Reserved */
#define EM_res151 151 /* Reserved */
#define EM_res152 152 /* Reserved */
#define EM_res153 153 /* Reserved */
#define EM_res154 154 /* Reserved */
#define EM_res155 155 /* Reserved */
#define EM_res156 156 /* Reserved */
#define EM_res157 157 /* Reserved */
#define EM_res158 158 /* Reserved */
#define EM_res159 159 /* Reserved */
#define EM_MMDSP_PLUS 160 /* STMicroelectronics 64bit VLIW Data Signal Processor */
#define EM_CYPRESS_M8C 161 /* Cypress M8C microprocessor */
#define EM_R32C 162 /* Renesas R32C series microprocessors */
#define EM_TRIMEDIA 163 /* NXP Semiconductors TriMedia architecture family */
#define EM_QDSP6 164 /* QUALCOMM DSP6 Processor */
#define EM_8051 165 /* Intel 8051 and variants */
#define EM_STXP7X 166 /* STMicroelectronics STxP7x family */
#define EM_NDS32 167 /* Andes Technology compact code size embedded RISC processor family */
#define EM_ECOG1 168 /* Cyan Technology eCOG1X family */
#define EM_ECOG1X 168 /* Cyan Technology eCOG1X family */
#define EM_MAXQ30 169 /* Dallas Semiconductor MAXQ30 Core Micro-controllers */
#define EM_XIMO16 170 /* New Japan Radio (NJR) 16-bit DSP Processor */
#define EM_MANIK 171 /* M2000 Reconfigurable RISC Microprocessor */
#define EM_CRAYNV2 172 /* Cray Inc. NV2 vector architecture */
#define EM_RX 173 /* Renesas RX family */
#define EM_METAG 174 /* Imagination Technologies META processor architecture */
#define EM_MCST_ELBRUS 175 /* MCST Elbrus general purpose hardware architecture */
#define EM_ECOG16 176 /* Cyan Technology eCOG16 family */
#define EM_CR16 177 /* National Semiconductor CompactRISC 16-bit processor */
#define EM_ETPU 178 /* Freescale Extended Time Processing Unit */
#define EM_SLE9X 179 /* Infineon Technologies SLE9X core */
#define EM_L1OM 180 /* Intel L1OM */
#define EM_INTEL181 181 /* Reserved by Intel */
#define EM_INTEL182 182 /* Reserved by Intel */
#define EM_res183 183 /* Reserved by ARM */
#define EM_res184 184 /* Reserved by ARM */
#define EM_AVR32 185 /* Atmel Corporation 32-bit microprocessor family */
#define EM_STM8 186 /* STMicroeletronics STM8 8-bit microcontroller */
#define EM_TILE64 187 /* Tilera TILE64 multicore architecture family */
#define EM_TILEPRO 188 /* Tilera TILEPro multicore architecture family */
#define EM_MICROBLAZE 189 /* Xilinx MicroBlaze 32-bit RISC soft processor core */
 
/* If it is necessary to assign new unofficial EM_* values, please pick large
random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
198,7 → 301,7
will have a collision. Instead, pick a random number.
 
Normally, each entity or maintainer responsible for a machine with an
unofficial e_machine number should eventually ask registry@caldera.com for
unofficial e_machine number should eventually ask registry@sco.com for
an officially blessed number to be added to the list above. */
 
/* Old version of Sparc v9, from before the ABI;
209,8 → 312,11
#define EM_PPC_OLD 17
 
/* picoJava */
#define EM_PJ_OLD 99
#define EM_PJ_OLD 99
 
/* Old, unofficial value for National Semiconductor CompactRISC - CR16 */
#define EM_CR16_OLD 115
 
/* AVR magic number. Written in the absense of an ABI. */
#define EM_AVR_OLD 0x1057
 
218,7 → 324,7
#define EM_MSP430_OLD 0x1059
 
/* Morpho MT. Written in the absense of an ABI. */
#define EM_MT 0x2530
#define EM_MT 0x2530
 
/* FR30 magic number - no EABI available. */
#define EM_CYGNUS_FR30 0x3330
233,7 → 339,7
#define EM_CYGNUS_FRV 0x5441
 
/* Infineon Technologies 16-bit microcontroller with C166-V2 core. */
#define EM_XC16X 0x4688
#define EM_XC16X 0x4688
 
/* D10V backend magic number. Written in the absence of an ABI. */
#define EM_CYGNUS_D10V 0x7650
248,7 → 354,7
#define EM_OR32 0x8472
 
/* Cygnus PowerPC ELF backend. Written in the absence of an ABI. */
#define EM_CYGNUS_POWERPC 0x9025
#define EM_CYGNUS_POWERPC 0x9025
 
/* Alpha backend magic number. Written in the absence of an ABI. */
#define EM_ALPHA 0x9026
273,7 → 379,7
#define EM_CYGNUS_MN10200 0xdead
 
/* Renesas M32C and M16C. */
#define EM_M32C 0xFEB0
#define EM_M32C_OLD 0xFEB0
 
/* Vitesse IQ2000. */
#define EM_IQ2000 0xFEBA
283,6 → 389,13
 
#define EM_CYGNUS_MEP 0xF00D /* Toshiba MeP */
 
#define EM_MOXIE 0xFEED /* Moxie */
 
/* Old Sunplus S+core7 backend magic number. Written in the absence of an ABI. */
#define EM_SCORE_OLD 95
 
#define EM_MICROBLAZE_OLD 0xbaab /* Old MicroBlaze */
 
/* See the above comment before you add a new EM_* value here. */
 
/* Values for e_version. */
343,6 → 456,7
#define SHT_LOOS 0x60000000 /* First of OS specific semantics */
#define SHT_HIOS 0x6fffffff /* Last of OS specific semantics */
 
#define SHT_GNU_INCREMENTAL_INPUTS 0x6fff4700 /* incremental build data */
#define SHT_GNU_ATTRIBUTES 0x6ffffff5 /* Object attributes */
#define SHT_GNU_HASH 0x6ffffff6 /* GNU style symbol hash table */
#define SHT_GNU_LIBLIST 0x6ffffff7 /* List of prelink dependencies */
392,6 → 506,8
/* note name must be "LINUX". */
#define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */
/* note name must be "LINUX". */
#define NT_PPC_VSX 0x102 /* PowerPC VSX registers */
/* note name must be "LINUX". */
 
/* Note segments for core files on dir-style procfs systems. */
 
409,6 → 525,18
#define NT_NETBSDCORE_PROCINFO 1 /* Has a struct procinfo */
#define NT_NETBSDCORE_FIRSTMACH 32 /* start of machdep note types */
 
 
/* Note segments for core files on OpenBSD systems. Note name is
"OpenBSD". */
 
#define NT_OPENBSD_PROCINFO 10
#define NT_OPENBSD_AUXV 11
#define NT_OPENBSD_REGS 20
#define NT_OPENBSD_FPREGS 21
#define NT_OPENBSD_XFPREGS 22
#define NT_OPENBSD_WCOOKIE 23
 
 
/* Note segments for core files on SPU systems. Note name
must start with "SPU/". */
 
424,6 → 552,7
#define NT_GNU_ABI_TAG 1
#define NT_GNU_HWCAP 2 /* Used by ld.so and kernel vDSO. */
#define NT_GNU_BUILD_ID 3 /* Generated by ld --build-id. */
#define NT_GNU_GOLD_VERSION 4 /* Generated by gold. */
 
/* Values used in GNU .note.ABI-tag notes (NT_GNU_ABI_TAG). */
#define GNU_ABI_TAG_LINUX 0
478,9 → 607,10
#define STB_GLOBAL 1 /* Symbol visible outside obj */
#define STB_WEAK 2 /* Like globals, lower precedence */
#define STB_LOOS 10 /* OS-specific semantics */
#define STB_GNU_UNIQUE 10 /* Symbol is unique in namespace */
#define STB_HIOS 12 /* OS-specific semantics */
#define STB_LOPROC 13 /* Application-specific semantics */
#define STB_HIPROC 15 /* Application-specific semantics */
#define STB_LOPROC 13 /* Processor-specific semantics */
#define STB_HIPROC 15 /* Processor-specific semantics */
 
#define STT_NOTYPE 0 /* Symbol type is unspecified */
#define STT_OBJECT 1 /* Symbol is a data object */
489,28 → 619,14
#define STT_FILE 4 /* Symbol gives a file name */
#define STT_COMMON 5 /* An uninitialised common block */
#define STT_TLS 6 /* Thread local data object */
#define STT_RELC 8 /* Complex relocation expression */
#define STT_SRELC 9 /* Signed Complex relocation expression */
#define STT_RELC 8 /* Complex relocation expression */
#define STT_SRELC 9 /* Signed Complex relocation expression */
#define STT_LOOS 10 /* OS-specific semantics */
#define STT_GNU_IFUNC 10 /* Symbol is an indirect code object */
#define STT_HIOS 12 /* OS-specific semantics */
#define STT_LOPROC 13 /* Application-specific semantics */
#define STT_HIPROC 15 /* Application-specific semantics */
#define STT_LOPROC 13 /* Processor-specific semantics */
#define STT_HIPROC 15 /* Processor-specific semantics */
 
/* Special section indices, which may show up in st_shndx fields, among
other places. */
 
#define SHN_UNDEF 0 /* Undefined section reference */
#define SHN_LORESERVE 0xFF00 /* Begin range of reserved indices */
#define SHN_LOPROC 0xFF00 /* Begin range of appl-specific */
#define SHN_HIPROC 0xFF1F /* End range of appl-specific */
#define SHN_LOOS 0xFF20 /* OS specific semantics, lo */
#define SHN_HIOS 0xFF3F /* OS specific semantics, hi */
#define SHN_ABS 0xFFF1 /* Associated symbol is absolute */
#define SHN_COMMON 0xFFF2 /* Associated symbol is in common */
#define SHN_XINDEX 0xFFFF /* Section index is held elsewhere */
#define SHN_HIRESERVE 0xFFFF /* End range of reserved indices */
#define SHN_BAD ((unsigned) -1) /* Used internally by bfd */
 
/* The following constants control how a symbol may be accessed once it has
become part of an executable or shared library. */
 
577,10 → 693,12
#define DT_LOPROC 0x70000000
#define DT_HIPROC 0x7fffffff
 
/* The next four dynamic tags are used on Solaris. We support them
everywhere. Note these values lie outside of the (new) range for
OS specific values. This is a deliberate special case and we
maintain it for backwards compatability. */
/* The next 2 dynamic tag ranges, integer value range (DT_VALRNGLO to
DT_VALRNGHI) and virtual address range (DT_ADDRRNGLO to DT_ADDRRNGHI),
are used on Solaris. We support them everywhere. Note these values
lie outside of the (new) range for OS specific values. This is a
deliberate special case and we maintain it for backwards compatability.
*/
#define DT_VALRNGLO 0x6ffffd00
#define DT_GNU_PRELINKED 0x6ffffdf5
#define DT_GNU_CONFLICTSZ 0x6ffffdf6
759,6 → 877,10
#define AT_UCACHEBSIZE 21 /* Unified cache block size. */
#define AT_IGNOREPPC 22 /* Entry should be ignored */
#define AT_SECURE 23 /* Boolean, was exec setuid-like? */
#define AT_BASE_PLATFORM 24 /* String identifying real platform,
may differ from AT_PLATFORM. */
#define AT_RANDOM 25 /* Address of 16 random bytes. */
#define AT_EXECFN 31 /* Filename of executable. */
/* Pointer to the global system page used for system calls and other
nice things. */
#define AT_SYSINFO 32
/ansidecl.h
1,5 → 1,6
/* ANSI and traditional C compatability macros
Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001
Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
2002, 2003, 2004, 2005, 2006, 2007, 2009
Free Software Foundation, Inc.
This file is part of the GNU C Library.
 
114,6 → 115,10
#ifndef _ANSIDECL_H
#define _ANSIDECL_H 1
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* Every source file includes this file,
so they will all get the switch for lint. */
/* LINTLIBRARY */
136,7 → 141,7
#define GCC_VERSION (__GNUC__ * 1000 + __GNUC_MINOR__)
#endif /* GCC_VERSION */
 
#if defined (__STDC__) || defined (_AIX) || (defined (__mips) && defined (_SYSTYPE_SVR4)) || defined(_WIN32) || (defined(__alpha) && defined(__cplusplus))
#if defined (__STDC__) || defined(__cplusplus) || defined (_AIX) || (defined (__mips) && defined (_SYSTYPE_SVR4)) || defined(_WIN32)
/* All known AIX compilers implement these things (but don't always
define __STDC__). The RISC/OS MIPS compiler defines these things
in SVR4 mode, but does not define __STDC__. */
173,7 → 178,7
/* inline requires special treatment; it's in C99, and GCC >=2.7 supports
it too, but it's not in C89. */
#undef inline
#if __STDC_VERSION__ > 199901L
#if __STDC_VERSION__ > 199901L || defined(__cplusplus)
/* it's a keyword */
#else
# if GCC_VERSION >= 2007
256,14 → 261,23
# endif /* GNUC >= 2.96 */
#endif /* ATTRIBUTE_MALLOC */
 
/* Attributes on labels were valid as of gcc 2.93. */
/* Attributes on labels were valid as of gcc 2.93 and g++ 4.5. For
g++ an attribute on a label must be followed by a semicolon. */
#ifndef ATTRIBUTE_UNUSED_LABEL
# if (!defined (__cplusplus) && GCC_VERSION >= 2093)
# define ATTRIBUTE_UNUSED_LABEL ATTRIBUTE_UNUSED
# ifndef __cplusplus
# if GCC_VERSION >= 2093
# define ATTRIBUTE_UNUSED_LABEL ATTRIBUTE_UNUSED
# else
# define ATTRIBUTE_UNUSED_LABEL
# endif
# else
# define ATTRIBUTE_UNUSED_LABEL
# endif /* !__cplusplus && GNUC >= 2.93 */
#endif /* ATTRIBUTE_UNUSED_LABEL */
# if GCC_VERSION >= 4005
# define ATTRIBUTE_UNUSED_LABEL ATTRIBUTE_UNUSED ;
# else
# define ATTRIBUTE_UNUSED_LABEL
# endif
# endif
#endif
 
#ifndef ATTRIBUTE_UNUSED
#define ATTRIBUTE_UNUSED __attribute__ ((__unused__))
390,4 → 404,20
#define __extension__
#endif
 
/* This is used to declare a const variable which should be visible
outside of the current compilation unit. Use it as
EXPORTED_CONST int i = 1;
This is because the semantics of const are different in C and C++.
"extern const" is permitted in C but it looks strange, and gcc
warns about it when -Wc++-compat is not used. */
#ifdef __cplusplus
#define EXPORTED_CONST extern const
#else
#define EXPORTED_CONST const
#endif
 
#ifdef __cplusplus
}
#endif
 
#endif /* ansidecl.h */
/aout/stab.def
53,6 → 53,10
/* Solaris2: Read-only data symbols. */
__define_stab (N_ROSYM, 0x2c, "ROSYM")
 
/* MacOS X:
The beginning of a relocatable function block - including stabs. */
__define_stab (N_BNSYM, 0x2e, "BNSYM")
 
/* Global symbol in Pascal.
Supposedly the value is its line number; I'm skeptical. */
__define_stab (N_PC, 0x30, "PC")
106,6 → 110,9
/* New in Solaris2. Function start/body/end line numbers. */
__define_stab(N_FLINE, 0x4C, "FLINE")
 
/* MacOS X: This tells the end of a relocatable function + debugging info. */
__define_stab(N_ENSYM, 0x4E, "ENSYM")
 
/* THE FOLLOWING TWO STAB VALUES CONFLICT. Happily, one is for Modula-2
and one is for C++. Still,... */
/* GNU C++ exception variable. Name is variable name. */
136,6 → 143,10
 
__define_stab (N_SO, 0x64, "SO")
 
/* Apple: This is the stab that associated the .o file with the
N_SO stab, in the case where debug info is mostly stored in the .o file. */
__define_stab (N_OSO, 0x66, "OSO")
 
/* SunPro F77: Name of alias. */
__define_stab (N_ALIAS, 0x6c, "ALIAS")
 
/aout/ChangeLog
1,3 → 1,15
2008-08-28 Tristan Gingold <gingold@adacore.com>
 
* stab.def: Add BNSYM, ENSYM, OSO for darwin.
 
2008-03-27 Cary Coutant <ccoutant@google.com>
 
* ar.h (ARMAGT): New magic string for thin archives.
 
2005-08-18 Alan Modra <amodra@bigpond.net.au>
 
* encap.h: Remove a29k support.
 
2005-05-10 Nick Clifton <nickc@redhat.com>
 
* Update the address and phone number of the FSF organization in
/aout/ar.h
1,6 → 1,6
/* archive file definition for GNU software
 
Copyright 2001 Free Software Foundation, Inc.
Copyright 2001, 2008 Free Software Foundation, Inc.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
26,8 → 26,9
characters, as allowed by ANSI. '\012' has a fixed value, and remains
compatible with existing BSDish archives. */
 
#define ARMAG "!<arch>\012" /* For COFF and a.out archives */
#define ARMAGB "!<bout>\012" /* For b.out archives */
#define ARMAG "!<arch>\012" /* For COFF and a.out archives. */
#define ARMAGB "!<bout>\012" /* For b.out archives. */
#define ARMAGT "!<thin>\012" /* For thin archives. */
#define SARMAG 8
#define ARFMAG "`\012"
 
39,14 → 40,15
 
#define ARMAP_TIME_OFFSET 60
 
struct ar_hdr {
char ar_name[16]; /* name of this member */
char ar_date[12]; /* file mtime */
char ar_uid[6]; /* owner uid; printed as decimal */
char ar_gid[6]; /* owner gid; printed as decimal */
char ar_mode[8]; /* file mode, printed as octal */
char ar_size[10]; /* file size, printed as decimal */
char ar_fmag[2]; /* should contain ARFMAG */
struct ar_hdr
{
char ar_name[16]; /* Name of this member. */
char ar_date[12]; /* File mtime. */
char ar_uid[6]; /* Owner uid; printed as decimal. */
char ar_gid[6]; /* Owner gid; printed as decimal. */
char ar_mode[8]; /* File mode, printed as octal. */
char ar_size[10]; /* File size, printed as decimal. */
char ar_fmag[2]; /* Should contain ARFMAG. */
};
 
#endif /* __GNU_AR_H__ */
/opcode/i386.h
1,6 → 1,6
/* opcode/i386.h -- Intel 80386 opcode macros
Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
Free Software Foundation, Inc.
 
This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger.
35,6 → 35,9
 
The affected opcode map is dceX, dcfX, deeX, defX. */
 
#ifndef OPCODE_I386_H
#define OPCODE_I386_H
 
#ifndef SYSV386_COMPAT
/* Set non-zero for broken, compatible instructions. Set to zero for
non-broken opcodes at your peril. gcc generates SystemV/386
56,6 → 59,11
/* The opcode for the fwait instruction, which disassembler treats as a
prefix when it can. */
#define FWAIT_OPCODE 0x9b
 
/* Instruction prefixes.
NOTE: For certain SSE* instructions, 0x66,0xf2,0xf3 are treated as
part of the opcode. Other prefixes may still appear between them
and the 0x0f part of the opcode. */
#define ADDR_PREFIX_OPCODE 0x67
#define DATA_PREFIX_OPCODE 0x66
#define LOCK_PREFIX_OPCODE 0xf0
72,8 → 80,14
#define NOP_OPCODE (char) 0x90
 
/* register numbers */
#define EAX_REG_NUM 0
#define ECX_REG_NUM 1
#define EDX_REG_NUM 2
#define EBX_REG_NUM 3
#define ESP_REG_NUM 4
#define EBP_REG_NUM 5
#define ESP_REG_NUM 4
#define ESI_REG_NUM 6
#define EDI_REG_NUM 7
 
/* modrm_byte.regmem for twobyte escape */
#define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
87,9 → 101,22
#define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
#define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
 
/* Extract fields from the mod/rm byte. */
#define MODRM_MOD_FIELD(modrm) (((modrm) >> 6) & 3)
#define MODRM_REG_FIELD(modrm) (((modrm) >> 3) & 7)
#define MODRM_RM_FIELD(modrm) (((modrm) >> 0) & 7)
 
/* Extract fields from the sib byte. */
#define SIB_SCALE_FIELD(sib) (((sib) >> 6) & 3)
#define SIB_INDEX_FIELD(sib) (((sib) >> 3) & 7)
#define SIB_BASE_FIELD(sib) (((sib) >> 0) & 7)
 
/* x86-64 extension prefix. */
#define REX_OPCODE 0x40
 
/* Non-zero if OPCODE is the rex prefix. */
#define REX_PREFIX_P(opcode) (((opcode) & 0xf0) == REX_OPCODE)
 
/* Indicates 64 bit operand size. */
#define REX_W 8
/* High extension to reg field of modrm byte. */
100,7 → 127,7
#define REX_B 1
 
/* max operands per insn */
#define MAX_OPERANDS 4
#define MAX_OPERANDS 5
 
/* max immediates per insn (lcall, ljmp, insertq, extrq) */
#define MAX_IMMEDIATE_OPERANDS 2
109,7 → 136,9
#define MAX_MEMORY_OPERANDS 2
 
/* max size of insn mnemonics. */
#define MAX_MNEM_SIZE 16
#define MAX_MNEM_SIZE 20
 
/* max size of register name in insn mnemonics. */
#define MAX_REG_NAME_SIZE 8
 
#endif /* OPCODE_I386_H */
/opcode/h8300.h
1,6 → 1,6
/* Opcode table for the H8/300
Copyright 1991, 1992, 1993, 1994, 1996, 1997, 1998, 2000, 2001, 2002,
2003, 2004
2003, 2004, 2005, 2008, 2009
Free Software Foundation, Inc.
Written by Steve Chamberlain <sac@cygnus.com>.
1519,6 → 1519,7
{O (O_MOV, SL), AV_H8H, 6, "mov.l", {{RS32, DISP16DST, E}}, {{PREFIX_0100, 0x6, 0xf, B31 | DSTDISPREG, RS32, DSTDISP16LIST, E}}},
{O (O_MOV, SL), AV_H8SX, 6, "mov.l", {{RS32, DISP32DST, E}}, {{0x7, 0x8, B31 | DSTDISPREG, 0x0, 0x6, 0xb, 0xa, RS32, DSTDISP32LIST, E}}},
{O (O_MOV, SL), AV_H8H, 6, "mov.l", {{RS32, DISP32DST, E}}, {{PREFIX_0100, 0x7, 0x8, B31 | DSTDISPREG, 0x0, 0x6, 0xb, 0xa, RS32, DSTDISP32LIST, E}}},
{O (O_MOV, SL), AV_H8H, 6, "mov.l", {{RS32, DISP32DST, E}}, {{PREFIX_0100, 0x7, 0x8, DSTDISPREG, 0x0, 0x6, 0xb, 0xa, RS32, DSTDISP32LIST, E}}},
{O (O_MOV, SL), AV_H8SX, 0, "mov.l", {{RS32, INDEXB16D, E}}, {{PREFIX_0101, 0x6, 0xf, B31 | DSTDISPREG, RS32, DSTDISP16LIST, E}}},
{O (O_MOV, SL), AV_H8SX, 0, "mov.l", {{RS32, INDEXW16D, E}}, {{PREFIX_0102, 0x6, 0xf, B31 | DSTDISPREG, RS32, DSTDISP16LIST, E}}},
{O (O_MOV, SL), AV_H8SX, 0, "mov.l", {{RS32, INDEXL16D, E}}, {{PREFIX_0103, 0x6, 0xf, B31 | DSTDISPREG, RS32, DSTDISP16LIST, E}}},
1564,62 → 1565,62
MOVFROM_AD (O (O_MOV, SL), PREFIX_0108, "mov.l", ABS32SRC, FROM_ABS32, ABS32LIST),
 
#define DO_MOVA1(TYPE, OP0, OP1) \
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXB16, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0x8, B30 | R3_32, DISP16LIST, E}}}, \
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXW16, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0x9, B30 | R3_32, DISP16LIST, E}}}, \
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXB16, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0xA, B30 | R3_32, DISP16LIST, E}}}, \
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXW16, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0xB, B30 | R3_32, DISP16LIST, E}}}, \
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXB16, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0xC, B30 | R3_32, DISP16LIST, E}}}, \
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXW16, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0xD, B30 | R3_32, DISP16LIST, E}}}, \
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXB16, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0x8, B30 | R3_32, MEMRELAX | DISP16LIST, E}}}, \
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXW16, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0x9, B30 | R3_32, MEMRELAX | DISP16LIST, E}}}, \
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXB16, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0xA, B30 | R3_32, MEMRELAX | DISP16LIST, E}}}, \
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXW16, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0xB, B30 | R3_32, MEMRELAX | DISP16LIST, E}}}, \
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXB16, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0xC, B30 | R3_32, MEMRELAX | DISP16LIST, E}}}, \
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXW16, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0xD, B30 | R3_32, MEMRELAX | DISP16LIST, E}}}, \
\
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXB32, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0x8, B31 | R3_32, DISP32LIST, E}}}, \
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXW32, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0x9, B31 | R3_32, DISP32LIST, E}}}, \
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXB32, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0xA, B31 | R3_32, DISP32LIST, E}}}, \
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXW32, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0xB, B31 | R3_32, DISP32LIST, E}}}, \
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXB32, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0xC, B31 | R3_32, DISP32LIST, E}}}, \
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXW32, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0xD, B31 | R3_32, DISP32LIST, E}}}
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXB32, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0x8, B31 | R3_32, MEMRELAX | DISP32LIST, E}}}, \
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXW32, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0x9, B31 | R3_32, MEMRELAX | DISP32LIST, E}}}, \
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXB32, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0xA, B31 | R3_32, MEMRELAX | DISP32LIST, E}}}, \
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXW32, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0xB, B31 | R3_32, MEMRELAX | DISP32LIST, E}}}, \
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXB32, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0xC, B31 | R3_32, MEMRELAX | DISP32LIST, E}}}, \
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXW32, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0xD, B31 | R3_32, MEMRELAX | DISP32LIST, E}}}
 
#define DO_MOVA2(TYPE, OP0, OP1, OP2) \
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXB16, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0x8, B30 | R3_32, OP2, DISP16LIST, E}}}, \
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXW16, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0x9, B30 | R3_32, OP2, DISP16LIST, E}}}, \
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXB16, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0xA, B30 | R3_32, OP2, DISP16LIST, E}}}, \
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXW16, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0xB, B30 | R3_32, OP2, DISP16LIST, E}}}, \
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXB16, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0xC, B30 | R3_32, OP2, DISP16LIST, E}}}, \
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXW16, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0xD, B30 | R3_32, OP2, DISP16LIST, E}}}, \
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXB16, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0x8, B30 | R3_32, OP2, MEMRELAX | DISP16LIST, E}}}, \
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXW16, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0x9, B30 | R3_32, OP2, MEMRELAX | DISP16LIST, E}}}, \
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXB16, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0xA, B30 | R3_32, OP2, MEMRELAX | DISP16LIST, E}}}, \
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXW16, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0xB, B30 | R3_32, OP2, MEMRELAX | DISP16LIST, E}}}, \
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXB16, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0xC, B30 | R3_32, OP2, MEMRELAX | DISP16LIST, E}}}, \
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXW16, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0xD, B30 | R3_32, OP2, MEMRELAX | DISP16LIST, E}}}, \
\
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXB32, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0x8, B31 | R3_32, OP2, DISP32LIST, E}}}, \
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXW32, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0x9, B31 | R3_32, OP2, DISP32LIST, E}}}, \
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXB32, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0xA, B31 | R3_32, OP2, DISP32LIST, E}}}, \
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXW32, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0xB, B31 | R3_32, OP2, DISP32LIST, E}}}, \
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXB32, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0xC, B31 | R3_32, OP2, DISP32LIST, E}}}, \
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXW32, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0xD, B31 | R3_32, OP2, DISP32LIST, E}}}
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXB32, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0x8, B31 | R3_32, OP2, MEMRELAX | DISP32LIST, E}}}, \
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXW32, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0x9, B31 | R3_32, OP2, MEMRELAX | DISP32LIST, E}}}, \
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXB32, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0xA, B31 | R3_32, OP2, MEMRELAX | DISP32LIST, E}}}, \
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXW32, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0xB, B31 | R3_32, OP2, MEMRELAX | DISP32LIST, E}}}, \
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXB32, TYPE, R3_32}}, {{PREFIX_017F, OP0, OP1, 0xC, B31 | R3_32, OP2, MEMRELAX | DISP32LIST, E}}}, \
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXW32, TYPE, R3_32}}, {{PREFIX_015F, OP0, OP1, 0xD, B31 | R3_32, OP2, MEMRELAX | DISP32LIST, E}}}
 
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXB16, E}}, {{0x7, 0xA, 0x8, B31 | DISPREG, DISP16LIST, E}}},
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXW16, E}}, {{0x7, 0xA, 0x9, B31 | DISPREG, DISP16LIST, E}}},
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXB16, E}}, {{0x7, 0xA, 0xA, B31 | DISPREG, DISP16LIST, E}}},
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXW16, E}}, {{0x7, 0xA, 0xB, B31 | DISPREG, DISP16LIST, E}}},
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXB16, E}}, {{0x7, 0xA, 0xC, B31 | DISPREG, DISP16LIST, E}}},
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXW16, E}}, {{0x7, 0xA, 0xD, B31 | DISPREG, DISP16LIST, E}}},
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXB16, E}}, {{0x7, 0xA, 0x8, B31 | DISPREG, MEMRELAX | DISP16LIST, E}}},
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXW16, E}}, {{0x7, 0xA, 0x9, B31 | DISPREG, MEMRELAX | DISP16LIST, E}}},
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXB16, E}}, {{0x7, 0xA, 0xA, B31 | DISPREG, MEMRELAX | DISP16LIST, E}}},
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXW16, E}}, {{0x7, 0xA, 0xB, B31 | DISPREG, MEMRELAX | DISP16LIST, E}}},
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXB16, E}}, {{0x7, 0xA, 0xC, B31 | DISPREG, MEMRELAX | DISP16LIST, E}}},
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXW16, E}}, {{0x7, 0xA, 0xD, B31 | DISPREG, MEMRELAX | DISP16LIST, E}}},
 
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXB32, E}}, {{0x7, 0xA, 0x8, B30 | DISPREG, DISP32LIST, E}}},
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXW32, E}}, {{0x7, 0xA, 0x9, B30 | DISPREG, DISP32LIST, E}}},
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXB32, E}}, {{0x7, 0xA, 0xA, B30 | DISPREG, DISP32LIST, E}}},
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXW32, E}}, {{0x7, 0xA, 0xB, B30 | DISPREG, DISP32LIST, E}}},
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXB32, E}}, {{0x7, 0xA, 0xC, B30 | DISPREG, DISP32LIST, E}}},
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXW32, E}}, {{0x7, 0xA, 0xD, B30 | DISPREG, DISP32LIST, E}}},
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXB32, E}}, {{0x7, 0xA, 0x8, B30 | DISPREG, MEMRELAX | DISP32LIST, E}}},
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXW32, E}}, {{0x7, 0xA, 0x9, B30 | DISPREG, MEMRELAX | DISP32LIST, E}}},
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXB32, E}}, {{0x7, 0xA, 0xA, B30 | DISPREG, MEMRELAX | DISP32LIST, E}}},
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXW32, E}}, {{0x7, 0xA, 0xB, B30 | DISPREG, MEMRELAX | DISP32LIST, E}}},
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXB32, E}}, {{0x7, 0xA, 0xC, B30 | DISPREG, MEMRELAX | DISP32LIST, E}}},
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXW32, E}}, {{0x7, 0xA, 0xD, B30 | DISPREG, MEMRELAX | DISP32LIST, E}}},
 
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXB16, RD8, R3_32}}, {{0x7, 0x8, RD8, 0x8, 0x7, 0xA, 0x8, B31 | R3_32, DISP16LIST, E}}},
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXW16, RD16, R3_32}}, {{0x7, 0x8, RD16, 0x9, 0x7, 0xA, 0x9, B31 | R3_32, DISP16LIST, E}}},
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXB16, RD8, R3_32}}, {{0x7, 0x8, RD8, 0x8, 0x7, 0xA, 0xA, B31 | R3_32, DISP16LIST, E}}},
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXW16, RD16, R3_32}}, {{0x7, 0x8, RD16, 0x9, 0x7, 0xA, 0xB, B31 | R3_32, DISP16LIST, E}}},
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXB16, RD8, R3_32}}, {{0x7, 0x8, RD8, 0x8, 0x7, 0xA, 0xC, B31 | R3_32, DISP16LIST, E}}},
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXW16, RD16, R3_32}}, {{0x7, 0x8, RD16, 0x9, 0x7, 0xA, 0xD, B31 | R3_32, DISP16LIST, E}}},
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXB16, RD8, R3_32}}, {{0x7, 0x8, RD8, 0x8, 0x7, 0xA, 0x8, B31 | R3_32, MEMRELAX | DISP16LIST, E}}},
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXW16, RD16, R3_32}}, {{0x7, 0x8, RD16, 0x9, 0x7, 0xA, 0x9, B31 | R3_32, MEMRELAX | DISP16LIST, E}}},
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXB16, RD8, R3_32}}, {{0x7, 0x8, RD8, 0x8, 0x7, 0xA, 0xA, B31 | R3_32, MEMRELAX | DISP16LIST, E}}},
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXW16, RD16, R3_32}}, {{0x7, 0x8, RD16, 0x9, 0x7, 0xA, 0xB, B31 | R3_32, MEMRELAX | DISP16LIST, E}}},
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXB16, RD8, R3_32}}, {{0x7, 0x8, RD8, 0x8, 0x7, 0xA, 0xC, B31 | R3_32, MEMRELAX | DISP16LIST, E}}},
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXW16, RD16, R3_32}}, {{0x7, 0x8, RD16, 0x9, 0x7, 0xA, 0xD, B31 | R3_32, MEMRELAX | DISP16LIST, E}}},
 
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXB32, RD8, R3_32}}, {{0x7, 0x8, RD8, 0x8, 0x7, 0xA, 0x8, B30 | R3_32, DISP32LIST, E}}},
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXW32, RD16, R3_32}}, {{0x7, 0x8, RD16, 0x9, 0x7, 0xA, 0x9, B30 | R3_32, DISP32LIST, E}}},
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXB32, RD8, R3_32}}, {{0x7, 0x8, RD8, 0x8, 0x7, 0xA, 0xA, B30 | R3_32, DISP32LIST, E}}},
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXW32, RD16, R3_32}}, {{0x7, 0x8, RD16, 0x9, 0x7, 0xA, 0xB, B30 | R3_32, DISP32LIST, E}}},
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXB32, RD8, R3_32}}, {{0x7, 0x8, RD8, 0x8, 0x7, 0xA, 0xC, B30 | R3_32, DISP32LIST, E}}},
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXW32, RD16, R3_32}}, {{0x7, 0x8, RD16, 0x9, 0x7, 0xA, 0xD, B30 | R3_32, DISP32LIST, E}}},
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXB32, RD8, R3_32}}, {{0x7, 0x8, RD8, 0x8, 0x7, 0xA, 0x8, B30 | R3_32, MEMRELAX | DISP32LIST, E}}},
{O (O_MOVAB, SL), AV_H8SX, 0, "mova/b.l", {{INDEXW32, RD16, R3_32}}, {{0x7, 0x8, RD16, 0x9, 0x7, 0xA, 0x9, B30 | R3_32, MEMRELAX | DISP32LIST, E}}},
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXB32, RD8, R3_32}}, {{0x7, 0x8, RD8, 0x8, 0x7, 0xA, 0xA, B30 | R3_32, MEMRELAX | DISP32LIST, E}}},
{O (O_MOVAW, SL), AV_H8SX, 0, "mova/w.l", {{INDEXW32, RD16, R3_32}}, {{0x7, 0x8, RD16, 0x9, 0x7, 0xA, 0xB, B30 | R3_32, MEMRELAX | DISP32LIST, E}}},
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXB32, RD8, R3_32}}, {{0x7, 0x8, RD8, 0x8, 0x7, 0xA, 0xC, B30 | R3_32, MEMRELAX | DISP32LIST, E}}},
{O (O_MOVAL, SL), AV_H8SX, 0, "mova/l.l", {{INDEXW32, RD16, R3_32}}, {{0x7, 0x8, RD16, 0x9, 0x7, 0xA, 0xD, B30 | R3_32, MEMRELAX | DISP32LIST, E}}},
 
DO_MOVA1 (RDIND, 0x0, B30 | RDIND),
DO_MOVA1 (RDPOSTINC, 0x8, B30 | RDPOSTINC),
1627,16 → 1628,16
DO_MOVA1 (RDPREINC, 0x9, B30 | RDPREINC),
DO_MOVA1 (RDPREDEC, 0xB, B30 | RDPREDEC),
DO_MOVA1 (DISP2DST, B30 | B20 | DISP2DST, B30 | DSTDISPREG),
DO_MOVA2 (DISP16DST, 0xC, B30 | DSTDISPREG, DSTDISP16LIST),
DO_MOVA2 (DISP32DST, 0xC, B31 | DSTDISPREG, DSTDISP32LIST),
DO_MOVA2 (INDEXB16D, 0xD, B30 | DSTDISPREG, DSTDISP16LIST),
DO_MOVA2 (INDEXW16D, 0xE, B30 | DSTDISPREG, DSTDISP16LIST),
DO_MOVA2 (INDEXL16D, 0xF, B30 | DSTDISPREG, DSTDISP16LIST),
DO_MOVA2 (INDEXB32D, 0xD, B31 | DSTDISPREG, DSTDISP32LIST),
DO_MOVA2 (INDEXW32D, 0xE, B31 | DSTDISPREG, DSTDISP32LIST),
DO_MOVA2 (INDEXL32D, 0xF, B31 | DSTDISPREG, DSTDISP32LIST),
DO_MOVA2 (ABS16DST, 0x4, 0x0, DSTABS16LIST),
DO_MOVA2 (ABS32DST, 0x4, 0x8, DSTABS32LIST),
DO_MOVA2 (DISP16DST, 0xC, B30 | DSTDISPREG, MEMRELAX | DSTDISP16LIST),
DO_MOVA2 (DISP32DST, 0xC, B31 | DSTDISPREG, MEMRELAX | DSTDISP32LIST),
DO_MOVA2 (INDEXB16D, 0xD, B30 | DSTDISPREG, MEMRELAX | DSTDISP16LIST),
DO_MOVA2 (INDEXW16D, 0xE, B30 | DSTDISPREG, MEMRELAX | DSTDISP16LIST),
DO_MOVA2 (INDEXL16D, 0xF, B30 | DSTDISPREG, MEMRELAX | DSTDISP16LIST),
DO_MOVA2 (INDEXB32D, 0xD, B31 | DSTDISPREG, MEMRELAX | DSTDISP32LIST),
DO_MOVA2 (INDEXW32D, 0xE, B31 | DSTDISPREG, MEMRELAX | DSTDISP32LIST),
DO_MOVA2 (INDEXL32D, 0xF, B31 | DSTDISPREG, MEMRELAX | DSTDISP32LIST),
DO_MOVA2 (ABS16DST, 0x4, 0x0, MEMRELAX | DSTABS16LIST),
DO_MOVA2 (ABS32DST, 0x4, 0x8, MEMRELAX | DSTABS32LIST),
 
{O (O_MOV, SB), AV_H8, 10, "movfpe", {{ABS16SRC, RD8, E}}, {{0x6, 0xA, 0x4, RD8, ABS16SRC, DATA3, E}}},
{O (O_MOV, SB), AV_H8, 10, "movtpe", {{RS8, ABS16DST, E}}, {{0x6, 0xA, 0xC, RS8, ABS16DST, DATA3, E}}},
/opcode/score-datadep.h
1,6 → 1,7
/* score-datadep.h -- Score Instructions data dependency table
Copyright 2006 Free Software Foundation, Inc.
Copyright 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
Contributed by:
Brain.lin (brain.lin@sunplusct.com)
Mei Ligang (ligang@sunnorth.com.cn)
Pei-Lin Tsai (pltsai@sunplus.com)
 
8,7 → 9,7
 
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
the Free Software Foundation; either version 3, or (at your option)
any later version.
 
GAS is distributed in the hope that it will be useful,
28,20 → 29,7
 
enum insn_type_for_dependency
{
D_pce,
D_cond_br,
D_cond_mv,
D_cached,
D_cachei,
D_ldst,
D_ldcombine,
D_mtcr,
D_mfcr,
D_mfsr,
D_mftlb,
D_mtptlb,
D_mtrtlb,
D_stlb,
D_all_insn
};
 
58,225 → 46,20
enum insn_type_for_dependency cur_insn_type;
char cur_reg[6];
int bubblenum_7;
int bubblenum_5;
int bubblenum_3;
int warn_or_error; /* warning - 0; error - 1 */
};
 
static const struct insn_to_dependency insn_to_dependency_table[] =
{
/* pce instruction. */
{"pce", D_pce},
/* conditional branch instruction. */
{"bcs", D_cond_br},
{"bcc", D_cond_br},
{"bgtu", D_cond_br},
{"bleu", D_cond_br},
{"beq", D_cond_br},
{"bne", D_cond_br},
{"bgt", D_cond_br},
{"ble", D_cond_br},
{"bge", D_cond_br},
{"blt", D_cond_br},
{"bmi", D_cond_br},
{"bpl", D_cond_br},
{"bvs", D_cond_br},
{"bvc", D_cond_br},
{"bcsl", D_cond_br},
{"bccl", D_cond_br},
{"bgtul", D_cond_br},
{"bleul", D_cond_br},
{"beql", D_cond_br},
{"bnel", D_cond_br},
{"bgtl", D_cond_br},
{"blel", D_cond_br},
{"bgel", D_cond_br},
{"bltl", D_cond_br},
{"bmil", D_cond_br},
{"bpll", D_cond_br},
{"bvsl", D_cond_br},
{"bvcl", D_cond_br},
{"bcs!", D_cond_br},
{"bcc!", D_cond_br},
{"bgtu!", D_cond_br},
{"bleu!", D_cond_br},
{"beq!", D_cond_br},
{"bne!", D_cond_br},
{"bgt!", D_cond_br},
{"ble!", D_cond_br},
{"bge!", D_cond_br},
{"blt!", D_cond_br},
{"bmi!", D_cond_br},
{"bpl!", D_cond_br},
{"bvs!", D_cond_br},
{"bvc!", D_cond_br},
{"brcs", D_cond_br},
{"brcc", D_cond_br},
{"brgtu", D_cond_br},
{"brleu", D_cond_br},
{"breq", D_cond_br},
{"brne", D_cond_br},
{"brgt", D_cond_br},
{"brle", D_cond_br},
{"brge", D_cond_br},
{"brlt", D_cond_br},
{"brmi", D_cond_br},
{"brpl", D_cond_br},
{"brvs", D_cond_br},
{"brvc", D_cond_br},
{"brcsl", D_cond_br},
{"brccl", D_cond_br},
{"brgtul", D_cond_br},
{"brleul", D_cond_br},
{"breql", D_cond_br},
{"brnel", D_cond_br},
{"brgtl", D_cond_br},
{"brlel", D_cond_br},
{"brgel", D_cond_br},
{"brltl", D_cond_br},
{"brmil", D_cond_br},
{"brpll", D_cond_br},
{"brvsl", D_cond_br},
{"brvcl", D_cond_br},
{"brcs!", D_cond_br},
{"brcc!", D_cond_br},
{"brgtu!", D_cond_br},
{"brleu!", D_cond_br},
{"breq!", D_cond_br},
{"brne!", D_cond_br},
{"brgt!", D_cond_br},
{"brle!", D_cond_br},
{"brge!", D_cond_br},
{"brlt!", D_cond_br},
{"brmi!", D_cond_br},
{"brpl!", D_cond_br},
{"brvs!", D_cond_br},
{"brvc!", D_cond_br},
{"brcsl!", D_cond_br},
{"brccl!", D_cond_br},
{"brgtul!", D_cond_br},
{"brleul!", D_cond_br},
{"breql!", D_cond_br},
{"brnel!", D_cond_br},
{"brgtl!", D_cond_br},
{"brlel!", D_cond_br},
{"brgel!", D_cond_br},
{"brltl!", D_cond_br},
{"brmil!", D_cond_br},
{"brpll!", D_cond_br},
{"brvsl!", D_cond_br},
{"brvcl!", D_cond_br},
/* conditional move instruction. */
{"mvcs", D_cond_mv},
{"mvcc", D_cond_mv},
{"mvgtu", D_cond_mv},
{"mvleu", D_cond_mv},
{"mveq", D_cond_mv},
{"mvne", D_cond_mv},
{"mvgt", D_cond_mv},
{"mvle", D_cond_mv},
{"mvge", D_cond_mv},
{"mvlt", D_cond_mv},
{"mvmi", D_cond_mv},
{"mvpl", D_cond_mv},
{"mvvs", D_cond_mv},
{"mvvc", D_cond_mv},
/* move spectial instruction. */
{"mtcr", D_mtcr},
{"mftlb", D_mftlb},
{"mtptlb", D_mtptlb},
{"mtrtlb", D_mtrtlb},
{"stlb", D_stlb},
{"mfcr", D_mfcr},
{"mfsr", D_mfsr},
/* cache instruction. */
{"cache 8", D_cached},
{"cache 9", D_cached},
{"cache 10", D_cached},
{"cache 11", D_cached},
{"cache 12", D_cached},
{"cache 13", D_cached},
{"cache 14", D_cached},
{"cache 24", D_cached},
{"cache 26", D_cached},
{"cache 27", D_cached},
{"cache 29", D_cached},
{"cache 30", D_cached},
{"cache 31", D_cached},
{"cache 0", D_cachei},
{"cache 1", D_cachei},
{"cache 2", D_cachei},
{"cache 3", D_cachei},
{"cache 4", D_cachei},
{"cache 16", D_cachei},
{"cache 17", D_cachei},
/* load/store instruction. */
{"lb", D_ldst},
{"lbu", D_ldst},
{"lbu!", D_ldst},
{"lbup!", D_ldst},
{"lh", D_ldst},
{"lhu", D_ldst},
{"lh!", D_ldst},
{"lhp!", D_ldst},
{"lw", D_ldst},
{"lw!", D_ldst},
{"lwp!", D_ldst},
{"sb", D_ldst},
{"sb!", D_ldst},
{"sbp!", D_ldst},
{"sh", D_ldst},
{"sh!", D_ldst},
{"shp!", D_ldst},
{"sw", D_ldst},
{"sw!", D_ldst},
{"swp!", D_ldst},
{"alw", D_ldst},
{"asw", D_ldst},
{"push!", D_ldst},
{"pushhi!", D_ldst},
{"pop!", D_ldst},
{"pophi!", D_ldst},
{"ldc1", D_ldst},
{"ldc2", D_ldst},
{"ldc3", D_ldst},
{"stc1", D_ldst},
{"stc2", D_ldst},
{"stc3", D_ldst},
{"scb", D_ldst},
{"scw", D_ldst},
{"sce", D_ldst},
/* load combine instruction. */
{"lcb", D_ldcombine},
{"lcw", D_ldcombine},
{"lce", D_ldcombine},
};
 
static const struct data_dependency data_dependency_table[] =
{
/* Condition register. */
{D_mtcr, "cr1", D_pce, "", 2, 1, 1},
{D_mtcr, "cr1", D_cond_br, "", 1, 0, 1},
{D_mtcr, "cr1", D_cond_mv, "", 1, 0, 1},
/* Status regiser. */
{D_mtcr, "cr0", D_all_insn, "", 5, 4, 0},
/* CCR regiser. */
{D_mtcr, "cr4", D_all_insn, "", 6, 5, 0},
/* EntryHi/EntryLo register. */
{D_mftlb, "", D_mtptlb, "", 1, 1, 1},
{D_mftlb, "", D_mtrtlb, "", 1, 1, 1},
{D_mftlb, "", D_stlb, "", 1, 1,1},
{D_mftlb, "", D_mfcr, "cr11", 1, 1, 1},
{D_mftlb, "", D_mfcr, "cr12", 1, 1, 1},
/* Index register. */
{D_stlb, "", D_mtptlb, "", 1, 1, 1},
{D_stlb, "", D_mftlb, "", 1, 1, 1},
{D_stlb, "", D_mfcr, "cr8", 2, 2, 1},
/* Cache. */
{D_cached, "", D_ldst, "", 1, 1, 0},
{D_cached, "", D_ldcombine, "", 1, 1, 0},
{D_cachei, "", D_all_insn, "", 5, 4, 0},
/* Load combine. */
{D_ldcombine, "", D_mfsr, "sr1", 3, 3, 1},
{D_mtcr, "cr0", D_all_insn, "", 5, 1, 0},
};
 
#endif
/opcode/bfin.h
939,7 → 939,7
 
/* PseudoDbg_assert
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
| 1 | 1 | 1 | 1 | 0 | - | - | - | - | - |.dbgop.....|.regtest...|
| 1 | 1 | 1 | 1 | 0 | - | - | - | dbgop |.grp.......|.regtest...|
|.expected......................................................|
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
*/
951,6 → 951,8
int mask_expected;
int bits_regtest;
int mask_regtest;
int bits_grp;
int mask_grp;
int bits_dbgop;
int mask_dbgop;
int bits_dontcare;
964,10 → 966,12
#define PseudoDbg_Assert_expected_mask 0xffff
#define PseudoDbg_Assert_regtest_bits 16
#define PseudoDbg_Assert_regtest_mask 0x7
#define PseudoDbg_Assert_dbgop_bits 19
#define PseudoDbg_Assert_dbgop_mask 0x7
#define PseudoDbg_Assert_dontcare_bits 22
#define PseudoDbg_Assert_dontcare_mask 0x1f
#define PseudoDbg_Assert_grp_bits 19
#define PseudoDbg_Assert_grp_mask 0x7
#define PseudoDbg_Assert_dbgop_bits 22
#define PseudoDbg_Assert_dbgop_mask 0x3
#define PseudoDbg_Assert_dontcare_bits 24
#define PseudoDbg_Assert_dontcare_mask 0x7
#define PseudoDbg_Assert_code_bits 27
#define PseudoDbg_Assert_code_mask 0x1f
 
976,6 → 980,7
PseudoDbg_Assert_opcode, \
PseudoDbg_Assert_expected_bits, PseudoDbg_Assert_expected_mask, \
PseudoDbg_Assert_regtest_bits, PseudoDbg_Assert_regtest_mask, \
PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask, \
PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask, \
PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask, \
PseudoDbg_Assert_code_bits, PseudoDbg_Assert_code_mask \
/opcode/arm.h
44,6 → 44,9
#define ARM_EXT_V7A 0x00100000 /* Arm V7A. */
#define ARM_EXT_V7R 0x00200000 /* Arm V7R. */
#define ARM_EXT_V7M 0x00400000 /* Arm V7M. */
#define ARM_EXT_V6M 0x00800000 /* ARM V6M. */
#define ARM_EXT_BARRIER 0x01000000 /* DSB/DMB/ISB. */
#define ARM_EXT_THUMB_MSR 0x02000000 /* Thumb MSR/MRS. */
 
/* Co-processor space extensions. */
#define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */
61,6 → 64,8
#define FPU_VFP_EXT_V2 0x02000000 /* ARM10E VFPr1. */
#define FPU_VFP_EXT_V3 0x01000000 /* VFPv3 insns. */
#define FPU_NEON_EXT_V1 0x00800000 /* Neon (SIMD) insns. */
#define FPU_VFP_EXT_D32 0x00400000 /* Registers D16-D31. */
#define FPU_NEON_FP16 0x00200000 /* Half-precision extensions. */
 
/* Architectures are the sum of the base and extensions. The ARM ARM (rev E)
defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T,
87,17 → 92,22
#define ARM_AEXT_V6K (ARM_AEXT_V6 | ARM_EXT_V6K)
#define ARM_AEXT_V6Z (ARM_AEXT_V6 | ARM_EXT_V6Z)
#define ARM_AEXT_V6ZK (ARM_AEXT_V6 | ARM_EXT_V6K | ARM_EXT_V6Z)
#define ARM_AEXT_V6T2 (ARM_AEXT_V6 | ARM_EXT_V6T2 | ARM_EXT_V6_NOTM)
#define ARM_AEXT_V6T2 (ARM_AEXT_V6 \
| ARM_EXT_V6T2 | ARM_EXT_V6_NOTM | ARM_EXT_THUMB_MSR)
#define ARM_AEXT_V6KT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K)
#define ARM_AEXT_V6ZT2 (ARM_AEXT_V6T2 | ARM_EXT_V6Z)
#define ARM_AEXT_V6ZKT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_V6Z)
#define ARM_AEXT_V7_ARM (ARM_AEXT_V6ZKT2 | ARM_EXT_V7)
#define ARM_AEXT_V7_ARM (ARM_AEXT_V6ZKT2 | ARM_EXT_V7 | ARM_EXT_BARRIER)
#define ARM_AEXT_V7A (ARM_AEXT_V7_ARM | ARM_EXT_V7A)
#define ARM_AEXT_V7R (ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV)
#define ARM_AEXT_NOTM \
(ARM_AEXT_V4 | ARM_EXT_V5ExP | ARM_EXT_V5J | ARM_EXT_V6_NOTM)
#define ARM_AEXT_V6M \
((ARM_AEXT_V6K | ARM_EXT_BARRIER | ARM_EXT_V6M | ARM_EXT_THUMB_MSR) \
& ~(ARM_AEXT_NOTM))
#define ARM_AEXT_V7M \
((ARM_AEXT_V7_ARM | ARM_EXT_V7M | ARM_EXT_DIV) & ~(ARM_AEXT_NOTM))
((ARM_AEXT_V7_ARM | ARM_EXT_V6M | ARM_EXT_V7M | ARM_EXT_DIV) \
& ~(ARM_AEXT_NOTM))
#define ARM_AEXT_V7 (ARM_AEXT_V7A & ARM_AEXT_V7R & ARM_AEXT_V7M)
 
/* Processors with specific extensions in the co-processor space. */
110,9 → 120,10
#define FPU_VFP_V1xD (FPU_VFP_EXT_V1xD | FPU_ENDIAN_PURE)
#define FPU_VFP_V1 (FPU_VFP_V1xD | FPU_VFP_EXT_V1)
#define FPU_VFP_V2 (FPU_VFP_V1 | FPU_VFP_EXT_V2)
#define FPU_VFP_V3 (FPU_VFP_V2 | FPU_VFP_EXT_V3)
#define FPU_VFP_V3D16 (FPU_VFP_V2 | FPU_VFP_EXT_V3)
#define FPU_VFP_V3 (FPU_VFP_V3D16 | FPU_VFP_EXT_D32)
#define FPU_VFP_HARD (FPU_VFP_EXT_V1xD | FPU_VFP_EXT_V1 | FPU_VFP_EXT_V2 \
| FPU_VFP_EXT_V3 | FPU_NEON_EXT_V1)
| FPU_VFP_EXT_V3 | FPU_NEON_EXT_V1 | FPU_VFP_EXT_D32)
#define FPU_FPA (FPU_FPA_EXT_V1 | FPU_FPA_EXT_V2)
 
/* Deprecated */
124,10 → 135,13
#define FPU_ARCH_VFP_V1xD ARM_FEATURE (0, FPU_VFP_V1xD)
#define FPU_ARCH_VFP_V1 ARM_FEATURE (0, FPU_VFP_V1)
#define FPU_ARCH_VFP_V2 ARM_FEATURE (0, FPU_VFP_V2)
#define FPU_ARCH_VFP_V3D16 ARM_FEATURE (0, FPU_VFP_V3D16)
#define FPU_ARCH_VFP_V3 ARM_FEATURE (0, FPU_VFP_V3)
#define FPU_ARCH_NEON_V1 ARM_FEATURE (0, FPU_NEON_EXT_V1)
#define FPU_ARCH_VFP_V3_PLUS_NEON_V1 \
ARM_FEATURE (0, FPU_VFP_V3 | FPU_NEON_EXT_V1)
#define FPU_ARCH_NEON_FP16 \
ARM_FEATURE (0, FPU_VFP_V3 | FPU_NEON_EXT_V1 | FPU_NEON_FP16)
#define FPU_ARCH_VFP_HARD ARM_FEATURE (0, FPU_VFP_HARD)
 
#define FPU_ARCH_ENDIAN_PURE ARM_FEATURE (0, FPU_ENDIAN_PURE)
158,6 → 172,7
#define ARM_ARCH_V6KT2 ARM_FEATURE (ARM_AEXT_V6KT2, 0)
#define ARM_ARCH_V6ZT2 ARM_FEATURE (ARM_AEXT_V6ZT2, 0)
#define ARM_ARCH_V6ZKT2 ARM_FEATURE (ARM_AEXT_V6ZKT2, 0)
#define ARM_ARCH_V6M ARM_FEATURE (ARM_AEXT_V6M, 0)
#define ARM_ARCH_V7 ARM_FEATURE (ARM_AEXT_V7, 0)
#define ARM_ARCH_V7A ARM_FEATURE (ARM_AEXT_V7A, 0)
#define ARM_ARCH_V7R ARM_FEATURE (ARM_AEXT_V7R, 0)
/opcode/tic54x.h
1,5 → 1,5
/* tic54x.h -- Header file for TI TMS320C54X opcode table
Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
Copyright 1999, 2000, 2001, 2005, 2009 Free Software Foundation, Inc.
Written by Timothy Wall (twall@cygnus.com)
 
This file is part of GDB, GAS, and the GNU binutils.
147,17 → 147,17
const char* parname;
enum optype paroperand_types[MAX_OPERANDS];
 
} template;
} insn_template;
 
extern const template tic54x_unknown_opcode;
extern const template tic54x_optab[];
extern const template tic54x_paroptab[];
extern const insn_template tic54x_unknown_opcode;
extern const insn_template tic54x_optab[];
extern const insn_template tic54x_paroptab[];
extern const symbol mmregs[], regs[];
extern const symbol condition_codes[], cc2_codes[], status_bits[];
extern const symbol cc3_codes[];
extern const char *misc_symbols[];
struct disassemble_info;
extern const template* tic54x_get_insn (struct disassemble_info *,
extern const insn_template* tic54x_get_insn (struct disassemble_info *,
bfd_vma, unsigned short, int *);
 
#endif /* _opcode_tic54x_h_ */
/opcode/ppc.h
1,6 → 1,6
/* ppc.h -- Header file for PowerPC opcode table
Copyright 1994, 1995, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006,
2007 Free Software Foundation, Inc.
2007, 2008, 2009 Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support
 
This file is part of GDB, GAS, and the GNU binutils.
22,6 → 22,10
#ifndef PPC_H
#define PPC_H
 
#include "bfd_stdint.h"
 
typedef uint64_t ppc_cpu_t;
 
/* The opcode table is an array of struct powerpc_opcode. */
 
struct powerpc_opcode
42,8 → 46,13
/* One bit flags for the opcode. These are used to indicate which
specific processors support the instructions. The defined values
are listed below. */
unsigned long flags;
ppc_cpu_t flags;
 
/* One bit flags for the opcode. These are used to indicate which
specific processors no longer support the instructions. The defined
values are listed below. */
ppc_cpu_t deprecated;
 
/* An array of operand codes. Each code is an index into the
operand table. They appear in the order which the operands must
appear in assembly code, and are terminated by a zero. */
107,8 → 116,8
/* Opcode is only supported by Power4 architecture. */
#define PPC_OPCODE_POWER4 0x4000
 
/* Opcode isn't supported by Power4 architecture. */
#define PPC_OPCODE_NOPOWER4 0x8000
/* Opcode is only supported by Power7 architecture. */
#define PPC_OPCODE_POWER7 0x8000
 
/* Opcode is only supported by POWERPC Classic architecture. */
#define PPC_OPCODE_CLASSIC 0x10000
149,6 → 158,21
/* Opcode is supported by CPUs with paired singles support. */
#define PPC_OPCODE_PPCPS 0x10000000
 
/* Opcode is supported by Power E500MC */
#define PPC_OPCODE_E500MC 0x20000000
 
/* Opcode is supported by PowerPC 405 processor. */
#define PPC_OPCODE_405 0x40000000
 
/* Opcode is supported by Vector-Scalar (VSX) Unit */
#define PPC_OPCODE_VSX 0x80000000
 
/* Opcode is supported by A2. */
#define PPC_OPCODE_A2 0x100000000ULL
 
/* Opcode is supported by PowerPC 476 processor. */
#define PPC_OPCODE_476 0x200000000ULL
 
/* A macro to extract the major opcode from an instruction. */
#define PPC_OP(i) (((i) >> 26) & 0x3f)
180,7 → 204,7
operand value is legal, *ERRMSG will be unchanged (most operands
can accept any value). */
unsigned long (*insert)
(unsigned long instruction, long op, int dialect, const char **errmsg);
(unsigned long instruction, long op, ppc_cpu_t dialect, const char **errmsg);
 
/* Extraction function. This is used by the disassembler. To
extract this operand type from an instruction, check this field.
198,7 → 222,7
non-zero if this operand type can not actually be extracted from
this operand (i.e., the instruction does not match). If the
operand is valid, *INVALID will not be changed. */
long (*extract) (unsigned long instruction, int dialect, int *invalid);
long (*extract) (unsigned long instruction, ppc_cpu_t dialect, int *invalid);
 
/* One bit syntax flags. */
unsigned long flags;
299,6 → 323,15
 
/* Valid range of operand is 0..n rather than 0..n-1. */
#define PPC_OPERAND_PLUS1 (0x10000)
 
/* Xilinx APU and FSL related operands */
#define PPC_OPERAND_FSL (0x20000)
#define PPC_OPERAND_FCR (0x40000)
#define PPC_OPERAND_UDI (0x80000)
 
/* This operand names a vector-scalar unit register. The disassembler
prints these with a leading 'vs'. */
#define PPC_OPERAND_VSR (0x100000)
/* The POWER and PowerPC assemblers use a few macros. We keep them
with the operands table for simplicity. The macro table is an
315,7 → 348,7
/* One bit flags for the opcode. These are used to indicate which
specific processors support the instructions. The values are the
same as those for the struct powerpc_opcode flags field. */
unsigned long flags;
ppc_cpu_t flags;
 
/* A format string to turn the macro into a normal instruction.
Each %N in the string is replaced with operand number N (zero
326,4 → 359,6
extern const struct powerpc_macro powerpc_macros[];
extern const int powerpc_num_macros;
 
extern ppc_cpu_t ppc_parse_cpu (ppc_cpu_t, const char *);
 
#endif /* PPC_H */
/opcode/or32.h
28,7 → 28,7
#define NUM_SIGNED (1)
 
#define MAX_GPRS 32
#define PAGE_SIZE 4096
#define PAGE_SIZE 8192
#undef __HALF_WORD_INSN__
 
#define OPERAND_DELIM (',')
37,6 → 37,18
#define OR32_W_FLAG (2)
#define OR32_R_FLAG (4)
 
#if defined(HAS_EXECUTION)
# if SIMPLE_EXECUTION
# include "simpl32_defs.h"
# elif DYNAMIC_EXECUTION
# include "dyn32_defs.h"
# else
extern void l_none (void);
# endif
#else
extern void l_none (void);
#endif
 
struct or32_letter
{
char letter;
44,6 → 56,23
/* int reloc; relocation per letter ?? */
};
 
enum insn_type {
it_unknown,
it_exception,
it_arith,
it_shift,
it_compare,
it_branch,
it_jump,
it_load,
it_store,
it_movimm,
it_move,
it_extend,
it_nop,
it_mac,
it_float };
 
/* Main instruction specification array. */
struct or32_opcode
{
67,8 → 96,21
/* Opcode and operand encoding. */
char *encoding;
void (*exec) (void);
 
#ifdef HAS_EXECUTION
# if COMPLEX_EXECUTION
char *function_name;
# elif SIMPLE_EXECUTION
void (*exec)(struct iqueue_entry *);
# else /* DYNAMIC_EXECUTION */
void (*exec)(struct op_queue *opq, int param_t[3], orreg_t param[3], int);
# endif
#else /* HAS_EXECUTION */
void (*exec)(void);
#endif
 
unsigned int flags;
enum insn_type func_unit;
};
 
#define OPTYPE_LAST (0x80000000)
88,61 → 130,19
unsigned long data;
} **op_start;
 
#ifdef HAS_EXECUTION
extern void l_invalid (void);
extern void l_sfne (void);
extern void l_bf (void);
extern void l_add (void);
extern void l_sw (void);
extern void l_sb (void);
extern void l_sh (void);
extern void l_lwz (void);
extern void l_lbs (void);
extern void l_lbz (void);
extern void l_lhs (void);
extern void l_lhz (void);
extern void l_movhi (void);
extern void l_and (void);
extern void l_or (void);
extern void l_xor (void);
extern void l_sub (void);
extern void l_mul (void);
extern void l_div (void);
extern void l_divu (void);
extern void l_sll (void);
extern void l_sra (void);
extern void l_srl (void);
extern void l_j (void);
extern void l_jal (void);
extern void l_jalr (void);
extern void l_jr (void);
extern void l_rfe (void);
extern void l_nop (void);
extern void l_bnf (void);
extern void l_sfeq (void);
extern void l_sfgts (void);
extern void l_sfges (void);
extern void l_sflts (void);
extern void l_sfles (void);
extern void l_sfgtu (void);
extern void l_sfgeu (void);
extern void l_sfltu (void);
extern void l_sfleu (void);
extern void l_mtspr (void);
extern void l_mfspr (void);
extern void l_sys (void);
extern void l_trap (void); /* CZ 21/06/01. */
extern void l_macrc (void);
extern void l_mac (void);
extern void l_msb (void);
extern void l_invalid (void);
extern void l_cust1 (void);
extern void l_cust2 (void);
extern void l_cust3 (void);
extern void l_cust4 (void);
#endif
extern void l_none (void);
/* Leaf flag used in automata building */
#define LEAF_FLAG (0x80000000)
 
struct temp_insn_struct
{
unsigned long insn;
unsigned long insn_mask;
int in_pass;
};
 
extern unsigned long *automata;
extern struct temp_insn_struct *ti;
 
extern const struct or32_letter or32_letters[];
 
extern const struct or32_opcode or32_opcodes[];
177,4 → 177,17
Return the size of the instruction. */
int disassemble_insn (unsigned long);
 
/* Extract instruction */
extern unsigned long insn_extract(char,char*);
/* Disassemble one instruction from insn index.
Return the size of the instruction. */
int disassemble_index (unsigned long,int);
 
/* FOR INTERNAL USE ONLY */
/* Automatically does zero- or sign- extension and also finds correct
sign bit position if sign extension is correct extension. Which extension
is proper is figured out from letter description. */
unsigned long extend_imm(unsigned long,char);
 
#endif
/opcode/avr.h
32,7 → 32,6
#define AVR_ISA_MOVW 0x1000 /* device has MOVW */
 
#define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM)
#define AVR_ISA_PWMx (AVR_ISA_M8 | AVR_ISA_BRK)
#define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM)
/* For the attiny26 which is missing LPM Rd,Z+. */
#define AVR_ISA_2xxe (AVR_ISA_2xxx | AVR_ISA_LPMX)
39,14 → 38,11
#define AVR_ISA_RF401 (AVR_ISA_2xxx | AVR_ISA_MOVW | AVR_ISA_LPMX)
#define AVR_ISA_TINY2 (AVR_ISA_2xxx | AVR_ISA_MOVW | AVR_ISA_LPMX | \
AVR_ISA_SPM | AVR_ISA_BRK)
#define AVR_ISA_M8 (AVR_ISA_2xxx | AVR_ISA_MUL | AVR_ISA_MOVW | \
AVR_ISA_LPMX | AVR_ISA_SPM)
#define AVR_ISA_M603 (AVR_ISA_2xxx | AVR_ISA_MEGA)
#define AVR_ISA_M103 (AVR_ISA_M603 | AVR_ISA_ELPM)
#define AVR_ISA_USB162 (AVR_ISA_M603 | AVR_ISA_MOVW | \
#define AVR_ISA_M8 (AVR_ISA_2xxx | AVR_ISA_MUL | AVR_ISA_MOVW | \
AVR_ISA_LPMX | AVR_ISA_SPM)
#define AVR_ISA_AVR3 (AVR_ISA_M603 | AVR_ISA_MOVW | \
AVR_ISA_LPMX | AVR_ISA_SPM | AVR_ISA_ELPM)
#define AVR_ISA_PWMx (AVR_ISA_M8 | AVR_ISA_BRK)
#define AVR_ISA_M161 (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_MOVW | \
AVR_ISA_LPMX | AVR_ISA_SPM)
#define AVR_ISA_94K (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_MOVW | AVR_ISA_LPMX)
53,7 → 49,22
#define AVR_ISA_M323 (AVR_ISA_M161 | AVR_ISA_BRK)
#define AVR_ISA_M128 (AVR_ISA_M323 | AVR_ISA_ELPM | AVR_ISA_ELPMX)
 
#define AVR_ISA_ALL 0xFFFF
#define AVR_ISA_AVR1 AVR_ISA_TINY1
#define AVR_ISA_AVR2 AVR_ISA_2xxx
#define AVR_ISA_AVR25 AVR_ISA_TINY2
#define AVR_ISA_AVR3 AVR_ISA_M603
#define AVR_ISA_AVR31 AVR_ISA_M103
#define AVR_ISA_AVR35 (AVR_ISA_AVR3 | AVR_ISA_MOVW | \
AVR_ISA_LPMX | AVR_ISA_SPM | AVR_ISA_BRK)
#define AVR_ISA_AVR3_ALL (AVR_ISA_AVR3 | AVR_ISA_AVR31 | AVR_ISA_AVR35)
#define AVR_ISA_AVR4 AVR_ISA_PWMx
#define AVR_ISA_AVR5 AVR_ISA_M323
#define AVR_ISA_AVR51 AVR_ISA_M128
#define AVR_ISA_AVR6 (AVR_ISA_1200 | AVR_ISA_LPM | AVR_ISA_LPMX | \
AVR_ISA_SRAM | AVR_ISA_MEGA | AVR_ISA_MUL | \
AVR_ISA_ELPM | AVR_ISA_ELPMX | AVR_ISA_SPM | \
AVR_ISA_SPM | AVR_ISA_BRK | AVR_ISA_EIND | \
AVR_ISA_MOVW)
 
#define REGISTER_P(x) ((x) == 'r' \
|| (x) == 'd' \
/opcode/s390.h
37,7 → 37,8
S390_OPCODE_Z900,
S390_OPCODE_Z990,
S390_OPCODE_Z9_109,
S390_OPCODE_Z9_EC
S390_OPCODE_Z9_EC,
S390_OPCODE_Z10
};
 
/* The opcode table is an array of struct s390_opcode. */
/opcode/ChangeLog
1,3 → 1,174
2009-10-02 Peter Bergner <bergner@vnet.ibm.com>
 
* ppc.h (PPC_OPCODE_476): Define.
 
2009-10-01 Peter Bergner <bergner@vnet.ibm.com>
 
* ppc.h (PPC_OPCODE_A2): Rename from PPC_OPCODE_PPCA2.
 
2009-09-22 Peter Bergner <bergner@vnet.ibm.com>
 
* ppc.h (ppc_cpu_t): Typedef to uint64_t.
 
2009-09-21 Ben Elliston <bje@au.ibm.com>
 
* ppc.h (PPC_OPCODE_PPCA2): New.
 
2009-09-05 Martin Thuresson <martin@mtme.org>
 
* ia64.h (struct ia64_operand): Renamed member class to op_class.
 
2009-08-29 Martin Thuresson <martin@mtme.org>
 
* tic30.h (template): Rename type template to
insn_template. Updated code to use new name.
* tic54x.h (template): Rename type template to
insn_template.
 
2009-08-20 Nick Hudson <nick.hudson@gmx.co.uk>
 
* hppa.h (pa_opcodes): Add a pa10 bb without FLAG_STRICT.
 
2009-06-11 Anthony Green <green@moxielogic.com>
 
* moxie.h (MOXIE_F3_PCREL): Define.
(moxie_form3_opc_info): Grow.
 
2009-06-06 Anthony Green <green@moxielogic.com>
 
* moxie.h (MOXIE_F1_M): Define.
 
2009-04-15 Anthony Green <green@moxielogic.com>
 
* moxie.h: Created.
 
2009-04-06 DJ Delorie <dj@redhat.com>
 
* h8300.h: Add relaxation attributes to MOVA opcodes.
 
2009-03-10 Alan Modra <amodra@bigpond.net.au>
 
* ppc.h (ppc_parse_cpu): Declare.
 
2009-03-02 Qinwei <qinwei@sunnorth.com.cn>
 
* score-inst.h (score_insn_type, score_data_type): Add Ra_I9_I5
and _IMM11 for mbitclr and mbitset.
* score-datadep.h: Update dependency information.
 
2009-02-26 Peter Bergner <bergner@vnet.ibm.com>
 
* ppc.h (PPC_OPCODE_POWER7): New.
 
2009-02-06 Doug Evans <dje@google.com>
 
* i386.h: Add comment regarding sse* insns and prefixes.
 
2009-02-03 Sandip Matte <sandip@rmicorp.com>
 
* mips.h (INSN_XLR): Define.
(INSN_CHIP_MASK): Update.
(CPU_XLR): Define.
(OPCODE_IS_MEMBER): Update.
(M_MSGSND, M_MSGLD, M_MSGLD_T, M_MSGWAIT, M_MSGWAIT_T): Define.
 
2009-01-28 Doug Evans <dje@google.com>
 
* opcode/i386.h: Add multiple inclusion protection.
(EAX_REG_NUM,ECX_REG_NUM,EDX_REGNUM,EBX_REG_NUM,ESI_REG_NUM)
(EDI_REG_NUM): New macros.
(MODRM_MOD_FIELD,MODRM_REG_FIELD,MODRM_RM_FIELD): New macros.
(SIB_SCALE_FIELD,SIB_INDEX_FIELD,SIB_BASE_FIELD): New macros.
(REX_PREFIX_P): New macro.
 
2009-01-09 Peter Bergner <bergner@vnet.ibm.com>
 
* ppc.h (struct powerpc_opcode): New field "deprecated".
(PPC_OPCODE_NOPOWER4): Delete.
 
2008-11-28 Joshua Kinard <kumba@gentoo.org>
 
* mips.h: Define CPU_R14000, CPU_R16000.
(OPCODE_IS_MEMBER): Include R14000, R16000 in test.
 
2008-11-18 Catherine Moore <clm@codesourcery.com>
 
* arm.h (FPU_NEON_FP16): New.
(FPU_ARCH_NEON_FP16): New.
 
2008-11-06 Chao-ying Fu <fu@mips.com>
 
* mips.h: Doucument '1' for 5-bit sync type.
 
2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
 
* ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB. Update
IA64_RS_CR.
 
2008-08-01 Peter Bergner <bergner@vnet.ibm.com>
 
* ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.
 
2008-07-30 Michael J. Eager <eager@eagercon.com>
 
* ppc.h (PPC_OPCODE_405): Define.
(PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define.
 
2008-06-13 Peter Bergner <bergner@vnet.ibm.com>
 
* ppc.h (ppc_cpu_t): New typedef.
(struct powerpc_opcode <flags>): Use it.
(struct powerpc_operand <insert, extract>): Likewise.
(struct powerpc_macro <flags>): Likewise.
 
2008-06-12 Adam Nemet <anemet@caviumnetworks.com>
 
* mips.h: Document new field descriptors +x, +X, +p, +P, +s, +S.
Update comment before MIPS16 field descriptors to mention MIPS16.
(OP_SH_BBITIND, OP_MASK_BBITIND): New bit mask and shift count for
BBIT.
(OP_SH_CINSPOS, OP_MASK_CINSPOS, OP_SH_CINSLM1, OP_MASK_CINSLM1):
New bit masks and shift counts for cins and exts.
 
* mips.h: Document new field descriptors +Q.
(OP_SH_SEQI, OP_MASK_SEQI): New bit mask and shift count for SEQI.
 
2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
 
* mips.h (INSN_MACRO): Move it up to the the pinfo macros.
(INSN2_M_FP_S, INSN2_M_FP_D): New pinfo2 macros.
 
2008-04-14 Edmar Wienskoski <edmar@freescale.com>
 
* ppc.h: (PPC_OPCODE_E500MC): New.
 
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
 
* i386.h (MAX_OPERANDS): Set to 5.
(MAX_MNEM_SIZE): Changed to 20.
 
2008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
 
* avr.h (AVR_ISA_TINY3): Define new opcode set for attiny167.
 
2008-03-09 Paul Brook <paul@codesourcery.com>
 
* arm.h (FPU_VFP_EXT_D32, FPU_VFP_V3D16, FPU_ARCH_VFP_V3D16): Define.
 
2008-03-04 Paul Brook <paul@codesourcery.com>
 
* arm.h (ARM_EXT_V6M, ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR): Define.
(ARM_AEXT_V6T2, ARM_AEXT_V7_ARM, ARM_AEXT_V7M): Use new flags.
(ARM_AEXT_V6M, ARM_ARCH_V6M): Define.
 
2008-02-27 Denis Vlasenko <vda.linux@googlemail.com>
Nick Clifton <nickc@redhat.com>
 
PR 3134
* h8300.h (h8_opcodes): Add an encoding for a mov.l instruction
with a 32-bit displacement but without the top bit of the 4th byte
set.
 
2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 
* cr16.h (cr16_num_optab): Declared.
15,6 → 186,15
(CPU_OCTEON): New macro.
(OPCODE_IS_MEMBER): Handle Octeon instructions.
 
2008-01-23 Eric B. Weddington <eric.weddington@atmel.com>
 
* avr.h (AVR_ISA_RF401): Add new opcode set for at86rf401.
 
2008-01-03 Eric B. Weddington <eric.weddington@atmel.com>
 
* avr.h (AVR_ISA_USB162): Add new opcode set.
(AVR_ISA_AVR3): Likewise.
 
2007-11-29 Mark Shinwell <shinwell@codesourcery.com>
 
* mips.h (INSN_LOONGSON_2E): New.
338,6 → 518,10
before corresponding pa11 opcodes. Add strict pa10 register-immediate
entries for "fdc".
 
2005-09-30 Catherine Moore <clm@cm00re.com>
 
* bfin.h: New file.
 
2005-09-24 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
 
* hppa.h (pa_opcodes): Add new "fdc" and "fic" opcode entries.
/opcode/ia64.h
171,9 → 171,10
IA64_RS_BR,
IA64_RS_CFM,
IA64_RS_CPUID,
IA64_RS_CR_IIB,
IA64_RS_CR_IRR,
IA64_RS_CR_LRR,
IA64_RS_CR, /* 3-7,10-15,18,26-63,75-79,82-127 */
IA64_RS_CR, /* 3-7,10-15,18,28-63,75-79,82-127 */
IA64_RS_DBR,
IA64_RS_FR,
IA64_RS_FRb,
326,7 → 327,7
 
struct ia64_operand
{
enum ia64_operand_class class;
enum ia64_operand_class op_class;
 
/* Set VALUE as the operand bits for the operand of type SELF in the
instruction pointed to by CODE. If an error occurs, *CODE is not
/opcode/mips.h
1,6 → 1,6
/* mips.h. Mips opcode list for GDB, the GNU debugger.
Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
2003, 2004, 2005, 2008
2003, 2004, 2005, 2008, 2009
Free Software Foundation, Inc.
Contributed by Ralph Campbell and OSF
Commented and modified by Ian Lance Taylor, Cygnus Support
215,6 → 215,16
#define OP_SH_UDI4 6
#define OP_MASK_UDI4 0xfffff
 
/* Octeon */
#define OP_SH_BBITIND 16
#define OP_MASK_BBITIND 0x1f
#define OP_SH_CINSPOS 6
#define OP_MASK_CINSPOS 0x1f
#define OP_SH_CINSLM1 11
#define OP_MASK_CINSLM1 0x1f
#define OP_SH_SEQI 6
#define OP_MASK_SEQI 0x3ff
 
/* This structure holds information for a particular instruction. */
 
struct mips_opcode
252,6 → 262,7
 
Each of these characters corresponds to a mask field defined above.
 
"1" 5 bit sync type (OP_*_SHAMT)
"<" 5 bit shift amount (OP_*_SHAMT)
">" shift amount between 32 and 63, stored after subtracting 32 (OP_*_SHAMT)
"a" 26 bit target address (OP_*_TARGET)
370,6 → 381,20
"+3" UDI immediate bits 6-20
"+4" UDI immediate bits 6-25
 
Octeon:
"+x" Bit index field of bbit. Enforces: 0 <= index < 32.
"+X" Bit index field of bbit aliasing bbit32. Matches if 32 <= index < 64,
otherwise skips to next candidate.
"+p" Position field of cins/cins32/exts/exts32. Enforces 0 <= pos < 32.
"+P" Position field of cins/exts aliasing cins32/exts32. Matches if
32 <= pos < 64, otherwise skips to next candidate.
"+Q" Immediate field of seqi/snei. Enforces -512 <= imm < 512.
"+s" Length-minus-one field of cins/exts. Enforces: 0 <= lenm1 < 32.
"+S" Length-minus-one field of cins32/exts32 or cins/exts aliasing
cint32/exts32. Enforces non-negative value and that
pos + lenm1 < 32 or pos + lenm1 < 64 depending whether previous
position field is "+p" or "+P".
 
Other:
"()" parens surrounding optional value
"," separates operands
377,7 → 402,7
"+" Start of extension sequence.
 
Characters used so far, for quick reference when adding more:
"234567890"
"1234567890"
"%[]<>(),+:'@!$*&"
"ABCDEFGHIJKLMNOPQRSTUVWXYZ"
"abcdefghijklopqrstuvwxz"
385,8 → 410,8
Extension character sequences used so far ("+" followed by the
following), for quick reference when adding more:
"1234"
"ABCDEFGHIT"
"t"
"ABCDEFGHIPQSTX"
"pstx"
*/
 
/* These are the bits which may be set in the pinfo field of an
456,6 → 481,9
#define INSN_MULT 0x40000000
/* Instruction synchronize shared memory. */
#define INSN_SYNC 0x80000000
/* Instruction is actually a macro. It should be ignored by the
disassembler, and requires special treatment by the assembler. */
#define INSN_MACRO 0xffffffff
 
/* These are the bits which may be set in the pinfo2 field of an
instruction. */
466,11 → 494,15
#define INSN2_READ_MDMX_ACC 0x00000002
/* Instruction writes MDMX accumulator. */
#define INSN2_WRITE_MDMX_ACC 0x00000004
/* Macro uses single-precision floating-point instructions. This should
only be set for macros. For instructions, FP_S in pinfo carries the
same information. */
#define INSN2_M_FP_S 0x00000008
/* Macro uses double-precision floating-point instructions. This should
only be set for macros. For instructions, FP_D in pinfo carries the
same information. */
#define INSN2_M_FP_D 0x00000010
 
/* Instruction is actually a macro. It should be ignored by the
disassembler, and requires special treatment by the assembler. */
#define INSN_MACRO 0xffffffff
 
/* Masks used to mark instructions to indicate which MIPS ISA level
they were introduced in. INSN_ISA_MASK masks an enumeration that
specifies the base ISA level(s). The remainder of a 32-bit
511,7 → 543,7
{ 0x0001, 0x0003, 0x0607, 0x1e0f, 0x3e1f, 0x0a23, 0x3e63, 0x3ebf, 0x3fff };
 
/* Masks used for Chip specific instructions. */
#define INSN_CHIP_MASK 0xc3ff0800
#define INSN_CHIP_MASK 0xc3ff0820
 
/* Cavium Networks Octeon instructions. */
#define INSN_OCTEON 0x00000800
560,6 → 592,8
#define INSN_LOONGSON_2E 0x40000000
/* ST Microelectronics Loongson 2F. */
#define INSN_LOONGSON_2F 0x80000000
/* RMI Xlr instruction */
#define INSN_XLR 0x00000020
 
/* MIPS ISA defines, use instead of hardcoding ISA level. */
 
600,6 → 634,8
#define CPU_RM9000 9000
#define CPU_R10000 10000
#define CPU_R12000 12000
#define CPU_R14000 14000
#define CPU_R16000 16000
#define CPU_MIPS16 16
#define CPU_MIPS32 32
#define CPU_MIPS32R2 33
610,6 → 646,7
#define CPU_LOONGSON_2E 3001
#define CPU_LOONGSON_2F 3002
#define CPU_OCTEON 6501
#define CPU_XLR 887682 /* decimal 'XLR' */
 
/* Test for membership in an ISA including chip specific ISAs. INSN
is pointer to an element of the opcode table; ISA is the specified
629,7 → 666,8
|| (cpu == CPU_R4010 && ((insn)->membership & INSN_4010) != 0) \
|| (cpu == CPU_VR4100 && ((insn)->membership & INSN_4100) != 0) \
|| (cpu == CPU_R3900 && ((insn)->membership & INSN_3900) != 0) \
|| ((cpu == CPU_R10000 || cpu == CPU_R12000) \
|| ((cpu == CPU_R10000 || cpu == CPU_R12000 || cpu == CPU_R14000 \
|| cpu == CPU_R16000) \
&& ((insn)->membership & INSN_10000) != 0) \
|| (cpu == CPU_SB1 && ((insn)->membership & INSN_SB1) != 0) \
|| (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0) \
642,6 → 680,7
&& ((insn)->membership & INSN_LOONGSON_2F) != 0) \
|| (cpu == CPU_OCTEON \
&& ((insn)->membership & INSN_OCTEON) != 0) \
|| (cpu == CPU_XLR && ((insn)->membership & INSN_XLR) != 0) \
|| 0) /* Please keep this term for easier source merging. */
 
/* This is a list of macro expanded instructions.
774,6 → 813,11
M_LWR_A,
M_LWR_AB,
M_LWU_AB,
M_MSGSND,
M_MSGLD,
M_MSGLD_T,
M_MSGWAIT,
M_MSGWAIT_T,
M_MOVE,
M_MUL,
M_MUL_I,
955,11 → 999,10
#define MIPS16OP_MASK_IMM6 0x3f
#define MIPS16OP_SH_IMM6 5
 
/* These are the characters which may appears in the args field of an
instruction. They appear in the order in which the fields appear
when the instruction is used. Commas and parentheses in the args
string are ignored when assembling, and written into the output
when disassembling.
/* These are the characters which may appears in the args field of a MIPS16
instruction. They appear in the order in which the fields appear when the
instruction is used. Commas and parentheses in the args string are ignored
when assembling, and written into the output when disassembling.
 
"y" 3 bit register (MIPS16OP_*_RY)
"x" 3 bit register (MIPS16OP_*_RX)
/opcode/tic30.h
1,5 → 1,5
/* tic30.h -- Header file for TI TMS320C30 opcode table
Copyright 1998 Free Software Foundation, Inc.
Copyright 1998, 2005, 2009 Free Software Foundation, Inc.
Contributed by Steven Haworth (steve@pm.cse.rmit.edu.au)
 
This file is part of GDB, GAS, and the GNU binutils.
241,9 → 241,9
#define Imm_SInt 2
#define Imm_UInt 3
}
template;
insn_template;
 
static const template tic30_optab[] = {
static const insn_template tic30_optab[] = {
{ "absf" ,2,0x00000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
{ "absi" ,2,0x00800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
{ "addc" ,2,0x01000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
604,7 → 604,7
{ "" ,0,0x00000000,0, { 0, 0, 0 }, 0 }
};
 
static const template *const tic30_optab_end =
static const insn_template *const tic30_optab_end =
tic30_optab + sizeof(tic30_optab)/sizeof(tic30_optab[0]);
 
typedef struct {
/opcode/score-inst.h
1,6 → 1,7
/* score-inst.h -- Score Instructions Table
Copyright 2006 Free Software Foundation, Inc.
Copyright 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
Contributed by:
Brain.lin (brain.lin@sunplusct.com)
Mei Ligang (ligang@sunnorth.com.cn)
Pei-Lin Tsai (pltsai@sunplus.com)
 
8,7 → 9,7
 
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
the Free Software Foundation; either version 3, or (at your option)
any later version.
 
GAS is distributed in the hope that it will be useful,
96,6 → 97,8
Rd_Rs_I14,
I15,
Rd_I16,
Rd_I30,
Rd_I32,
Rd_rvalueRs_SI10,
Rd_lvalueRs_SI10,
Rd_rvalueRs_preSI12,
105,6 → 108,8
Rd_Rs_SI14,
Rd_rvalueRs_SI15,
Rd_lvalueRs_SI15,
Rd_SI5,
Rd_SI6,
Rd_SI16,
PC_DISP8div2,
PC_DISP11div2,
139,6 → 144,8
Insn_GP,
Insn_PIC,
Insn_internal,
Insn_BCMP,
Ra_I9_I5,
};
 
enum score_data_type
178,6 → 185,13
_SIMM16_pic = 42, /* Index in score_df_range. */
_IMM16_LO16_pic = 43,
_IMM16_pic = 44,
 
_SIMM5 = 45,
_SIMM6 = 46,
_IMM32 = 47,
_SIMM32 = 48,
_IMM11 = 49,
_IMM5_MULTI_LOAD = 50,
};
 
#define REG_TMP 1
206,302 → 220,17
#define OP16_SH_DISP8 (OP_IMM_TYPE | 0)
#define OP16_SH_DISP11 (OP_IMM_TYPE | 1)
 
struct datafield_range
{
int data_type;
int bits;
int range[2];
};
 
struct datafield_range score_df_range[] =
{
{_IMM4, 4, {0, (1 << 4) - 1}}, /* ( 0 ~ 15 ) */
{_IMM5, 5, {0, (1 << 5) - 1}}, /* ( 0 ~ 31 ) */
{_IMM8, 8, {0, (1 << 8) - 1}}, /* ( 0 ~ 255 ) */
{_IMM14, 14, {0, (1 << 14) - 1}}, /* ( 0 ~ 16383) */
{_IMM15, 15, {0, (1 << 15) - 1}}, /* ( 0 ~ 32767) */
{_IMM16, 16, {0, (1 << 16) - 1}}, /* ( 0 ~ 65535) */
{_SIMM10, 10, {-(1 << 9), (1 << 9) - 1}}, /* ( -512 ~ 511 ) */
{_SIMM12, 12, {-(1 << 11), (1 << 11) - 1}}, /* ( -2048 ~ 2047 ) */
{_SIMM14, 14, {-(1 << 13), (1 << 13) - 1}}, /* ( -8192 ~ 8191 ) */
{_SIMM15, 15, {-(1 << 14), (1 << 14) - 1}}, /* (-16384 ~ 16383) */
{_SIMM16, 16, {-(1 << 15), (1 << 15) - 1}}, /* (-32768 ~ 32767) */
{_SIMM14_NEG, 14, {-(1 << 13), (1 << 13) - 1}}, /* ( -8191 ~ 8192 ) */
{_IMM16_NEG, 16, {0, (1 << 16) - 1}}, /* (-65535 ~ 0 ) */
{_SIMM16_NEG, 16, {-(1 << 15), (1 << 15) - 1}}, /* (-32768 ~ 32767) */
{_IMM20, 20, {0, (1 << 20) - 1}},
{_IMM25, 25, {0, (1 << 25) - 1}},
{_DISP8div2, 8, {-(1 << 8), (1 << 8) - 1}}, /* ( -256 ~ 255 ) */
{_DISP11div2, 11, {0, 0}},
{_DISP19div2, 19, {-(1 << 19), (1 << 19) - 1}}, /* (-524288 ~ 524287) */
{_DISP24div2, 24, {0, 0}},
{_VALUE, 32, {0, ((unsigned int)1 << 31) - 1}},
{_VALUE_HI16, 16, {0, (1 << 16) - 1}},
{_VALUE_LO16, 16, {0, (1 << 16) - 1}},
{_VALUE_LDST_LO16, 16, {0, (1 << 16) - 1}},
{_SIMM16_LA, 16, {-(1 << 15), (1 << 15) - 1}}, /* (-32768 ~ 32767) */
{_IMM5_RSHIFT_1, 5, {0, (1 << 6) - 1}}, /* ( 0 ~ 63 ) */
{_IMM5_RSHIFT_2, 5, {0, (1 << 7) - 1}}, /* ( 0 ~ 127 ) */
{_SIMM16_LA_POS, 16, {0, (1 << 15) - 1}}, /* ( 0 ~ 32767) */
{_IMM5_RANGE_8_31, 5, {8, 31}}, /* But for cop0 the valid data : (8 ~ 31). */
{_IMM10_RSHIFT_2, 10, {-(1 << 11), (1 << 11) - 1}}, /* For ldc#, stc#. */
{_SIMM10, 10, {0, (1 << 10) - 1}}, /* ( -1024 ~ 1023 ) */
{_SIMM12, 12, {0, (1 << 12) - 1}}, /* ( -2048 ~ 2047 ) */
{_SIMM14, 14, {0, (1 << 14) - 1}}, /* ( -8192 ~ 8191 ) */
{_SIMM15, 15, {0, (1 << 15) - 1}}, /* (-16384 ~ 16383) */
{_SIMM16, 16, {0, (1 << 16) - 1}}, /* (-65536 ~ 65536) */
{_SIMM14_NEG, 14, {0, (1 << 16) - 1}}, /* ( -8191 ~ 8192 ) */
{_IMM16_NEG, 16, {0, (1 << 16) - 1}}, /* ( 65535 ~ 0 ) */
{_SIMM16_NEG, 16, {0, (1 << 16) - 1}}, /* ( 65535 ~ 0 ) */
{_IMM20, 20, {0, (1 << 20) - 1}}, /* (-32768 ~ 32767) */
{_IMM25, 25, {0, (1 << 25) - 1}}, /* (-32768 ~ 32767) */
{_GP_IMM15, 15, {0, (1 << 15) - 1}}, /* ( 0 ~ 65535) */
{_GP_IMM14, 14, {0, (1 << 14) - 1}}, /* ( 0 ~ 65535) */
{_SIMM16_pic, 16, {-(1 << 15), (1 << 15) - 1}}, /* (-32768 ~ 32767) */
{_IMM16_LO16_pic, 16, {0, (1 << 16) - 1}}, /* ( 65535 ~ 0 ) */
{_IMM16_pic, 16, {0, (1 << 16) - 1}}, /* ( 0 ~ 65535) */
};
 
struct shift_bitmask
{
int opd_type;
int opd_num;
struct datafield_range *df_range;
int sh[4];
long fieldbits[4];
};
 
struct shift_bitmask score_sh_bits_map[] =
{
{
Rd_I4, 2, &score_df_range[_IMM4],
{OP16_SH_REGD, OP16_SH_I45, 0, 0},
{0xf, 0xf, 0, 0},
},
{
Rd_I5, 2, &score_df_range[_IMM5],
{OP16_SH_REGD, OP16_SH_I45, 0, 0},
{0xf, 0x1f, 0, 0},
},
{
Rd_rvalueBP_I5, 2, &score_df_range[_IMM5],
{OP16_SH_REGD, OP16_SH_I45, 0, 0},
{0xf, 0x1f, 0, 0},
},
{
Rd_lvalueBP_I5, 2, &score_df_range[_IMM5],
{OP16_SH_REGD, OP16_SH_I45, 0, 0},
{0xf, 0x1f, 0, 0},
},
{
Rd_Rs_I5, 3, &score_df_range[_IMM5],
{OP_SH_REGD, OP_SH_REGS1, OP_SH_I5, 0},
{0x1f, 0x1f, 0x1f, 0},
},
{
x_Rs_I5, 2, &score_df_range[_IMM5],
{OP_SH_REGS1, OP_SH_I5, 0, 0},
{0x1f, 0x1f, 0, 0},
},
{
x_I5_x, 1, &score_df_range[_IMM5],
{OP_SH_TRAPI5, 0, 0, 0},
{0x1f, 0, 0, 0},
},
{
Rd_I8, 2, &score_df_range[_IMM8],
{OP16_SH_REGD, OP16_SH_I8, 0, 0},
{0xf, 0xff, 0, 0},
},
{
Rd_Rs_I14, 3, &score_df_range[_IMM14],
{OP_SH_REGD, OP_SH_REGS1, OP_SH_I, 0},
{0x1f, 0x1f, 0x3fff, 0},
},
{
I15, 1, &score_df_range[_IMM15],
{OP_SH_I15, 0, 0, 0},
{0x7fff, 0, 0, 0},
},
{
Rd_I16, 2, &score_df_range[_IMM16],
{OP_SH_REGD, OP_SH_I, 0, 0},
{0x1f, 0xffff, 0, 0},
},
{
Rd_rvalueRs_SI10, 3, &score_df_range[_SIMM10],
{OP_SH_REGD, OP_SH_REGS1, OP_SH_I10, 0},
{0x1f, 0x1f, 0x3ff, 0},
},
{
Rd_lvalueRs_SI10, 3, &score_df_range[_SIMM10],
{OP_SH_REGD, OP_SH_REGS1, OP_SH_I10, 0},
{0x1f, 0x1f, 0x3ff, 0},
},
{
Rd_rvalueRs_preSI12, 3, &score_df_range[_SIMM12],
{OP_SH_REGD, OP_SH_REGS1, OP_SH_I12, 0},
{0xf, 0xf, 0xfff, 0},
},
{
Rd_rvalueRs_postSI12, 3, &score_df_range[_SIMM12],
{OP_SH_REGD, OP_SH_REGS1, OP_SH_I12, 0},
{0xf, 0xf, 0xfff, 0},
},
{
Rd_lvalueRs_preSI12, 3, &score_df_range[_SIMM12],
{OP_SH_REGD, OP_SH_REGS1, OP_SH_I12, 0},
{0xf, 0xf, 0xfff, 0},
},
{
Rd_lvalueRs_postSI12, 3, &score_df_range[_SIMM12],
{OP_SH_REGD, OP_SH_REGS1, OP_SH_I12, 0},
{0xf, 0xf, 0xfff, 0},
},
{
Rd_Rs_SI14, 3, &score_df_range[_SIMM14],
{OP_SH_REGD, OP_SH_REGS1, OP_SH_I, 0},
{0x1f, 0x1f, 0x3fff, 0},
},
{
Rd_rvalueRs_SI15, 3, &score_df_range[_SIMM15],
{OP_SH_REGD, OP_SH_REGS1, OP_SH_RI15, 0},
{0x1f, 0x1f, 0x7fff, 0},
},
{
Rd_lvalueRs_SI15, 3, &score_df_range[_SIMM15],
{OP_SH_REGD, OP_SH_REGS1, OP_SH_RI15, 0},
{0x1f, 0x1f, 0x7fff, 0},
},
{
Rd_SI16, 2, &score_df_range[_SIMM16],
{OP_SH_REGD, OP_SH_I, 0, 0},
{0x1f, 0xffff, 0, 0},
},
{
PC_DISP8div2, 1, &score_df_range[_DISP8div2],
{OP16_SH_DISP8, 0, 0, 0},
{0xff, 0, 0, 0},
},
{
PC_DISP11div2, 1, &score_df_range[_DISP11div2],
{OP16_SH_DISP11, 0, 0, 0},
{0x7ff, 0, 0, 0},
},
{
PC_DISP19div2, 2, &score_df_range[_DISP19div2],
{OP_SH_DISP19_p1, OP_SH_DISP19_p2, 0, 0},
{0x3ff, 0x1ff, 0, 0},
},
{
PC_DISP24div2, 1, &score_df_range[_DISP24div2],
{OP_SH_DISP24, 0, 0, 0},
{0xffffff, 0, 0, 0},
},
{
Rd_Rs_Rs, 3, NULL,
{OP_SH_REGD, OP_SH_REGS1, OP_SH_REGS2, 0},
{0x1f, 0x1f, 0x1f, 0}
},
{
Rd_Rs_x, 2, NULL,
{OP_SH_REGD, OP_SH_REGS1, 0, 0},
{0x1f, 0x1f, 0, 0},
},
{
Rd_x_Rs, 2, NULL,
{OP_SH_REGD, OP_SH_REGS2, 0, 0},
{0x1f, 0x1f, 0, 0},
},
{
Rd_x_x, 1, NULL,
{OP_SH_REGD, 0, 0, 0},
{0x1f, 0, 0, 0},
},
{
x_Rs_Rs, 2, NULL,
{OP_SH_REGS1, OP_SH_REGS2, 0, 0},
{0x1f, 0x1f, 0, 0},
},
{
x_Rs_x, 1, NULL,
{OP_SH_REGS1, 0, 0, 0},
{0x1f, 0, 0, 0},
},
{
Rd_Rs, 2, NULL,
{OP16_SH_REGD, OP16_SH_REGS1, 0, 0},
{0xf, 0xf, 0, 0},
},
{
Rd_HighRs, 2, NULL,
{OP16_SH_REGD, OP16_SH_REGS1, 0, 0},
{0xf, 0xf, 0x1f, 0},
},
{
Rd_rvalueRs, 2, NULL,
{OP16_SH_REGD, OP16_SH_REGS1, 0, 0},
{0xf, 0xf, 0, 0},
},
{
Rd_lvalueRs, 2, NULL,
{OP16_SH_REGD, OP16_SH_REGS1, 0, 0},
{0xf, 0xf, 0, 0}
},
{
Rd_lvalue32Rs, 2, NULL,
{OP_SH_REGD, OP_SH_REGS1, 0, 0},
{0x1f, 0x1f, 0, 0},
},
{
Rd_rvalue32Rs, 2, NULL,
{OP_SH_REGD, OP_SH_REGS1, 0, 0},
{0x1f, 0x1f, 0, 0},
},
{
x_Rs, 1, NULL,
{OP16_SH_REGS1, 0, 0, 0},
{0xf, 0, 0, 0},
},
{
NO_OPD, 0, NULL,
{0, 0, 0, 0},
{0, 0, 0, 0},
},
{
NO16_OPD, 0, NULL,
{0, 0, 0, 0},
{0, 0, 0, 0},
},
};
 
struct asm_opcode
{
/* Instruction name. */
const char *template;
 
/* Instruction Opcode. */
unsigned long value;
 
/* Instruction bit mask. */
unsigned long bitmask;
 
/* Relax instruction opcode. 0x8000 imply no relaxation. */
unsigned long relax_value;
 
/* Instruction type. */
enum score_insn_type type;
 
/* Function to call to parse args. */
void (*parms) (char *);
};
 
enum insn_class
{
INSN_CLASS_16,
INSN_CLASS_32,
INSN_CLASS_48,
INSN_CLASS_PCE,
INSN_CLASS_SYN
};
 
/* s3_s7: Globals for both tc-score.c and elf32-score.c. */
extern int score3;
extern int score7;
 
#endif
/opcode/hppa.h
1,6 → 1,6
/* Table of opcodes for the PA-RISC.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000,
2001, 2002, 2003, 2004, 2005
2001, 2002, 2003, 2004, 2005, 2006, 2009
Free Software Foundation, Inc.
 
Contributed by the Center for Software Science at the
597,6 → 597,7
{ "bb", 0xc0006000, 0xffe06000, "?Bnx,!,w", pa20, FLAG_STRICT},
{ "bb", 0xc4004000, 0xfc006000, "?bnx,Q,w", pa10, FLAG_STRICT},
{ "bb", 0xc4004000, 0xfc004000, "?Bnx,B,w", pa20, FLAG_STRICT},
{ "bb", 0xc4004000, 0xfc006000, "?bnx,Q,w", pa10, 0},
{ "bvb", 0xc0004000, 0xffe04000, "?bnx,w", pa10, 0},
{ "clrbts", 0xe8004005, 0xffffffff, "", pa20, FLAG_STRICT},
{ "popbts", 0xe8004005, 0xfffff007, "$", pa20, FLAG_STRICT},
/libiberty.h
1,6 → 1,7
/* Function declarations for libiberty.
 
Copyright 2001, 2002, 2005, 2007 Free Software Foundation, Inc.
Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
2006, 2007, 2008, 2009 Free Software Foundation, Inc.
Note - certain prototypes declared in this header file are for
functions whoes implementation copyright does not belong to the
311,6 → 312,8
extern double physmem_total (void);
extern double physmem_available (void);
 
/* Compute the 32-bit CRC of a block of memory. */
extern unsigned int xcrc32 (const unsigned char *, int, unsigned int);
 
/* These macros provide a K&R/C89/C++-friendly way of allocating structures
with nice encapsulation. The XDELETE*() macros are technically
320,26 → 323,34
 
/* Scalar allocators. */
 
#define XALLOCA(T) ((T *) alloca (sizeof (T)))
#define XNEW(T) ((T *) xmalloc (sizeof (T)))
#define XCNEW(T) ((T *) xcalloc (1, sizeof (T)))
#define XDUP(T, P) ((T *) xmemdup ((P), sizeof (T), sizeof (T)))
#define XDELETE(P) free ((void*) (P))
 
/* Array allocators. */
 
#define XALLOCAVEC(T, N) ((T *) alloca (sizeof (T) * (N)))
#define XNEWVEC(T, N) ((T *) xmalloc (sizeof (T) * (N)))
#define XCNEWVEC(T, N) ((T *) xcalloc ((N), sizeof (T)))
#define XDUPVEC(T, P, N) ((T *) xmemdup ((P), sizeof (T) * (N), sizeof (T) * (N)))
#define XRESIZEVEC(T, P, N) ((T *) xrealloc ((void *) (P), sizeof (T) * (N)))
#define XDELETEVEC(P) free ((void*) (P))
 
/* Allocators for variable-sized structures and raw buffers. */
 
#define XALLOCAVAR(T, S) ((T *) alloca ((S)))
#define XNEWVAR(T, S) ((T *) xmalloc ((S)))
#define XCNEWVAR(T, S) ((T *) xcalloc (1, (S)))
#define XDUPVAR(T, P, S1, S2) ((T *) xmemdup ((P), (S1), (S2)))
#define XRESIZEVAR(T, P, S) ((T *) xrealloc ((P), (S)))
 
/* Type-safe obstack allocator. */
 
#define XOBNEW(O, T) ((T *) obstack_alloc ((O), sizeof (T)))
#define XOBNEWVEC(O, T, N) ((T *) obstack_alloc ((O), sizeof (T) * (N)))
#define XOBNEWVAR(O, T, S) ((T *) obstack_alloc ((O), (S)))
#define XOBFINISH(O, T) ((T) obstack_finish ((O)))
 
/* hex character manipulation routines */
/splay-tree.h
1,5 → 1,6
/* A splay-tree datatype.
Copyright 1998, 1999, 2000, 2002, 2007 Free Software Foundation, Inc.
Copyright 1998, 1999, 2000, 2002, 2005, 2007, 2009
Free Software Foundation, Inc.
Contributed by Mark Mitchell (mark@markmitchell.com).
 
This file is part of GCC.
86,8 → 87,7
typedef void (*splay_tree_deallocate_fn) (void *, void *);
 
/* The nodes in the splay tree. */
struct splay_tree_node_s GTY(())
{
struct GTY(()) splay_tree_node_s {
/* The key. */
splay_tree_key GTY ((use_param1)) key;
 
100,8 → 100,7
};
 
/* The splay tree itself. */
struct splay_tree_s GTY(())
{
struct GTY(()) splay_tree_s {
/* The root of the tree. */
splay_tree_node GTY ((use_params)) root;
 
/xtensa-isa-internal.h
1,5 → 1,5
/* Internal definitions for configurable Xtensa ISA support.
Copyright 2003, 2004, 2005 Free Software Foundation, Inc.
Copyright 2003, 2004, 2005, 2008 Free Software Foundation, Inc.
 
This file is part of BFD, the Binary File Descriptor library.
 
15,7 → 15,8
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301,
USA. */
 
#ifndef XTENSA_ISA_INTERNAL_H
#define XTENSA_ISA_INTERNAL_H
33,6 → 34,7
#define XTENSA_OPCODE_IS_CALL 0x00000008
 
#define XTENSA_STATE_IS_EXPORTED 0x00000001
#define XTENSA_STATE_IS_SHARED_OR 0x00000002
 
#define XTENSA_INTERFACE_HAS_SIDE_EFFECT 0x00000001
 
/coff/xcoff.h
1,7 → 1,7
/* Internal format of XCOFF object file data structures for BFD.
 
Copyright 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005
Free Software Foundation, Inc.
Copyright 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005,
2009 Free Software Foundation, Inc.
Written by Ian Lance Taylor <ian@cygnus.com>, Cygnus Support.
 
This file is part of BFD, the Binary File Descriptor library.
214,6 → 214,8
#define L_ENTRY (0x20)
/* Exported symbol. */
#define L_EXPORT (0x10)
/* Weak symbol. */
#define L_WEAK (0x08)
 
/* The ldrel structure. This is used to represent a reloc in the
.loader section. */
291,11 → 293,12
#define XCOFF_LDREL 0x00000008
/* Symbol is the entry point. */
#define XCOFF_ENTRY 0x00000010
/* Symbol is called; this is, it appears in a R_BR reloc. */
/* Symbol is for a function and is the target of a relocation.
The relocation may or may not be a branch-type relocation. */
#define XCOFF_CALLED 0x00000020
/* Symbol needs the TOC entry filled in. */
#define XCOFF_SET_TOC 0x00000040
/* Symbol is explicitly imported. */
/* Symbol is implicitly or explicitly imported. */
#define XCOFF_IMPORT 0x00000080
/* Symbol is explicitly exported. */
#define XCOFF_EXPORT 0x00000100
315,6 → 318,10
#define XCOFF_SYSCALL32 0x00008000
/* Symbol is an imported 64 bit syscall. */
#define XCOFF_SYSCALL64 0x00010000
/* Symbol was not explicitly defined by the time it was marked. */
#define XCOFF_WAS_UNDEFINED 0x00020000
/* We have assigned an output XCOFF entry to this symbol. */
#define XCOFF_ALLOCATED 0x00040000
 
/* The XCOFF linker hash table. */
 
326,65 → 333,10
#define XCOFF_SPECIAL_SECTION_END 4
#define XCOFF_SPECIAL_SECTION_END2 5
 
struct xcoff_link_hash_table
{
struct bfd_link_hash_table root;
/* These flags indicate which of -bexpall and -bexpfull are in effect. */
#define XCOFF_EXPALL 1
#define XCOFF_EXPFULL 2
 
/* The .debug string hash table. We need to compute this while
reading the input files, so that we know how large the .debug
section will be before we assign section positions. */
struct bfd_strtab_hash *debug_strtab;
 
/* The .debug section we will use for the final output. */
asection *debug_section;
 
/* The .loader section we will use for the final output. */
asection *loader_section;
 
/* A count of non TOC relative relocs which will need to be
allocated in the .loader section. */
size_t ldrel_count;
 
/* The .loader section header. */
struct internal_ldhdr ldhdr;
 
/* The .gl section we use to hold global linkage code. */
asection *linkage_section;
 
/* The .tc section we use to hold toc entries we build for global
linkage code. */
asection *toc_section;
 
/* The .ds section we use to hold function descriptors which we
create for exported symbols. */
asection *descriptor_section;
 
/* The list of import files. */
struct xcoff_import_file *imports;
 
/* Required alignment of sections within the output file. */
unsigned long file_align;
 
/* Whether the .text section must be read-only. */
bfd_boolean textro;
 
/* Whether garbage collection was done. */
bfd_boolean gc;
 
/* A linked list of symbols for which we have size information. */
struct xcoff_link_size_list
{
struct xcoff_link_size_list *next;
struct xcoff_link_hash_entry *h;
bfd_size_type size;
}
*size_list;
 
/* Magic sections: _text, _etext, _data, _edata, _end, end. */
asection *special_sections[XCOFF_NUMBER_OF_SPECIAL_SECTIONS];
};
 
 
/* This structure is used to pass information through
xcoff_link_hash_traverse. */
 
399,8 → 351,8
/* Link information structure. */
struct bfd_link_info *info;
 
/* Whether all defined symbols should be exported. */
bfd_boolean export_defineds;
/* A mask of XCOFF_EXPALL and XCOFF_EXPFULL flags. */
unsigned int auto_export_flags;
 
/* Number of ldsym structures. */
size_t ldsym_count;
636,4 → 588,8
#define arch_xhdr_big(bfd) \
((struct xcoff_ar_hdr_big *) arch_eltdata (bfd)->arch_header)
 
/* True if symbols of class CLASS are external. */
#define EXTERN_SYM_P(CLASS) \
((CLASS) == C_EXT || (CLASS) == C_AIX_WEAKEXT)
 
#endif /* _INTERNAL_XCOFF_H */
/coff/symconst.h
163,6 → 163,13
#define btVoid 26 /* void */
#define btLongLong 27 /* long long */
#define btULongLong 28 /* unsigned long long */
#define btLong64 30 /* long (64-bit) */
#define btULong64 31 /* unsigned long (64-bit) */
#define btLongLong64 32 /* long long (64-bit) */
#define btULongLong64 33 /* unsigned long long (64-bit) */
#define btAdr64 34 /* address (64-bit) */
#define btInt64 35 /* int (64-bit) */
#define btUInt64 36 /* unsigned int (64-bit) */
#define btMax 64
 
#if (_MFG == _MIPS)
/coff/ChangeLog
1,3 → 1,125
2009-09-05 Martin Thuresson <martin@mtme.org>
 
* ti.h (GET_LNSZ_SIZE, PUT_LNSZ_SIZE): Updated name of class
variable to in_class to match changes in function that use this
macro.
 
2009-08-10 Jan Kratochvil <jan.kratochvil@redhat.com>
 
Fix references past allocated memory for i386-*-go32.
* ti.h (COFF_ADJUST_FILEHDR_IN_POST, COFF_ADJUST_FILEHDR_OUT_POST):
Reference F_TARGET_ID only when !COFF0_P.
 
2009-08-10 Jan Kratochvil <jan.kratochvil@redhat.com>
 
Stop using bfd_usrdata in libbfd.
* go32exe.h (struct external_filehdr_go32_exe <stub>, FILHSZ): Replace
STUBSIZE by GO32_STUBSIZE.
(STUBSIZE): Move the definition ...
* internal.h (GO32_STUBSIZE): ... here and rename it.
(struct internal_filehdr <go32stub>, F_GO32STUB): New.
 
2009-06-03 Ulrich Weigand <uweigand@de.ibm.com>
 
* symconst.h (btLong64, btULong64, btLongLong64, btULongLong64,
btAdr64, btInt64, btUInt64): New defines.
 
2009-04-21 Kai Tietz <kai.tietz@onevision.com>
 
* pe.h (pex64_runtime_function): New structure.
(external_pex64_runtime_function): Likewise.
(pex64_unwind_code): Likewise.
(external_pex64_unwind_code): Likewise.
(pex64_unwind_info): Likewise.
(external_pex64_unwind_info): Likewise.
(external_pex64_scope): Likewise.
(pex64_scope): Likewise.
(pex64_scope_entry): Likewise.
(external_pex64_scope_entry): Likewise.
(PEX64_IS_RUNTIME_FUNCTION_CHAINED): New macro.
(PEX64_GET_UNWINDDATA_UNIFIED_RVA): Likewise.
(PEX64_UNWCODE_CODE): Likewise.
(PEX64_UNWCODE_INFO): Likewise.
(UWOP_...): Add defines for unwind code.
(UNW_FLAG_...): Add defined for unwind info flags.
(PEX64_SCOPE_ENTRY_SIZE): New macro.
(PEX64_UWI_VERSION): Likewise.
(PEX64_UWI_FLAGS): Likewise.
(PEX64_UWI_FRAMEREG): Likewise.
(PEX64_UWI_FRAMEOFF): Likewise.
(PEX64_UWI_SIZEOF_UWCODE_ARRAY): Likewise.
(PEX64_OFFSET_TO_UNWIND_CODE): Likewise.
(PEX64_OFFSET_TO_HANDLER_RVA): Likewise.
(PEX64_OFFSET_TO_SCOPE_COUNT): Likewise.
(PEX64_SCOPE_ENTRY): Likewise.
 
2009-04-17 H.J. Lu <hongjiu.lu@intel.com>
 
* pe.h (IMAGE_SUBSYSTEM_EFI_ROM): Renamed to ...
(IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER): This.
 
2009-04-01 Richard Sandiford <r.sandiford@uk.ibm.com>
 
* xcoff.h (xcoff_link_hash_table): Move to bfd/xcofflink.c.
 
2009-03-14 Richard Sandiford <r.sandiford@uk.ibm.com>
 
* xcoff.h (XCOFF_EXPALL, XCOFF_EXPFULL): New flags.
(xcoff_loader_info): Add auto_export_flags.
 
2009-03-14 Richard Sandiford <r.sandiford@uk.ibm.com>
 
* internal.h (C_AIX_WEAKEXT): New macro.
(C_WEAKEXT): Use the GNU definition in the generic part of the file,
and conditionally reset it to C_AIX_WEAKEXT in the XCOFF part of
the file.
(CSECT_SYM_P): New macro.
* xcoff.h (L_WEAK): Define.
(EXTERN_SYM_P): New macro.
 
2009-03-14 Richard Sandiford <r.sandiford@uk.ibm.com>
 
* xcoff.h (XCOFF_ALLOCATED): New flag.
 
2009-03-14 Richard Sandiford <r.sandiford@uk.ibm.com>
 
* xcoff.h (XCOFF_CALLED, XCOFF_IMPORT): Update comments.
(XCOFF_WAS_UNDEFINED): New flag.
(xcoff_link_hash_table): Add an "rtld" field.
 
2009-03-14 Dave Korn <dave.korn.cygwin@gmail.com>
 
* internal.h (struct internal_extra_pe_aouthdr): Correct type
of DllCharacteristics flags field to unsigned.
* pe.h (IMAGE_DLL_CHARACTERISTICS_DYNAMIC_BASE,
IMAGE_DLL_CHARACTERISTICS_DYNAMIC_BASE,
IMAGE_DLL_CHARACTERISTICS_NX_COMPAT,
IMAGE_DLLCHARACTERISTICS_NO_ISOLATION,
IMAGE_DLLCHARACTERISTICS_NO_SEH,
IMAGE_DLLCHARACTERISTICS_NO_BIND,
IMAGE_DLLCHARACTERISTICS_WDM_DRIVER,
IMAGE_DLLCHARACTERISTICS_TERMINAL_SERVER_AWARE): New macros to
define flag bit values for DllCharacteristics field of PEAOUTHDR,
PEPAOUTHDR.
 
2008-12-23 Johan Olmutz Nielsen <jnielsen@ddci.com>
 
* ti.h (COFF_ADJUST_SCNHDR_OUT_PRE): Define.
 
2008-06-17 Nick Clifton <nickc@redhat.com>
 
* ti.h (GET_SCNHDR_NLNNO): Provide an alternative version of this
macro which does not trigger an array bounds warning in gcc.
(PUT_SCNHDR_NLNNO): Likewise.
(GET_SCNHDR_FLAGS): Likewise.
(PUT_SCNHDR_FLAGS): Likewise.
(GET_SCNHDR_PAGE): Likewise.
(PUT_SCNHDR_PAGE): Likewise.
 
2007-11-05 Danny Smith <dannysmith@users.sourceforge.net>
 
* pe.h (COFF_ENCODE_ALIGNMENT) Define.
 
2007-08-02 H.J. Lu <hongjiu.lu@intel.com>
 
* pe.h (IMAGE_SCN_ALIGN_POWER_BIT_POS): New.
/coff/pe.h
1,6 → 1,7
/* pe.h - PE COFF header information
 
Copyright 1999, 2000, 2001, 2003, 2004, 2006 Free Software Foundation, Inc.
Copyright 1999, 2000, 2001, 2003, 2004, 2005, 2006, 2007, 2009
Free Software Foundation, Inc.
 
This file is part of BFD, the Binary File Descriptor library.
 
38,6 → 39,17
#define IMAGE_FILE_UP_SYSTEM_ONLY 0x4000
#define IMAGE_FILE_BYTES_REVERSED_HI 0x8000
 
/* DllCharacteristics flag bits. The inconsistent naming may seem
odd, but that is how they are defined in the PE specification. */
#define IMAGE_DLL_CHARACTERISTICS_DYNAMIC_BASE 0x0040
#define IMAGE_DLL_CHARACTERISTICS_FORCE_INTEGRITY 0x0080
#define IMAGE_DLL_CHARACTERISTICS_NX_COMPAT 0x0100
#define IMAGE_DLLCHARACTERISTICS_NO_ISOLATION 0x0200
#define IMAGE_DLLCHARACTERISTICS_NO_SEH 0x0400
#define IMAGE_DLLCHARACTERISTICS_NO_BIND 0x0800
#define IMAGE_DLLCHARACTERISTICS_WDM_DRIVER 0x2000
#define IMAGE_DLLCHARACTERISTICS_TERMINAL_SERVER_AWARE 0x8000
 
/* Additional flags to be set for section headers to allow the NT loader to
read and write to the section data (to replace the addresses of data in
dlls for one thing); also to execute the section in .text's case. */
150,7 → 162,7
#define IMAGE_SUBSYSTEM_EFI_APPLICATION 10
#define IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER 11
#define IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER 12
#define IMAGE_SUBSYSTEM_EFI_ROM 13
#define IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER 13
#define IMAGE_SUBSYSTEM_XBOX 14
/* Magic values that are true for all dos/nt implementations. */
347,4 → 359,154
#define IMAGE_WEAK_EXTERN_SEARCH_LIBRARY 2
#define IMAGE_WEAK_EXTERN_SEARCH_ALIAS 3
 
/* .pdata/.xdata defines and structures for x64 PE+ for exception handling. */
 
/* .pdata in exception directory. */
 
struct pex64_runtime_function
{
bfd_vma rva_BeginAddress;
bfd_vma rva_EndAddress;
bfd_vma rva_UnwindData;
unsigned int isChained : 1;
};
 
struct external_pex64_runtime_function
{
bfd_byte rva_BeginAddress[4];
bfd_byte rva_EndAddress[4];
bfd_byte rva_UnwindData[4];
};
 
/* If the lowest significant bit is set for rva_UnwindData RVA, it
means that the unified RVA points to another pex64_runtime_function
that this entry shares the unwind_info block with. */
#define PEX64_IS_RUNTIME_FUNCTION_CHAINED(PTR_RTF) \
(((PTR_RTF)->rva_UnwindData & 1) != 0)
#define PEX64_GET_UNWINDDATA_UNIFIED_RVA(PTR_RTF) \
((PTR_RTF)->rva_UnwindData & ~1)
 
/* The unwind codes. */
#define UWOP_PUSH_NONVOL 0
#define UWOP_ALLOC_LARGE 1
#define UWOP_ALLOC_SMALL 2
#define UWOP_SET_FPREG 3
#define UWOP_SAVE_NONVOL 4
#define UWOP_SAVE_NONVOL_FAR 5
#define UWOP_SAVE_XMM 6
#define UWOP_SAVE_XMM_FAR 7
#define UWOP_SAVE_XMM128 8
#define UWOP_SAVE_XMM128_FAR 9
#define UWOP_PUSH_MACHFRAME 10
 
struct pex64_unwind_code
{
bfd_vma prologue_offset;
/* Contains Frame offset, or frame allocation size. */
bfd_vma frame_addr;
unsigned int uwop_code : 4;
/* xmm, mm, or standard register from 0 - 15. */
unsigned int reg : 4;
/* Used for UWOP_PUSH_MACHFRAME to indicate optional errorcode stack
argument. */
unsigned int has_errorcode : 1;
};
 
struct external_pex64_unwind_code
{
bfd_byte dta[2];
};
 
#define PEX64_UNWCODE_CODE(VAL) ((VAL) & 0xf)
#define PEX64_UNWCODE_INFO(VAL) (((VAL) >> 4) & 0xf)
 
/* The unwind info. */
#define UNW_FLAG_NHANDLER 0
#define UNW_FLAG_EHANDLER 1
#define UNW_FLAG_UHANDLER 2
#define UNW_FLAG_FHANDLER 3
#define UNW_FLAG_CHAININFO 4
 
#define UNW_FLAG_MASK 0x1f
 
struct pex64_unwind_info
{
bfd_vma SizeOfBlock;
bfd_byte Version; /* Values from 0 up to 7 are possible. */
bfd_byte Flags; /* Values from 0 up to 31 are possible. */
bfd_vma SizeOfPrologue;
bfd_vma CountOfCodes; /* Amount of pex64_unwind_code elements. */
/* 0 = CFA, 1..15 are index of integer registers. */
unsigned int FrameRegister : 4;
bfd_vma FrameOffset;
bfd_vma sizeofUnwindCodes;
bfd_byte *rawUnwindCodes;
/* Valid for UNW_FLAG_EHANDLER and UNW_FLAG_UHANDLER. */
bfd_vma CountOfScopes;
bfd_byte *rawScopeEntries;
bfd_vma rva_ExceptionHandler; /* UNW_EHANDLER. */
bfd_vma rva_TerminationHandler; /* UNW_FLAG_UHANDLER. */
bfd_vma rva_FrameHandler; /* UNW_FLAG_FHANDLER. */
bfd_vma FrameHandlerArgument; /* UNW_FLAG_FHANDLER. */
bfd_vma rva_FunctionEntry; /* UNW_FLAG_CHAININFO. */
};
 
struct external_pex64_unwind_info
{
bfd_byte Version_Flags;
bfd_byte SizeOfPrologue;
bfd_byte CountOfCodes;
bfd_byte FrameRegisterOffset;
/* external_pex64_unwind_code array. */
/* bfd_byte handler[4]; */
/* Optional language specific data. */
};
 
struct external_pex64_scope
{
bfd_vma Count;
};
 
struct pex64_scope
{
bfd_byte Count[4];
};
 
struct pex64_scope_entry
{
bfd_vma rva_BeginAddress;
bfd_vma rva_EndAddress;
bfd_vma rva_HandlerAddress;
bfd_vma rva_JumpAddress;
};
#define PEX64_SCOPE_ENTRY_SIZE 16
 
struct external_pex64_scope_entry
{
bfd_byte rva_BeginAddress[4];
bfd_byte rva_EndAddress[4];
bfd_byte rva_HandlerAddress[4];
bfd_byte rva_JumpAddress[4];
};
 
#define PEX64_UWI_VERSION(VAL) ((VAL) & 7)
#define PEX64_UWI_FLAGS(VAL) (((VAL) >> 3) & 0x1f)
#define PEX64_UWI_FRAMEREG(VAL) ((VAL) & 0xf)
#define PEX64_UWI_FRAMEOFF(VAL) (((VAL) >> 4) & 0xf)
#define PEX64_UWI_SIZEOF_UWCODE_ARRAY(VAL) \
((((VAL) + 1) & ~1) * 2)
 
#define PEX64_OFFSET_TO_UNWIND_CODE 0x4
 
#define PEX64_OFFSET_TO_HANDLER_RVA (COUNTOFUNWINDCODES) \
(PEX64_OFFSET_TO_UNWIND_CODE + \
PEX64_UWI_SIZEOF_UWCODE_ARRAY(COUNTOFUNWINDCODES))
 
#define PEX64_OFFSET_TO_SCOPE_COUNT(COUNTOFUNWINDCODES) \
(PEX64_OFFSET_TO_HANDLER_RVA(COUNTOFUNWINDCODES) + 4)
 
#define PEX64_SCOPE_ENTRY(COUNTOFUNWINDCODES, IDX) \
(PEX64_OFFSET_TO_SCOPE_COUNT(COUNTOFUNWINDCODES) + \
PEX64_SCOPE_ENTRY_SIZE * (IDX))
 
#endif /* _PE_H */
/coff/internal.h
1,7 → 1,7
/* Internal format of COFF object file data structures, for GNU BFD.
This file is part of BFD, the Binary File Descriptor library.
Copyright 1999, 2000, 2001, 2002, 2003, 2004. 2005, 2006, 2007
Copyright 1999, 2000, 2001, 2002, 2003, 2004. 2005, 2006, 2007, 2009
Free Software Foundation, Inc.
 
This program is free software; you can redistribute it and/or modify
58,10 → 58,19
bfd_vma nt_signature; /* required NT signature, 0x4550 */
};
 
#define GO32_STUBSIZE 2048
 
struct internal_filehdr
{
struct internal_extra_pe_filehdr pe;
 
/* coff-stgo32 EXE stub header before BFD tdata has been allocated.
Its data is kept in INTERNAL_FILEHDR.GO32STUB afterwards.
F_GO32STUB is set iff go32stub contains a valid data. Artifical headers
created in BFD have no pre-set go32stub. */
char go32stub[GO32_STUBSIZE];
 
/* Standard coff internal info. */
unsigned short f_magic; /* magic number */
unsigned short f_nscns; /* number of sections */
84,7 → 93,8
F_AR32W file is 32-bit big-endian
F_DYNLOAD rs/6000 aix: dynamically loadable w/imports & exports
F_SHROBJ rs/6000 aix: file is a shared object
F_DLL PE format DLL. */
F_DLL PE format DLL
F_GO32STUB Field go32stub contains valid data. */
 
#define F_RELFLG (0x0001)
#define F_EXEC (0x0002)
96,6 → 106,7
#define F_DYNLOAD (0x1000)
#define F_SHROBJ (0x2000)
#define F_DLL (0x2000)
#define F_GO32STUB (0x4000)
 
/* Extra structure which is used in the optional header. */
typedef struct _IMAGE_DATA_DIRECTORY
185,7 → 196,7
3 - WINDOWS_CUI runs in Windows char sub. (console app)
5 - OS2_CUI runs in OS/2 character subsystem
7 - POSIX_CUI runs in Posix character subsystem */
short DllCharacteristics; /* flags for DLL init, use 0 */
unsigned short DllCharacteristics; /* flags for DLL init */
bfd_vma SizeOfStackReserve; /* amount of memory to reserve */
bfd_vma SizeOfStackCommit; /* amount of memory initially committed for
initial thread's stack, default is 0x1000 */
273,12 → 284,7
#define C_LINE 104 /* line # reformatted as symbol table entry */
#define C_ALIAS 105 /* duplicate tag */
#define C_HIDDEN 106 /* ext symbol in dmert public lib */
 
#if defined _AIX52 || defined AIX_WEAK_SUPPORT
#define C_WEAKEXT 111 /* weak symbol -- AIX standard. */
#else
#define C_WEAKEXT 127 /* weak symbol -- GNU extension. */
#endif
 
/* New storage classes for TI COFF */
#define C_UEXT 19 /* Tentative external definition */
311,7 → 317,13
#define C_HIDEXT 107 /* Un-named external symbol */
#define C_BINCL 108 /* Marks beginning of include file */
#define C_EINCL 109 /* Marks ending of include file */
#define C_AIX_WEAKEXT 111 /* AIX definition of C_WEAKEXT. */
 
#if defined _AIX52 || defined AIX_WEAK_SUPPORT
#undef C_WEAKEXT
#define C_WEAKEXT C_AIX_WEAKEXT
#endif
 
/* storage classes for stab symbols for RS/6000 */
#define C_GSYM (0x80)
#define C_LSYM (0x81)
336,6 → 348,10
#define C_THUMBEXTFUNC (C_THUMBEXT + 20) /* 150 */
#define C_THUMBSTATFUNC (C_THUMBSTAT + 20) /* 151 */
 
/* True if XCOFF symbols of class CLASS have auxillary csect information. */
#define CSECT_SYM_P(CLASS) \
((CLASS) == C_EXT || (CLASS) == C_AIX_WEAKEXT || (CLASS) == C_HIDEXT)
 
/********************** SECTION HEADER **********************/
 
#define SCNNMLEN (8)
/coff/go32exe.h
1,6 → 1,6
/* COFF information for PC running go32.
 
Copyright 2001 Free Software Foundation, Inc.
Copyright 2001, 2005, 2009 Free Software Foundation, Inc.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
16,11 → 16,9
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
 
#define STUBSIZE 2048
 
struct external_filehdr_go32_exe
{
char stub[STUBSIZE];/* the stub to load the image */
char stub[GO32_STUBSIZE]; /* the stub to load the image */
/* the standard COFF header */
char f_magic[2]; /* magic number */
char f_nscns[2]; /* number of sections */
34,4 → 32,4
#undef FILHDR
#define FILHDR struct external_filehdr_go32_exe
#undef FILHSZ
#define FILHSZ STUBSIZE+20
#define FILHSZ GO32_STUBSIZE+20
/coff/ti.h
2,7 → 2,8
customized in a target-specific file, and then this file included (see
tic54x.h for an example).
Copyright 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
Copyright 2000, 2001, 2002, 2003, 2005, 2008, 2009
Free Software Foundation, Inc.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
102,8 → 103,9
#define COFF_ADJUST_FILEHDR_IN_POST(abfd, src, dst) \
do \
{ \
((struct internal_filehdr *)(dst))->f_target_id = \
H_GET_16 (abfd, ((FILHDR *)(src))->f_target_id); \
if (!COFF0_P (abfd)) \
((struct internal_filehdr *)(dst))->f_target_id = \
H_GET_16 (abfd, ((FILHDR *)(src))->f_target_id); \
} \
while (0)
#endif
110,11 → 112,12
 
#ifndef COFF_ADJUST_FILEHDR_OUT_POST
#define COFF_ADJUST_FILEHDR_OUT_POST(abfd, src, dst) \
do \
{ \
H_PUT_16 (abfd, ((struct internal_filehdr *)(src))->f_target_id, \
((FILHDR *)(dst))->f_target_id); \
} \
do \
{ \
if (!COFF0_P (abfd)) \
H_PUT_16 (abfd, ((struct internal_filehdr *)(src))->f_target_id, \
((FILHDR *)(dst))->f_target_id); \
} \
while (0)
#endif
 
213,13 → 216,82
 
/* COFF2 changes the offsets and sizes of these fields
Assume we're dealing with the COFF2 scnhdr structure, and adjust
accordingly
*/
accordingly. Note: The GNU C versions of some of these macros
are necessary in order to avoid compile time warnings triggered
gcc's array bounds checking. The PUT_SCNHDR_PAGE macro also has
the advantage on not evaluating LOC twice. */
 
#define GET_SCNHDR_NRELOC(ABFD, LOC) \
(COFF2_P (ABFD) ? H_GET_32 (ABFD, LOC) : H_GET_16 (ABFD, LOC))
#define PUT_SCNHDR_NRELOC(ABFD, VAL, LOC) \
(COFF2_P (ABFD) ? H_PUT_32 (ABFD, VAL, LOC) : H_PUT_16 (ABFD, VAL, LOC))
#ifdef __GNUC__
#define GET_SCNHDR_NLNNO(ABFD, LOC) \
({ \
int nlnno; \
char * ptr = (LOC); \
if (COFF2_P (ABFD)) \
nlnno = H_GET_32 (ABFD, ptr); \
else \
nlnno = H_GET_16 (ABFD, ptr - 2); \
nlnno; \
})
#define PUT_SCNHDR_NLNNO(ABFD, VAL, LOC) \
do \
{ \
char * ptr = (LOC); \
if (COFF2_P (ABFD)) \
H_PUT_32 (ABFD, VAL, ptr); \
else \
H_PUT_16 (ABFD, VAL, ptr - 2); \
} \
while (0)
#define GET_SCNHDR_FLAGS(ABFD, LOC) \
({ \
int flags; \
char * ptr = (LOC); \
if (COFF2_P (ABFD)) \
flags = H_GET_32 (ABFD, ptr); \
else \
flags = H_GET_16 (ABFD, ptr - 4); \
flags; \
})
#define PUT_SCNHDR_FLAGS(ABFD, VAL, LOC) \
do \
{ \
char * ptr = (LOC); \
if (COFF2_P (ABFD)) \
H_PUT_32 (ABFD, VAL, ptr); \
else \
H_PUT_16 (ABFD, VAL, ptr - 4); \
} \
while (0)
#define GET_SCNHDR_PAGE(ABFD, LOC) \
({ \
unsigned page; \
char * ptr = (LOC); \
if (COFF2_P (ABFD)) \
page = H_GET_16 (ABFD, ptr); \
else \
page = (unsigned) H_GET_8 (ABFD, ptr - 7); \
page; \
})
/* On output, make sure that the "reserved" field is zero. */
#define PUT_SCNHDR_PAGE(ABFD, VAL, LOC) \
do \
{ \
char * ptr = (LOC); \
if (COFF2_P (ABFD)) \
H_PUT_16 (ABFD, VAL, ptr); \
else \
{ \
H_PUT_8 (ABFD, VAL, ptr - 7); \
H_PUT_8 (ABFD, 0, ptr - 8); \
} \
} \
while (0)
#else
#define GET_SCNHDR_NLNNO(ABFD, LOC) \
(COFF2_P (ABFD) ? H_GET_32 (ABFD, LOC) : H_GET_16 (ABFD, (LOC) - 2))
#define PUT_SCNHDR_NLNNO(ABFD, VAL, LOC) \
(COFF2_P (ABFD) ? H_PUT_32 (ABFD, VAL, LOC) : H_PUT_16 (ABFD, VAL, (LOC) - 2))
229,12 → 301,14
(COFF2_P (ABFD) ? H_PUT_32 (ABFD, VAL, LOC) : H_PUT_16 (ABFD, VAL, (LOC) - 4))
#define GET_SCNHDR_PAGE(ABFD, LOC) \
(COFF2_P (ABFD) ? H_GET_16 (ABFD, LOC) : (unsigned) H_GET_8 (ABFD, (LOC) - 7))
/* on output, make sure that the "reserved" field is zero */
/* On output, make sure that the "reserved" field is zero. */
#define PUT_SCNHDR_PAGE(ABFD, VAL, LOC) \
(COFF2_P (ABFD) \
? H_PUT_16 (ABFD, VAL, LOC) \
: H_PUT_8 (ABFD, VAL, (LOC) - 7), H_PUT_8 (ABFD, 0, (LOC) - 8))
#endif
 
 
/* TI COFF stores section size as number of bytes (address units, not octets),
so adjust to be number of octets, which is what BFD expects */
#define GET_SCNHDR_SIZE(ABFD, SZP) \
250,6 → 324,15
} \
while (0)
 
/* The entire scnhdr may not be assigned.
Ensure that everything is initialized. */
#define COFF_ADJUST_SCNHDR_OUT_PRE(ABFD, INT, EXT) \
do \
{ \
memset((EXT), 0, sizeof (SCNHDR)); \
} \
while (0)
 
/* The line number and reloc overflow checking in coff_swap_scnhdr_out in
coffswap.h doesn't use PUT_X for s_nlnno and s_nreloc.
Due to different sized v0/v1/v2 section headers, we have to re-write these
393,10 → 476,10
 
/* lnsz size is in bits in COFF file, in bytes in BFD */
#define GET_LNSZ_SIZE(abfd, ext) \
(H_GET_16 (abfd, ext->x_sym.x_misc.x_lnsz.x_size) / (class != C_FIELD ? 8 : 1))
(H_GET_16 (abfd, ext->x_sym.x_misc.x_lnsz.x_size) / (in_class != C_FIELD ? 8 : 1))
 
#define PUT_LNSZ_SIZE(abfd, in, ext) \
H_PUT_16 (abfd, ((class != C_FIELD) ? (in) * 8 : (in)), \
H_PUT_16 (abfd, ((in_class != C_FIELD) ? (in) * 8 : (in)), \
ext->x_sym.x_misc.x_lnsz.x_size)
/* TI COFF stores offsets for MOS and MOU in bits; BFD expects bytes

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