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/openrisc/trunk/gnu-src/gdb-6.8/sim/testsuite/sim/cris/hw/rv-n-cris
- from Rev 157 to Rev 24
- ↔ Reverse comparison
Rev 157 → Rev 24
/quit.s
File deleted
quit.s
Property changes :
Deleted: svn:eol-style
## -1 +0,0 ##
-native
\ No newline at end of property
Deleted: svn:keywords
## -1 +0,0 ##
-Id
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Index: rvc.exp
===================================================================
--- rvc.exp (revision 157)
+++ rvc.exp (nonexistent)
@@ -1,240 +0,0 @@
-# Copyright (C) 2006, 2007, 2008 Free Software Foundation, Inc.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program. If not, see .
-
-# Miscellaneous CRIS simulator testcases in assembly code, testing
-# dv-rv.c and dv-cris.c functions.
-
-# Check whether dv-rv and dv-cris are present.
-
-proc sim_has_rv_and_cris {} {
- global srcdir
- global subdir
- global SIMFLAGS
- global global_as_options
- global global_ld_options
- global global_sim_options
-
- # We need to assemble and link a trivial program and pass that, in
- # order to test successful exit.
-
- # A bit of duplication here for the assembling and linking part;
- # what we want to do it to run the simulator without affecting the
- # PASS/FAIL counters, and we can use e.g. run_sim_test for that.
-
- if ![info exists global_as_options] {
- set global_as_options ""
- }
- if ![info exists global_ld_options] {
- set global_ld_options ""
- }
- if ![info exists global_sim_options] {
- set global_sim_options ""
- }
-
- set comp_output [target_assemble $srcdir/$subdir/quit.s quit.o \
- "-I$srcdir/$subdir $global_as_options"]
-
- if ![string match "" $comp_output] {
- verbose -log "$comp_output" 3
- fail "rv sim test setup (assembling)"
- return 0
- }
-
- set comp_output [target_link quit.o quit.x "$global_ld_options"]
-
- if ![string match "" $comp_output] {
- verbose -log "$comp_output" 3
- fail "rv sim test setup (linking)"
- return 0
- }
-
- set result \
- [sim_run quit.x \
- "$global_sim_options --hw-device rv --hw-device cris --hw-info" \
- "" "" ""]
- set return_code [lindex $result 0]
- set output [lindex $result 1]
-
- if { "$return_code" == "pass" } {
- return 1
- }
-
- return 0
-}
-
-# Similar to slurp_options, but lines are fixed format "^#r ..." (not
-# "^#{ws}*r:{ws}+" to avoid intruding on slurp_options syntax). Only
-# trailing whitespace of the "..." is trimmed. Beware that lines
-# including parameters may not contain ":".
-
-proc slurp_rv { file } {
- if [catch { set f [open $file r] } x] {
- #perror "couldn't open `$file': $x"
- perror "$x"
- return -1
- }
- set rv_array {}
- # whitespace expression
- set ws {[ ]*}
- # whitespace is ignored at the end of a line.
- set pat "^#r (.*)$ws\$"
- # Allow arbitrary lines until the first option is seen.
- set seen_opt 0
- while { [gets $f line] != -1 } {
- set line [string trim $line]
- # Whitespace here is space-tab.
- if [regexp $pat $line xxx cmd] {
- # match!
- lappend rv_array $cmd
- set seen_opt 1
- } else {
- if { $seen_opt } {
- break
- }
- }
- }
- close $f
- return $rv_array
-}
-
-# The main test loop.
-
-if [istarget cris*-*-*] {
- global ASFLAGS_FOR_TARGET
- set has_rv_and_cris [sim_has_rv_and_cris]
- global global_as_options
- global global_ld_options
- global global_sim_options
-
- set saved_global_sim_options $global_sim_options
- set saved_global_ld_options $global_ld_options
- set rvdummy "[file dirname [board_info target sim]]/rvdummy"
-
- # All machines we test and the corresponding assembler option.
- # We'll only ever test v10 and higher here.
-
- set combos {{"crisv10" "--march=v10 --no-mul-bug-abort"}
- {"crisv32" "--march=v32"}}
-
- # We need to pass different assembler flags for each machine.
- # Specifying it here rather than adding a specifier to each and every
- # test-file is preferrable.
-
- foreach combo $combos {
- set mach [lindex $combo 0]
- set ASFLAGS_FOR_TARGET "[lindex $combo 1]"
-
- # The .ms suffix is for "miscellaneous .s".
- foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.ms]] {
-
- # If we're only testing specific files and this isn't one of them,
- # skip it.
- if ![runtest_file_p $runtests $src] {
- continue
- }
-
- # Whoever runs the test should be alerted that not all
- # testcases have been checked; that's why we do the loop
- # and don't just return at the top.
- if !$has_rv_and_cris {
- untested $src
- continue
- }
-
- set sim_defaults "--hw-file $srcdir/$subdir/std.dev"
- set ld_defaults "--section-start=.text=0"
-
- # We parse options an extra time besides in run_sim_test,
- # to determine if our defaults should be overridden.
-
- set opt_array [slurp_options $src]
- foreach i $opt_array {
- set opt_name [lindex $i 0]
- set opt_machs [lindex $i 1]
- set opt_val [lindex $i 2]
-
- # Allow concatenating to the default options by
- # specifying a mach.
- if { $opt_name == "sim" && $opt_machs == "" } {
- set sim_defaults ""
- }
-
- if { $opt_name == "ld" && $opt_machs == "" } {
- set ld_defaults ""
- }
- }
-
- set rvdummy_id -1
- set hostcmds [slurp_rv $src]
-
- if { $hostcmds != "" } {
- # I guess we could ask to have rvdummy executed on a
- # remote host, but it looks like too much trouble for
- # a feature rarely used.
- if [is_remote host] {
- untested $src
- continue
- }
-
- set src_components [file split $src]
- set rvfile "[lindex $src_components \
- [expr [llength $src_components] - 1]].r"
-
- if [catch { set f [open $rvfile w] } x] {
- error "$x"
- } {
- set contents [join $hostcmds "\n"]
-
- # Make it possible to use files from the test
- # source directory; expected with the @-command.
- regsub -all "@srcdir@" $contents "$srcdir/$subdir" contents
-
- verbose "rv: $contents" 2
- puts $f $contents
- close $f
- }
-
- spawn -noecho $rvdummy "$rvfile"
- if { $spawn_id < 0 } {
- error "Couldn't spawn $rvdummy"
- continue
- }
- set rvdummy_id $spawn_id
- }
-
- # Unfortunately this seems like the only way to pass
- # additional sim, ld etc. options to run_sim_test.
- set global_sim_options "$saved_global_sim_options $sim_defaults"
- set global_ld_options "$saved_global_ld_options $ld_defaults"
- run_sim_test $src $mach
- set global_sim_options $saved_global_sim_options
- set global_ld_options $saved_global_ld_options
-
- # Stop the rvdummy, if it's still running. We need to
- # wait on it anyway to avoid it turning into a zombie.
- if { $rvdummy_id != -1 } {
- close -i $rvdummy_id
- wait -i $rvdummy_id
-
- # Gleaned from framework.exp, this seems an indicator
- # to whether the test had expected outcome. If so, we
- # want to remove the rv-file.
- if { $exit_status == 0 } {
- file delete $rvfile
- }
- }
- }
- }
-}
Index: irq1.ms
===================================================================
--- irq1.ms (revision 157)
+++ irq1.ms (nonexistent)
@@ -1,69 +0,0 @@
-#mach: crisv10 crisv32
-#sim(crisv10): --hw-device "/rv/trace? true"
-#sim(crisv32): --hw-device "/rv/trace? true"
-#output: /rv: WD\n
-#output: /rv: REG R 0xd0000032\n
-#output: /rv: := 0xabcdef01\n
-#output: /rv: IRQ 0x4\n
-#output: /rv: REG R 0xd0000036\n
-#output: /rv: := 0x76543210\n
-#output: /rv: REG R 0xd0000036\n
-#output: /rv: := 0x76543211\n
-#output: /rv: REG R 0xd0000030\n
-#output: /rv: IRQ 0x0\n
-#output: /rv: := 0xeeff4455\n
-#output: pass\n
-
-# Trivial test of interrupts.
-# Locations of IRQ notifiers above depend on when the simulator is
-# polled; adjustments may be needed (after checking that no poll is
-# gone due to a bug!)
-
-#r W,
-#r r,a8832,abcdef01
-#r I,4
-#r r,a8836,76543210
-#r r,a8836,76543211
-#r I,0
-#r r,a8830,eeff4455
-
- .lcomm dummy,4
-
- .include "testutils.inc"
- start
- .if ..asm.arch.cris.v32
- move irqvec1,$ebp
- .else
- move irqvec1,$ibr
- .endif
- test_h_mem 0xabcdef01 0xd0000032
- nop
- nop
- test_h_mem 0x76543210 0xd0000036
- ei
- test_h_mem 0,dummy
-wouldreturnhere:
- nop
-killme:
- fail
-
-returnhere:
- test_h_mem 0x76543211 0xd0000036
- test_h_mem 0xeeff4455 0xd0000030
- pass
-
-irq0x33:
- .if ..asm.arch.cris.v32
- test_h_dr wouldreturnhere,$erp
- move returnhere,$erp
- rete
- rfe
- .else
- move $dccr,$r0
- test_h_dr wouldreturnhere,$irp
- move returnhere,$irp
- reti
- move $r0,$dccr
- .endif
-
- singlevec irqvec1,0x33,irq0x33
Index: irq2.ms
===================================================================
--- irq2.ms (revision 157)
+++ irq2.ms (nonexistent)
@@ -1,44 +0,0 @@
-#mach: crisv10 crisv32
-#sim(crisv10): --hw-device "/rv/trace? true" --hw-device "/rv/intmultiple 0xaa"
-#sim(crisv32): --hw-device "/rv/trace? true" --hw-device "/rv/intmultiple 0xaa"
-#output: /rv: WD\n
-#output: /rv: REG R 0xd0000032\n
-#output: /rv: := 0xabcdef01\n
-#output: /rv: IRQ 0xaa\n
-#output: /rv: REG R 0xd0000036\n
-#output: /rv: := 0x76543210\n
-#output: /rv: REG R 0xd0000030\n
-#output: /rv: IRQ 0x0\n
-#output: /rv: := 0xeeff4455\n
-#output: pass\n
-
-# Primarily to test multiple-int-bits set in dv-rv.c.
-
-#r W,
-#r r,a8832,abcdef01
-#r I,6
-#r r,a8836,76543210
-#r I,0
-#r r,a8830,eeff4455
-
- .lcomm dummy,4
-
- .include "testutils.inc"
- start
- test_h_mem 0xabcdef01 0xd0000032
- .if ..asm.arch.cris.v32
- move irqvec1,$ebp
- .else
- move irqvec1,$ibr
- .endif
- ei
- test_h_mem 0,dummy
-killme:
- fail
-
-irq0xea:
- test_h_mem 0x76543210 0xd0000036
- test_h_mem 0xeeff4455 0xd0000030
- pass
-
- singlevec irqvec1,0xea,irq0xea
Index: irq3.ms
===================================================================
--- irq3.ms (revision 157)
+++ irq3.ms (nonexistent)
@@ -1,46 +0,0 @@
-#mach: crisv10 crisv32
-#sim(crisv10): --hw-device "/rv/trace? true" --hw-device "/rv/intmultiple 0xaa"
-#sim(crisv32): --hw-device "/rv/trace? true" --hw-device "/rv/intmultiple 0xaa"
-#output: /rv: WD\n
-#output: /rv: REG R 0xd0000032\n
-#output: /rv: := 0xabcdef01\n
-#output: /rv: IRQ 0xaa\n
-#output: /rv: IRQ 0xaa\n
-#output: /rv: REG R 0xd0000036\n
-#output: /rv: := 0x76543210\n
-#output: /rv: REG R 0xd0000030\n
-#output: /rv: IRQ 0x0\n
-#output: /rv: := 0xeeff4455\n
-#output: pass\n
-
-# Much like irq2.ms, but modified to check same-int-port-value-twice.
-
-#r W,
-#r r,a8832,abcdef01
-#r I,6
-#r I,6
-#r r,a8836,76543210
-#r I,0
-#r r,a8830,eeff4455
-
- .lcomm dummy,4
-
- .include "testutils.inc"
- start
- test_h_mem 0xabcdef01 0xd0000032
- .if ..asm.arch.cris.v32
- move irqvec1,$ebp
- .else
- move irqvec1,$ibr
- .endif
- ei
- test_h_mem 0,dummy
-killme:
- fail
-
-irq0xea:
- test_h_mem 0x76543210 0xd0000036
- test_h_mem 0xeeff4455 0xd0000030
- pass
-
- singlevec irqvec1,0xea,irq0xea
Index: irq4.ms
===================================================================
--- irq4.ms (revision 157)
+++ irq4.ms (nonexistent)
@@ -1,46 +0,0 @@
-#mach: crisv10 crisv32
-#sim(crisv10): --hw-device "/rv/trace? true" --hw-device "/cris/multiple-int ignore_previous"
-#sim(crisv32): --hw-device "/rv/trace? true" --hw-device "/cris/multiple-int ignore_previous"
-#output: /rv: WD\n
-#output: /rv: REG R 0xd0000032\n
-#output: /rv: := 0xabcdef01\n
-#output: /rv: IRQ 0x4\n
-#output: /rv: IRQ 0x8\n
-#output: /rv: REG R 0xd0000036\n
-#output: /rv: := 0x76543210\n
-#output: /rv: REG R 0xd0000030\n
-#output: /rv: IRQ 0x0\n
-#output: /rv: := 0xeeff4455\n
-#output: pass\n
-
-# Much like irq3.ms, but modified to test multiple-int ignore_previous.
-
-#r W,
-#r r,a8832,abcdef01
-#r I,4
-#r I,8
-#r r,a8836,76543210
-#r I,0
-#r r,a8830,eeff4455
-
- .lcomm dummy,4
-
- .include "testutils.inc"
- start
- test_h_mem 0xabcdef01 0xd0000032
- .if ..asm.arch.cris.v32
- move irqvec1,$ebp
- .else
- move irqvec1,$ibr
- .endif
- ei
- test_h_mem 0,dummy
-killme:
- fail
-
-irq0x34:
- test_h_mem 0x76543210 0xd0000036
- test_h_mem 0xeeff4455 0xd0000030
- pass
-
- singlevec irqvec1,0x34,irq0x34
Index: trivial4.r
===================================================================
--- trivial4.r (revision 157)
+++ trivial4.r (nonexistent)
@@ -1,4 +0,0 @@
-W,
-r,a8832,abcdef01
-w,a8836,aabbccdd
-r,a8836,76543210
Index: irq5.ms
===================================================================
--- irq5.ms (revision 157)
+++ irq5.ms (nonexistent)
@@ -1,46 +0,0 @@
-#mach: crisv10 crisv32
-#sim(crisv10): --hw-device "/rv/trace? true" --hw-device "/cris/multiple-int 0xae"
-#sim(crisv32): --hw-device "/rv/trace? true" --hw-device "/cris/multiple-int 0xae"
-#output: /rv: WD\n
-#output: /rv: REG R 0xd0000032\n
-#output: /rv: := 0xabcdef01\n
-#output: /rv: IRQ 0x4\n
-#output: /rv: IRQ 0x8\n
-#output: /rv: REG R 0xd0000036\n
-#output: /rv: := 0x76543210\n
-#output: /rv: REG R 0xd0000030\n
-#output: /rv: IRQ 0x0\n
-#output: /rv: := 0xeeff4455\n
-#output: pass\n
-
-# Much like irq4.ms, but modified to test vector case for multiple-int.
-
-#r W,
-#r r,a8832,abcdef01
-#r I,4
-#r I,8
-#r r,a8836,76543210
-#r I,0
-#r r,a8830,eeff4455
-
- .lcomm dummy,4
-
- .include "testutils.inc"
- start
- test_h_mem 0xabcdef01 0xd0000032
- .if ..asm.arch.cris.v32
- move irqvec1,$ebp
- .else
- move irqvec1,$ibr
- .endif
- ei
- test_h_mem 0,dummy
-killme:
- fail
-
-irq0xae:
- test_h_mem 0x76543210 0xd0000036
- test_h_mem 0xeeff4455 0xd0000030
- pass
-
- singlevec irqvec1,0xae,irq0xae
Index: irq6.ms
===================================================================
--- irq6.ms (revision 157)
+++ irq6.ms (nonexistent)
@@ -1,99 +0,0 @@
-#mach: crisv10 crisv32
-#sim(crisv10): --hw-device "/rv/trace? true"
-#sim(crisv32): --hw-device "/rv/trace? true"
-#output: /rv: WD\n
-#output: /rv: REG R 0xd0000032\n
-#output: /rv: := 0xabcdef01\n
-#output: /rv: IRQ 0x4\n
-#output: /rv: REG R 0xd0000036\n
-#output: /rv: := 0x76543210\n
-#output: /rv: REG R 0xd0000030\n
-#output: /rv: IRQ 0x0\n
-#output: /rv: IRQ 0x8\n
-#output: /rv: := 0xeeff4455\n
-#output: /rv: REG R 0xd0000034\n
-#output: /rv: := 0xdd001122\n
-#output: /rv: REG R 0xd0000038\n
-#output: /rv: := 0xaaeeff44\n
-#output: /rv: REG R 0xd000003c\n
-#output: /rv: := 0xff445511\n
-#output: pass\n
-
-# Test two successive ints; that flags are disabled when an interrupt
-# is taken, and then automatically (or by register restore) enabled at
-# return.
-
-#r W,
-#r r,a8832,abcdef01
-#r I,4
-#r r,a8836,76543210
-#r I,0
-#r I,8
-#r r,a8830,eeff4455
-#r r,a8834,dd001122
-#r r,a8838,aaeeff44
-#r r,a883c,ff445511
-
- .lcomm dummy,4
-
- .include "testutils.inc"
- start
- test_h_mem 0xabcdef01 0xd0000032
- moveq -1,$r4
-
- .if ..asm.arch.cris.v32
- move irqvec1,$ebp
- .else
- move irqvec1,$ibr
- .endif
-
- ei
- test_h_mem 0,dummy
-
- ; Here after the first interrupt, or perhaps the second interrupt is
- ; taken directly; leave it optional. Anyway, the second interrupt
- ; should be taken no later than this branch.
- test_h_mem 0,dummy
-
-killme:
- fail
-
-irq0x33:
- .if ..asm.arch.cris.v32
- ; Nothing needed to save flags - "shift" should happen, and back at rfe.
- .else
- ; The missing sim support for interrupt-excluding instructions is matched
- ; by the flaw that sim doesn't service interrupts in straight code.
- ; So, we can use a sequence that would work on actual hardware.
- move $dccr,$r5
- di
- .endif
-
- test_h_mem 0x76543210 0xd0000036
- test_h_mem 0xeeff4455 0xd0000030
- test_h_mem 0xdd001122 0xd0000034
- moveq -22,$r4
-
- .if ..asm.arch.cris.v32
- move irqvec2,$ebp
- rete
- rfe
- .else
- move irqvec2,$ibr
- reti
- move $r5,$dccr
- .endif
-
- pass
-
-irq0x34:
- test_h_mem 0xaaeeff44 0xd0000038
- test_h_mem 0xff445511 0xd000003c
- cmpq -22,$r4
- bne killme
- nop
- pass
-
- singlevec irqvec1,0x33,irq0x33
-
- singlevec irqvec2,0x34,irq0x34
Index: mbox1.ms
===================================================================
--- mbox1.ms (revision 157)
+++ mbox1.ms (nonexistent)
@@ -1,88 +0,0 @@
-#mach: crisv10 crisv32
-#sim(crisv10): --hw-device "/rv/trace? true"
-#sim(crisv32): --hw-device "/rv/trace? true"
-#output: /rv: WD\n
-#output: /rv: MBOX H 0x1001d..0x10037\n
-#output: /rv: 0x10020: 12 23 34 56 79 8a bd de\n
-#output: /rv: 0x10028: fb ad ba db ad 56 78 9a\n
-#output: /rv: 0x10030: fd e1 23 45 66 54 32 1a\n
-#output: /rv: -> 0x1001d..0x10027\n
-#output: /rv: 0x10020: aa 55 77 88 32 10 ee cc\n
-#output: /rv: MBOX P 0xfffd..0x1001f\n
-#output: /rv: 0x10000: aa 55 12 23 34 56 79 8a\n
-#output: /rv: 0x10008: bd de fb ad ba db ad 56\n
-#output: /rv: 0x10010: 78 9a fd e1 23 45 66 54\n
-#output: /rv: 0x10018: 32 1a ac cb be ed db ed\n
-#output: /rv: -> 0xfffd..0x10017\n
-#output: /rv: 0x10000: 11 22 56 78 ee dd 12 ab\n
-#output: /rv: 0x10008: 55 aa ee 00 42 12 27 98\n
-#output: /rv: 0x10010: 88 55 22 33 66 77 22 45\n
-#output: /rv: REG R 0xd0000038\n
-#output: /rv: := 0x76543211\n
-#output: pass\n
-
-# Trivial test of mailbox commands.
-
-#r W,
-#r i,1b000512233456798abddefbadbadbad56789afde123456654321a
-#r o,0b0005aa5577883210eecc
-#r i,230006aa5512233456798abddefbadbadbad56789afde123456654321aaccbbeeddbed
-#r o,1b000511225678eedd12ab55aaee00421227988855223366772245
-#r r,a8838,76543211
-
- .include "testutils.inc"
- start
- move.w 0x1b,$r0
- move.d 0x1001d,$r1
- move.w $r0,[$r1+]
- moveq 5,$r0
- move.b $r0,[$r1]
- mvi_h_mem 0x56342312 0x10020
- mvi_h_mem 0xdebd8a79 0x10024
- mvi_h_mem 0xdbbaadfb 0x10028
- mvi_h_mem 0x9a7856ad 0x1002c
- mvi_h_mem 0x4523e1fd 0x10030
- mvi_h_mem 0x1a325466 0x10034
-
- mvi_h_mem 0x1001d 0xc000f000
-
- move.d 0x1001d,$r0
- movu.w [$r0+],$r1
- test_h_gr 0xb $r1
- movu.b [$r0],$r1
- test_h_gr 0x5 $r1
- test_h_mem 0x887755aa 0x10020
- test_h_mem 0xccee1032 0x10024
-
- move.w 0x23,$r0
- move.d 0xfffd,$r1
- move.w $r0,[$r1+]
- moveq 6,$r0
- move.b $r0,[$r1]
- mvi_h_mem 0x231255aa 0x10000
- mvi_h_mem 0x8a795634 0x10004
- mvi_h_mem 0xadfbdebd 0x10008
- mvi_h_mem 0x56addbba 0x1000c
- mvi_h_mem 0xe1fd9a78 0x10010
- mvi_h_mem 0x54664523 0x10014
- mvi_h_mem 0xcbac1a32 0x10018
- mvi_h_mem 0xeddbedbe 0x1001c
-
- mvi_h_mem 0xfffd 0xc000f000
-
- move.d 0xfffd,$r0
- movu.w [$r0+],$r1
- test_h_gr 0x1b $r1
- movu.b [$r0],$r1
- test_h_gr 0x6 $r1
- test_h_mem 0x78562211 0x10000
- test_h_mem 0xab12ddee 0x10004
- test_h_mem 0x00eeaa55 0x10008
- test_h_mem 0x98271242 0x1000c
- test_h_mem 0x33225588 0x10010
- test_h_mem 0x45227766 0x10014
-
- test_h_mem 0x76543211 0xd0000038
- pass
-
- .fill 65536*2+128,1,0
Index: poll1.ms
===================================================================
--- poll1.ms (revision 157)
+++ poll1.ms (nonexistent)
@@ -1,22 +0,0 @@
-#mach: crisv32
-#sim(crisv32): --hw-device "/rv/dummy 0x12"
-
-# A variant of trivial2.ms to check that the right thing happens when
-# we reach the poll function with a dummy device.
-
- .include "testutils.inc"
- start
- move.d 0xd0000000,$r0
- move.d [$r0+],$r3
- cmp.d 0x12121212,$r3
- beq ok
- nop
-bad:
- fail
-ok:
- move.d 0x10000,$r10
-0:
- bne 0b
- subq 1,$r10
-
- pass
Index: std.dev
===================================================================
--- std.dev (revision 157)
+++ std.dev (nonexistent)
@@ -1,8 +0,0 @@
-/rv/reg 0xd0000000 64
-/rv/remote-reg 0xa8800
-/rv/intnum 4 2
-/cris/vec-for-int 4 0x33 8 0x34 0xaa 0xea
-/rv/mem 0x20000 0x400
-/rv/remote-mem 0xe000
-/rv/mbox 0xc000f000
-/rv > int int /cris
Index: testutils.inc
===================================================================
--- testutils.inc (revision 157)
+++ testutils.inc (nonexistent)
@@ -1,22 +0,0 @@
- .include "../../asm/testutils.inc"
-
-# Define an exception vector table "vecname" with a single
-# vector number "n" as "entry", all others "other".
-# V32 only needs 1<<10 alignment, earlier versions need 1<<16.
- .macro singlevec vecname vecno entry other=killme
- .section .text.exvec
- .p2align 16
-\vecname:
- .if (\vecno)
- .rept \vecno
- .dword \other
- .endr
- .endif
- .dword \entry
- .if (\vecno)-255
- .rept 256-(\vecno)-1
- .dword \other
- .endr
- .endif
- .previous
- .endm
Index: wd1.ms
===================================================================
--- wd1.ms (revision 157)
+++ wd1.ms (nonexistent)
@@ -1,33 +0,0 @@
-#mach: crisv10 crisv32
-#sim(crisv10): --hw-device "/rv/trace? true" --hw-device "/rv/watchdog-interval 1"
-#sim(crisv32): --hw-device "/rv/trace? true" --hw-device "/rv/watchdog-interval 1" --hw-device "/rv/max-poll-ticks 1000"
-#output: /rv: WD\n
-#output: /rv: REG R 0xd0000036\n
-#output: /rv: := 0x76543210\n
-#output: /rv: WD\n
-#output: /rv: DMA W 0x20000..0x20003\n
-#output: /rv: 0x20000: 01 02 03 04\n
-#output: /rv: REG R 0xd0000038\n
-#output: /rv: := 0x76543211\n
-#output: pass\n
-
-#r W,
-#r r,a8836,76543210
-#r W,
-#r s,e000,01020304
-#r r,a8838,76543211
-
- .include "testutils.inc"
- start
- mvi_h_mem 0 0x20000
- test_h_mem 0x76543210 0xd0000036
-
- move.d 0x20000,$r1
-0:
- test.b [$r1]
- beq 0b
- nop
- test_h_mem 0x76543211 0xd0000038
- pass
-
- .fill 65536*2+128,1,0
Index: trivial1.ms
===================================================================
--- trivial1.ms (revision 157)
+++ trivial1.ms (nonexistent)
@@ -1,17 +0,0 @@
-#mach: crisv32
-#sim(crisv32): --hw-info
-#output: /\n
-#output: /rv\n
-#output: /rv/reg 0xd0000000 0x40\n
-#output: /rv/remote-reg 0xa8800\n
-#output: /rv/intnum 0x4 0x2\n
-#output: /rv/mem 0x20000 0x400\n
-#output: /rv/remote-mem 0xe000\n
-#output: /rv/mbox 0xc000f000\n
-#output: /rv > int int /cris\n
-#output: /cris\n
-#output: /cris/vec-for-int 0x4 0x33 0x8 0x34 0xaa 0xea\n
-
-# Test expected --hw-info output and startup paths of components.
-
- .include "quit.s"
Index: trivial2.ms
===================================================================
--- trivial2.ms (revision 157)
+++ trivial2.ms (nonexistent)
@@ -1,21 +0,0 @@
-#mach: crisv32
-#sim(crisv32): --hw-device "/rv/dummy 0x12"
-
-# Test dummy settings: set from value.
-
- .include "testutils.inc"
- start
- move.d 0xd0000000,$r0
- move.d [$r0+],$r3
- cmp.d 0x12121212,$r3
- beq ok
- nop
-bad:
- fail
-ok:
- moveq -1,$r3
- move.d $r3,[$r0]
- cmp.d [$r0],$r3
- bne bad
- nop
- pass
Index: trivial3.ms
===================================================================
--- trivial3.ms (revision 157)
+++ trivial3.ms (nonexistent)
@@ -1,20 +0,0 @@
-#mach: crisv32
-#sim(crisv32): --hw-device "/rv/dummy /dev/zero"
-
-# Test dummy settings: set from file.
-
- .include "testutils.inc"
- start
- move.d 0xd0000000,$r0
- move.d [$r0+],$r3
- beq ok
- nop
-bad:
- fail
-ok:
- moveq -1,$r3
- move.d $r3,[$r0]
- cmp.d [$r0],$r3
- bne bad
- nop
- pass
Index: trivial4.ms
===================================================================
--- trivial4.ms (revision 157)
+++ trivial4.ms (nonexistent)
@@ -1,22 +0,0 @@
-#mach: crisv32
-#r @,@srcdir@/trivial4.r
-
-# Test read and writes.
-
- .include "testutils.inc"
- start
- move.d 0xd0000032,$r0
- move.d [$r0+],$r3
- cmp.d 0xabcdef01,$r3
- beq ok
- nop
-bad:
- fail
-ok:
- move.d 0xaabbccdd,$r3
- move.d $r3,[$r0]
- move.d [$r0],$r3
- cmp.d 0x76543210,$r3
- bne bad
- nop
- pass
Index: host1.ms
===================================================================
--- host1.ms (revision 157)
+++ host1.ms (nonexistent)
@@ -1,8 +0,0 @@
-#mach: crisv32
-#sim(crisv32): --hw-device "/rv/host localhost"
-
-# Check that we trivially resolve a hostname.
-
-#r @,@srcdir@/trivial4.r
-
- .include "trivial4.ms"
Index: trivial5.ms
===================================================================
--- trivial5.ms (revision 157)
+++ trivial5.ms (nonexistent)
@@ -1,16 +0,0 @@
-#mach: crisv10 crisv32
-#sim(crisv10): --hw-device "/rv/trace? true"
-#sim(crisv32): --hw-device "/rv/trace? true"
-#output: /rv: WD\n
-#output: /rv: REG R 0xd0000032\n
-#output: /rv: := 0xabcdef01\n
-#output: /rv: REG W 0xd0000036 := 0xaabbccdd\n
-#output: /rv: REG R 0xd0000036\n
-#output: /rv: := 0x76543210\n
-#output: pass\n
-
-# Test trace output for read and write.
-
-#r @,@srcdir@/trivial4.r
-
- .include "trivial4.ms"
Index: mem1.ms
===================================================================
--- mem1.ms (revision 157)
+++ mem1.ms (nonexistent)
@@ -1,100 +0,0 @@
-#mach: crisv10 crisv32
-#sim(crisv10): --hw-device "/rv/trace? true"
-#sim(crisv32): --hw-device "/rv/trace? true"
-#output: /rv: WD\n
-#output: /rv: REG R 0xd0000036\n
-#output: /rv: := 0x76543210\n
-#output: /rv: DMA W 0x20020..0x2003f\n
-#output: /rv: 0x20020: 12 23 34 56\n
-#output: /rv: 0x20024: 79 8a bd de\n
-#output: /rv: 0x20028: fb ad ba db\n
-#output: /rv: 0x2002c: ad 56 78 9a\n
-#output: /rv: 0x20030: fd e1 23 45\n
-#output: /rv: 0x20034: 66 54 32 1a\n
-#output: /rv: 0x20038: ac cb be ed\n
-#output: /rv: 0x2003c: db ed aa da\n
-#output: /rv: REG R 0xd0000038\n
-#output: /rv: := 0x76543211\n
-#output: /rv: DMA R 0x20000..0x2001f\n
-#output: /rv: 0x20000: aa 55 12 23\n
-#output: /rv: 0x20004: 34 56 79 8a\n
-#output: /rv: 0x20008: bd de fb ad\n
-#output: /rv: 0x2000c: ba db ad 56\n
-#output: /rv: 0x20010: 78 9a fd e1\n
-#output: /rv: 0x20014: 23 45 66 54\n
-#output: /rv: 0x20018: 32 1a ac cb\n
-#output: /rv: 0x2001c: be ed db ed\n
-#output: /rv: IRQ 0x8\n
-#output: /rv: REG R 0xd0000038\n
-#output: /rv: := 0x76543212\n
-#output: pass\n
-
-# Trivial test of DMA.
-
-# Locations of IRQ notifiers above depend on when the simulator is
-# polled; adjustments may be needed (after checking that no poll is
-# gone due to a bug!)
-
-#r W,
-#r r,a8836,76543210
-#r s,e020,12233456798abddefbadbadbad56789afde123456654321aaccbbeeddbedaada
-#r r,a8838,76543211
-#r l,e000,aa5512233456798abddefbadbadbad56789afde123456654321aaccbbeeddbed
-#r I,8
-#r r,a8838,76543212
-
- .include "testutils.inc"
- start
- test_h_mem 0x76543210 0xd0000036
-
- move.d 0x2003f,$r1
- move.d 0x10000,$r3
-0:
- test.b [$r1]
- bne 1f
- subq 1,$r3
- bne 0b
- nop
-
-1:
- test_h_mem 0x56342312 0x20020
- test_h_mem 0xdebd8a79 0x20024
- test_h_mem 0xdbbaadfb 0x20028
- test_h_mem 0x9a7856ad 0x2002c
- test_h_mem 0x4523e1fd 0x20030
- test_h_mem 0x1a325466 0x20034
- test_h_mem 0xedbecbac 0x20038
- test_h_mem 0xdaaaeddb 0x2003c
-
- move.d 0x20020,$r0
- move.d 0x20000,$r1
- move.w 0x55aa,$r2
- move.w $r2,[r1+]
- .rept 8
- move.d [$r0+],$r2
- move.d $r2,[$r1+]
- .endr
-
- test_h_mem 0x76543211 0xd0000038
-
- .if ..asm.arch.cris.v32
- move irqvec1,$ebp
- .else
- move irqvec1,$ibr
- .endif
- ei
- move.d 0x100000,$r9
-0:
- subq 1,$r9
- bne 0b
- nop
-killme:
- fail
-
-irq0x34:
- test_h_mem 0x76543212 0xd0000038
- pass
-
- .fill 65536*2+128,1,0
-
- singlevec irqvec1,0x34,irq0x34
Index: mem2.ms
===================================================================
--- mem2.ms (revision 157)
+++ mem2.ms (nonexistent)
@@ -1,104 +0,0 @@
-#mach: crisv10 crisv32
-#sim(crisv10): --hw-device "/rv/trace? true"
-#sim(crisv32): --hw-device "/rv/trace? true"
-#output: /rv: WD\n
-#output: /rv: REG R 0xd0000036\n
-#output: /rv: := 0x76543210\n
-#output: /rv: DMA W 0x20020..0x20043\n
-#output: /rv: 0x20020: 12 23 34 56\n
-#output: /rv: 0x20024: 79 8a bd de\n
-#output: /rv: 0x20028: fb ad ba db\n
-#output: /rv: 0x2002c: ad 56 78 9a\n
-#output: /rv: 0x20030: fd e1 23 45\n
-#output: /rv: 0x20034: 66 54 32 1a\n
-#output: /rv: 0x20038: ac cb be ed\n
-#output: /rv: 0x2003c: db ed aa da\n
-#output: /rv: 0x20040: 00 aa bb cc\n
-#output: /rv: REG R 0xd0000038\n
-#output: /rv: := 0x76543211\n
-#output: /rv: DMA R 0x20000..0x20023\n
-#output: /rv: 0x20000: aa 55 12 23\n
-#output: /rv: 0x20004: 34 56 79 8a\n
-#output: /rv: 0x20008: bd de fb ad\n
-#output: /rv: 0x2000c: ba db ad 56\n
-#output: /rv: 0x20010: 78 9a fd e1\n
-#output: /rv: 0x20014: 23 45 66 54\n
-#output: /rv: 0x20018: 32 1a ac cb\n
-#output: /rv: 0x2001c: be ed db ed\n
-#output: /rv: 0x20020: aa da 00 aa\n
-#output: /rv: IRQ 0x8\n
-#output: /rv: REG R 0xd0000038\n
-#output: /rv: := 0x76543212\n
-#output: pass\n
-
-# This is a slight variation of mem1.ms just to trig the "buffer needs
-# to be malloced for large request size" for the DMA request.
-
-# Locations of IRQ notifiers above depend on when the simulator is
-# polled; adjustments may be needed (after checking that no poll is
-# gone due to a bug!)
-
-#r W,
-#r r,a8836,76543210
-#r s,e020,12233456798abddefbadbadbad56789afde123456654321aaccbbeeddbedaada00aabbcc
-#r r,a8838,76543211
-#r l,e000,aa5512233456798abddefbadbadbad56789afde123456654321aaccbbeeddbedaada00aa
-#r I,8
-#r r,a8838,76543212
-
- .include "testutils.inc"
- start
- test_h_mem 0x76543210 0xd0000036
-
- move.d 0x2003f,$r1
- move.d 0x10000,$r3
-0:
- test.b [$r1]
- bne 1f
- subq 1,$r3
- bne 0b
- nop
-
-1:
- test_h_mem 0x56342312 0x20020
- test_h_mem 0xdebd8a79 0x20024
- test_h_mem 0xdbbaadfb 0x20028
- test_h_mem 0x9a7856ad 0x2002c
- test_h_mem 0x4523e1fd 0x20030
- test_h_mem 0x1a325466 0x20034
- test_h_mem 0xedbecbac 0x20038
- test_h_mem 0xdaaaeddb 0x2003c
- test_h_mem 0xccbbaa00 0x20040
-
- move.d 0x20020,$r0
- move.d 0x20000,$r1
- move.w 0x55aa,$r2
- move.w $r2,[r1+]
- .rept 9
- move.d [$r0+],$r2
- move.d $r2,[$r1+]
- .endr
-
- test_h_mem 0x76543211 0xd0000038
-
- .if ..asm.arch.cris.v32
- move irqvec1,$ebp
- .else
- move irqvec1,$ibr
- .endif
- ei
- move.d 0x100000,$r9
-0:
- subq 1,$r9
- bne 0b
- nop
-killme:
- fail
-
-irq0x34:
- test_h_mem 0x76543212 0xd0000038
- pass
-
- .fill 65536*2+128,1,0
-
- singlevec irqvec1,0x34,irq0x34