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/openrisc/trunk/gnu-src/gdb-6.8/sim/testsuite/sim/sh64/misc
- from Rev 24 to Rev 157
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Rev 24 → Rev 157
/fr-dr.s
0,0 → 1,22
# sh testcase for floating point register shared state (see below). |
# mach: all |
# as: -isa=shmedia |
# ld: -m shelf64 |
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# (fr, dr, fp, fv amd mtrx provide different views of the same architecrual state). |
# Hitachi SH-5 CPU volume 1, p. 15. |
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.include "media/testutils.inc" |
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start |
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movi 42, r0 |
fmov.ls r0, fr12 |
# save this reg. |
fmov.s fr12, fr14 |
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movi 42, r0 |
fmov.qd r0, dr12 |
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okay: |
pass |
fr-dr.s
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