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https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
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- This comparison shows the changes necessary to convert path
/openrisc/trunk/or1200/rtl/verilog
- from Rev 258 to Rev 259
- ↔ Reverse comparison
Rev 258 → Rev 259
/or1200_defines.v
382,15 → 382,6
// |
//`define OR1200_FPU_IMPLEMENTED |
// |
// Select modules for FPU |
`ifdef OR1200_FPU_IMPLEMENTED |
// FPU arithmetic module (add,sub,mul,div) |
`define OR1200_FPU_ARITH_FPU100 |
// FPU conversion module (int-float,float-int) |
`define OR1200_FPU_CONV_USSELMANN |
// FPU comparison module |
`define OR1200_FPU_COMP_USSELMANN |
`endif |
|
// |
// Clock ratio RISC clock versus WB clock |