URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
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- This comparison shows the changes necessary to convert path
/openrisc/trunk/or1200
- from Rev 643 to Rev 644
- ↔ Reverse comparison
Rev 643 → Rev 644
/rtl/verilog/or1200_ctrl.v
438,6 → 438,8
// |
always @(id_insn) begin |
case (id_insn[31:26]) // synopsys parallel_case |
// l.rfe |
`OR1200_OR32_RFE, |
// l.mfspr |
`OR1200_OR32_MFSPR: |
multicycle = `OR1200_TWO_CYCLES; // to read from ITLB/DTLB (sync RAMs) |
/rtl/verilog/or1200_mult_mac.v
112,11 → 112,11
// |
reg [width-1:0] result; |
reg ex_freeze_r; |
wire alu_op_mul; |
wire alu_op_smul; |
`ifdef OR1200_MULT_IMPLEMENTED |
reg [2*width-1:0] mul_prod_r; |
wire alu_op_smul; |
wire alu_op_umul; |
wire alu_op_mul; |
`ifdef OR1200_MULT_SERIAL |
reg [5:0] serial_mul_cnt; |
reg mul_free; |
170,7 → 170,10
assign alu_op_smul = (alu_op == `OR1200_ALUOP_MUL); |
assign alu_op_umul = (alu_op == `OR1200_ALUOP_MULU); |
assign alu_op_mul = alu_op_smul | alu_op_umul; |
`endif |
`else |
assign alu_op_smul = 0; |
assign alu_op_mul = 0; |
`endif |
`ifdef OR1200_MAC_IMPLEMENTED |
assign spr_maclo_we = spr_cs & spr_write & spr_addr[`OR1200_MAC_ADDR]; |
assign spr_machi_we = spr_cs & spr_write & !spr_addr[`OR1200_MAC_ADDR]; |