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URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

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  • This comparison shows the changes necessary to convert path
    /openrisc/trunk/or1ksim/cpu/or32
    from Rev 460 to Rev 472
    Reverse comparison

Rev 460 → Rev 472

/execute.c
806,11 → 806,12
 
if ((physical_pc = peek_into_itlb (cpu_state.iqueue.insn_addr)))
{
disassemble_instr (physical_pc);
disassemble_instr (physical_pc, cpu_state.iqueue.insn_addr,
cpu_state.iqueue.insn);
}
else
{
PRINTF ("INTERNAL SIMULATOR ERROR: no trace available\n");
PRINTF ("Instruction address translation failed: no trace available\n");
}
} /* trace_instr () */
 

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