OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

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  • This comparison shows the changes necessary to convert path
    /openrisc/trunk/or1ksim/cpu/or32
    from Rev 552 to Rev 556
    Reverse comparison

Rev 552 → Rev 556

/insnset.c
711,12 → 711,17
uint16_t regno = PARAM1 | PARAM2;
uorreg_t value = mfspr(regno);
 
if (cpu_state.sprs[SPR_SR] & SPR_SR_SM)
if ((cpu_state.sprs[SPR_SR] & SPR_SR_SM) ||
// TODO: Check if this SPR should actually be allowed to be read with
// SR's SM==0 and SUMRA==1
(!(cpu_state.sprs[SPR_SR] & SPR_SR_SM) &&
(cpu_state.sprs[SPR_SR] & SPR_SR_SUMRA)))
SET_PARAM0(value);
else {
SET_PARAM0(0);
PRINTF("WARNING: trying to read SPR while SR[SUPV] is cleared.\n");
sim_done();
else
{
SET_PARAM0(0);
PRINTF("WARNING: trying to read SPR while SR[SUPV] and SR[SUMRA] is cleared.\n");
sim_done();
}
}
INSTRUCTION (l_sys) {

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