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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /openrisc/trunk/or1ksim/cpu
    from Rev 230 to Rev 233
    ↔ Reverse comparison
  •

Rev 230 → Rev 233

/Makefile.in
1,4 → 1,4
# Makefile.in generated by automake 1.11.1 from Makefile.am.
# Makefile.in generated by automake 1.11 from Makefile.am.
# @configure_input@
 
# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
174,6 → 174,7
PACKAGE_NAME = @PACKAGE_NAME@
PACKAGE_STRING = @PACKAGE_STRING@
PACKAGE_TARNAME = @PACKAGE_TARNAME@
PACKAGE_URL = @PACKAGE_URL@
PACKAGE_VERSION = @PACKAGE_VERSION@
PATH_SEPARATOR = @PATH_SEPARATOR@
POW_LIB = @POW_LIB@
291,7 → 292,7
# (which will cause the Makefiles to be regenerated when you run `make');
# (2) otherwise, pass the desired values on the `make' command line.
$(RECURSIVE_TARGETS):
@fail= failcom='exit 1'; \
@failcom='exit 1'; \
for f in x $$MAKEFLAGS; do \
case $$f in \
*=* | --[!k]*);; \
316,7 → 317,7
fi; test -z "$$fail"
 
$(RECURSIVE_CLEAN_TARGETS):
@fail= failcom='exit 1'; \
@failcom='exit 1'; \
for f in x $$MAKEFLAGS; do \
case $$f in \
*=* | --[!k]*);; \
/or32/Makefile.in
1,4 → 1,4
# Makefile.in generated by automake 1.11.1 from Makefile.am.
# Makefile.in generated by automake 1.11 from Makefile.am.
# @configure_input@
 
# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
207,6 → 207,7
PACKAGE_NAME = @PACKAGE_NAME@
PACKAGE_STRING = @PACKAGE_STRING@
PACKAGE_TARNAME = @PACKAGE_TARNAME@
PACKAGE_URL = @PACKAGE_URL@
PACKAGE_VERSION = @PACKAGE_VERSION@
PATH_SEPARATOR = @PATH_SEPARATOR@
POW_LIB = @POW_LIB@
/or32/execute.c
3,8 → 3,10
Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
 
Copyright (C) 2008 Embecosm Limited
Copyright (C) 2010 ORSoC AB
Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
Contributor Julius Baxter <julius.baxter@orsoc.se>
This file is part of OpenRISC 1000 Architectural Simulator.
54,7 → 56,7
#include "branch-predict.h"
#include "sprs.h"
#include "rsp-server.h"
#include <fenv.h> // Floating point environment for FPU instructions
#include "softfloat.h"
 
/* Includes and macros for simple execution */
#if SIMPLE_EXECUTION
107,9 → 109,6
static int breakpoint;
static int next_delay_insn;
 
/* A place to store the host's FPU rounding mode while OR1k's is used */
static int host_fp_rm;
 
/* Forward declaration of static functions */
#if !(DYNAMIC_EXECUTION)
static void decode_execute (struct iqueue_entry *current);
1052,74 → 1051,75
}
} /* exec_main() */
 
 
/*---------------------------------------------------------------------------*/
/*!Floating point operation setup function
 
Save host rounding mode, set it to OR1K's according to FPCSR
This function should be called before performing any FP instructions to
ensure the OR1K's rounding mode is installed in the host
*/
/*!Update the rounding mode variable the softfloat library reads */
/*---------------------------------------------------------------------------*/
static void
fp_set_or1k_rm(void)
{
// Set OR1K's RM in host machine
// First save host RM to restore it later
host_fp_rm = fegetround();
// Now map OR1K RM to host RM
int or1k_rm = 0;
switch(cpu_state.sprs[SPR_FPCSR] & SPR_FPCSR_RM)
{
case FPCSR_RM_RN:
or1k_rm = FE_TONEAREST;
break;
case FPCSR_RM_RZ:
or1k_rm = FE_TOWARDZERO;
break;
case FPCSR_RM_RIP:
or1k_rm = FE_UPWARD;
break;
case FPCSR_RM_RIN:
or1k_rm = FE_TOWARDZERO;
break;
}
// Now set this RM for the host
fesetround(or1k_rm); // TODO - check for nonzero return here, if RM not
// able to be set, maybe warn user
}
float_set_rm ()
{
//
// float_rounding_mode is used by the softfloat library, it is declared in
// "softfloat.h"
//
switch(cpu_state.sprs[SPR_FPCSR] & SPR_FPCSR_RM)
{
case FPCSR_RM_RN:
//printf("or1ksim <%s>: rounding mode RN\n",__FUNCTION__);
float_rounding_mode = float_round_nearest_even;
break;
case FPCSR_RM_RZ:
//printf("or1ksim <%s>: rounding mode RZ\n",__FUNCTION__);
float_rounding_mode = float_round_to_zero;
break;
case FPCSR_RM_RIP:
//printf("or1ksim <%s>: rounding mode R+\n",__FUNCTION__);
float_rounding_mode = float_round_up;
break;
case FPCSR_RM_RIN:
//printf("or1ksim <%s>: rounding mode R-\n",__FUNCTION__);
float_rounding_mode = float_round_down;
break;
}
}
 
/*---------------------------------------------------------------------------*/
/*!Floating point operation flag set and host restore function
 
Copy flags from floating point op into OR1K's FPCSR, and restore the host's
rounding mode.
*/
/*!Update the OR1K's FPCSR after each floating point instruction */
/*---------------------------------------------------------------------------*/
static void
fp_set_flags_restore_host_rm(void)
{
// Check FP flags on host, convert to OR1K FPCSR bits
// First clear all flags in OR1K FPCSR
cpu_state.sprs[SPR_FPCSR] &= ~SPR_FPCSR_ALLF;
 
// Test host flags, set appropriate OR1K flags
if (fetestexcept(FE_DIVBYZERO)) cpu_state.sprs[SPR_FPCSR] |= SPR_FPCSR_DZF;
if (fetestexcept(FE_INEXACT)) cpu_state.sprs[SPR_FPCSR] |= SPR_FPCSR_IXF;
if (fetestexcept(FE_INVALID)) cpu_state.sprs[SPR_FPCSR] |= SPR_FPCSR_IVF;
if (fetestexcept(FE_OVERFLOW)) cpu_state.sprs[SPR_FPCSR] |= SPR_FPCSR_OVF;
if (fetestexcept(FE_UNDERFLOW)) cpu_state.sprs[SPR_FPCSR] |= SPR_FPCSR_UNF;
// Restore the hosts's rounding mode
fesetround(host_fp_rm);
// TODO: Call FP exception is FPEE set and any of the flags were set
/*
float_set_flags ()
{
// Get the flags from softfloat's variable and set the OR1K's FPCR values
// First clear all flags in OR1K FPCSR
cpu_state.sprs[SPR_FPCSR] &= ~SPR_FPCSR_ALLF;
if (float_exception_flags & float_flag_invalid)
cpu_state.sprs[SPR_FPCSR] |= SPR_FPCSR_IVF;
if (float_exception_flags & float_flag_divbyzero)
cpu_state.sprs[SPR_FPCSR] |= SPR_FPCSR_DZF;
if (float_exception_flags & float_flag_overflow)
cpu_state.sprs[SPR_FPCSR] |= SPR_FPCSR_OVF;
if (float_exception_flags & float_flag_underflow)
cpu_state.sprs[SPR_FPCSR] |= SPR_FPCSR_UNF;
if (float_exception_flags & float_flag_inexact)
cpu_state.sprs[SPR_FPCSR] |= SPR_FPCSR_IXF;
/*
printf("or1ksim: post-fp-op flags from softfloat: %x%x%x%x%x\n",
!!(float_exception_flags & float_flag_invalid),
!!(float_exception_flags & float_flag_divbyzero),
!!(float_exception_flags & float_flag_overflow),
!!(float_exception_flags & float_flag_underflow),
!!(float_exception_flags & float_flag_inexact));
*/
// TODO: Call FP exception is FPEE set and any of the flags were set
/*
if ((cpu_state.sprs[SPR_FPCSR] & SPR_FPCSR_FPEE) &
(|(cpu_state.sprs[SPR_FPCSR] & SPR_FPCSR_ALLF)))
except_handle (EXCEPT_FPE, cpu_state.iqueue.insn_addr);
*/
}
*/
// Now clear softfloat's flags:
float_exception_flags = 0;
}
 
#if COMPLEX_EXECUTION
 
/or32/insnset.c
796,165 → 796,128
/* Do calculation, and update FPCSR as required */
/* Single precision */
INSTRUCTION (lf_add_s) {
if (config.cpu.hardfloat) {
FLOAT param0, param1, param2;
param1.hval = (uorreg_t)PARAM1;
param2.hval = (uorreg_t)PARAM2;
fp_set_or1k_rm();
param0.fval = param1.fval + param2.fval;
SET_PARAM0(param0.hval);
fp_set_flags_restore_host_rm();
if (config.cpu.hardfloat) {
float_set_rm();
SET_PARAM0(float32_add((unsigned int)PARAM1,(unsigned int)PARAM2));
float_set_flags();
} else l_invalid();
}
INSTRUCTION (lf_div_s) {
if (config.cpu.hardfloat) {
FLOAT param0, param1, param2;
param1.hval = (uorreg_t)PARAM1;
param2.hval = (uorreg_t)PARAM2;
fp_set_or1k_rm();
param0.fval = param1.fval / param2.fval;
SET_PARAM0(param0.hval);
fp_set_flags_restore_host_rm();
float_set_rm();
SET_PARAM0(float32_div((unsigned int)PARAM1,(unsigned int)PARAM2));
float_set_flags();
} else l_invalid();
}
INSTRUCTION (lf_ftoi_s) {
if (config.cpu.hardfloat) {
fp_set_or1k_rm();
// no other way appeared to work --jb
float tmp_f; memcpy((void*)&tmp_f, (void*)&PARAM1, sizeof(float));
SET_PARAM0((int)tmp_f);
fp_set_flags_restore_host_rm();
float_set_rm();
SET_PARAM0(float32_to_int32((unsigned int)PARAM1));
float_set_flags();
} else l_invalid();
}
INSTRUCTION (lf_itof_s) {
if (config.cpu.hardfloat) {
FLOAT param0;
fp_set_or1k_rm();
param0.fval = (float)((int)PARAM1);
SET_PARAM0(param0.hval);
fp_set_flags_restore_host_rm();
float_set_rm();
SET_PARAM0(int32_to_float32((unsigned int)PARAM1));
float_set_flags();
} else l_invalid();
}
INSTRUCTION (lf_madd_s) {
if (config.cpu.hardfloat) {
FLOAT param0,param1, param2;
param0.hval = (uorreg_t)PARAM0;
param1.hval = (uorreg_t)PARAM1;
fp_set_or1k_rm();
param2.hval = PARAM2;
param0.fval += param1.fval * param2.fval;
SET_PARAM0(param0.hval);
fp_set_flags_restore_host_rm();
float_set_rm();
SET_PARAM0(float32_add((unsigned int)PARAM0, float32_mul((unsigned int)PARAM1,(unsigned int)PARAM2)));
// Note: this ignores flags from the multiply!
float_set_flags();
} else l_invalid();
}
INSTRUCTION (lf_mul_s) {
if (config.cpu.hardfloat) {
FLOAT param0, param1, param2;
param1.hval = (uorreg_t)PARAM1;
param2.hval = (uorreg_t)PARAM2;
fp_set_or1k_rm();
param0.fval = param1.fval * param2.fval;
SET_PARAM0(param0.hval);
fp_set_flags_restore_host_rm();
float_set_rm();
SET_PARAM0(float32_mul((unsigned int)PARAM1,(unsigned int)PARAM2));
float_set_flags();
} else l_invalid();
}
INSTRUCTION (lf_rem_s) {
if (config.cpu.hardfloat) {
FLOAT param0, param1, param2;
param1.hval = PARAM1;
param2.hval = PARAM2;
fp_set_or1k_rm();
param0.fval = fmodf (param1.fval, param2.fval);
SET_PARAM0(param0.hval);
fp_set_flags_restore_host_rm();
float_set_rm();
SET_PARAM0(float32_rem((unsigned int)PARAM1,(unsigned int)PARAM2));
float_set_flags();
} else l_invalid();
}
INSTRUCTION (lf_sfeq_s) {
if (config.cpu.hardfloat) {
FLOAT param0, param1;
param0.hval = PARAM0;
param1.hval = PARAM1;
fp_set_or1k_rm();
if(param0.fval == param1.fval)
float_set_rm();
if(float32_eq((unsigned int)PARAM0, (unsigned int)PARAM1))
cpu_state.sprs[SPR_SR] |= SPR_SR_F;
else
cpu_state.sprs[SPR_SR] &= ~SPR_SR_F;
fp_set_flags_restore_host_rm();
float_set_flags();
} else l_invalid();
}
INSTRUCTION (lf_sfge_s) {
if (config.cpu.hardfloat) {
FLOAT param0, param1;
param0.hval = PARAM0;
param1.hval = PARAM1;
fp_set_or1k_rm();
if(param0.fval >= param1.fval)
float_set_rm();
if((!float32_lt((unsigned int)PARAM0, (unsigned int)PARAM1) &
!float32_is_nan( (unsigned int)PARAM0) &
!float32_is_nan( (unsigned int)PARAM1) ) )
cpu_state.sprs[SPR_SR] |= SPR_SR_F;
else
cpu_state.sprs[SPR_SR] &= ~SPR_SR_F;
fp_set_flags_restore_host_rm();
float_set_flags();
} else l_invalid();
}
INSTRUCTION (lf_sfgt_s) {
if (config.cpu.hardfloat) {
FLOAT param0, param1;
param0.hval = PARAM0;
param1.hval = PARAM1;
fp_set_or1k_rm();
if(param0.fval > param1.fval)
float_set_rm();
if((!float32_le((unsigned int)PARAM0, (unsigned int)PARAM1) &
!float32_is_nan( (unsigned int)PARAM0) &
!float32_is_nan( (unsigned int)PARAM1) ) )
cpu_state.sprs[SPR_SR] |= SPR_SR_F;
else
cpu_state.sprs[SPR_SR] &= ~SPR_SR_F;
fp_set_flags_restore_host_rm();
float_set_flags();
} else l_invalid();
}
INSTRUCTION (lf_sfle_s) {
if (config.cpu.hardfloat) {
FLOAT param0, param1;
param0.hval = PARAM0;
param1.hval = PARAM1;
fp_set_or1k_rm();
if(param0.fval <= param1.fval)
float_set_rm();
if((float32_le((unsigned int)PARAM0, (unsigned int)PARAM1) &
!float32_is_nan( (unsigned int)PARAM0) &
!float32_is_nan( (unsigned int)PARAM1) ) )
cpu_state.sprs[SPR_SR] |= SPR_SR_F;
else
cpu_state.sprs[SPR_SR] &= ~SPR_SR_F;
fp_set_flags_restore_host_rm();
float_set_flags();
} else l_invalid();
}
INSTRUCTION (lf_sflt_s) {
if (config.cpu.hardfloat) {
FLOAT param0, param1;
param0.hval = PARAM0;
param1.hval = PARAM1;
fp_set_or1k_rm();
if(param0.fval < param1.fval)
float_set_rm();
if(( float32_lt((unsigned int)PARAM0, (unsigned int)PARAM1) &
!float32_is_nan( (unsigned int)PARAM0) &
!float32_is_nan( (unsigned int)PARAM1) ) )
cpu_state.sprs[SPR_SR] |= SPR_SR_F;
else
cpu_state.sprs[SPR_SR] &= ~SPR_SR_F;
fp_set_flags_restore_host_rm();
float_set_flags();
} else l_invalid();
}
INSTRUCTION (lf_sfne_s) {
if (config.cpu.hardfloat) {
FLOAT param0, param1;
param0.hval = PARAM0;
param1.hval = PARAM1;
fp_set_or1k_rm();
if(param0.fval != param1.fval)
float_set_rm();
if(!float32_eq((unsigned int)PARAM0, (unsigned int)PARAM1))
cpu_state.sprs[SPR_SR] |= SPR_SR_F;
else
cpu_state.sprs[SPR_SR] &= ~SPR_SR_F;
float_set_flags();
} else l_invalid();
}
INSTRUCTION (lf_sub_s) {
if (config.cpu.hardfloat) {
FLOAT param0, param1, param2;
param1.hval = PARAM1;
param2.hval = PARAM2;
fp_set_or1k_rm();
param0.fval = param1.fval - param2.fval;
SET_PARAM0(param0.hval);
fp_set_flags_restore_host_rm();
float_set_rm();
SET_PARAM0(float32_sub((unsigned int)PARAM1,(unsigned int)PARAM2));
float_set_flags();
} else l_invalid();
}
 
/dlx/Makefile.in
1,4 → 1,4
# Makefile.in generated by automake 1.11.1 from Makefile.am.
# Makefile.in generated by automake 1.11 from Makefile.am.
# @configure_input@
 
# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
154,6 → 154,7
PACKAGE_NAME = @PACKAGE_NAME@
PACKAGE_STRING = @PACKAGE_STRING@
PACKAGE_TARNAME = @PACKAGE_TARNAME@
PACKAGE_URL = @PACKAGE_URL@
PACKAGE_VERSION = @PACKAGE_VERSION@
PATH_SEPARATOR = @PATH_SEPARATOR@
POW_LIB = @POW_LIB@
/common/Makefile.in
1,4 → 1,4
# Makefile.in generated by automake 1.11.1 from Makefile.am.
# Makefile.in generated by automake 1.11 from Makefile.am.
# @configure_input@
 
# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
155,6 → 155,7
PACKAGE_NAME = @PACKAGE_NAME@
PACKAGE_STRING = @PACKAGE_STRING@
PACKAGE_TARNAME = @PACKAGE_TARNAME@
PACKAGE_URL = @PACKAGE_URL@
PACKAGE_VERSION = @PACKAGE_VERSION@
PATH_SEPARATOR = @PATH_SEPARATOR@
POW_LIB = @POW_LIB@
/or1k/Makefile.in
1,4 → 1,4
# Makefile.in generated by automake 1.11.1 from Makefile.am.
# Makefile.in generated by automake 1.11 from Makefile.am.
# @configure_input@
 
# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
154,6 → 154,7
PACKAGE_NAME = @PACKAGE_NAME@
PACKAGE_STRING = @PACKAGE_STRING@
PACKAGE_TARNAME = @PACKAGE_TARNAME@
PACKAGE_URL = @PACKAGE_URL@
PACKAGE_VERSION = @PACKAGE_VERSION@
PATH_SEPARATOR = @PATH_SEPARATOR@
POW_LIB = @POW_LIB@
/or1k/spr-defs.h
588,6 → 588,7
#define SPR_TTMR_PERIOD SPR_TTCR_PERIOD
#define SPR_TTMR_IP 0x10000000 /* Interrupt Pending */
#define SPR_TTMR_IE 0x20000000 /* Interrupt Enable */
#define SPR_TTMR_DI 0x00000000 /* Disabled */
#define SPR_TTMR_RT 0x40000000 /* Restart tick */
#define SPR_TTMR_SR 0x80000000 /* Single run */
#define SPR_TTMR_CR 0xc0000000 /* Continuous run */

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