URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
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- This comparison shows the changes necessary to convert path
/openrisc/trunk/or1ksim/cpu
- from Rev 429 to Rev 430
- ↔ Reverse comparison
Rev 429 → Rev 430
/common/execute.h
58,7 → 58,6
int npc_not_valid; /*!< NPC updated while stalled */ |
oraddr_t pc; /*!< PC (and translated PC) */ |
oraddr_t pc_delay; /*!< Delay instr EA register */ |
uint32_t pic_lines; /*!< State of PIC lines */ |
struct iqueue_entry iqueue; /*!< Decode of just executed instr */ |
struct iqueue_entry icomplet; /*!< Decode of instr before this */ |
|
/or1k/sprs.c
154,6 → 154,8
break; |
case SPR_PICSR: |
if(!config.pic.edge_trigger) |
/* When configured with level triggered interrupts we clear PICSR in PIC |
when IRQ goes low */ |
cpu_state.sprs[SPR_PICSR] = prev_val; |
break; |
case SPR_PICMR: |