URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
Compare Revisions
- This comparison shows the changes necessary to convert path
/openrisc/trunk/or1ksim/cpu
- from Rev 457 to Rev 458
- ↔ Reverse comparison
Rev 457 → Rev 458
/or32/or32.c
1090,6 → 1090,7
unsigned int trace_store_imm; |
int trace_store_val_reg; |
int trace_store_width; |
int trace_dest_spr; |
|
/* Automagically does zero- or sign- extension and also finds correct |
sign bit position if sign extension is correct extension. Which extension |
1320,6 → 1321,7
|
/* Set trace result defaults. */ |
trace_dest_reg = -1; |
trace_dest_spr = -1; |
trace_store_addr_reg = -1; |
trace_store_imm = 0; |
trace_store_val_reg = -1; |
1346,6 → 1348,12
trace_store_width = 4; |
} |
|
/* Is it a move to SPR opcode? */ |
if (0 == strcmp ("l.mtspr", opcode->name)) |
{ |
trace_dest_spr = 1; |
} |
|
/* Copy the opcode and pad */ |
strcpy (dest, opcode->name); |
|
1411,6 → 1419,17
trace_store_imm = |
or1ksim_extend_imm (trace_store_imm, *s); |
} |
|
if (1 == trace_dest_spr) |
{ |
trace_dest_spr = |
or1ksim_or32_extract ('K', opcode->encoding, |
insn); |
trace_dest_reg = |
or1ksim_or32_extract ('A', opcode->encoding, |
insn); |
} |
|
} |
else |
{ |
/common/abstract.c
1253,8 → 1253,16
or1ksim_disassemble_trace_index (insn, index); |
PRINTF ("%-24s", or1ksim_disassembled); |
|
/* Put either the register assignment, or store */ |
if (-1 != trace_dest_reg) |
/* Put either the register assignment, SPR value, or store */ |
if (-1 != trace_dest_spr) |
{ |
PRINTF ("SPR[%04x] = %08x", (trace_dest_spr | |
evalsim_reg (trace_dest_reg)), |
cpu_state.sprs[(trace_dest_spr | |
evalsim_reg (trace_dest_reg))]); |
|
} |
else if (-1 != trace_dest_reg) |
{ |
PRINTF ("r%-2u = %" PRIxREG "", trace_dest_reg, |
evalsim_reg (trace_dest_reg)); |
1291,6 → 1299,7
break; |
} |
} |
|
|
/* Print the flag */ |
PRINTF (" flag: %u\n", cpu_state.sprs[SPR_SR] & SPR_SR_F ? 1 : 0); |
/or1k/opcode/or32.h
171,6 → 171,7
extern unsigned int trace_store_imm; |
extern int trace_store_val_reg; |
extern int trace_store_width; |
extern int trace_dest_spr; |
|
/* Calculates instruction length in bytes. Always 4 for OR32. */ |
extern int or1ksim_insn_len PARAMS((int insn_index)); |