URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
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- This comparison shows the changes necessary to convert path
/openrisc/trunk/or1ksim/doc
- from Rev 552 to Rev 556
- ↔ Reverse comparison
Rev 552 → Rev 556
/or1ksim.info
1441,6 → 1441,7
* Power Management Configuration:: |
* Branch Prediction Configuration:: |
* Debug Interface Configuration:: |
* Performance Counters Configuration:: |
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File: or1ksim.info, Node: CPU Configuration, Next: Memory Configuration, Up: Core OpenRISC Configuration |
1472,7 → 1473,7
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* Instruction cache present (0x00000004) |
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* Data MMY present (0x00000008) |
* Data MMU present (0x00000008) |
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* Instruction MMU present (0x00000010) |
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1960,7 → 1961,7
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File: or1ksim.info, Node: Debug Interface Configuration, Prev: Branch Prediction Configuration, Up: Core OpenRISC Configuration |
File: or1ksim.info, Node: Debug Interface Configuration, Next: Performance Counters Configuration, Prev: Branch Prediction Configuration, Up: Core OpenRISC Configuration |
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3.3.8 Debug Interface Configuration |
----------------------------------- |
2013,6 → 2014,21
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File: or1ksim.info, Node: Performance Counters Configuration, Prev: Debug Interface Configuration, Up: Core OpenRISC Configuration |
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3.3.9 Performance Counters Configuration |
---------------------------------------- |
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The performance counters unit is described in `section pcu'. This |
section may appear at most once. The following parameters may be |
specified. |
|
`enabled = 0|1' |
If 1 (true), the performance counters unit is enabled. If 0 (the |
default), it is disabled. |
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File: or1ksim.info, Node: Peripheral Configuration, Prev: Core OpenRISC Configuration, Up: Configuration |
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3.4 Configuring Memory Mapped Peripherals |
4145,6 → 4161,8
(line 6) |
* configuring the memory controller: Memory Controller Configuration. |
(line 6) |
* configuring the performance counters unit: Performance Counters Configuration. |
(line 6) |
* configuring the processor: CPU Configuration. (line 6) |
* configuring the PS2 interface: Keyboard Configuration. |
(line 6) |
4254,6 → 4272,8
(line 44) |
* enabled (MMU configuration): Memory Management Configuration. |
(line 12) |
* enabled (performance counters unit configuration): Performance Counters Configuration. |
(line 11) |
* enabled (power management configuration): Power Management Configuration. |
(line 35) |
* enabled (UART configuration): UART Configuration. (line 18) |
4507,6 → 4527,8
(line 82) |
* pc (Interactive CLI): Interactive Command Line. |
(line 51) |
* performance counters unit configuration: Performance Counters Configuration. |
(line 6) |
* persistent TAP device creation: Setting Up a Persistent TAP device. |
(line 6) |
* phy_addr: Ethernet Configuration. |
4671,6 → 4693,8
(line 6) |
* section memory: Memory Configuration. |
(line 6) |
* section pcu: Performance Counters Configuration. |
(line 6) |
* section pic: Interrupt Configuration. |
(line 6) |
* section pmu: Power Management Configuration. |
4865,36 → 4889,37
Node: Verification API Configuration47843 |
Node: CUC Configuration49783 |
Node: Core OpenRISC Configuration51775 |
Node: CPU Configuration52277 |
Node: Memory Configuration56396 |
Node: Memory Management Configuration63118 |
Node: Cache Configuration65495 |
Node: Interrupt Configuration67881 |
Node: Power Management Configuration69714 |
Node: Branch Prediction Configuration70991 |
Node: Debug Interface Configuration72351 |
Node: Peripheral Configuration74694 |
Node: Memory Controller Configuration75320 |
Node: UART Configuration79100 |
Node: DMA Configuration82619 |
Node: Ethernet Configuration84486 |
Node: GPIO Configuration89765 |
Node: Display Interface Configuration91398 |
Node: Frame Buffer Configuration93707 |
Node: Keyboard Configuration95571 |
Node: Disc Interface Configuration97809 |
Node: Generic Peripheral Configuration102913 |
Node: Interactive Command Line105208 |
Node: Verification API112182 |
Node: Code Internals116612 |
Node: Coding Conventions117195 |
Node: Global Data Structures121622 |
Node: Concepts124279 |
Ref: Output Redirection124424 |
Ref: Interrupts Internal124962 |
Node: Internal Debugging126115 |
Node: Regression Testing126639 |
Node: GNU Free Documentation License130428 |
Node: Index152835 |
Node: CPU Configuration52316 |
Node: Memory Configuration56435 |
Node: Memory Management Configuration63157 |
Node: Cache Configuration65534 |
Node: Interrupt Configuration67920 |
Node: Power Management Configuration69753 |
Node: Branch Prediction Configuration71030 |
Node: Debug Interface Configuration72390 |
Node: Performance Counters Configuration74776 |
Node: Peripheral Configuration75261 |
Node: Memory Controller Configuration75887 |
Node: UART Configuration79667 |
Node: DMA Configuration83186 |
Node: Ethernet Configuration85053 |
Node: GPIO Configuration90332 |
Node: Display Interface Configuration91965 |
Node: Frame Buffer Configuration94274 |
Node: Keyboard Configuration96138 |
Node: Disc Interface Configuration98376 |
Node: Generic Peripheral Configuration103480 |
Node: Interactive Command Line105775 |
Node: Verification API112749 |
Node: Code Internals117179 |
Node: Coding Conventions117762 |
Node: Global Data Structures122189 |
Node: Concepts124846 |
Ref: Output Redirection124991 |
Ref: Interrupts Internal125529 |
Node: Internal Debugging126682 |
Node: Regression Testing127206 |
Node: GNU Free Documentation License130995 |
Node: Index153402 |
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End Tag Table |
/or1ksim.texi
1756,6 → 1756,7
* Power Management Configuration:: |
* Branch Prediction Configuration:: |
* Debug Interface Configuration:: |
* Performance Counters Configuration:: |
@end menu |
|
@node CPU Configuration |
1793,7 → 1794,7
@item |
Instruction cache present (0x00000004) |
@item |
Data MMY present (0x00000008) |
Data MMU present (0x00000008) |
@item |
Instruction MMU present (0x00000010) |
@item |
2467,6 → 2468,25
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@end table |
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@node Performance Counters Configuration |
@subsection Performance Counters Configuration |
@cindex configuring the performance counters unit |
@cindex performance counters unit configuration |
@cindex @code{section pcu} |
The performance counters unit is described in |
@code{@w{section pcu}}. This section may appear at most once. The |
following parameters may be specified. |
|
@table @code |
|
@item enabled = 0|1 |
@cindex @code{enabled} (performance counters unit configuration) |
If 1 (true), the performance counters unit is enabled. If 0 (the default), it is disabled. |
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@end table |
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@node Peripheral Configuration |
@section Configuring Memory Mapped Peripherals |
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/version.texi
1,4 → 1,4
@set UPDATED 5 June 2011 |
@set UPDATED 6 June 2011 |
@set UPDATED-MONTH June 2011 |
@set EDITION 2011-04-28 |
@set VERSION 2011-04-28 |