OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /openrisc/trunk/or1ksim
    from Rev 106 to Rev 107
    Reverse comparison

Rev 106 → Rev 107

/cpu/or32/insnset.c
213,7 → 213,8
if (temp3)
temp1 = temp2 / temp3;
else {
except_handle(EXCEPT_ILLEGAL, cpu_state.pc);
mtspr (SPR_SR, SPR_SR_CY | mfspr (SPR_SR)); /* Div by zero sets carry */
except_handle (EXCEPT_RANGE, cpu_state.pc);
return;
}
SET_OV_FLAG_FN (temp1);
227,7 → 228,8
if (temp3)
temp1 = temp2 / temp3;
else {
except_handle(EXCEPT_ILLEGAL, cpu_state.pc);
mtspr (SPR_SR, SPR_SR_CY | mfspr (SPR_SR)); /* Div by zero sets carry */
except_handle(EXCEPT_RANGE, cpu_state.pc);
return;
}
SET_OV_FLAG_FN (temp1);
/configure.ac
28,7 → 28,7
 
# Use a full version number (x.y.z, possibly with "rcn" as a suffix) when
# preparing a release, otherwise use a the date version (yyyy-mm-dd).
AC_INIT([or1ksim], [0.4.0rc1], [openrisc@opencores.org])
AC_INIT([or1ksim], [2010-06-06], [openrisc@opencores.org])
AC_CONFIG_MACRO_DIR([m4])
 
# Generically use extensions such as _GNU_SOURCE if available.
/doc/or1ksim.info
64,7 → 64,7
Unpack the software and create a _separate_ directory in which to build
it:
 
tar jxf or1ksim-0.4.0rc1.tar.bz2
tar jxf or1ksim-2010-06-06.tar.bz2
mkdir builddir_or1ksim
cd builddir_or1ksim
 
81,7 → 81,7
OpenRISC 1000 32-bit architecture. If this argument is omitted, it will
default to OpenRISC 1000 32-bit with a warning
 
../or1ksim-0.4.0rc1/configure --target=or32-uclinux ...
../or1ksim-2010-06-06/configure --target=or32-uclinux ...
 
There are several other options available, many of which are standard
to GNU `configure' scripts. Use `configure --help' to see all the
248,9 → 248,9
=============================
 
The following problems and issues are known about with Or1ksim
0.4.0rc1. The OpenRISC tracker may be used to see the current state of
these issues and to raise new problems and feature requests. It may be
found at `http://www.opencores.org/ptracker.cgi/view/or1k/398'.
2010-06-06. The OpenRISC tracker may be used to see the current state
of these issues and to raise new problems and feature requests. It may
be found at `http://www.opencores.org/ptracker.cgi/view/or1k/398'.
 
* The Supervision Register Little Endian Enable (LEE) bit is
ignored. Or1ksim can be built for either little endian or big
4297,52 → 4297,52
Node: Top814
Node: Installation1224
Node: Preparation1471
Node: Configuring the Build1764
Node: Build and Install7486
Node: Known Issues8332
Node: Usage11392
Node: Standalone Simulator11606
Node: Profiling Utility14509
Node: Memory Profiling Utility15419
Node: Simulator Library16784
Node: Configuration24562
Node: Configuration File Format25171
Node: Configuration File Preprocessing25463
Node: Configuration File Syntax25834
Node: Simulator Configuration28619
Node: Simulator Behavior28910
Node: Verification API Configuration32954
Node: CUC Configuration34894
Node: Core OpenRISC Configuration36811
Node: CPU Configuration37313
Node: Memory Configuration41431
Node: Memory Management Configuration47889
Node: Cache Configuration50266
Node: Interrupt Configuration52652
Node: Power Management Configuration53388
Node: Branch Prediction Configuration54665
Node: Debug Interface Configuration56025
Node: Peripheral Configuration60245
Node: Memory Controller Configuration60871
Node: UART Configuration64285
Node: DMA Configuration67804
Node: Ethernet Configuration69671
Node: GPIO Configuration73647
Node: Display Interface Configuration75280
Node: Frame Buffer Configuration77589
Node: Keyboard Configuration79453
Node: Disc Interface Configuration81691
Node: Generic Peripheral Configuration86634
Node: Interactive Command Line88929
Node: Verification API95903
Node: Code Internals100333
Node: Coding Conventions100916
Node: Global Data Structures105343
Node: Concepts108000
Ref: Output Redirection108145
Node: Internal Debugging108684
Node: Regression Testing109208
Node: GNU Free Documentation License113003
Node: Index135410
Node: Configuring the Build1766
Node: Build and Install7490
Node: Known Issues8336
Node: Usage11398
Node: Standalone Simulator11612
Node: Profiling Utility14515
Node: Memory Profiling Utility15425
Node: Simulator Library16790
Node: Configuration24568
Node: Configuration File Format25177
Node: Configuration File Preprocessing25469
Node: Configuration File Syntax25840
Node: Simulator Configuration28625
Node: Simulator Behavior28916
Node: Verification API Configuration32960
Node: CUC Configuration34900
Node: Core OpenRISC Configuration36817
Node: CPU Configuration37319
Node: Memory Configuration41437
Node: Memory Management Configuration47895
Node: Cache Configuration50272
Node: Interrupt Configuration52658
Node: Power Management Configuration53394
Node: Branch Prediction Configuration54671
Node: Debug Interface Configuration56031
Node: Peripheral Configuration60251
Node: Memory Controller Configuration60877
Node: UART Configuration64291
Node: DMA Configuration67810
Node: Ethernet Configuration69677
Node: GPIO Configuration73653
Node: Display Interface Configuration75286
Node: Frame Buffer Configuration77595
Node: Keyboard Configuration79459
Node: Disc Interface Configuration81697
Node: Generic Peripheral Configuration86640
Node: Interactive Command Line88935
Node: Verification API95909
Node: Code Internals100339
Node: Coding Conventions100922
Node: Global Data Structures105349
Node: Concepts108006
Ref: Output Redirection108151
Node: Internal Debugging108690
Node: Regression Testing109214
Node: GNU Free Documentation License113009
Node: Index135416

End Tag Table
/doc/version.texi
1,4 → 1,4
@set UPDATED 2 June 2010
@set UPDATED-MONTH June 2010
@set EDITION 0.4.0rc1
@set VERSION 0.4.0rc1
@set EDITION 2010-06-06
@set VERSION 2010-06-06
/NEWS
2,6 → 2,19
==================================================
 
 
New in top of tree
==================
 
No new features are provided, pending full release of 0.4.0.
 
The following bugs are fixed.
* Bug 1770: l.div does not set carry or give correct exception.
 
The following bugs are either cannot be reproduced or will not be fixed.
 
The following bugs are outstanding
 
 
New in release 0.4.0rc1
=======================
 
/ChangeLog
1,6 → 1,13
2010-06-06 Jeremy Bennett <jeremy.bennett@embecosm.com>
* configure: Regenerated.
* configure.ac: Version changed to current date.
* cpu/or32/insnset.c <l_div, l_divu>: Corrected divide by zero
exception. Set carry flag on divide by zero.
* NEWS: Updated with bugs fixed.
 
2010-06-01 Jeremy Bennett <jeremy.bennett@embecosm.com>
* cpu/or32/generate.c (generate_header): Include math.h.
* cpu/or32/insnset.c <lf_lws>: Added definition.
* cpu/or32/insnset.c <l_lws>: Added definition.
* cpu/or32/insnset.c <lf_rem_s>: Corrected implementation.
* cpu/or32/or32.c <or32_opcodes>: Made l.lws valid, rather than
ignored.
/testsuite/test-code-or1k/configure
12684,7 → 12684,7
_ACEOF
 
 
ac_config_files="$ac_config_files Makefile acv-gpio/Makefile acv-uart/Makefile basic/Makefile cache/Makefile cbasic/Makefile cfg/Makefile dhry/Makefile dmatest/Makefile eth/Makefile except/Makefile except-test/Makefile exit/Makefile ext/Makefile fbtest/Makefile fp/Makefile functest/Makefile flag/Makefile int-test/Makefile int-logger/Makefile inst-set-test/Makefile kbdtest/Makefile local-global/Makefile loop/Makefile lws-test/Makefile mc-async/Makefile mc-dram/Makefile mc-ssram/Makefile mc-sync/Makefile mc-common/Makefile mem-test/Makefile mmu/Makefile mul/Makefile mycompress/Makefile support/Makefile tick/Makefile uos/Makefile upcalls/Makefile"
ac_config_files="$ac_config_files Makefile acv-gpio/Makefile acv-uart/Makefile basic/Makefile cache/Makefile cbasic/Makefile cfg/Makefile dhry/Makefile dmatest/Makefile eth/Makefile except/Makefile except-test/Makefile exit/Makefile ext/Makefile fbtest/Makefile fp/Makefile functest/Makefile flag/Makefile int-test/Makefile int-logger/Makefile inst-set-test/Makefile kbdtest/Makefile local-global/Makefile loop/Makefile mc-async/Makefile mc-dram/Makefile mc-ssram/Makefile mc-sync/Makefile mc-common/Makefile mem-test/Makefile mmu/Makefile mul/Makefile mycompress/Makefile support/Makefile tick/Makefile uos/Makefile upcalls/Makefile"
 
 
cat >confcache <<\_ACEOF
13610,7 → 13610,6
"kbdtest/Makefile") CONFIG_FILES="$CONFIG_FILES kbdtest/Makefile" ;;
"local-global/Makefile") CONFIG_FILES="$CONFIG_FILES local-global/Makefile" ;;
"loop/Makefile") CONFIG_FILES="$CONFIG_FILES loop/Makefile" ;;
"lws-test/Makefile") CONFIG_FILES="$CONFIG_FILES lws-test/Makefile" ;;
"mc-async/Makefile") CONFIG_FILES="$CONFIG_FILES mc-async/Makefile" ;;
"mc-dram/Makefile") CONFIG_FILES="$CONFIG_FILES mc-dram/Makefile" ;;
"mc-ssram/Makefile") CONFIG_FILES="$CONFIG_FILES mc-ssram/Makefile" ;;
/testsuite/test-code-or1k/Makefile.in
284,7 → 284,6
kbdtest \
local-global \
loop \
lws-test \
mc-async \
mc-dram \
mc-ssram \
/testsuite/test-code-or1k/configure.ac
138,7 → 138,6
kbdtest/Makefile \
local-global/Makefile \
loop/Makefile \
lws-test/Makefile \
mc-async/Makefile \
mc-dram/Makefile \
mc-ssram/Makefile \
/testsuite/test-code-or1k/inst-set-test/inst-set-test-old.c
0,0 → 1,296
/* inst-set-test.c. Instruction set test for Or1ksim
 
Copyright (C) 1999-2006 OpenCores
Copyright (C) 2010 Embecosm Limited
 
Contributors various OpenCores participants
Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
 
This file is part of OpenRISC 1000 Architectural Simulator.
 
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3 of the License, or (at your option)
any later version.
 
This program is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
 
You should have received a copy of the GNU General Public License along
with this program. If not, see <http: www.gnu.org/licenses/>. */
 
/* ----------------------------------------------------------------------------
This code is commented throughout for use with Doxygen.
--------------------------------------------------------------------------*/
 
/* This is a complex instruction test for OR1200 */
/* trap, movhi, mul, nop, rfe, sys instructions not tested*/
/* Currently not working. Compiles with warnings, runs with errors. */
 
#include "support.h"
 
volatile unsigned long test = 0xdeaddead;
 
#define TEST_32(c1,c2,val1,val2,op) \
test ^= ((c1 (val1)) op (c2 (val2))); test ^= ((c1 (val2)) op (c2 (val1)));\
test ^= ((c1 (val1)) op (c2 (val2))); test ^= ((c1 (val2)) op (c2 (val1)));\
test ^= ((c1 (val1)) op (c2 (val2))); test ^= ((c1 (val2)) op (c2 (val1)));\
test ^= ((c1 (val1)) op (c2 (val2))); test ^= ((c1 (val2)) op (c2 (val1)));\
test ^= ((c1 (val1)) op (c2 (val2))); test ^= ((c1 (val2)) op (c2 (val1)));\
test ^= ((c1 (val1)) op (c2 (val2))); test ^= ((c1 (val2)) op (c2 (val1)));\
test ^= ((c1 (val1)) op (c2 (val2))); test ^= ((c1 (val2)) op (c2 (val1)));\
test ^= ((c1 (val1)) op (c2 (val2))); test ^= ((c1 (val2)) op (c2 (val1)));\
 
#define TEST_CASTS(val1,val2,op)\
TEST_32((unsigned long), (unsigned long), val1, val2, op);\
TEST_32((unsigned long), (signed long), val1, val2, op);\
TEST_32((unsigned long), (unsigned short), val1, val2, op);\
TEST_32((unsigned long), (signed short), val1, val2, op);\
TEST_32((unsigned long), (unsigned char), val1, val2, op);\
TEST_32((unsigned long), (signed char), val1, val2, op);\
\
TEST_32((unsigned short), (unsigned long), val1, val2, op);\
TEST_32((unsigned short), (signed long), val1, val2, op);\
TEST_32((unsigned short), (unsigned short), val1, val2, op);\
TEST_32((unsigned short), (signed short), val1, val2, op);\
TEST_32((unsigned short), (unsigned char), val1, val2, op);\
TEST_32((unsigned short), (signed char), val1, val2, op);\
\
TEST_32((unsigned char), (unsigned long), val1, val2, op);\
TEST_32((unsigned char), (signed long), val1, val2, op);\
TEST_32((unsigned char), (unsigned short), val1, val2, op);\
TEST_32((unsigned char), (signed short), val1, val2, op)\
TEST_32((unsigned char), (unsigned char), val1, val2, op);\
TEST_32((unsigned char), (signed char), val1, val2, op);
 
 
void add_test ()
{
int i, j;
TEST_CASTS(0x12345678, 0x12345678, +);
TEST_CASTS(0x12345678, 0x87654321, +);
TEST_CASTS(0x87654321, 0x12345678, +);
TEST_CASTS(0x87654321, 0x87654321, +);
TEST_CASTS(0x1234, -0x1234, +);
TEST_CASTS(0x1234, -0x1234, +);
TEST_CASTS(-0x1234, 0x1234, +);
TEST_CASTS(-0x1234, -0x1234, +);
for (i = -1; i <= 1; i++)
for (j = -1; j <= 1; j++)
TEST_CASTS (i, j, +);
report (test);
}
 
void and_test ()
{
/* TEST_CASTS(0x12345678, 0x12345678, &);
TEST_CASTS(0x12345678, 0x87654321, &);
TEST_CASTS(0x87654321, 0x12345678, &);
TEST_CASTS(0x87654321, 0x87654321, &);
TEST_CASTS(0x12345678, 0x0, &);
TEST_CASTS(0x12345678, 0xffffffff, &);
TEST_CASTS(0x87654321, 0x80000000, &);
TEST_CASTS(0x87654321, 0x08000000, &);
TEST_CASTS(0x12345678, 0x12345678, &&);
TEST_CASTS(0x12345678, 0x87654321, &&);
TEST_CASTS(0x87654321, 0x12345678, &&);
TEST_CASTS(0x87654321, 0x87654321, &&);
TEST_CASTS(0x12345678, 0x0, &&);
TEST_CASTS(0x12345678, 0xffffffff, &&);
TEST_CASTS(0x87654321, 0x80000000, &&);
TEST_CASTS(0x87654321, 0x08000000, &&);
report (test);*/
}
 
void branch_test ()
{
/* bf, bnf, j, jal, jalr, jr, sfeq, sfges, sfgeu, sfgts, sfgtu, sfles, sfleu, sflts, sfltu, sfne */
report (test);
}
 
void load_store_test ()
{
volatile long a;
volatile short b;
volatile char c;
unsigned long *pa = (unsigned long *)&a;
unsigned short *pb = (unsigned short *)&b;
unsigned char *pc = (unsigned char *)&c;
test ^= a = 0xdeadbeef;
test ^= b = 0x12345678;
test ^= c = 0x87654321;
test ^= a = b;
test ^= b = c;
test ^= a;
test ^= (unsigned long)a;
test ^= (unsigned short)a;
test ^= (unsigned char)a;
test ^= (unsigned long)b;
test ^= (unsigned short)b;
test ^= (unsigned char)b;
test ^= (unsigned long)c;
test ^= (unsigned short)c;
test ^= (unsigned char)c;
test ^= *pa = 0xabcdef12;
test ^= *pb = 0x12345678;
test ^= *pc = 0xdeadbeef;
 
test ^= (signed long)c;
test ^= (signed short)c;
test ^= (signed char)c;
test ^= (signed long)a;
test ^= (signed short)a;
test ^= (signed char)a;
test ^= (signed long)b;
test ^= (signed short)b;
test ^= (signed char)b;
test ^= *pa = 0xaabbccdd;
test ^= *pb = 0x56789012;
test ^= *pc = 0xb055b055;
 
test ^= (unsigned long)b;
test ^= (signed long)c;
test ^= (unsigned long)a;
test ^= (unsigned short)c;
test ^= (unsigned short)a;
test ^= (unsigned char)c;
test ^= (unsigned short)b;
test ^= (unsigned char)b;
test ^= (unsigned char)a;
report (test);
}
 
void or_test ()
{
/* TEST_CASTS(0x12345678, 0x12345678, |);
TEST_CASTS(0x12345678, 0x87654321, |);
TEST_CASTS(0x87654321, 0x12345678, |);
TEST_CASTS(0x87654321, 0x87654321, |);
TEST_CASTS(0x12345678, 0x0, |);
TEST_CASTS(0x12345678, 0xffffffff, |);
TEST_CASTS(0x87654321, 0x80000000, |);
TEST_CASTS(0x87654321, 0x08000000, |);
TEST_CASTS(0x12345678, 0x12345678, ||);
TEST_CASTS(0x12345678, 0x87654321, ||);
TEST_CASTS(0x87654321, 0x12345678, ||);
TEST_CASTS(0x87654321, 0x87654321, ||);
TEST_CASTS(0x12345678, 0x0, ||);
TEST_CASTS(0x12345678, 0xffffffff, ||);
TEST_CASTS(0x87654321, 0x80000000, ||);
TEST_CASTS(0x87654321, 0x08000000, ||);*/
report (test);
}
 
void xor_test ()
{
/* TEST_CASTS(0x12345678, 0x12345678, ^);
TEST_CASTS(0x12345678, 0x87654321, ^);
TEST_CASTS(0x87654321, 0x12345678, ^);
TEST_CASTS(0x87654321, 0x87654321, ^);
TEST_CASTS(0x12345678, 0x0, ^);
TEST_CASTS(0x12345678, 0xffffffff, ^);
TEST_CASTS(0x87654321, 0x80000000, ^);
TEST_CASTS(0x87654321, 0x08000000, ^);*/
report (test);
}
 
void sll_test ()
{
int i;
for (i = -1; i < 40; i++)
TEST_CASTS(0xdeaf1234, i, <<);
for (i = -1; i < 33; i++)
TEST_CASTS(0x12345678, i, <<);
for (i = -1; i < 33; i++)
TEST_CASTS(0xdea12345, i, <<);
test ^= (unsigned long)0xabcd4321 << test;
test ^= (signed long)0xabcd4321 << test;
test ^= (unsigned long)0xabcd << test;
test ^= (signed long)0xabcd << test;
report (test);
}
 
void srl_sra_test ()
{
int i;
for (i = -1; i < 40; i++)
TEST_CASTS(0xdeaf1234, i, >>);
for (i = -1; i < 33; i++)
TEST_CASTS(0x12345678, i, >>);
for (i = -1; i < 33; i++)
TEST_CASTS(0xdea12345, i, >>);
test ^= (unsigned long)0xabcd4321 >> test;
test ^= (signed long)0xabcd4321 >> test;
test ^= (unsigned long)0xabcd >> test;
test ^= (signed long)0xabcd >> test;
report (test);
}
 
 
void ror_test ()
{
unsigned long a;
int i;
for (i = -1; i < 40; i++) {
asm ("l.ror %0, %1, %2" : "=r" (a) : "r" (0x12345678), "r" (i));
test ^= a;
asm ("l.ror %0, %1, %2" : "=r" (a) : "r" (0xabcdef), "r" (i));
test ^= a;
}
asm ("l.ror %0, %1, %2" : "=r" (a) : "r" (0x12345678), "r" (0x12345678));
test ^= a;
report (test);
}
 
void sub_test ()
{
/* int i, j;
TEST_CASTS(0x12345678, 0x12345678, -);
TEST_CASTS(0x12345678, 0x87654321, -);
TEST_CASTS(0x87654321, 0x12345678, -);
TEST_CASTS(0x87654321, 0x87654321, -);
TEST_CASTS(0x1234, -0x1234, -);
TEST_CASTS(0x1234, -0x1234, -);
TEST_CASTS(-0x1234, 0x1234, -);
TEST_CASTS(-0x1234, -0x1234, -);
for (i = -1; i <= 1; i++)
for (j = -1; j <= 1; j++)
TEST_CASTS (i, j, -);
report (test);*/
}
 
int main ()
{
add_test ();
and_test ();
branch_test ();
load_store_test ();
or_test ();
sll_test ();
srl_sra_test ();
xor_test ();
sub_test ();
return 0;
}
testsuite/test-code-or1k/inst-set-test/inst-set-test-old.c Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: testsuite/test-code-or1k/inst-set-test/inst-set-test.ld =================================================================== --- testsuite/test-code-or1k/inst-set-test/inst-set-test.ld (nonexistent) +++ testsuite/test-code-or1k/inst-set-test/inst-set-test.ld (revision 107) @@ -0,0 +1,68 @@ +/* inst-set.ld. Linker script for Or1ksim instruction set test programs + + Copyright (C) 1999-2006 OpenCores + Copyright (C) 2010 Embecosm Limited + + Contributors various OpenCores participants + Contributor Jeremy Bennett + + This file is part of OpenRISC 1000 Architectural Simulator. + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along + with this program. If not, see . */ + +/* ---------------------------------------------------------------------------- + This code is commented throughout for use with Doxygen. + --------------------------------------------------------------------------*/ + +/* ---------------------------------------------------------------------------- + This is a much simplified linker script for use with instruction set test + programs. In particular they do not use the memory controller. + --------------------------------------------------------------------------*/ + +MEMORY + { + ram : ORIGIN = 0x00000000, LENGTH = 0x00200000 + } + +/* Force _reset to be linked in wherever it is (library or source) */ +EXTERN(_reset) + +SECTIONS +{ + /* Section .boot-text guarantees that the code for exception + handling is placed first. */ + .text : + { + *(.boot-text) + *(.text) + *(.rodata) + } > ram + + .data : + { + *(.data) + } > ram + + .bss : + { + *(.bss) + } > ram + + .stack ALIGN (0x10) (NOLOAD) : + { + *(.stack) + } > ram +} + +ENTRY (_reset) Index: testsuite/test-code-or1k/inst-set-test/Makefile.in =================================================================== --- testsuite/test-code-or1k/inst-set-test/Makefile.in (revision 106) +++ testsuite/test-code-or1k/inst-set-test/Makefile.in (revision 107) @@ -15,7 +15,7 @@ @SET_MAKE@ -# Makefile.am for or1ksim testsuite CPU test program: inst-set-test +# Makefile.am for or1ksim instruction set test programs: # Copyright (C) Embecosm Limited, 2010 @@ -58,7 +58,8 @@ POST_UNINSTALL = : build_triplet = @build@ host_triplet = @host@ -@BUILD_ALL_TESTS_TRUE@check_PROGRAMS = inst-set-test$(EXEEXT) +check_PROGRAMS = is-div-test$(EXEEXT) is-lws-test$(EXEEXT) \ + $(am__EXEEXT_1) subdir = inst-set-test DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 @@ -72,17 +73,38 @@ CONFIG_HEADER = $(top_builddir)/config.h CONFIG_CLEAN_FILES = CONFIG_CLEAN_VPATH_FILES = -am_inst_set_test_OBJECTS = inst-set-test.$(OBJEXT) -inst_set_test_OBJECTS = $(am_inst_set_test_OBJECTS) -inst_set_test_DEPENDENCIES = ../except/except.lo \ +libinst_set_test_la_LIBADD = +am_libinst_set_test_la_OBJECTS = inst-set-test.lo +libinst_set_test_la_OBJECTS = $(am_libinst_set_test_la_OBJECTS) +@BUILD_ALL_TESTS_TRUE@am__EXEEXT_1 = inst-set-test-old$(EXEEXT) +am_inst_set_test_old_OBJECTS = inst-set-test-old.$(OBJEXT) +inst_set_test_old_OBJECTS = $(am_inst_set_test_old_OBJECTS) +inst_set_test_old_DEPENDENCIES = ../except/except.lo \ ../support/libsupport.la -inst_set_test_LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) \ +inst_set_test_old_LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) \ $(LIBTOOLFLAGS) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ - $(inst_set_test_LDFLAGS) $(LDFLAGS) -o $@ + $(inst_set_test_old_LDFLAGS) $(LDFLAGS) -o $@ +am_is_div_test_OBJECTS = is-div-test.$(OBJEXT) +is_div_test_OBJECTS = $(am_is_div_test_OBJECTS) +is_div_test_DEPENDENCIES = inst-set-test.lo +is_div_test_LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) \ + $(LIBTOOLFLAGS) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ + $(is_div_test_LDFLAGS) $(LDFLAGS) -o $@ +am_is_lws_test_OBJECTS = is-lws-test.$(OBJEXT) +is_lws_test_OBJECTS = $(am_is_lws_test_OBJECTS) +is_lws_test_DEPENDENCIES = inst-set-test.lo +is_lws_test_LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) \ + $(LIBTOOLFLAGS) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ + $(is_lws_test_LDFLAGS) $(LDFLAGS) -o $@ DEFAULT_INCLUDES = -I.@am__isrc@ -I$(top_builddir) depcomp = $(SHELL) $(top_srcdir)/../../depcomp am__depfiles_maybe = depfiles am__mv = mv -f +CPPASCOMPILE = $(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) \ + $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CCASFLAGS) $(CCASFLAGS) +LTCPPASCOMPILE = $(LIBTOOL) $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \ + --mode=compile $(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) \ + $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CCASFLAGS) $(CCASFLAGS) COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \ $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) LTCOMPILE = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \ @@ -92,8 +114,11 @@ LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \ --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \ $(LDFLAGS) -o $@ -SOURCES = $(inst_set_test_SOURCES) -DIST_SOURCES = $(inst_set_test_SOURCES) +SOURCES = $(libinst_set_test_la_SOURCES) $(inst_set_test_old_SOURCES) \ + $(is_div_test_SOURCES) $(is_lws_test_SOURCES) +DIST_SOURCES = $(libinst_set_test_la_SOURCES) \ + $(inst_set_test_old_SOURCES) $(is_div_test_SOURCES) \ + $(is_lws_test_SOURCES) ETAGS = etags CTAGS = ctags DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) @@ -211,15 +236,36 @@ top_build_prefix = @top_build_prefix@ top_builddir = @top_builddir@ top_srcdir = @top_srcdir@ -inst_set_test_SOURCES = inst-set-test.c -inst_set_test_LDFLAGS = -T$(srcdir)/../default.ld -inst_set_test_LDADD = ../except/except.lo \ - ../support/libsupport.la +# Tests of the instruction set. Broken out into separate tests, to avoid them +# getting too large. The original instruction set test is still here, but not +# built by default. +EXTRA_DIST = inst-set.ld +@BUILD_ALL_TESTS_FALSE@INST_SET_TEST_OLD = +@BUILD_ALL_TESTS_TRUE@INST_SET_TEST_OLD = inst-set-test-old + +# Support library for use when testing the instruction set. +check_LTLIBRARIES = libinst-set-test.la +libinst_set_test_la_SOURCES = inst-set-test.S + +# The new instruction set tests. +is_div_test_SOURCES = is-div-test.S +is_div_test_LDFLAGS = -T$(srcdir)/inst-set-test.ld +is_div_test_LDADD = inst-set-test.lo +is_lws_test_SOURCES = is-lws-test.S +is_lws_test_LDFLAGS = -T$(srcdir)/inst-set-test.ld +is_lws_test_LDADD = inst-set-test.lo + +# The old test which builds with warnings and runs with errors +inst_set_test_old_SOURCES = inst-set-test-old.c +inst_set_test_old_LDFLAGS = -T$(srcdir)/../default.ld +inst_set_test_old_LDADD = ../except/except.lo \ + ../support/libsupport.la + all: all-am .SUFFIXES: -.SUFFIXES: .c .lo .o .obj +.SUFFIXES: .S .c .lo .o .obj $(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(am__configure_deps) @for dep in $?; do \ case '$(am__configure_deps)' in \ @@ -251,6 +297,17 @@ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh $(am__aclocal_m4_deps): +clean-checkLTLIBRARIES: + -test -z "$(check_LTLIBRARIES)" || rm -f $(check_LTLIBRARIES) + @list='$(check_LTLIBRARIES)'; for p in $$list; do \ + dir="`echo $$p | sed -e 's|/[^/]*$$||'`"; \ + test "$$dir" != "$$p" || dir=.; \ + echo "rm -f \"$${dir}/so_locations\""; \ + rm -f "$${dir}/so_locations"; \ + done +libinst-set-test.la: $(libinst_set_test_la_OBJECTS) $(libinst_set_test_la_DEPENDENCIES) + $(LINK) $(libinst_set_test_la_OBJECTS) $(libinst_set_test_la_LIBADD) $(LIBS) + clean-checkPROGRAMS: @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \ echo " rm -f" $$list; \ @@ -259,9 +316,15 @@ list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \ echo " rm -f" $$list; \ rm -f $$list -inst-set-test$(EXEEXT): $(inst_set_test_OBJECTS) $(inst_set_test_DEPENDENCIES) - @rm -f inst-set-test$(EXEEXT) - $(inst_set_test_LINK) $(inst_set_test_OBJECTS) $(inst_set_test_LDADD) $(LIBS) +inst-set-test-old$(EXEEXT): $(inst_set_test_old_OBJECTS) $(inst_set_test_old_DEPENDENCIES) + @rm -f inst-set-test-old$(EXEEXT) + $(inst_set_test_old_LINK) $(inst_set_test_old_OBJECTS) $(inst_set_test_old_LDADD) $(LIBS) +is-div-test$(EXEEXT): $(is_div_test_OBJECTS) $(is_div_test_DEPENDENCIES) + @rm -f is-div-test$(EXEEXT) + $(is_div_test_LINK) $(is_div_test_OBJECTS) $(is_div_test_LDADD) $(LIBS) +is-lws-test$(EXEEXT): $(is_lws_test_OBJECTS) $(is_lws_test_DEPENDENCIES) + @rm -f is-lws-test$(EXEEXT) + $(is_lws_test_LINK) $(is_lws_test_OBJECTS) $(is_lws_test_LDADD) $(LIBS) mostlyclean-compile: -rm -f *.$(OBJEXT) @@ -269,8 +332,32 @@ distclean-compile: -rm -f *.tab.c -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/inst-set-test.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/inst-set-test-old.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/inst-set-test.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/is-div-test.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/is-lws-test.Po@am__quote@ +.S.o: +@am__fastdepCCAS_TRUE@ $(CPPASCOMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $< +@am__fastdepCCAS_TRUE@ $(am__mv) $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po +@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCCAS_FALSE@ $(CPPASCOMPILE) -c -o $@ $< + +.S.obj: +@am__fastdepCCAS_TRUE@ $(CPPASCOMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'` +@am__fastdepCCAS_TRUE@ $(am__mv) $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po +@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCCAS_FALSE@ $(CPPASCOMPILE) -c -o $@ `$(CYGPATH_W) '$<'` + +.S.lo: +@am__fastdepCCAS_TRUE@ $(LTCPPASCOMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $< +@am__fastdepCCAS_TRUE@ $(am__mv) $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Plo +@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ source='$<' object='$@' libtool=yes @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCCAS_FALSE@ $(LTCPPASCOMPILE) -c -o $@ $< + .c.o: @am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $< @am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po @@ -381,7 +468,7 @@ fi; \ done check-am: all-am - $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS) + $(MAKE) $(AM_MAKEFLAGS) $(check_LTLIBRARIES) $(check_PROGRAMS) check: check-am all-am: Makefile installdirs: @@ -412,8 +499,8 @@ @echo "it deletes files that may require special tools to rebuild." clean: clean-am -clean-am: clean-checkPROGRAMS clean-generic clean-libtool \ - mostlyclean-am +clean-am: clean-checkLTLIBRARIES clean-checkPROGRAMS clean-generic \ + clean-libtool mostlyclean-am distclean: distclean-am -rm -rf ./$(DEPDIR) @@ -484,15 +571,15 @@ .MAKE: check-am install-am install-strip .PHONY: CTAGS GTAGS all all-am check check-am clean \ - clean-checkPROGRAMS clean-generic clean-libtool ctags \ - distclean distclean-compile distclean-generic \ - distclean-libtool distclean-tags distdir dvi dvi-am html \ - html-am info info-am install install-am install-data \ - install-data-am install-dvi install-dvi-am install-exec \ - install-exec-am install-html install-html-am install-info \ - install-info-am install-man install-pdf install-pdf-am \ - install-ps install-ps-am install-strip installcheck \ - installcheck-am installdirs maintainer-clean \ + clean-checkLTLIBRARIES clean-checkPROGRAMS clean-generic \ + clean-libtool ctags distclean distclean-compile \ + distclean-generic distclean-libtool distclean-tags distdir dvi \ + dvi-am html html-am info info-am install install-am \ + install-data install-data-am install-dvi install-dvi-am \ + install-exec install-exec-am install-html install-html-am \ + install-info install-info-am install-man install-pdf \ + install-pdf-am install-ps install-ps-am install-strip \ + installcheck installcheck-am installdirs maintainer-clean \ maintainer-clean-generic mostlyclean mostlyclean-compile \ mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \ tags uninstall uninstall-am
/testsuite/test-code-or1k/inst-set-test/inst-set-test.S
0,0 → 1,272
/* inst-set-test.S. Instruction set test library for Or1ksim
*
* Copyright (C) 1999-2006 OpenCores
* Copyright (C) 2010 Embecosm Limited
*
* Contributors various OpenCores participants
* Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
*
* This file is part of OpenRISC 1000 Architectural Simulator.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 3 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along
* with this program. If not, see <http: www.gnu.org/licenses/>.
*/
 
/* ----------------------------------------------------------------------------
* Coding conventions
*
* A simple rising stack is provided starting at _stack and pointed to by
* r1. r1 points to the next free word. Only 32-bit registers may be pushed
* onto the stack.
*
* Local labels up to 49 are reserved for macros. Each is used only once in
* all macros. You can get in a serious mess if you get local label clashing
* in macros.
*
* Arguments to functions are passed in r3 through r8.
* r9 is the link (return address)
* r11 is for returning results
*
* Only r1 and r2 are preserved across function calls. It is up to the callee
* to save any other registers required.
* ------------------------------------------------------------------------- */
 
/* ----------------------------------------------------------------------------
* This library contains the stack implementation and reset sequence and a set
* of library functions.
*
* The functions provided here provide simple utilities that are useful when
* writing tests in assembler.
* ------------------------------------------------------------------------- */
 
#include "inst-set-test.h"
 
/* ----------------------------------------------------------------------------
* Simple stack, will be pointed to by r1, which is the next empty slot
* ------------------------------------------------------------------------- */
.section .stack
.balign 4
.global _stack
_stack:
.space 0x1000,0x0
 
/* ----------------------------------------------------------------------------
* Exception handling
* ------------------------------------------------------------------------- */
.section .boot-text
 
/* ----------------------------------------------------------------------------
* Reset exception
*
* Set up the stack and jump to _start
* ------------------------------------------------------------------------- */
.org 0x100
.global _reset
_reset:
l.movhi r1,hi(_stack) /* Set up the stack */
l.ori r1,r1,lo(_stack)
 
l.j _start /* Jump to the start of code */
l.nop
 
/* ----------------------------------------------------------------------------
* Range exception
*
* Don't be tempted to use the LOAD_STR macro here, it will dump us back into
* text space.
*
* Print a message about the instruction triggering the exception. Then
* replace it by l.nop and return.
* ------------------------------------------------------------------------- */
.section .rodata
50: .string " RANGE exception\n"
51: .string " - caused by: "
52: .string " - SR value: "
 
.section .boot-text
.org 0xb00
.global _range
_range:
/* Note exception */
LOAD_CONST (r3, 50b)
l.jal _puts
l.nop
 
/* Report problem instruction */
LOAD_CONST (r3, 51b)
l.jal _puts
l.nop
 
l.mfspr r2,r0,SPR_EPCR_BASE /* Addr of problem instr */
l.lws r3,0(r2) /* The actual instruction */
l.nop NOP_REPORT
 
/* Report status register */
LOAD_CONST (r3, 52b)
l.jal _puts
l.nop
 
l.mfspr r3,r0,SPR_ESR_BASE /* Status reg */
l.nop NOP_REPORT
 
/* Patch with l.nop */
l.mfspr r2,r0,SPR_EPCR_BASE /* Addr of problem instr */
LOAD_CONST (r3, 0x15000000) /* l.nop */
l.sw 0(r2),r3
 
/* All done */
l.rfe
_range_end:
/* ----------------------------------------------------------------------------
* End of exception vectors
*
* Guarantee the exception vector space does not have general purpose code
* ------------------------------------------------------------------------- */
.org 0xffc
l.nop
 
/* ----------------------------------------------------------------------------
* All subroutines are in the text section.
* ------------------------------------------------------------------------- */
.section .text
 
/* ----------------------------------------------------------------------------
* Subroutine to print out a string
*
* The string is followed by a newline
*
* Parameters:
* r3 Pointer to the string to print
* ------------------------------------------------------------------------- */
.global _puts
_puts:
l.add r2,r0,r3 /* Copy the string pointer */
/* Loop getting and printing each char until end of string */
60: l.lbz r3,0(r2)
l.sfeq r3,r0 /* NULL termination? */
l.bf 61f
 
l.addi r2,r2,1 /* Delay slot, move to next char */
l.j 60b /* Repeat */
l.nop NOP_PUTC /* Delay slot */
 
61: l.jr r9 /* Return */
l.nop
 
/* ----------------------------------------------------------------------------
* Subroutine to print out a test name prompt
*
* The string is preceded by two spaces
*
* Parameters:
* r3 Pointer to the test name to print
* ------------------------------------------------------------------------- */
.global _ptest
_ptest:
PUSH(r9) /* Save the return address */
PUSH(r3) /* Save the test name for later */
 
LOAD_STR(r3, " ") /* Prefix */
l.jal _puts
l.nop
 
POP(r3) /* Test name */
l.jal _puts
l.nop
POP (r9)
l.jr r9
l.nop
 
/* ----------------------------------------------------------------------------
* Subroutine to print out "OK"
*
* The string is followed by a newline
* ------------------------------------------------------------------------- */
.global _pok
_pok:
PUSH(r9) /* Save the return address */
 
LOAD_STR(r3, "OK\n")
l.jal _puts
l.nop
 
POP (r9)
l.jr r9
l.nop
 
/* ----------------------------------------------------------------------------
* Subroutine to print out "Failed"
*
* The string is followed by a ": ", which will then allow a report
* ------------------------------------------------------------------------- */
.global _pfail
_pfail:
PUSH(r9) /* Save the return address */
 
LOAD_STR(r3, "Failed: ")
l.jal _puts
l.nop
 
POP (r9)
l.jr r9
l.nop
 
/* ----------------------------------------------------------------------------
* Subroutine to print out "TRUE"
* ------------------------------------------------------------------------- */
.global _ptrue
_ptrue:
PUSH(r9) /* Save the return address */
 
LOAD_STR(r3, "TRUE")
l.jal _puts
l.nop
 
POP (r9)
l.jr r9
l.nop
 
/* ----------------------------------------------------------------------------
* Subroutine to print out "FALSE"
* ------------------------------------------------------------------------- */
.global _pfalse
_pfalse:
PUSH(r9) /* Save the return address */
 
LOAD_STR(r3, "FALSE")
l.jal _puts
l.nop
 
POP (r9)
l.jr r9
l.nop
 
/* ----------------------------------------------------------------------------
* Subroutine to print out "unexpected"
*
* Preceded by a space and followed by a newline
* ------------------------------------------------------------------------- */
.global _punexpected
_punexpected:
PUSH(r9) /* Save the return address */
 
LOAD_STR(r3, " unexpected\n")
l.jal _puts
l.nop
 
POP (r9)
l.jr r9
l.nop
testsuite/test-code-or1k/inst-set-test/inst-set-test.S Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: testsuite/test-code-or1k/inst-set-test/Makefile.am =================================================================== --- testsuite/test-code-or1k/inst-set-test/Makefile.am (revision 106) +++ testsuite/test-code-or1k/inst-set-test/Makefile.am (revision 107) @@ -1,4 +1,4 @@ -# Makefile.am for or1ksim testsuite CPU test program: inst-set-test +# Makefile.am for or1ksim instruction set test programs: # Copyright (C) Embecosm Limited, 2010 @@ -24,15 +24,40 @@ # ----------------------------------------------------------------------------- -# A test of the instruction set. Currently not working. Builds with warnings -# and runs with errors. +# Tests of the instruction set. Broken out into separate tests, to avoid them +# getting too large. The original instruction set test is still here, but not +# built by default. +EXTRA_DIST = inst-set.ld + if BUILD_ALL_TESTS -check_PROGRAMS = inst-set-test +INST_SET_TEST_OLD = inst-set-test-old +else +INST_SET_TEST_OLD = endif -inst_set_test_SOURCES = inst-set-test.c +# Support library for use when testing the instruction set. +check_LTLIBRARIES = libinst-set-test.la -inst_set_test_LDFLAGS = -T$(srcdir)/../default.ld +libinst_set_test_la_SOURCES = inst-set-test.S -inst_set_test_LDADD = ../except/except.lo \ - ../support/libsupport.la +# The test programs +check_PROGRAMS = is-div-test \ + is-lws-test \ + $(INST_SET_TEST_OLD) + +# The new instruction set tests. +is_div_test_SOURCES = is-div-test.S +is_div_test_LDFLAGS = -T$(srcdir)/inst-set-test.ld +is_div_test_LDADD = inst-set-test.lo + +is_lws_test_SOURCES = is-lws-test.S +is_lws_test_LDFLAGS = -T$(srcdir)/inst-set-test.ld +is_lws_test_LDADD = inst-set-test.lo + +# The old test which builds with warnings and runs with errors +inst_set_test_old_SOURCES = inst-set-test-old.c + +inst_set_test_old_LDFLAGS = -T$(srcdir)/../default.ld + +inst_set_test_old_LDADD = ../except/except.lo \ + ../support/libsupport.la
/testsuite/test-code-or1k/inst-set-test/inst-set-test.h
0,0 → 1,264
/* inst-set-test.h. Macros for instruction set testing
 
Copyright (C) 1999-2006 OpenCores
Copyright (C) 2010 Embecosm Limited
 
Contributors various OpenCores participants
Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
 
This file is part of OpenRISC 1000 Architectural Simulator.
 
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3 of the License, or (at your option)
any later version.
 
This program is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
 
You should have received a copy of the GNU General Public License along
with this program. If not, see <http: www.gnu.org/licenses/>. */
 
 
/* ----------------------------------------------------------------------------
* Test coverage
*
* The l.lws instruction was omitted from Or1ksim originally. It is specified
* for ORBIS32, even though it is functionally equivalent to l.lwz.
*
* Having fixed the problem, this is (in good software engineering style), a
* regresison test to go with the fix.
*
* Of course what is really needed is a comprehensive instruction test...
* ------------------------------------------------------------------------- */
 
 
#include "spr-defs.h"
#include "board.h"
 
/* ----------------------------------------------------------------------------
* Coding conventions
*
* A simple rising stack is provided starting at _stack and pointed to by
* r1. r1 points to the next free word. Only 32-bit registers may be pushed
* onto the stack.
*
* Local labels up to 49 are reserved for macros. Each is used only once in
* all macros. You can get in a serious mess if you get local label clashing
* in macros.
*
* Arguments to functions are passed in r3 through r8.
* r9 is the link (return address)
* r11 is for returning results
*
* Only r1 and r2 are preserved across function calls. It is up to the callee
* to save any other registers required.
* ------------------------------------------------------------------------- */
 
 
/* ----------------------------------------------------------------------------
* Useful constants
* ------------------------------------------------------------------------- */
 
/* Indicator of completion */
#define ALL_DONE (0xdeaddead)
 
/* Logical values */
#define TRUE 1
#define FALSE 0
 
 
/* ----------------------------------------------------------------------------
* Macro to push a register onto the stack
*
* r1 points to the next free slot. Push the supplied register on, then
* advance the stack pointer.
*
* Arguments:
* reg The register to push
*
* Registers modified
* r1
* ------------------------------------------------------------------------- */
#define PUSH(reg) \
l.sw 0(r1),reg /* Push */ ;\
l.addi r1,r1,4 /* Advance the stack */
/* ----------------------------------------------------------------------------
* Macro to pop a register off the stack
*
* r1 points to the next free slot. Decrement the stack pointer, then pop the
* requested register.
*
* Arguments:
* reg The register to pop
*
* Registers modified
* r1
* ------------------------------------------------------------------------- */
#define POP(reg) \
l.addi r1,r1,-4 /* Decrement the stack */ ;\
l.lws reg,0(r1) /* Pop */
/* ----------------------------------------------------------------------------
* Macro to load a 32-bit constant into a register
*
* Arguments:
* reg The register to load
* val The value to load
*
* ------------------------------------------------------------------------- */
#define LOAD_CONST(reg,val) \
l.movhi reg,hi(val) ;\
l.ori reg,reg,lo(val)
/* ----------------------------------------------------------------------------
* Macro to define and load a pointer to a string
*
* Arguments:
* reg The register to load
* str The string
*
* ------------------------------------------------------------------------- */
#define LOAD_STR(reg,str) \
.section .rodata ;\
1: ;\
.string str ;\
;\
.section .text ;\
l.movhi reg,hi(1b) ;\
l.ori reg,reg,lo(1b)
/* ----------------------------------------------------------------------------
* Macro to print a character
*
* Arguments:
* c The character to print
* ------------------------------------------------------------------------- */
#define PUTC(c) \
l.addi r3,r0,c ;\
l.nop NOP_PUTC
/* ----------------------------------------------------------------------------
* Macro for recording the result of a test
*
* The test result is in r4. Print out the name of test indented two spaces,
* followed by ": ", either "OK" or "Failed" and a newline.
*
* Arguments:
* str Textual name of the test
* reg The result to test (not r2)
* val Desired result of the test
* ------------------------------------------------------------------------- */
#define CHECK_RES(str,reg,val) \
.section .rodata ;\
2: ;\
.string str ;\
;\
.section .text ;\
PUSH (reg) /* Save the register to test */ ;\
;\
LOAD_CONST (r3,2b) /* Print out the string */ ;\
l.jal _ptest ;\
l.nop ;\
;\
LOAD_CONST(r2,val) /* The desired result */ ;\
POP (reg) /* The register to test */ ;\
PUSH (reg) /* May need again later */ ;\
l.sfeq r2,reg /* Does the result match? */ ;\
l.bf 3f ;\
l.nop ;\
;\
l.jal _pfail /* Test failed */ ;\
l.nop ;\
POP (reg) /* Report the register */ ;\
l.add r3,r0,reg ;\
l.j 4f ;\
l.nop NOP_REPORT ;\
3: ;\
POP (reg) /* Discard the register */ ;\
l.jal _pok /* Test succeeded */ ;\
l.nop ;\
4:
/* ----------------------------------------------------------------------------
* Macro for recording the result of a comparison
*
* If the flag is set print the string argument indented by 2 spaces, followed
* by "TRUE" and a newline, otherwise print the string argument indented by
* two spaces, followed by "FALSE" and a newline.
*
* Arguments:
* str Textual name of the test
* res Expected result (TRUE or FALSE)
* ------------------------------------------------------------------------- */
#define CHECK_FLAG(str,res) \
.section .rodata ;\
5: ;\
.string str ;\
;\
.section .text ;\
l.bnf 7f /* Branch if result FALSE */ ;\
;\
/* Branch for TRUE result */ ;\
LOAD_CONST (r3,5b) /* The string to print */ ;\
l.jal _ptest ;\
l.nop ;\
;\
l.addi r2,r0,TRUE /* Was it expected? */ ;\
l.addi r3,r0,res ;\
l.sfeq r2,r3 ;\
l.bnf 6f /* Branch if not expected */ ;\
;\
/* Sub-branch for TRUE found and expected */ ;\
l.jal _ptrue ;\
l.nop ;\
PUTC ('\n') ;\
l.j 9f ;\
l.nop ;\
6: ;\
/* Sub-branch for TRUE found and not expected */ ;\
l.jal _ptrue ;\
l.nop ;\
l.jal _punexpected ;\
l.nop ;\
l.j 9f ;\
l.nop ;\
;\
7: ;\
/* Branch for FALSE result */ ;\
LOAD_CONST (r3,5b) /* The string to print */ ;\
l.jal _ptest ;\
l.nop ;\
;\
l.addi r2,r0,FALSE /* Was it expected? */ ;\
l.addi r3,r0,res ;\
l.sfeq r2,r3 ;\
l.bnf 8f /* Branch if not expected */ ;\
;\
/* Sub-branch for FALSE found and expected */ ;\
l.jal _pfalse ;\
l.nop ;\
PUTC ('\n') ;\
l.j 9f ;\
l.nop ;\
8: ;\
/* Sub-branch for FALSE found and not expected */ ;\
l.jal _pfalse ;\
l.nop ;\
l.jal _punexpected ;\
l.nop ;\
9:
 
/* ----------------------------------------------------------------------------
* Macro to report 0xdeaddead and then terminate
* ------------------------------------------------------------------------- */
#define TEST_EXIT \
l.movhi r3,hi(ALL_DONE) ;\
l.ori r3,r3,lo(ALL_DONE) ;\
l.nop NOP_REPORT ;\
;\
l.addi r3,r0,0 ;\
l.nop NOP_EXIT
testsuite/test-code-or1k/inst-set-test/inst-set-test.h Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: testsuite/test-code-or1k/inst-set-test/is-div-test.S =================================================================== --- testsuite/test-code-or1k/inst-set-test/is-div-test.S (nonexistent) +++ testsuite/test-code-or1k/inst-set-test/is-div-test.S (revision 107) @@ -0,0 +1,118 @@ +/* is-div-test.S. l.div and l.divu instruction test of Or1ksim + * + * Copyright (C) 1999-2006 OpenCores + * Copyright (C) 2010 Embecosm Limited + * + * Contributors various OpenCores participants + * Contributor Jeremy Bennett + * + * This file is part of OpenRISC 1000 Architectural Simulator. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 3 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program. If not, see . + */ + +/* ---------------------------------------------------------------------------- + * Coding conventions + * + * A simple rising stack is provided starting at _stack and pointed to by + * r1. r1 points to the next free word. Only 32-bit registers may be pushed + * onto the stack. + * + * Local labels up to 49 are reserved for macros. Each is used only once in + * all macros. You can get in a serious mess if you get local label clashing + * in macros. + * + * Arguments to functions are passed in r3 through r8. + * r9 is the link (return address) + * r11 is for returning results + * + * Only r1 and r2 are preserved across function calls. It is up to the callee + * to save any other registers required. + * ------------------------------------------------------------------------- */ + +/* ---------------------------------------------------------------------------- + * Test coverage + * + * The l.div and l.divu instructions should set the carry flag as well as + * triggering an event when divide by zero occurs. + * + * Having fixed the problem, this is (in good software engineering style), a + * regresison test to go with the fix. + * + * This is not a comprehensive test of either instruction (yet). + * + * Of course what is really needed is a comprehensive instruction test... + * ------------------------------------------------------------------------- */ + + +#include "inst-set-test.h" + +/* ---------------------------------------------------------------------------- + * Test of divide l.div + * ------------------------------------------------------------------------- */ + + .section .text + .global _start +_start: + /* Signed divide by zero */ +_div: + LOAD_STR (r3, "l.div\n") + l.jal _puts + l.nop + + LOAD_CONST (r2, ~SPR_SR_CY) /* Clear the carry flag */ + l.mfspr r3,r0,SPR_SR + l.and r3,r3,r2 + l.mtspr r0,r3,SPR_SR + + LOAD_CONST (r5,1) /* Set up args for division */ + LOAD_CONST (r6,0) + l.div r4,r5,r6 + + l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */ + LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */ + l.and r2,r2,r4 + l.sfeq r2,r4 + CHECK_FLAG ("1 / 0 (with error) carry flag set: ", TRUE) + + /* Signed divide by zero */ +_divu: + LOAD_STR (r3, "l.divu\n") + l.jal _puts + l.nop + + LOAD_CONST (r2, ~SPR_SR_CY) /* Clear the carry flag */ + l.mfspr r3,r0,SPR_SR + l.and r3,r3,r2 + l.mtspr r0,r3,SPR_SR + + LOAD_CONST (r5,1) /* Set up args for division */ + LOAD_CONST (r6,0) + l.divu r4,r5,r6 + + l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */ + LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */ + l.and r2,r2,r4 + l.sfeq r2,r4 + CHECK_FLAG ("1 / 0 (with error) carry flag set: ", TRUE) + +/* ---------------------------------------------------------------------------- + * All done + * ------------------------------------------------------------------------- */ +_exit: + LOAD_STR (r3, "Test completed\n") + l.jal _puts + l.nop + + TEST_EXIT \ No newline at end of file
testsuite/test-code-or1k/inst-set-test/is-div-test.S Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: testsuite/test-code-or1k/inst-set-test/is-lws-test.S =================================================================== --- testsuite/test-code-or1k/inst-set-test/is-lws-test.S (nonexistent) +++ testsuite/test-code-or1k/inst-set-test/is-lws-test.S (revision 107) @@ -0,0 +1,140 @@ +/* is-lws-test.S. l.lws instruction test of Or1ksim + * + * Copyright (C) 1999-2006 OpenCores + * Copyright (C) 2010 Embecosm Limited + * + * Contributors various OpenCores participants + * Contributor Jeremy Bennett + * + * This file is part of OpenRISC 1000 Architectural Simulator. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 3 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program. If not, see . + */ + +/* ---------------------------------------------------------------------------- + * Coding conventions + * + * A simple rising stack is provided starting at _stack and pointed to by + * r1. r1 points to the next free word. Only 32-bit registers may be pushed + * onto the stack. + * + * Local labels up to 49 are reserved for macros. Each is used only once in + * all macros. You can get in a serious mess if you get local label clashing + * in macros. + * + * Arguments to functions are passed in r3 through r8. + * r9 is the link (return address) + * r11 is for returning results + * + * Only r1 and r2 are preserved across function calls. It is up to the callee + * to save any other registers required. + * ------------------------------------------------------------------------- */ + +/* ---------------------------------------------------------------------------- + * Test coverage + * + * The l.lws instruction was omitted from Or1ksim originally. It is specified + * for ORBIS32, even though it is functionally equivalent to l.lwz. + * + * Having fixed the problem, this is (in good software engineering style), a + * regresison test to go with the fix. + * + * Of course what is really needed is a comprehensive instruction test... + * ------------------------------------------------------------------------- */ + + +#include "inst-set-test.h" + +/* ---------------------------------------------------------------------------- + * Test of load single word and extend with sign: l.lws + * ------------------------------------------------------------------------- */ + .section .rodata + .balign 4 +50: .word 0xdeadbeef +51: .word 0x00000000 +52: .word 0x7fffffff +53: .word 0x80000000 +54: .word 0xffffffff + + .section .text + .global _start +_start: + LOAD_STR (r3, "l.lws\n") + l.jal _puts + l.nop + + /* Load with zero offset */ + LOAD_CONST (r5,50b) + l.lws r4,0(r5) + CHECK_RES (" l.lws r4,0(r5): r4=0xdeadbeef: ", r4, 0xdeadbeef) + + LOAD_CONST (r5,51b) + l.lws r4,0(r5) + CHECK_RES (" l.lws r4,0(r5): r4=0x00000000: ", r4, 0x00000000) + + LOAD_CONST (r5,52b) + l.lws r4,0(r5) + CHECK_RES (" l.lws r4,0(r5): r4=0x7fffffff: ", r4, 0x7fffffff) + + LOAD_CONST (r5,53b) + l.lws r4,0(r5) + CHECK_RES (" l.lws r4,0(r5): r4=0x80000000: ", r4, 0x80000000) + + LOAD_CONST (r5,54b) + l.lws r4,0(r5) + CHECK_RES (" l.lws r4,0(r5): r4=0xffffffff: ", r4, 0xffffffff) + + /* Load with positive offset */ + LOAD_CONST (r5,50b) + l.lws r4,4(r5) + CHECK_RES (" l.lws r4,0(r5): r4=0x00000000: ", r4, 0x00000000) + + LOAD_CONST (r5,50b) + l.lws r4,8(r5) + CHECK_RES (" l.lws r4,0(r5): r4=0x7fffffff: ", r4, 0x7fffffff) + + LOAD_CONST (r5,50b) + l.lws r4,12(r5) + CHECK_RES (" l.lws r4,0(r5): r4=0x80000000: ", r4, 0x80000000) + + LOAD_CONST (r5,50b) + l.lws r4,16(r5) + CHECK_RES (" l.lws r4,0(r5): r4=0xffffffff: ", r4, 0xffffffff) + + /* Load with negative offset */ + LOAD_CONST (r5,54b) + l.lws r4,-16(r5) + CHECK_RES (" l.lws r4,0(r5): r4=0xdeadbeef: ", r4, 0xdeadbeef) + + LOAD_CONST (r5,54b) + l.lws r4,-12(r5) + CHECK_RES (" l.lws r4,0(r5): r4=0x00000000: ", r4, 0x00000000) + + LOAD_CONST (r5,54b) + l.lws r4,-8(r5) + CHECK_RES (" l.lws r4,0(r5): r4=0x7fffffff: ", r4, 0x7fffffff) + + LOAD_CONST (r5,54b) + l.lws r4,-4(r5) + CHECK_RES (" l.lws r4,0(r5): r4=0x80000000: ", r4, 0x80000000) + +/* ---------------------------------------------------------------------------- + * All done + * ------------------------------------------------------------------------- */ +_exit: + LOAD_STR (r3, "Test completed\n") + l.jal _puts + l.nop + + TEST_EXIT \ No newline at end of file
testsuite/test-code-or1k/inst-set-test/is-lws-test.S Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: testsuite/test-code-or1k/ChangeLog =================================================================== --- testsuite/test-code-or1k/ChangeLog (revision 106) +++ testsuite/test-code-or1k/ChangeLog (revision 107) @@ -1,3 +1,22 @@ +2010-06-06 Jeremy Bennett + * configure: Regenerated. + * configure.ac: Removed creation of lws-test makefile. + * fp/fp.S (_puts): Fixed register usage. + * inst-set-test/inst-set-test.ld: Created. + * inst-set-test/inst-set-test.S: Created using functions + lws-test/lws-test.S + * inst-set-test/is-div-test.S: Created. + * inst-set-test/inst-set-test.h: Created using macros from + lws-test/lws-test.S. + * inst-set-test/Makefile.am: Updated for new tests + * inst-set-test/is-lws-test.S: Created from lws-test/lws-test.S + * lws-test: Directory deleted. + * lws-test/lws-test.S: Deleted. + * lws-test/Makefile.am: Deleted. + * lws-test/Makefile.in: Deleted. + * Makefile.am: Removed lws-test directory + * Makefile.in: Regenerated. + 2010-06-04 Jeremy Bennett * configure: Regenerated. * configure.ac: Added creation of lws-test makefile Index: testsuite/test-code-or1k/Makefile.am =================================================================== --- testsuite/test-code-or1k/Makefile.am (revision 106) +++ testsuite/test-code-or1k/Makefile.am (revision 107) @@ -62,7 +62,6 @@ kbdtest \ local-global \ loop \ - lws-test \ mc-async \ mc-dram \ mc-ssram \ Index: testsuite/or1ksim.tests/inst-set-test.cfg =================================================================== --- testsuite/or1ksim.tests/inst-set-test.cfg (nonexistent) +++ testsuite/or1ksim.tests/inst-set-test.cfg (revision 107) @@ -0,0 +1,103 @@ +/* inst-set.cfg -- Or1ksim instruction set configuration script file + + Copyright (C) 2001, Marko Mlinar + Copyright (C) 2010 Embecosm Limited + + Contributor Marko Mlinar + Contributor Jeremy Bennett + + This file is part of OpenRISC 1000 Architectural Simulator. + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along + with this program. If not, see . */ + +/* This configuration file is particularly intended for intruction set tests + which have a single block of RAM and make no use of the memory controller + or flash memory. */ + +section memory + type = unknown /* Fastest */ + name = "RAM" + baseaddr = 0x00000000 + size = 0x00200000 + delayr = 2 + delayw = 4 +end + +section immu + enabled = 0 +end + +section dmmu + enabled = 0 +end + +section ic + enabled = 0 +end + +section dc + enabled = 0 +end + +section cpu + ver = 0x12 + rev = 0x0001 + superscalar = 0 + hazards = 0 + dependstats = 0 +end + +section bpb + enabled = 0 +end + +section debug +/* enabled = 1 + rsp_enabled = 1 + rsp_port = 51000*/ +end + +section sim + debug = 0 + profile = 0 + prof_fn = "sim.profile" + + exe_log = 0 + exe_log_type = software + exe_log_fn = "executed.log" +end + +section mc + enabled = 0 +end + +section dma + enabled = 0 +end + +section ethernet + enabled = 0 +end + +section VAPI + enabled = 0 +end + +section fb + enabled = 0 +end + +section kbd + enabled = 0 +end Index: testsuite/or1ksim.tests/Makefile.in =================================================================== --- testsuite/or1ksim.tests/Makefile.in (revision 106) +++ testsuite/or1ksim.tests/Makefile.in (revision 107) @@ -211,37 +211,38 @@ top_srcdir = @top_srcdir@ # Just distribute this stuff -EXTRA_DIST = acv-gpio.cfg \ - acv-uart.cfg \ - basic.exp \ - cache.exp \ - cbasic.exp \ - cfg.exp \ - default.cfg \ - dhry.exp \ - dmatest.exp \ - eth0.rx \ - eth.cfg \ - eth.exp \ - except-test.exp \ - exit.exp \ - ext.exp \ - fbtest.exp \ - flag.exp \ - fp.cfg \ - fp.exp \ - functest.exp \ - int-test.exp \ - kbdtest.cfg \ - kbdtest.exp \ - kbdtest.rx \ - local-global.exp \ - lws-test.exp \ - mem-test.exp \ - mmu.cfg \ - mmu.exp \ - mul.exp \ - mycompress.exp \ +EXTRA_DIST = acv-gpio.cfg \ + acv-uart.cfg \ + basic.exp \ + cache.exp \ + cbasic.exp \ + cfg.exp \ + default.cfg \ + dhry.exp \ + dmatest.exp \ + eth0.rx \ + eth.cfg \ + eth.exp \ + except-test.exp \ + exit.exp \ + ext.exp \ + fbtest.exp \ + flag.exp \ + fp.cfg \ + fp.exp \ + functest.exp \ + int-test.exp \ + inst-set-test.cfg \ + inst-set-test.exp \ + kbdtest.cfg \ + kbdtest.exp \ + kbdtest.rx \ + local-global.exp \ + mem-test.exp \ + mmu.cfg \ + mmu.exp \ + mul.exp \ + mycompress.exp \ tick.exp all: all-am
/testsuite/or1ksim.tests/inst-set-test.exp
0,0 → 1,46
# inst-set-test.exp. Tests of ORBIS32 instruction set
 
# Copyright (C) 2010 Embecosm Limited
 
# Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
 
# This file is part of OpenRISC 1000 Architectural Simulator.
 
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
# Software Foundation; either version 3 of the License, or (at your option)
# any later version.
 
# This program is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
# more details.
 
# You should have received a copy of the GNU General Public License along
# with this program. If not, see <http:#www.gnu.org/licenses/>. */
 
# -----------------------------------------------------------------------------
# This code is commented throughout for use with Doxygen.
# -----------------------------------------------------------------------------
 
 
# Run the l.lws test
run_or1ksim "lws-test" \
[list "!l.lws" \
" l.lws r4,0(r5): r4=0xdeadbeef: OK" \
" l.lws r4,0(r5): r4=0x00000000: OK" \
" l.lws r4,0(r5): r4=0x7fffffff: OK" \
" l.lws r4,0(r5): r4=0x80000000: OK" \
" l.lws r4,0(r5): r4=0xffffffff: OK" \
" l.lws r4,0(r5): r4=0x00000000: OK" \
" l.lws r4,0(r5): r4=0x7fffffff: OK" \
" l.lws r4,0(r5): r4=0x80000000: OK" \
" l.lws r4,0(r5): r4=0xffffffff: OK" \
" l.lws r4,0(r5): r4=0xdeadbeef: OK" \
" l.lws r4,0(r5): r4=0x00000000: OK" \
" l.lws r4,0(r5): r4=0x7fffffff: OK" \
" l.lws r4,0(r5): r4=0x80000000: OK" \
"!Test completed" \
"!report(0xdeaddead);" \
"!exit(0)"] \
"inst-set-test.cfg" "inst-set-test/is-lws-test"
/testsuite/or1ksim.tests/Makefile.am
28,35 → 28,36
 
 
# Just distribute this stuff
EXTRA_DIST = acv-gpio.cfg \
acv-uart.cfg \
basic.exp \
cache.exp \
cbasic.exp \
cfg.exp \
default.cfg \
dhry.exp \
dmatest.exp \
eth0.rx \
eth.cfg \
eth.exp \
except-test.exp \
exit.exp \
ext.exp \
fbtest.exp \
flag.exp \
fp.cfg \
fp.exp \
functest.exp \
int-test.exp \
kbdtest.cfg \
kbdtest.exp \
kbdtest.rx \
local-global.exp \
lws-test.exp \
mem-test.exp \
mmu.cfg \
mmu.exp \
mul.exp \
mycompress.exp \
EXTRA_DIST = acv-gpio.cfg \
acv-uart.cfg \
basic.exp \
cache.exp \
cbasic.exp \
cfg.exp \
default.cfg \
dhry.exp \
dmatest.exp \
eth0.rx \
eth.cfg \
eth.exp \
except-test.exp \
exit.exp \
ext.exp \
fbtest.exp \
flag.exp \
fp.cfg \
fp.exp \
functest.exp \
int-test.exp \
inst-set-test.cfg \
inst-set-test.exp \
kbdtest.cfg \
kbdtest.exp \
kbdtest.rx \
local-global.exp \
mem-test.exp \
mmu.cfg \
mmu.exp \
mul.exp \
mycompress.exp \
tick.exp
/testsuite/ChangeLog
1,3 → 1,13
2010-06-06 Jeremy Bennett <jeremy.bennett@embecosm.com>
* or1ksim.tests/inst-set-test.cfg: Created.
* or1ksim.tests/inst-set-test.exp: Created.
* or1ksim.tests/Makefile.am: Updated to reflect added and deleted
files.
* or1ksim.tests/Makefile.in: Regenerated
* or1ksim.tests/lws-test.exp: Deleted (incorporated within
inst-set-test.ex).
* README: Updated to reflect new structure.
 
2010-06-03 Jeremy Bennett <jeremy.bennett@embecosm.com>
* or1ksim.tests/fp.exp: Removed timeout change
* or1ksim.tests/lws-test.exp: Created.
/testsuite/README
48,29 → 48,31
 
A total of 799 tests of standalone Or1ksim:
 
basic: 8 tests of a wide range of instructions and registers.
cache: 5 tests of the Or1ksim cache modeling
cbasic: 19 tests of minimal C functionality
cfg: 12 tests of the OR1K configuration register
dhry: 1 Dhrystone 2.1 benchmark using Or1ksim's timing facility.
dmatest: 3 tests of DMA.
eth: 12 tests of the Ethernet interface.
except-test: 7 tests of OR1K exception handling
exit: 1 test that C program exits correctly
ext: 104 tests of the sign extension (l.ext) instructions.
fbtest: 1 test of the frame buffer.
fp 337 tests of floating point functionality (Feature 413).
functest: 11 tests of the C function calling interface.
flag: 1 test of Supervision Register (SR) flag bits.
int-test: 86 tests of the programmable interrupt controller.
kbdtest: 26 tests of the PS2 keyboard interface.
local-global: 1 test of C local and global variables.
lws-test: 13 tests of the l.lws instruction (Bug 1767).
mem-test: 16 tests of simple memory access.
mmu: 110 tests of the MMU.
mul: 5 tests of the multiply functionality.
mycompress: 1 test using a compression program.
tick: 19 tests of the OR1K tick timer.
basic: 8 tests of a wide range of instructions and registers.
cache: 5 tests of the Or1ksim cache modeling
cbasic: 19 tests of minimal C functionality
cfg: 12 tests of the OR1K configuration register
dhry: 1 Dhrystone 2.1 benchmark using Or1ksim's timing facility.
dmatest: 3 tests of DMA.
eth: 12 tests of the Ethernet interface.
except-test: 7 tests of OR1K exception handling
exit: 1 test that C program exits correctly
ext: 104 tests of the sign extension (l.ext) instructions.
fbtest: 1 test of the frame buffer.
fp 337 tests of floating point functionality (Feature 413).
functest: 11 tests of the C function calling interface.
flag: 1 test of Supervision Register (SR) flag bits.
int-test: 86 tests of the programmable interrupt controller.
kbdtest: 26 tests of the PS2 keyboard interface.
local-global: 1 test of C local and global variables.
inst-set-test: A collection of tests of individual instructions
is-div-test: 2 tests of tje l.div and l.divu instruction (Bug 1770).
is-lws-test: 13 tests of the l.lws instruction (Bug 1767).
mem-test: 16 tests of simple memory access.
mmu: 110 tests of the MMU.
mul: 5 tests of the multiply functionality.
mycompress: 1 test using a compression program.
tick: 19 tests of the OR1K tick timer.
 
A total of 264 tests of the libsim library:
 
/configure
1,7 → 1,7
#! /bin/sh
# From configure.ac Id: configure.ac 999 2010-05-26 17:40:09Z jeremy using automake version AC_ACVERSION.
# From configure.ac Id: configure.ac 1015 2010-06-03 10:09:54Z jeremy using automake version AC_ACVERSION.
# Guess values for system-dependent variables and create Makefiles.
# Generated by GNU Autoconf 2.63 for or1ksim 0.4.0rc1.
# Generated by GNU Autoconf 2.63 for or1ksim 2010-06-06.
#
# Report bugs to <openrisc@opencores.org>.
#
766,8 → 766,8
# Identity of this package.
PACKAGE_NAME='or1ksim'
PACKAGE_TARNAME='or1ksim'
PACKAGE_VERSION='0.4.0rc1'
PACKAGE_STRING='or1ksim 0.4.0rc1'
PACKAGE_VERSION='2010-06-06'
PACKAGE_STRING='or1ksim 2010-06-06'
PACKAGE_BUGREPORT='openrisc@opencores.org'
 
# Factoring default headers for most tests.
1530,7 → 1530,7
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
\`configure' configures or1ksim 0.4.0rc1 to adapt to many kinds of systems.
\`configure' configures or1ksim 2010-06-06 to adapt to many kinds of systems.
 
Usage: $0 [OPTION]... [VAR=VALUE]...
 
1601,7 → 1601,7
 
if test -n "$ac_init_help"; then
case $ac_init_help in
short | recursive ) echo "Configuration of or1ksim 0.4.0rc1:";;
short | recursive ) echo "Configuration of or1ksim 2010-06-06:";;
esac
cat <<\_ACEOF
 
1709,7 → 1709,7
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
or1ksim configure 0.4.0rc1
or1ksim configure 2010-06-06
generated by GNU Autoconf 2.63
 
Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
1743,7 → 1743,7
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
 
It was created by or1ksim $as_me 0.4.0rc1, which was
It was created by or1ksim $as_me 2010-06-06, which was
generated by GNU Autoconf 2.63. Invocation command line was
 
$ $0 $@
11286,7 → 11286,7
 
# Define the identity of the package.
PACKAGE='or1ksim'
VERSION='0.4.0rc1'
VERSION='2010-06-06'
 
 
cat >>confdefs.h <<_ACEOF
18282,7 → 18282,7
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
This file was extended by or1ksim $as_me 0.4.0rc1, which was
This file was extended by or1ksim $as_me 2010-06-06, which was
generated by GNU Autoconf 2.63. Invocation command line was
 
CONFIG_FILES = $CONFIG_FILES
18345,7 → 18345,7
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
or1ksim config.status 0.4.0rc1
or1ksim config.status 2010-06-06
configured by $0, generated by GNU Autoconf 2.63,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
 

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