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https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
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- This comparison shows the changes necessary to convert path
/openrisc/trunk/orpsocv2/bench/sysc/include
- from Rev 362 to Rev 363
- ↔ Reverse comparison
Rev 362 → Rev 363
/OrpsocAccess.h
41,7 → 41,7
// Main memory access class - will change if main memory size or other |
// parameters change |
//Old ram_wbclass: class Vorpsoc_top_ram_wb_sc_sw__D20_A19_M800000; |
class Vorpsoc_top_wb_ram_b3__D20_A19_M800000; |
class Vorpsoc_top_wb_ram_b3__D20_A17_M800000; |
// SoC Arbiter class - will also change if any modifications to bus architecture |
//class Vorpsoc_top_wb_conbus_top__pi1; |
|
109,7 → 109,7
Vorpsoc_top_or1200_except *or1200_except; |
Vorpsoc_top_or1200_sprs *or1200_sprs; |
Vorpsoc_top_or1200_dpram *rf_a; |
/*Vorpsoc_top_ram_wb_sc_sw*//*Vorpsoc_top_ram_wb_sc_sw__D20_A19_M800000*/ Vorpsoc_top_wb_ram_b3__D20_A19_M800000 *ram_wb_sc_sw; |
/*Vorpsoc_top_ram_wb_sc_sw*//*Vorpsoc_top_ram_wb_sc_sw__D20_A19_M800000*/ Vorpsoc_top_wb_ram_b3__D20_A17_M800000 *ram_wb_sc_sw; |
// Arbiter |
//Vorpsoc_top_wb_conbus_top__pi1 *wb_arbiter; |
|