URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
Compare Revisions
- This comparison shows the changes necessary to convert path
/openrisc/trunk/orpsocv2/bench/sysc
- from Rev 353 to Rev 70
- ↔ Reverse comparison
Rev 353 → Rev 70
/src/Or1200MonitorSC.cpp
328,8 → 328,7
memdump_start_addr = memdump_start; |
memdump_end_addr = memdump_end; |
} |
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/* |
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if (bus_trans_log_enabled) |
{ |
// Setup log file and register the bus monitoring function |
345,11 → 344,10
cout << endl; |
} |
else |
// Couldn't open |
/* Couldn't open */ |
bus_trans_log_enabled = false; |
} |
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if (bus_trans_log_enabled) |
{ |
// Setup profiling function |
357,7 → 355,6
sensitive << clk.pos(); |
dont_initialize(); |
} |
*/ |
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} // Or1200MonitorSC () |
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837,7 → 834,7
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} |
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/* |
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void |
Or1200MonitorSC::busMonitor() |
{ |
912,7 → 909,7
return; |
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} // busMonitor () |
*/ |
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void |
Or1200MonitorSC::simPrintf(uint32_t stackaddr, uint32_t regparam) |
{ |
/src/OrpsocAccess.cpp
39,14 → 39,11
#include "Vorpsoc_top_or1200_sprs.h" |
#include "Vorpsoc_top_or1200_rf.h" |
#include "Vorpsoc_top_or1200_dpram.h" |
// Need RAM instantiation has parameters after module name |
// Includes for wb_ram |
//#include "Vorpsoc_top_ram_wb__D20_A19_M800000.h" |
//#include "Vorpsoc_top_ram_wb_sc_sw__D20_A19_M800000.h" |
// Include for wb_ram_b3 |
#include "Vorpsoc_top_wb_ram_b3__D20_A19_M800000.h" |
// Bus arbiter include - but is for old arbiter, no longer used |
//#include "Vorpsoc_top_wb_conbus_top__pi1.h" |
//#include "Vorpsoc_top_ram_wb.h" |
//#include "Vorpsoc_top_ram_wb_sc_sw.h" |
#include "Vorpsoc_top_ram_wb__D20_A19_M800000.h" |
#include "Vorpsoc_top_ram_wb_sc_sw__D20_A19_M800000.h" |
#include "Vorpsoc_top_wb_conbus_top__pi1.h" |
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//! Constructor for the ORPSoC access class |
|
63,11 → 60,9
or1200_sprs = orpsoc_top->v->i_or1k->i_or1200_top->or1200_cpu->or1200_sprs; |
rf_a = orpsoc_top->v->i_or1k->i_or1200_top->or1200_cpu->or1200_rf->rf_a; |
// Assign main memory accessor objects |
// For old ram_wb: ram_wb_sc_sw = orpsoc_top->v->ram_wb0->ram0; |
ram_wb_sc_sw = orpsoc_top->v->ram_wb0; |
|
ram_wb_sc_sw = orpsoc_top->v->ram_wb0->ram0; |
// Assign arbiter accessor object |
//wb_arbiter = orpsoc_top->v->wb_conbus; |
wb_arbiter = orpsoc_top->v->wb_conbus; |
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} // OrpsocAccess () |
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329,7 → 324,7
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} // getSprEsr () |
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/* |
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//! Access for the arbiter's grant signal |
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//! @return The value of the wb_conmax_top.arb signal |
455,4 → 450,3
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} // getWbArbMastErrO () |
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*/ |
/include/Or1200MonitorSC.h
79,7 → 79,7
void memdump(); |
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// Method used for monitoring and logging transactions on the system bus |
//void busMonitor(); |
void busMonitor(); |
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// Method to do simulator assisted printf'ing |
void simPrintf(uint32_t stackaddr, uint32_t regparam); |
/include/OrpsocAccess.h
38,10 → 38,8
class Vorpsoc_top_or1200_except; |
class Vorpsoc_top_or1200_sprs; |
class Vorpsoc_top_or1200_dpram; |
// Main memory access class - will change if main memory size or other |
// parameters change |
//Old ram_wbclass: class Vorpsoc_top_ram_wb_sc_sw__D20_A19_M800000; |
class Vorpsoc_top_wb_ram_b3__D20_A19_M800000; |
// Main memory access class - will change if main memory size or other parameters change |
class Vorpsoc_top_ram_wb_sc_sw__D20_A19_M800000; |
// SoC Arbiter class - will also change if any modifications to bus architecture |
class Vorpsoc_top_wb_conbus_top__pi1; |
|
85,7 → 83,7
void set_mem32 (uint32_t addr, uint32_t data); |
// Trigger a $readmemh for the RAM array |
void do_ram_readmemh (void); |
/* |
|
// Arbiter access functions |
uint8_t getWbArbGrant (); |
// Master Signal Access functions |
99,7 → 97,7
bool getWbArbMastStbI (uint32_t mast_num); |
bool getWbArbMastAckO (uint32_t mast_num); |
bool getWbArbMastErrO (uint32_t mast_num); |
*/ |
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private: |
109,9 → 107,9
Vorpsoc_top_or1200_except *or1200_except; |
Vorpsoc_top_or1200_sprs *or1200_sprs; |
Vorpsoc_top_or1200_dpram *rf_a; |
/*Vorpsoc_top_ram_wb_sc_sw*//*Vorpsoc_top_ram_wb_sc_sw__D20_A19_M800000*/ Vorpsoc_top_wb_ram_b3__D20_A19_M800000 *ram_wb_sc_sw; |
/*Vorpsoc_top_ram_wb_sc_sw*/Vorpsoc_top_ram_wb_sc_sw__D20_A19_M800000 *ram_wb_sc_sw; |
// Arbiter |
//Vorpsoc_top_wb_conbus_top__pi1 *wb_arbiter; |
Vorpsoc_top_wb_conbus_top__pi1 *wb_arbiter; |
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}; // OrpsocAccess () |
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