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URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

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  • This comparison shows the changes necessary to convert path 
    /openrisc/trunk/orpsocv2/bench/sysc
    from Rev 44 to Rev 49
    ↔ Reverse comparison
  •

Rev 44 → Rev 49

/include/Or1200MonitorSC.h
51,23 → 51,30
 
// Constructor
Or1200MonitorSC (sc_core::sc_module_name name,
OrpsocAccess *_accessor);
OrpsocAccess *_accessor,
int argc,
char *argv[]);
 
// Method to check instructions
void checkInstruction();
 
// Methods to setup and output state of processor to a file
void init_displayState(int argc,char *argv[]);
void displayState();
 
// Function to calculate performance of the sim
void perfSummary();
 
// Print out the command-line switches for this module's options
void printSwitches();
 
// Print out the usage for each option
void printUsage();
 
// The ports
sc_in<bool> clk;
 
private:
 
// Function to calculate performance of the sim
void perfSummary();
 
// Special NOP instructions
static const uint32_t NOP_NOP = 0x15000000; //!< Normal nop instruction
static const uint32_t NOP_EXIT = 0x15000001; //!< End of simulation
/include/TraceSC.h
33,6 → 33,7
 
#include "Vorpsoc_top.h"
 
 
#if VM_TRACE
#include <SpTraceVcdC.h>
#endif
57,8 → 58,13
// Method to drive the trace
void driveTrace();
 
// VCD dump controling vars
int dump_start_delay, dump_stop_set;
int dumping_now;
sc_time dump_start,dump_stop;
/* The port */
sc_in<bool> clk;
//sc_in<bool> clk;
 
private:
 
65,6 → 71,7
//! The ORPSoC module we are tracing
Vorpsoc_top *traceTarget;
 
 
#if VM_TRACE
//! The System Perl Trace file
SpTraceVcdCFile *spTraceFile;
/include/OrpsocAccess.h
55,7 → 55,9
// Accessor functions
bool getWbFreeze ();
uint32_t getWbInsn ();
uint32_t getIdInsn ();
uint32_t getWbPC ();
uint32_t getIdPC ();
bool getExceptFlushpipe ();
bool getExDslot ();
// Get a specific GPR from the register file
/src/Or1200MonitorSC.cpp
45,25 → 45,96
//! @param[in] accessor Accessor class for this Verilated ORPSoC model
 
Or1200MonitorSC::Or1200MonitorSC (sc_core::sc_module_name name,
OrpsocAccess *_accessor) :
OrpsocAccess *_accessor,
int argc,
char *argv[]) :
sc_module (name),
accessor (_accessor)
{
SC_METHOD (checkInstruction);
 
// If not -log option, then don't log
string logfileDefault("vlt-executed.log");
string logfileNameString;
 
exit_perf_summary_enabled = 1; // Simulation exit performance summary is
// on by default. Turn off with "-q" on the cmd line
 
// Parse the command line options
int cmdline_name_found=0;
if (argc > 1)
{
// Search through the command line parameters for the "-log" option
for(int i=1; i < argc; i++)
{
if ((strcmp(argv[i], "-l")==0) ||
(strcmp(argv[i], "--log")==0))
{
logfileNameString = (argv[i+1]);
cmdline_name_found=1;
break;
}
}
// Search through the command line parameters for the "-q","--no-perf-summary" option
for(int i=1; i < argc; i++)
{
if ((strcmp(argv[i], "-q")==0) ||
(strcmp(argv[i], "--quiet")==0))
{
exit_perf_summary_enabled = 0;
break;
}
}
}
 
if(cmdline_name_found==1) // No -log option specified so don't turn on logging
{
 
logging_enabled = 0; // Default is logging disabled
statusFile.open(logfileNameString.c_str(), ios::out ); // open file to write to it
 
if(statusFile.is_open())
{
// If we could open the file then turn on logging
logging_enabled = 1;
cout << "* Processor execution logged to file: " << logfileNameString << endl;
}
}
 
SC_METHOD (displayState);
sensitive << clk.pos();
dont_initialize();
start = clock();
 
SC_METHOD (displayState);
logging_enabled = 0; // Default is logging disabled
exit_perf_summary_enabled = 1; // Simulation exit performance summary is on by default. Turn off with "-q" on the cmd line
// checkInstruction monitors the bus for special NOP instructionsl
SC_METHOD (checkInstruction);
sensitive << clk.pos();
dont_initialize();
 
start = clock();
} // Or1200MonitorSC ()
 
//! Print command line switches for the options of this module
void
Or1200MonitorSC::printSwitches()
{
printf(" [-l <file>] [-q]");
}
 
//! Print usage for the options of this module
void
Or1200MonitorSC::printUsage()
{
printf(" -l, --log\t\tLog processor execution to file\n");
printf(" -q, --quiet\t\tDisable the performance summary at end of simulation\n");
}
 
//! Method to handle special instrutions
 
//! These are l.nop instructions with constant values. At present the
73,7 → 144,7
//! - l.nop 2 Report the value in R3
//! - l.nop 3 Printf the string with the arguments in R3, etc
//! - l.nop 4 Print a character
 
extern int SIM_RUNNING;
void
Or1200MonitorSC::checkInstruction()
{
91,8 → 162,9
ts = sc_time_stamp().to_seconds() * 1000000000.0;
std::cout << std::fixed << std::setprecision (2) << ts;
std::cout << " ns: Exiting (" << r3 << ")" << std::endl;
if (exit_perf_summary_enabled) perfSummary();
perfSummary();
if (logging_enabled != 0) statusFile.close();
SIM_RUNNING=0;
sc_stop();
break;
 
121,65 → 193,12
 
} // checkInstruction()
 
//! Method to setup the files for outputting the state of the processor
 
//! This function will setup the output file, if enabled.
 
void
Or1200MonitorSC::init_displayState(int argc, char *argv[])
{
 
string logfileDefault("vlt-executed.log");
string logfileNameString;
 
// Parse the command line options
int cmdline_name_found=0;
if (argc > 1)
{
// Search through the command line parameters for the "-log" option
for(int i=1; i < argc; i++)
{
if (strcmp(argv[i], "-log")==0)
{
logfileNameString = (argv[i+1]);
cmdline_name_found=1;
break;
}
}
// Search through the command line parameters for the "-q","--no-perf-summary" option
for(int i=1; i < argc; i++)
{
if ((strcmp(argv[i], "-q")==0)||(strcmp(argv[i], "--no-perf-summary")==0))
{
exit_perf_summary_enabled = 0;
break;
}
}
 
}
 
if(cmdline_name_found==0) // No -log option specified so don't turn on logging
return;
 
statusFile.open(logfileNameString.c_str(), ios::out ); // open file to write to it
 
if(statusFile.is_open())
{
// If we could open the file then turn on logging
logging_enabled = 1;
cout << "Processor execution logged to file: " << logfileNameString << endl;
}
 
return;
 
}
 
//! Method to output the state of the processor
 
//! This function will output to a file, if enabled, the status of the processor
//! For now, it's just the PPC and instruction.
 
#define PRINT_REGS 0
void
Or1200MonitorSC::displayState()
{
198,10 → 217,10
{
// Print PC, instruction
statusFile << "\nEXECUTED("<< std::setfill(' ') << std::setw(11) << dec << insn_count << "): " << std::setfill('0') << hex << std::setw(8) << accessor->getWbPC() << ": " << hex << accessor->getWbInsn() << endl;
 
#if PRINT_REGS
// Print general purpose register contents
for (int i=0; i<32; i++)
{
{
if ((i%4 == 0)&&(i>0)) statusFile << endl;
statusFile << std::setfill('0');
statusFile << "GPR" << dec << std::setw(2) << i << ": " << hex << std::setw(8) << (uint32_t) accessor->getGpr(i) << " ";
212,6 → 231,7
statusFile << "EPCR0: " << hex << std::setw(8) << (uint32_t) accessor->getSprEpcr() << " ";
statusFile << "EEAR0: " << hex << std::setw(8) << (uint32_t) accessor->getSprEear() << " ";
statusFile << "ESR0 : " << hex << std::setw(8) << (uint32_t) accessor->getSprEsr() << endl;
#endif
 
}
 
223,18 → 243,22
void
Or1200MonitorSC::perfSummary()
{
double ts;
ts = sc_time_stamp().to_seconds() * 1000000000.0;
int cycles = ts / (BENCH_CLK_HALFPERIOD*2); // Number of clock cycles we had
if (exit_perf_summary_enabled)
{
double ts;
ts = sc_time_stamp().to_seconds() * 1000000000.0;
int cycles = ts / (BENCH_CLK_HALFPERIOD*2); // Number of clock cycles we had
clock_t finish = clock();
double elapsed_time = (double(finish)-double(start))/CLOCKS_PER_SEC;
// It took elapsed_time seconds to do insn_count instructions. Divide insn_count by the time to get instructions/second.
double ips = (insn_count/elapsed_time);
double mips = (insn_count/elapsed_time)/1000000;
int hertz = (int) ((cycles/elapsed_time)/1000);
std::cout << "* Or1200Monitor: simulated " << sc_time_stamp() << ",time elapsed: " << elapsed_time << " seconds" << endl;
std::cout << "* Or1200Monitor: simulated " << dec << cycles << " clock cycles, executed at approx " << hertz << "kHz" << endl;
std::cout << "* Or1200Monitor: simulated " << insn_count << " instructions, insn/sec. = " << ips << ", mips = " << mips << endl;
}
return;
} // perfSummary
 
clock_t finish = clock();
double elapsed_time = (double(finish)-double(start))/CLOCKS_PER_SEC;
// It took elapsed_time seconds to do insn_count instructions. Divide insn_count by the time to get instructions/second.
double ips = (insn_count/elapsed_time);
double mips = (insn_count/elapsed_time)/1000000;
std::cout << "Or1200Monitor: real time elapsed: " << elapsed_time << " seconds" << endl;
std::cout << "Or1200Monitor: simulated " << dec << cycles << " clock cycles, executed " << insn_count << " instructions" << endl;
std::cout << "Or1200Monitor: simulated insn/sec = " << ips << ", simulator mips = " << mips << endl;
return;
} // calculateMips()
 
/src/Modules.make
26,8 → 26,13
# Tools and flags
ARFLAGS = rcs
#CXXFLAGS += $(OPT_FAST) $(OPT_SLOW) $(OPT) $(PROF_FLAGS)
 
ifdef VLT_CPPFLAGS
CXXFLAGS += $(VLT_CPPFLAGS)
endif
 
CXX ?= g++
PROF_OPTS ?= -fbranch-probabilities -fvpt -funroll-loops -fpeel-loops -ftracer
#PROF_OPTS ?= -fbranch-probabilities -fvpt -funroll-loops -fpeel-loops -ftracer -O3
OPT_ALL ?= $(OPT_SLOW) $(OPT_FAST) $(OPT)
 
# Sub-directories
40,6 → 45,10
UartSC.o
LIB = libmodules.a
 
ifdef VLT_DEBUG
CXXFLAGS += -g
endif
 
# -----------------------------------------------------------------------------
# Rule to make dependency files
%.d: %.cpp
50,7 → 59,7
 
# Rule to make object files
%.o: %.cpp
$(CXX) $(CPPFLAGS) $(INCDIRS) $(CXXFLAGS) -c $<
$(CXX) $(CPPFLAGS) $(PROF_OPTS) $(INCDIRS) $(CXXFLAGS) -c $<
 
 
# -----------------------------------------------------------------------------
/src/TraceSC.cpp
27,9 → 27,12
// $Id: TraceSC.cpp 302 2009-02-13 17:22:07Z jeremy $
 
#include "TraceSC.h"
#include <systemc.h>
 
using namespace std;
 
#define DEBUG_TRACESC 1
 
SC_HAS_PROCESS( TraceSC );
 
//! Constructor for the trace module
52,31 → 55,62
string testNameString;
string vcdDumpFile;
 
// Search through the command line parameters for the "-vcd" option
// Search through the command line parameters for VCD dump options
dump_start_delay = 0;
dump_stop_set = 0;
int time_val;
int cmdline_name_found=0;
if (argc > 1)
{
for(int i=1; i<argc; i++)
{
if (strcmp(argv[i], "-vcd")==0)
if ((strcmp(argv[i], "-vcd")==0) ||
(strcmp(argv[i], "--vcd")==0))
{
testNameString = (argv[i+1]);
vcdDumpFile = testNameString;
cmdline_name_found=1;
}
else if ( (strcmp(argv[i], "-vcdstart")==0) ||
(strcmp(argv[i], "--vcdstart")==0) )
{
time_val = atoi(argv[i+1]);
sc_time dump_start_time(time_val,SC_NS);
dump_start = dump_start_time;
if (DEBUG_TRACESC) cout << "TraceSC(): Dump start time set at " << dump_start.to_string() << endl;
dump_start_delay = 1;
break;
}
else if ( (strcmp(argv[i], "-vcdstop")==0) ||
(strcmp(argv[i], "--vcdstop")==0) )
{
time_val = atoi(argv[i+1]);
sc_time dump_stop_time(time_val,SC_NS);
dump_stop = dump_stop_time;
if (DEBUG_TRACESC) cout << "TraceSC(): Dump stop time set at " << dump_stop.to_string() << endl;
dump_stop_set = 1;
break;
}
}
}
 
if(cmdline_name_found==0) // otherwise use our default VCD dump file name
vcdDumpFile = dumpNameDefault;
Verilated::traceEverOn (true);
cout << "Enabling VCD trace" << endl;
cout << "* Enabling VCD trace";
if (dump_start_delay)
cout << ", on at time " << dump_start.to_string();
if (dump_stop_set)
cout << ", off at time " << dump_stop.to_string();
cout << endl;
 
printf("VCD dumpfile: %s\n", vcdDumpFile.c_str());
 
printf("* VCD dumpfile: %s\n", vcdDumpFile.c_str());
 
// Establish a new trace with its correct time resolution, and trace to
// great depth.
spTraceFile = new SpTraceVcdCFile ();
84,9 → 118,15
traceTarget->trace (spTraceFile, 99);
spTraceFile->open (vcdDumpFile.c_str());
 
if (dump_start_delay == 1)
dumping_now = 0; // We'll wait for the time to dump
else
dumping_now = 1; // Begin with dumping turned on
 
 
// Method to drive the dump on each clock edge
SC_METHOD (driveTrace);
sensitive << clk;
//SC_METHOD (driveTrace);
//sensitive << clk;
#endif
106,13 → 146,40
} // ~TraceSC ()
 
 
//! Method to drive the trace. We're called on ever clock edge, and also at
//! Method to drive the trace. We're called on every clock edge, and also at
//! initialization (to get initial values into the dump).
void
TraceSC::driveTrace()
{
#if VM_TRACE
spTraceFile->dump (sc_time_stamp().to_double());
 
if (DEBUG_TRACESC) cout << "TraceSC(): " << endl;
if (dumping_now == 0)
{
// Check the time, see if we should enable dumping
if (sc_time_stamp() >= dump_start)
{
// Give a message
cout << "* VCD tracing turned on at time " << dump_start.to_string() << endl;
dumping_now = 1;
}
}
 
if (dumping_now == 1)
spTraceFile->dump (sc_time_stamp().to_double());
 
// Should we turn off tracing?
if ((dumping_now == 1) && (dump_stop_set == 1))
{
if (sc_time_stamp() >= dump_stop)
{
// Give a message
cout << "* VCD tracing turned off at time " << dump_stop.to_string() << endl;
dumping_now = 0; // Turn off the dump
}
}
 
#endif
 
} // driveTrace()
135,7 → 202,7
 
if (secs < 1.0e-15)
{
cerr << "VCD time resolution " << secs << " too small: ignored" << endl;
cerr << "* VCD time resolution " << secs << " too small: ignored" << endl;
return;
}
else if (secs < 1.0e-12)
/src/OrpsocAccess.cpp
90,9 → 90,20
 
} // getExDslot ()
 
//! Access for the id_pc register
 
//! @return The value of the or1200_except.id_pc register
 
uint32_t
OrpsocAccess::getIdPC ()
{
return (or1200_except->get_id_pc) ();
 
} // getIdPC ()
 
//! Access for the wb_pc register
 
//! @return The value of the or1200_except.wb_insn register
//! @return The value of the or1200_except.wb_pc register
 
uint32_t
OrpsocAccess::getWbPC ()
112,7 → 123,17
 
} // getWbInsn ()
 
//! Access for the id_insn register
 
//! @return The value of the or1200_ctrl.wb_insn register
 
uint32_t
OrpsocAccess::getIdInsn ()
{
return (or1200_ctrl->get_id_insn) ();
 
} // getIdInsn ()
 
//! Access for the OR1200 GPRs
 
//! These are extracted from memory using the Verilog function
/src/OrpsocMain.cpp
45,16 → 45,22
 
#include "Vorpsoc_top.h"
#include "OrpsocAccess.h"
#include "TraceSC.h"
 
//#if VM_TRACE
//#include <systemc.h>
#include <SpTraceVcdC.h>
//#endif
 
//#include "TraceSC.h"
#include "ResetSC.h"
#include "Or1200MonitorSC.h"
#include "UartSC.h"
 
 
int SIM_RUNNING;
int sc_main (int argc,
char *argv[] )
{
 
sc_set_time_resolution( 1, TIMESCALE_UNIT);
// CPU clock (also used as JTAG TCK) and reset (both active high and low)
sc_time clkPeriod (BENCH_CLK_HALFPERIOD * 2.0, TIMESCALE_UNIT);
 
83,13 → 89,30
sc_signal<bool> spi1_ss;
sc_signal<bool> spi1_sclk;
 
SIM_RUNNING = 0;
 
// Setup the name of the VCD dump file
int VCD_enabled = 0;
string dumpNameDefault("vlt-dump.vcd");
string testNameString;
string vcdDumpFile;
// VCD dump controling vars
int dump_start_delay, dump_stop_set;
int dumping_now;
int dump_depth = 99; // Default dump depth
sc_time dump_start,dump_stop, finish_time;
int finish_time_set = 0; // By default we will let the simulation finish naturally
SpTraceVcdCFile *spTraceFile;
int time_val;
int cmdline_name_found=0;
 
// Verilator accessor
OrpsocAccess *accessor;
 
// Modules
Vorpsoc_top *orpsoc; // Verilated ORPSoC
TraceSC *trace; // Drive VCD
//TraceSC *trace; // Drive VCD
ResetSC *reset; // Generate a RESET signal
Or1200MonitorSC *monitor; // Handle l.nop x instructions
97,14 → 120,117
 
// Instantiate the Verilator model, VCD trace handler and accessor
orpsoc = new Vorpsoc_top ("orpsoc");
trace = new TraceSC ("trace", orpsoc, argc, argv);
//trace = new TraceSC ("trace", orpsoc, argc, argv);
accessor = new OrpsocAccess (orpsoc);
// Instantiate the SystemC modules
reset = new ResetSC ("reset", BENCH_RESET_TIME);
monitor = new Or1200MonitorSC ("monitor", accessor);
monitor = new Or1200MonitorSC ("monitor", accessor, argc, argv);
uart = new UartSC("uart"); // TODO: Probalby some sort of param
 
 
// Parse command line options
// Default is for VCD generation OFF, only turned on if specified on command line
dump_start_delay = 0;
dump_stop_set = 0;
dumping_now = 0;
 
// Search through the command line parameters for options
if (argc > 1)
{
for(int i=1; i<argc; i++)
{
if ((strcmp(argv[i], "-d")==0) ||
(strcmp(argv[i], "--vcdfile")==0))
{
testNameString = (argv[i+1]);
vcdDumpFile = testNameString;
cmdline_name_found=1;
}
else if ((strcmp(argv[i], "-v")==0) ||
(strcmp(argv[i], "--vcdon")==0))
{
dumping_now = 1;
}
else if ( (strcmp(argv[i], "-e")==0) ||
(strcmp(argv[i], "--endtime")==0) )
{
time_val = atoi(argv[i+1]);
sc_time opt_end_time(time_val,TIMESCALE_UNIT);
finish_time = opt_end_time;
//if (DEBUG_TRACESC) cout << "* Commmand line opt: Sim. will end at " << finish_time.to_string() << endl;
finish_time_set = 1;
}
//#if VM_TRACE
else if ( (strcmp(argv[i], "-s")==0) ||
(strcmp(argv[i], "--vcdstart")==0) )
{
time_val = atoi(argv[i+1]);
sc_time dump_start_time(time_val,TIMESCALE_UNIT);
dump_start = dump_start_time;
//if (DEBUG_TRACESC) cout << "* Commmand line opt: Dump start time set at " << dump_start.to_string() << endl;
dump_start_delay = 1;
dumping_now = 0;
}
else if ( (strcmp(argv[i], "-t")==0) ||
(strcmp(argv[i], "--vcdstop")==0) )
{
time_val = atoi(argv[i+1]);
sc_time dump_stop_time(time_val,TIMESCALE_UNIT);
dump_stop = dump_stop_time;
//if (DEBUG_TRACESC) cout << "* Commmand line opt: Dump stop time set at " << dump_stop.to_string() << endl;
dump_stop_set = 1;
}
/* Depth setting of VCD doesn't appear to work, I think it's set during verilator script compile time */
/* else if ( (strcmp(argv[i], "-p")==0) ||
(strcmp(argv[i], "--vcddepth")==0) )
{
dump_depth = atoi(argv[i+1]);
//if (DEBUG_TRACESC) cout << "* Commmand line opt: Dump depth set to " << dump_depth << endl;
}*/
else if ( (strcmp(argv[i], "-h")==0) ||
(strcmp(argv[i], "--help")==0) )
{
printf("\n ORPSoC Cycle Accurate model usage:\n");
printf(" %s [-vh] [-d <file>] [-e <time>] [-s <time>] [-t <time>]",argv[0]);
monitor->printSwitches();
printf("\n\n");
printf(" -h, --help\t\tPrint this help message\n");
printf(" -e, --endtime\t\tStop the sim at this time (ns)\n");
printf(" -v, --vcdon\t\tEnable VCD generation\n");
printf(" -d, --vcdfile\t\tEnable and specify target VCD file name\n");
 
printf(" -s, --vcdstart\tEnable and delay VCD generation until this time (ns)\n");
printf(" -t, --vcdstop\t\tEnable and terminate VCD generation at this time (ns)\n");
monitor->printUsage();
printf("\n");
return 0;
}
}
}
 
if(cmdline_name_found==0) // otherwise use our default VCD dump file name
vcdDumpFile = dumpNameDefault;
// Determine if we're going to setup a VCD dump:
// Pretty much setting any option will enable VCD dumping.
if ((cmdline_name_found) || (dumping_now) || (dump_start_delay) || (dump_stop_set))
{
VCD_enabled = 1;
cout << "* Enabling VCD trace";
if (dump_start_delay)
cout << ", on at time " << dump_start.to_string();
if (dump_stop_set)
cout << ", off at time " << dump_stop.to_string();
cout << endl;
}
 
 
// Connect up ORPSoC
orpsoc->clk_pad_i (clk);
orpsoc->rst_pad_i (rstn);
131,11 → 257,10
 
orpsoc->gpio_a_pad_io (gpio_a); // GPIO bus - output only in
// verilator sims
 
// Connect up the VCD trace handler
trace->clk (clk); // Trace
 
//trace->clk (clk); // Trace
// Connect up the SystemC modules
reset->clk (clk); // Reset
reset->rst (rst);
154,18 → 279,124
spi_sd_miso = 0; // Tie off master-in/slave-out of SD SPI bus
 
spi1_miso = 0;
 
//#if VM_TRACE
if (VCD_enabled)
{
Verilated::traceEverOn (true);
printf("* VCD dumpfile: %s\n", vcdDumpFile.c_str());
// Establish a new trace with its correct time resolution, and trace to
// great depth.
spTraceFile = new SpTraceVcdCFile ();
//spTraceFile->spTrace()->set_time_resolution (sc_get_time_resolution());
//setSpTimeResolution (sc_get_time_resolution ());
//traceTarget->trace (spTraceFile, 99);
orpsoc->trace (spTraceFile, dump_depth);
if (dumping_now)
{
spTraceFile->open (vcdDumpFile.c_str());
}
//#endif
}
printf("Beginning test\n");
printf("* Beginning test\n");
 
// Init the UART function
uart->initUart(25000000, 115200);
 
// Turn on logging by setting the "-log logfilename" option on the command line
monitor->init_displayState(argc, argv);
SIM_RUNNING = 1;
 
// Execute until we stop
sc_start ();
// First check how we should run the sim.
if (VCD_enabled || finish_time_set)
{ // We'll run sim with step
if (!VCD_enabled && finish_time_set)
{
// We just run the sim until the set finish time
sc_start((double)(finish_time.to_double()), TIMESCALE_UNIT);
SIM_RUNNING=0;
sc_stop();
// Print performance summary
monitor->perfSummary();
}
else
{
if (dump_start_delay)
{
// Run the sim until we want to dump
sc_start((double)(dump_start.to_double()),TIMESCALE_UNIT);
// Open the trace file
spTraceFile->open (vcdDumpFile.c_str());
dumping_now = 1;
}
 
if (dumping_now)
{
// Step the sim and generate the trace
// Execute until we stop
while(!Verilated::gotFinish())
{
if (SIM_RUNNING) // Changed by Or1200MonitorSC when finish NOP
sc_start (1,TIMESCALE_UNIT); // Step the sim
else
{
spTraceFile->close();
break;
}
spTraceFile->dump (sc_time_stamp().to_double());
if (dump_stop_set)
{
if (sc_time_stamp() >= dump_stop)
{
// Close dump file
spTraceFile->close();
// Now continue on again until the end
if (!finish_time_set)
sc_start();
else
{
// Determine how long we should run for
sc_time sim_time_remaining =
finish_time - sc_time_stamp();
sc_start((double)(sim_time_remaining.to_double()),
TIMESCALE_UNIT);
// Officially stop the sim
sc_stop();
// Print performance summary
monitor->perfSummary();
}
break;
}
}
if (finish_time_set)
{
if (sc_time_stamp() >= finish_time)
{
// Officially stop the sim
sc_stop();
// Close dump file
spTraceFile->close();
// Print performance summary
monitor->perfSummary();
break;
}
}
}
}
}
}
else
{
// Simple run case
sc_start();
}
// Free memory
delete monitor;
delete reset;
172,7 → 403,7
 
delete accessor;
 
delete trace;
//delete trace;
delete orpsoc;
 
return 0;

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