URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
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- This comparison shows the changes necessary to convert path
/openrisc/trunk/orpsocv2/bench/sysc
- from Rev 63 to Rev 64
- ↔ Reverse comparison
Rev 63 → Rev 64
/include/jtagsc.h
File deleted
/include/JtagSC_includes.h
0,0 → 1,37
// ---------------------------------------------------------------------------- |
|
// Unified Header file for the Embecosm cycle accurate SystemC JTAG library |
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// Copyright (C) 2009 Embecosm Limited <info@embecosm.com> |
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// Contributor Jeremy Bennett <jeremy.bennett@embecosm.com> |
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// This file is part of the Embecosm cycle accurate SystemC JTAG library. |
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// This program is free software: you can redistribute it and/or modify it |
// under the terms of the GNU Lesser General Public License as published by |
// the Free Software Foundation, either version 3 of the License, or (at your |
// option) any later version. |
|
// This program is distributed in the hope that it will be useful, but WITHOUT |
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public |
// License for more details. |
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// You should have received a copy of the GNU Lesser General Public License |
// along with this program. If not, see <http://www.gnu.org/licenses/>. |
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// The C/C++ parts of this program are commented throughout in a fashion |
// suitable for processing with Doxygen. |
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// ---------------------------------------------------------------------------- |
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// $Id$ |
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#include "JtagSC.h" |
#include "TapActionDRScan.h" |
#include "TapAction.h" |
#include "TapActionIRScan.h" |
#include "TapActionReset.h" |
#include "TapStateMachine.h" |
/include/GdbServerSC.h
33,7 → 33,7
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#include "systemc" |
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#include "jtagsc.h" |
#include "JtagSC_includes.h" |
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#include "OrpsocAccess.h" |
#include "RspConnection.h" |
/include/DebugUnitSC.h
24,7 → 24,7
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// ---------------------------------------------------------------------------- |
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// $Id: DebugUnitSC.h 331 2009-03-12 17:01:48Z jeremy $ |
// $Id$ |
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#ifndef DEBUG_UNIT_SC__H |
#define DEBUG_UNIT_SC__H |
37,7 → 37,7
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#include "systemc" |
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#include "jtagsc.h" |
#include "JtagSC_includes.h" |
#include "OrpsocAccess.h" |
#include "SprCache.h" |
#include "MemCache.h" |
/include/Or1200MonitorSC.h
99,6 → 99,9
static const uint32_t NOP_PRINTF = 0x15000003; //!< Simprintf instruction |
static const uint32_t NOP_PUTC = 0x15000004; //!< Putc instruction |
static const uint32_t NOP_CNT_RESET = 0x15000005; //!< Reset statistics counters |
static const uint32_t NOP_CNT_RESET1 = 0x15000007; /* Reset statistics counter 1 */ |
static const uint32_t NOP_CNT_RESET2 = 0x15000008; /* Reset statistics counter 2 */ |
static const uint32_t NOP_CNT_RESET3 = 0x15000009; /* Reset statistics counter 3 */ |
static const uint32_t NOP_MEM_STATS_RESET = 0x15000010; //!< Reset memory statistics counters |
static const uint32_t NOP_CNT_RESET_DIFFERENCE = 0x15000006; //!< Reset stats counters, print |
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118,6 → 121,7
bool wait_for_stall_cmd_response; |
unsigned long long insn_count, insn_count_rst; |
unsigned long long cycle_count, cycle_count_rst; |
unsigned long long cycles_1, cycles_2, cycles_3; // Cycle counters for l.nop insns |
ofstream memdumpFile; |
string memdumpFileName; |
bool do_memdump; |
/include/JtagDriverSC.h
33,7 → 33,7
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#include "systemc" |
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#include "jtagsc.h" |
#include "JtagSC_includes.h" |
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//! Module providing TAP requests to JTAG |
/src/Modules.make
103,4 → 103,4
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# ----------------------------------------------------------------------------- |
# Include the dependency files |
include $(OBJS:.o=.d) |
# Comment out for now. include $(OBJS:.o=.d) |
/src/OrpsocMain.cpp
42,7 → 42,7
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#include "OrpsocMain.h" |
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#include "jtagsc.h" |
#include "JtagSC_includes.h" |
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#include "Vorpsoc_top.h" |
#include "OrpsocAccess.h" |
457,7 → 457,10
{ |
// Simple run case |
// Ideally a "l.nop 1" will terminate the simulation gracefully |
sc_start(); |
// Need to step at clock period / 4, otherwise model appears to skip the monitor and logging functions sometimes (?!?) |
while (SIM_RUNNING) |
sc_start(BENCH_CLK_HALFPERIOD / 2, TIMESCALE_UNIT); |
//sc_start(); |
} |
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/src/Or1200MonitorSC.cpp
456,6 → 456,19
std::cout << "****************** counters reset ******************" << endl; |
cycle_count_rst = cycle_count; |
insn_count_rst = insn_count; |
/* 3 separate counters we'll use for various things */ |
case NOP_CNT_RESET1: |
std::cout << "**** counter1 cycles: " << std::setfill('0') << std::setw(10) << cycle_count - cycles_1 << " resetting ********" << endl; |
cycles_1 = cycle_count; |
break; |
case NOP_CNT_RESET2: |
std::cout << "**** counter2 cycles: " << std::setfill('0') << std::setw(10) << cycle_count - cycles_2 << " resetting ********" << endl; |
cycles_2 = cycle_count; |
break; |
case NOP_CNT_RESET3: |
std::cout << "**** counter3 cycles: " << std::setfill('0') << std::setw(10) << cycle_count - cycles_3 << " resetting ********" << endl; |
cycles_3 = cycle_count; |
break; |
default: |
break; |
} |