URL
https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
Subversion Repositories openrisc_me
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- This comparison shows the changes necessary to convert path
/openrisc/trunk/orpsocv2/bench/verilog/vpi/verilog
- from Rev 49 to Rev 397
- ↔ Reverse comparison
Rev 49 → Rev 397
/vpi_debug_defines.v
198,7 → 198,7
`define CMD_RESET 4'hb |
`define CMD_READ_JTAG_ID 4'hc |
`define CMD_GDB_DETACH 4'hd |
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`define CMD_WB_RD8 4'he /* Byte read is useful with a system with byte peripherals! */ |
// commands: |
// 4'h1 jtag set instruction register (input: instruction value) |
// 4'h2 set debug chain (dbg_set_command here) (input: chain value) |
/vpi_debug_module.v
58,6 → 58,7
reg tdi; |
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reg [31:0] in_data_le, in_data_be; |
reg [31:0] incoming_word; |
reg err; |
integer i; |
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114,7 → 115,7
// (this is around 20k ns if the flash_crash boot code |
// is being booted from, else much bigger, around 10mil ns) |
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#200_000 main; |
#2_000 main; |
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end |
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193,7 → 194,7
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debug_cpu_rd_ctrl(cpu_ctrl_val); |
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$return_command_data(cpu_ctrl_val); |
$return_command_data(4,cpu_ctrl_val); |
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end |
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287,9 → 288,20
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wb_read_32(cmd_data, cmd_adr, 16'h3); |
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$return_command_data(cmd_data); |
$return_command_data(4,cmd_data); |
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end |
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`CMD_WB_RD8 : |
begin |
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$get_command_address(cmd_adr); |
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wb_read_8(cmd_data, cmd_adr, 16'h0); |
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$return_command_data(1,cmd_data); |
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end |
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`CMD_WB_BLOCK_WR32 : |
begin |
322,7 → 334,7
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read_id_code(id); |
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$return_command_data(id); |
$return_command_data(4,id); |
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end |
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329,7 → 341,7
`CMD_GDB_DETACH : |
begin |
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$display("Debugging client disconnected. Finishing simulation"); |
$display("(%t)(%m)Debugging client disconnected. Finishing simulation", $time); |
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$finish(); |
694,9 → 706,27
if (length>3) |
$display("WARNING: Only first data word is stored for writting ( See module %m)"); |
end |
endtask |
endtask // wb_read_32 |
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// 8-bit read from the wishbone |
task wb_read_8; |
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output [31:0] data; |
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input [`DBG_WB_ADR_LEN -1:0] addr; |
input [`DBG_WB_LEN_LEN -1:0] length; |
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begin |
debug_wishbone_wr_comm(`DBG_WB_READ8, addr, length, 1'b0); |
last_wb_cmd = `DBG_WB_READ8; last_wb_cmd_text = "DBG_WB_READ8"; |
length_global = length + 1; |
debug_wishbone_go(1'b1, 1'b0); |
data = data_storage[0]; |
end |
endtask // wb_read_8 |
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// block 32-bit read from the wishbone |
// assumes data will be stored into data_storage[] |
task wb_block_read_32; |
991,16 → 1021,27
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gen_clk(1); |
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if (i[4:0] == 31) // Latching data |
if (i[2:0] == 7) // Latching data |
incoming_word = {incoming_word[23:0],in_data_be[7:0]}; |
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if (i[4:0] == 31) |
begin |
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data_storage[word_pointer] = in_data_be; |
data_storage[word_pointer] = incoming_word; |
`ifdef DEBUG_INFO |
$display("\t\tin_data_be = 0x%x", in_data_be); |
$display("\t\tin_data_be = 0x%x", incoming_word); |
`endif |
word_pointer = word_pointer + 1; |
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end |
end // for (i=0; i<(length_global<<3); i=i+1) |
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// Copy in any leftovers |
if (length_global[1:0] != 0) |
begin |
data_storage[word_pointer] = incoming_word; |
`ifdef DEBUG_INFO |
$display("\t\tin_data_be = 0x%x", incoming_word); |
`endif |
end |
end |
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