URL
https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
Subversion Repositories openrisc_me
Compare Revisions
- This comparison shows the changes necessary to convert path
/openrisc/trunk/orpsocv2/bench/verilog/vpi/verilog
- from Rev 46 to Rev 49
- ↔ Reverse comparison
Rev 46 → Rev 49
/vpi_debug_module.v
201,15 → 201,24
begin |
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$get_command_address(cmd_adr); |
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$get_command_data(block_cmd_length); |
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$get_command_block_data(block_cmd_length, data_storage); |
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$get_command_data(cmd_data); |
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if (block_cmd_length > 4) |
cpu_write_block(cmd_adr, block_cmd_length); |
else |
begin |
cmd_data = data_storage[0]; // Get the single word we'll write |
cpu_write_32(cmd_data, cmd_adr,16'h3); |
`ifdef VPI_DEBUG_INFO |
$display("CPU reg write. adr: 0x%x (reg group: %d reg#: %d), val: 0x%x", |
cmd_adr,cmd_adr[15:11], cmd_adr[10:0], cmd_data); |
`endif |
end |
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cpu_write_32(cmd_data, cmd_adr,16'h3); |
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end |
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218,15 → 227,27
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$get_command_address(cmd_adr); |
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cpu_read_32(cmd_data, cmd_adr, 16'h3); |
$get_command_data(block_cmd_length); // Added 090901 --jb |
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/* Depending on size, issue a block or single read */ |
if (block_cmd_length > 4 ) |
cpu_read_block(cmd_adr, block_cmd_length); |
else |
cpu_read_32(cmd_data, cmd_adr, 16'h3); |
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`ifdef VPI_DEBUG_INFO |
$display("CPU reg read. adr: 0x%x (reg group: %d reg#: %d), val: 0x%x", |
cmd_adr,cmd_adr[15:11], cmd_adr[10:0], cmd_data); |
if (cmd_size > 4 ) |
$display("CPU reg read. block adr: 0x%x (reg group: %d reg#: %d), num: %d", |
cmd_adr,cmd_adr[15:11], cmd_adr[10:0], block_cmd_length); |
else |
$display("CPU reg read. adr: 0x%x (reg group: %d reg#: %d), val: 0x%x", |
cmd_adr,cmd_adr[15:11], cmd_adr[10:0], cmd_data); |
`endif |
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$return_command_data(cmd_data); |
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$return_command_block_data(block_cmd_length, data_storage); |
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end |
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`CMD_WB_WR : |
1255,8 → 1276,32
end |
endtask |
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// block of 32-bit reads from cpu |
task cpu_read_block; |
//output [31:0] data; |
input [`DBG_WB_ADR_LEN -1:0] addr; |
input [`DBG_WB_LEN_LEN -1:0] length; |
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reg [31:0] tmp; |
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begin |
debug_cpu_wr_comm(`DBG_CPU_READ, addr, length-1, 1'b0); |
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last_cpu_cmd = `DBG_CPU_READ; last_cpu_cmd_text = "DBG_CPU_READ"; |
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length_global = length; |
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debug_cpu_go(1'b0, 1'b0); |
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//data = data_storage[0]; |
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//if (length>3) |
// $display("WARNING: Only first data word is returned( See module %m.)"); |
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end |
endtask |
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// 32-bit write to cpu |
task cpu_write_32; |
input [31:0] data; |
1276,8 → 1321,24
end |
endtask |
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// block of 32-bit writes to cpu |
// Data will already be in data_storage |
task cpu_write_block; |
//input [31:0] data; |
input [`DBG_WB_ADR_LEN -1:0] addr; |
input [`DBG_WB_LEN_LEN -1:0] length; |
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reg [31:0] tmp; |
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begin |
debug_cpu_wr_comm(`DBG_CPU_WRITE, addr, length-1, 1'b0); |
last_cpu_cmd = `DBG_CPU_WRITE; last_cpu_cmd_text = "DBG_CPU_WRITE"; |
length_global = length; |
debug_cpu_go(1'b0, 1'b0); |
end |
endtask |
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task debug_cpu_wr_comm; |
input [`DBG_CPU_ACC_TYPE_LEN -1:0] acc_type; |
input [`DBG_CPU_ADR_LEN -1:0] addr; |