URL
https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
Subversion Repositories openrisc_me
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- This comparison shows the changes necessary to convert path
/openrisc/trunk/orpsocv2/bench/verilog
- from Rev 456 to Rev 468
- ↔ Reverse comparison
Rev 456 → Rev 468
/or1200_monitor.v
456,7 → 456,7
get_gpr(3, r3); |
$fdisplay(fgeneral, "%t: l.nop exit (%h)", $time, r3); |
`ifdef OR1200_MONITOR_VERBOSE_NOPS |
$display("%t: l.nop exit (%h)", $time, r3); |
$display("exit(%h)",r3); |
`endif |
$finish; |
end |
467,9 → 467,9
// simulation reports (l.nop 2) |
if (`OR1200_TOP.`CPU_cpu.`CPU_ctrl.wb_insn == 32'h1500_0002) begin |
get_gpr(3, r3); |
$fdisplay(fgeneral, "%t: l.nop report (%h)", $time, r3); |
$fdisplay(fgeneral, "%t: l.nop report (0x%h)", $time, r3); |
`ifdef OR1200_MONITOR_VERBOSE_NOPS |
$display("%t: l.nop report (%h)", $time, r3); |
$display("report (0x%h);", r3); |
`endif |
end |
// simulation printfs (l.nop 3) |
503,7 → 503,7
input [31:0] addr; |
output [31:0] insn; |
begin |
insn = `RAM_WB_TOP.get_mem(addr); |
insn = `RAM_WB_TOP.get_mem32(addr); |
end |
endtask // get_insn_from_wb_ram |
`endif |