OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

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  • This comparison shows the changes necessary to convert path
    /openrisc/trunk/orpsocv2/boards/xilinx/atlys/syn
    from Rev 634 to Rev 638
    Reverse comparison

Rev 634 → Rev 638

/xst/bin/Makefile
158,7 → 158,6
# Generate coregen cores
coregen:
$(Q)echo; echo "#### Running CORE Gen ####"; echo
$(Q)(. $(XILINX_SETTINGS_SCRIPT))
$(Q)$(shell cp $(COREGEN_XCO_FILES) .)
$(Q)$(shell cp $(COREGEN_CGP_FILE) .)
$(Q)for file in $(COREGEN_XCO_FILES); do \
168,7 → 167,7
# XST command
$(NGC_FILE): $(PRJ_FILE) $(XST_FILE) $(XCF_FILE) $(GENERATED_DEFINES) coregen
$(Q)echo; echo "\t#### Running XST ####"; echo;
$(Q)(. $(XILINX_SETTINGS_SCRIPT) ; xst -ifn $(XST_FILE) $(XILINX_FLAGS) $(XST_FLAGS) )
$(Q)xst -ifn $(XST_FILE) $(XILINX_FLAGS) $(XST_FLAGS)
$(Q)echo
 
netlist: $(NETLIST_FILE)
176,8 → 175,7
# Netlist generation command
$(NETLIST_FILE): $(NGC_FILE)
$(Q)echo; echo "\t#### Generating verilog netlist ####"; echo;
$(Q)(. $(XILINX_SETTINGS_SCRIPT) ; \
netgen -sim -aka -dir . -ofmt verilog $< -w $@ )
$(Q)netgen -sim -aka -dir . -ofmt verilog $< -w $@
 
 
clean:

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