URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
Compare Revisions
- This comparison shows the changes necessary to convert path
/openrisc/trunk/orpsocv2/boards/xilinx/ml501/sw
- from Rev 439 to Rev 468
- ↔ Reverse comparison
Rev 439 → Rev 468
/bootrom/Makefile
14,10 → 14,10
bootrom.v: $(SW_ROOT)/bootrom/bootrom.v |
$(Q)cp -v $< . |
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export BOARD_PATH |
# Export BOARD so the Make script in the root software path knows we're to |
# use our board.h file, not theirs. |
export BOARD |
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# Pass BOARD_PATH so the Make script in the root software path knows we're to |
# use our board.h file, not theirs. |
$(SW_ROOT)/bootrom/bootrom.v: |
$(Q)$(MAKE) -C $(SW_ROOT)/bootrom bootrom.v |
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/Makefile.inc
9,10 → 9,10
SW_ROOT=$(BOARD_SW_ROOT)/$(PROJ_ROOT)/sw |
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# Set the BOARD_PATH to point to the root of this board build |
BOARD_PATH=$(shell pwd)/$(BOARD_SW_ROOT)/.. |
BOARD=xilinx/ml501 |
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# Set RTL_VERILOG_INCLUDE_DIR so software |
RTL_VERILOG_INCLUDE_DIR=$(BOARD_PATH)/rtl/verilog/include |
RTL_VERILOG_INCLUDE_DIR=$(shell pwd)/$(BOARD_SW_ROOT)/../rtl/verilog/include |
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# Set the processor capability flags |
# This doesn't work! :-( Need to figure out way to set these and have them |
/board/include/board.h
10,8 → 10,8
// file, which is compiled and converted into Verilog for inclusion at |
// synthesis time. See bootloader/bootloader.S for details on each option. |
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//#define BOOTROM_SPI_FLASH |
#define BOOTROM_GOTO_RESET |
#define BOOTROM_SPI_FLASH |
//#define BOOTROM_GOTO_RESET |
//#define BOOTROM_LOOP_AT_ZERO |
//#define BOOTROM_LOOP_IN_ROM |
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