URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
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- This comparison shows the changes necessary to convert path
/openrisc/trunk/orpsocv2/boards/xilinx
- from Rev 542 to Rev 560
- ↔ Reverse comparison
Rev 542 → Rev 560
/ml501/Makefile.inc
22,10 → 22,10
ifeq ($(XILINX_PATH),) |
$(error XILINX_PATH environment variable not set. Set it and rerun) |
endif |
XILINX_SETTINGS_SCRIPT=$(XILINX_PATH)/settings32.sh |
XILINX_SETTINGS_SCRIPT=$(XILINX_PATH)/ISE/settings32.sh |
XILINX_SETTINGS_SCRIPT_EXISTS=$(shell if [ -e $(XILINX_SETTINGS_SCRIPT) ]; then echo 1; else echo 0; fi) |
ifeq ($(XILINX_SETTINGS_SCRIPT_EXISTS),0) |
$(error XILINX_PATH variable not set correctly. Cannot find $$XILINX_PATH/settings32.sh) |
$(error XILINX_PATH variable not set correctly. Cannot find $(XILINX_SETTINGS_SCRIPT)) |
endif |
|
# Backend directories |
36,7 → 36,7
# Technology backend (vendor-specific) |
TECHNOLOGY_BACKEND_DIR=$(BOARD_ROOT)/../backend |
# This path is for the technology library |
TECHNOLOGY_LIBRARY_VERILOG_DIR=$(XILINX_PATH)/verilog |
TECHNOLOGY_LIBRARY_VERILOG_DIR=$(XILINX_PATH)/ISE/verilog |
|
# Bootrom setup |
# BootROM code, which generates a verilog array select values |
/ml501/backend/par/bin/Makefile
124,7 → 124,7
|
#this target downloads the bitstream to the target fpga |
download: $(BIT_FILE) $(BATCH_FILE) |
$(Q)( . ${XILINX_PATH}/settings32.sh && \ |
$(Q)( . $(XILINX_SETTINGS_SCRIPT) && \ |
impact -batch $(BATCH_FILE) ) |
|
#This target uses netgen to make a simulation netlist |