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https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
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- This comparison shows the changes necessary to convert path
/openrisc/trunk/orpsocv2/boards/xilinx
- from Rev 677 to Rev 854
- ↔ Reverse comparison
Rev 677 → Rev 854
/s3adsp1800/rtl/verilog/include/or1200_defines.v
698,6 → 698,7
`define OR1200_OR32_MACI 6'b010011 |
/* */ |
`define OR1200_OR32_LWZ 6'b100001 |
`define OR1200_OR32_LWS 6'b100010 |
`define OR1200_OR32_LBZ 6'b100011 |
`define OR1200_OR32_LBS 6'b100100 |
`define OR1200_OR32_LHZ 6'b100101 |
/atlys/rtl/verilog/include/or1200_defines.v
698,6 → 698,7
`define OR1200_OR32_MACI 6'b010011 |
/* */ |
`define OR1200_OR32_LWZ 6'b100001 |
`define OR1200_OR32_LWS 6'b100010 |
`define OR1200_OR32_LBZ 6'b100011 |
`define OR1200_OR32_LBS 6'b100100 |
`define OR1200_OR32_LHZ 6'b100101 |
/ml501/rtl/verilog/include/or1200_defines.v
698,6 → 698,7
`define OR1200_OR32_MACI 6'b010011 |
/* */ |
`define OR1200_OR32_LWZ 6'b100001 |
`define OR1200_OR32_LWS 6'b100010 |
`define OR1200_OR32_LBZ 6'b100011 |
`define OR1200_OR32_LBS 6'b100100 |
`define OR1200_OR32_LHZ 6'b100101 |