URL
https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Subversion Repositories openrisc_2011-10-31
Compare Revisions
- This comparison shows the changes necessary to convert path
/openrisc/trunk/orpsocv2/doc
- from Rev 485 to Rev 492
- ↔ Reverse comparison
Rev 485 → Rev 492
/orpsoc.texi
437,6 → 437,10
@item MGC_NO_VOPT |
When using Modelsim (specifying @code{SIMULATOR=modelsim}), if the version does not include the individual @code{vopt} executable, specify @code{MGC_NO_VOPT=1} when compiling. |
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@item VPI |
Pass @code{VPI=1} to have the an external JTAG debug module stall the processor just after bootup, and then provide a GDB stub (interacting with the Verilog sim via the VPI) to allow control of the system in a similar fashtion to that of a physical target controlled over JTAG via a debug proxy application. The port for GDB is hardcoded to 50002. See the code in @code{bench/verilog/vpi/c} for more details. |
If running with Modelsim, ensure the path @code{MGC_PATH} is set and points to a directory containing a path named @code{modeltech}, which should be the Modelsim install. |
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@end table |
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1364,8 → 1368,8
@c Generic Design build chapter |
@c **************************************************************************** |
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@node Generic |
@chapter Generic |
@node Generic Designs |
@chapter Generic Designs |
@cindex Generic design information |
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@menu |
1378,9 → 1382,8
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The paths under @code{boards/generic} contain designs similar to the reference design, in that they are not technology specific, and used for development of certain features of the processor, or peripherals. |
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An example is the fault tolerance testing build, in @code{boards/generic/ft}, which implements some custom modules in the testbench and ORPSoC top level design, and is in general a very minimal system just for testing. |
These builds are a TODO, but should provide technology-independent builds, with any specialist modules required to debug, or assist in development or demonstration of a module. |
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Additional builds, testing certain parts of the technology, can be developed here. |
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@c **************************************************************************** |
@c Software section |