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https://opencores.org/ocsvn/openrisc/openrisc/trunk
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- This comparison shows the changes necessary to convert path
/openrisc/trunk/orpsocv2/rtl/verilog
- from Rev 504 to Rev 505
- ↔ Reverse comparison
Rev 504 → Rev 505
/or1200/or1200_mult_mac.v
250,12 → 250,16
`OR1200_ALUOP_MUL: begin |
// Actually doing unsigned multiply internally, and then negate on |
// output as appropriate, so if sign bit is set, then is overflow |
ovforw = mul_prod_r[31]; |
// unless incoming signs differ and result is 2^(width-1) |
ovforw = (mul_prod_r[width-1] && |
!((a[width-1]^b[width-1]) && ~|mul_prod_r[width-2:0])) || |
|mul_prod_r[2*width-1:32]; |
|
ov_we = 1; |
end |
`OR1200_ALUOP_MULU : begin |
// Overflow on unsigned multiply is simpler. |
ovforw = mul_prod_r[32]; |
ovforw = |mul_prod_r[2*width-1:32]; |
ov_we = 1; |
end |
`endif // `ifdef OR1200_MULT_IMPLEMENTED |
262,8 → 266,8
`ifdef OR1200_DIV_IMPLEMENTED |
`OR1200_ALUOP_DIVU, |
`OR1200_ALUOP_DIV: begin |
// Overflow on divide by zero |
ovforw = div_by_zero; |
// Overflow on divide by zero or -2^(width-1)/-1 |
ovforw = div_by_zero || (a==32'h8000_0000 && b==32'hffff_ffff); |
ov_we = 1; |
end |
`endif |