OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /openrisc/trunk/orpsocv2/rtl
    from Rev 44 to Rev 46
    Reverse comparison

Rev 44 → Rev 46

/verilog/components/debug_if/dbg_wb.v
337,7 → 337,8
end
else
begin
dr[31:24] <= #1 {dr[30:24], 1'b0};
if (enable) // jb
dr[31:24] <= #1 {dr[30:24], 1'b0};
latch_data <= #1 1'b0;
end
end
353,7 → 354,8
end
else
begin
dr[31:16] <= #1 {dr[30:16], 1'b0};
if (enable) // jb
dr[31:16] <= #1 {dr[30:16], 1'b0};
latch_data <= #1 1'b0;
end
end
366,7 → 368,8
end
else
begin
dr[31:0] <= #1 {dr[30:0], 1'b0};
if (enable) // jb
dr[31:0] <= #1 {dr[30:0], 1'b0};
latch_data <= #1 1'b0;
end
end
499,8 → 502,8
else
crc_cnt_en = 1'b0;
end
 
 
// crc counter
always @ (posedge tck_i or posedge rst_i)
begin
606,7 → 609,6
crc_match_reg <= #1 crc_match_i;
end
 
 
// Length counter
always @ (posedge tck_i or posedge rst_i)
begin

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.