URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
Compare Revisions
- This comparison shows the changes necessary to convert path
/openrisc/trunk/orpsocv2/sim
- from Rev 351 to Rev 354
- ↔ Reverse comparison
Rev 351 → Rev 354
/bin/Makefile
380,6 → 380,7
SIM_COMMANDRUN=$(SILOS) -b -w +width_mistmatches -f $(SIM_RUN_DIR)/$(GENERATED_COMMANDFILE) -l $(SIM_RESULTS_DIR)/$$TEST-$(SILOS)-out.log $(EVENT_SIM_FLAGS) |
endif |
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DIVIDE_LINE= |
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# Names of memory files used in simulation |
SIM_FLASH_MEM_FILE="flash.in" |
777,8 → 778,8
prepare-vlt-profiled: $(SIM_VLT_DIR)/OrpsocMain.gcda clean vlt-restore-profileoutput prepare-rtl vlt-model-links $(SIM_VLT_DIR)/Vorpsoc_top |
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$(SIM_VLT_DIR)/OrpsocMain.gcda: $(SIM_VLT_DIR)/Vorpsoc_top-for-profiling prepare-sw-uart-printf |
$(MAKE) -C $(SW_DIR)/dhry dhry-nocache-O2 NUM_RUNS=200 |
$(SIM_VLT_DIR)/Vorpsoc_top -f $(SW_DIR)/dhry/dhry-nocache-O2.or32 -v -l sim.log --crash-monitor |
$(MAKE) -C $(SW_DIR)/dhry dhry.elf NUM_RUNS=2000 |
$(SIM_VLT_DIR)/Vorpsoc_top -f $(SW_DIR)/dhry/dhry.elf -v -l sim.log --crash-monitor |
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.PHONY: $(SIM_VLT_DIR)/Vorpsoc_top-for-profiling |
$(SIM_VLT_DIR)/Vorpsoc_top-for-profiling: |
795,7 → 796,6
# Architectural simulator test loop |
################################################################################ |
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# Verilator defaults to internal memories |
sim-tests: prepare-sw |
@if [ ! -d $(SIM_RESULTS_DIR) ]; then mkdir -p $(SIM_RESULTS_DIR); fi |
@echo |
807,11 → 807,10
echo "\t#### Current test: $$TEST ####"; echo; \ |
echo "\t#### Compiling software ####"; echo; \ |
CURRENT_TEST_SW_DIR=$(SW_DIR)/`echo $$TEST | cut -d "-" -f 1`; \ |
$(MAKE) -C $$CURRENT_TEST_SW_DIR $$TEST.vmem $(TEST_SW_MAKE_OPTS) UART_PRINTF=1; \ |
rm -f $(SIM_RUN_DIR)/$(SIM_SRAM_MEM_FILE); \ |
ln -s $$CURRENT_TEST_SW_DIR/$$TEST.or32 $(SIM_RUN_DIR)/.; \ |
$(MAKE) -C $$CURRENT_TEST_SW_DIR $$TEST.elf $(TEST_SW_MAKE_OPTS) UART_PRINTF=1; \ |
ln -s $$CURRENT_TEST_SW_DIR/$$TEST.elf $(SIM_RUN_DIR)/.; \ |
echo;echo "\t#### Launching architectural simulator ####"; \ |
time -p $(ARCH_SIM_EXE) --nosrv -f $(SIM_BIN_DIR)/$(ARCH_SIM_CFG_FILE) $$TEST.or32 > $(SIM_RESULTS_DIR)/$$TEST-or1ksim.log 2>&1; \ |
time -p $(ARCH_SIM_EXE) --nosrv -f $(SIM_BIN_DIR)/$(ARCH_SIM_CFG_FILE) $$TEST.elf > $(SIM_RESULTS_DIR)/$$TEST-or1ksim.log 2>&1; \ |
if [ $$? -gt 0 ]; then exit $$?; fi; \ |
if [ `tail -n 10 $(SIM_RESULTS_DIR)/$$TEST-or1ksim.log | grep -c $(SIM_SUCCESS_MESSAGE)` -gt 0 ]; then \ |
TEST_RESULT=1; \ |
823,7 → 822,7
fi; \ |
echo "\t####"; echo; \ |
TESTS_PERFORMED=`expr $$TESTS_PERFORMED + 1`;\ |
unlink $(SIM_RUN_DIR)/$$TEST.or32; \ |
unlink $(SIM_RUN_DIR)/$$TEST.elf; \ |
done; \ |
echo "Test results: "$$TESTS_PASSED" out of "$$TESTS_PERFORMED" tests passed"; echo |
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/bin/or1ksim-orpsocv2.cfg
126,8 → 126,8
mc = 0 |
baseaddr = 0x00000000 |
size = 0x02000000 |
delayr = 2 |
delayw = 4 |
delayr = 1 |
delayw = 1 |
end |
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section memory |
180,7 → 180,7
section immu |
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enabled = 1 |
nsets = 32 |
nsets = 64 |
nways = 1 |
pagesize = 8192 |
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220,7 → 220,7
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section dmmu |
enabled = 1 |
nsets = 32 |
nsets = 64 |
nways = 1 |
pagesize = 8192 |
end |
385,7 → 385,7
/* exe_log_marker = 50 */ |
exe_log_fn = "executed.log" |
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clkcycle = 40ns |
clkcycle = 20ns |
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end |
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