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URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

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  • This comparison shows the changes necessary to convert path
    /openrisc/trunk/orpsocv2/sw/drivers
    from Rev 475 to Rev 485
    Reverse comparison

Rev 475 → Rev 485

/simple-spi/simple-spi.c
9,8 → 9,15
#include "simple-spi.h"
#include "cpu-utils.h"
 
const int spi_base_adr[1] = {SPI0_BASE};
 
const int spi_base_adr[1] = {
#ifdef SPI0_BASE
SPI0_BASE
#else
0
#endif
};
 
void
spi_core_enable(int core)
{
/or1200/crt0.S
35,6 → 35,37
/* ---[ 0x100: RESET exception ]----------------------------------------- */
.org 0x100
l.movhi r0, 0
l.movhi r1, 0
l.movhi r2, 0
l.movhi r3, 0
l.movhi r4, 0
l.movhi r5, 0
l.movhi r6, 0
l.movhi r7, 0
l.movhi r8, 0
l.movhi r9, 0
l.movhi r10, 0
l.movhi r11, 0
l.movhi r12, 0
l.movhi r13, 0
l.movhi r14, 0
l.movhi r15, 0
l.movhi r16, 0
l.movhi r17, 0
l.movhi r18, 0
l.movhi r19, 0
l.movhi r20, 0
l.movhi r21, 0
l.movhi r22, 0
l.movhi r23, 0
l.movhi r24, 0
l.movhi r25, 0
l.movhi r26, 0
l.movhi r27, 0
l.movhi r28, 0
l.movhi r29, 0
l.movhi r30, 0
l.movhi r31, 0
/* Clear status register, set supervisor mode */
l.ori r1, r0, SPR_SR_SM
l.mtspr r0, r1, SPR_SR
290,11 → 321,6
 
.L10:
 
/* Initialise stack */
/* LOAD_SYMBOL_2_GPR(r1, _stack)
l.addi r2, r0, -3
l.and r1, r1, r2
*/
/* Clear BSS */
LOAD_SYMBOL_2_GPR(r28, _bss_start)
LOAD_SYMBOL_2_GPR(r30, _bss_end)
304,12 → 330,10
l.bf 1b
l.addi r28, r28, 4
 
 
/* Initialise UART in a C function */
/*l.jal _uart_init
l.nop*/
 
/* Jump to main program entry point (argc = argv = 0) */
CLEAR_GPR(r3)
CLEAR_GPR(r4)
/uart/uart.c
2,8 → 2,13
#include "board.h"
#include "uart.h"
 
const int UART_BASE_ADR[1] = {UART0_BASE};
const int UART_BAUDS[1] = {UART0_BAUD_RATE};
#ifdef UART_NUM_CORES
const int UART_BASE_ADR[UART_NUM_CORES] = {UART_BASE_ADDRESSES_CSV};
const int UART_BAUDS[UART_NUM_CORES] = {UART_BAUD_RATES_CSV};
#else
const int UART_BASE_ADR[1] = {0};
const int UART_BAUDS[1] = {0};
#endif
 
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
 

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