URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
Compare Revisions
- This comparison shows the changes necessary to convert path
/openrisc/trunk/orpsocv2/sw/drivers
- from Rev 530 to Rev 535
- ↔ Reverse comparison
Rev 530 → Rev 535
/or1200/or1200-mmu.S
File deleted
/or1200/mmu.S
0,0 → 1,21
#include "spr-defs.h" |
|
/* MMU enable functions */ |
.global lo_dmmu_en |
lo_dmmu_en: |
l.mfspr r3,r0,SPR_SR |
l.ori r3,r3,SPR_SR_DME |
l.mtspr r0,r3,SPR_ESR_BASE |
l.mtspr r0,r9,SPR_EPCR_BASE |
l.rfe |
l.nop |
|
.global lo_immu_en |
lo_immu_en: |
l.mfspr r3,r0,SPR_SR |
l.ori r3,r3,SPR_SR_IME |
l.mtspr r0,r3,SPR_ESR_BASE |
l.mtspr r0,r9,SPR_EPCR_BASE |
l.rfe |
l.nop |
|
/or1200/include/spr-defs.h
281,7 → 281,7
#define SPR_DTLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */ |
#define SPR_DTLBMR_CID 0x0000003c /* Context ID */ |
#define SPR_DTLBMR_LRU 0x000000c0 /* Least Recently Used */ |
#define SPR_DTLBMR_VPN 0xfffff000 /* Virtual Page Number */ |
#define SPR_DTLBMR_VPN 0xffffe000 /* Virtual Page Number */ |
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/* |
* Bit definitions for the Data TLB Translate Register |
297,7 → 297,7
#define SPR_DTLBTR_UWE 0x00000080 /* User Write Enable */ |
#define SPR_DTLBTR_SRE 0x00000100 /* Supervisor Read Enable */ |
#define SPR_DTLBTR_SWE 0x00000200 /* Supervisor Write Enable */ |
#define SPR_DTLBTR_PPN 0xfffff000 /* Physical Page Number */ |
#define SPR_DTLBTR_PPN 0xffffe000 /* Physical Page Number */ |
|
#define DTLB_PR_NOLIMIT ( SPR_DTLBTR_URE | \ |
SPR_DTLBTR_UWE | \ |
312,7 → 312,7
#define SPR_ITLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */ |
#define SPR_ITLBMR_CID 0x0000003c /* Context ID */ |
#define SPR_ITLBMR_LRU 0x000000c0 /* Least Recently Used */ |
#define SPR_ITLBMR_VPN 0xfffff000 /* Virtual Page Number */ |
#define SPR_ITLBMR_VPN 0xffffe000 /* Virtual Page Number */ |
|
/* |
* Bit definitions for the Instruction TLB Translate Register |
326,7 → 326,7
#define SPR_ITLBTR_D 0x00000020 /* Dirty */ |
#define SPR_ITLBTR_SXE 0x00000040 /* User Read Enable */ |
#define SPR_ITLBTR_UXE 0x00000080 /* User Write Enable */ |
#define SPR_ITLBTR_PPN 0xfffff000 /* Physical Page Number */ |
#define SPR_ITLBTR_PPN 0xffffe000 /* Physical Page Number */ |
|
#define ITLB_PR_NOLIMIT ( SPR_ITLBTR_SXE | \ |
SPR_ITLBTR_UXE ) |
/or1200/Makefile
1,7 → 1,7
SW_ROOT=../.. |
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# Sources to go into the liborpsoc.a support library |
COMPILE_SRCS=exceptions.c int.c or1200-mmu.S or1200-utils.c cache.S |
COMPILE_SRCS=exceptions.c int.c mmu.S or1200-utils.c cache.S |
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include $(SW_ROOT)/Makefile.inc |
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