OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /openrisc/trunk/orpsocv2/sw/tests/or1200/sim
    from Rev 435 to Rev 439
    Reverse comparison

Rev 435 → Rev 439

/or1200-dctest.c
14,8 → 14,9
#define LOOPS 64
#define WORD_STRIDE 8
 
// Memory area to test at
#define TEST_BASE 0x600000 /* 6MB */
 
 
unsigned long int my_lfsr;
 
unsigned long int next_rand()
36,7 → 37,7
return 0;
}
 
volatile char* ptr = (volatile char*) 0xe00000;
volatile char* ptr = (volatile char*) TEST_BASE;
int i;
 
ptr[0] = 0xab;
98,7 → 99,7
 
// init LFSR
my_lfsr = RAND_LFSR_SEED;
volatile unsigned long int *lptr = (volatile unsigned long int*) 0xa00000;
volatile unsigned long int *lptr = (volatile unsigned long int*) TEST_BASE;
for(i=0;i<LOOPS;i++)
{
lptr[(i*WORD_STRIDE)-1] = next_rand();
/or1200-mmu.c
1427,8 → 1427,8
start_text_addr = (unsigned long*)&_stext;
end_text_addr = (unsigned long*)&_endtext;
end_data_addr = (unsigned long*)&_stack;
end_data_addr += 4;
 
 
#ifndef TLB_BOTTOM_TEST_PAGE_HARDSET
TLB_TEXT_SET_NB = TLB_DATA_SET_NB = (end_data_addr+PAGE_SIZE) / PAGE_SIZE;
#endif

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.