OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /openrisc/trunk/orpsocv2/sw/tests
    from Rev 412 to Rev 415
    ↔ Reverse comparison
  •

Rev 412 → Rev 415

/ethmac/board/ethmac-ping.c
61,10 → 61,14
#define OUR_IP_BYTES 0xc0,0xa8,0x1,0x2 // 192.168.1.2
#define OUR_IP_LONG 0xc0a80102
 
//#define OUR_IP_BYTES 0xac,0x1e,0x0,0x2 // 172.30.0.2
//#define OUR_IP_LONG 0xac1e0002
 
static char our_ip[4] = {OUR_IP_BYTES};
 
//#define DEST_IP_BYTES 0xc0,0xa8,0x64,0x69 // 192 .168.100.105
#define DEST_IP_BYTES 0xc0,0xa8,0x01,0x08 // 192 .168.1.8
//#define DEST_IP_BYTES 0xac,0x1e,0x0,0x01 // 172.30.0.1
 
/* Functions in this file */
void ethmac_setup(void);
129,7 → 133,6
// struct net_device_stats stats;
};
 
 
void oeth_printregs(void)
{
volatile oeth_regs *regs;
257,7 → 260,7
regs->miitx_data = 0;
for (regnum=0;regnum<29;regnum++)
for (regnum=0;regnum<32;regnum++)
{
printf("scan_ethphy%d: r%x ",phynum, regnum);
1895,12 → 1898,18
tx_packet((void*) ping_packet, 98);
if (c == 'S')
tx_packet((void*)big_ping_packet, 1514);
if (c == 'h')
if (c == 'h')
scan_ethphys();
if (c == 'i')
ethphy_init();
if (c == 'P')
print_packet_contents = print_packet_contents ? 0 : 1;
{
print_packet_contents = print_packet_contents ? 0 : 1;
if (print_packet_contents)
printf("Enabling packet dumping\n");
else
printf("Packet dumping disabled\n");
}
if (c == 'p')
oeth_printregs();
if (c == '0')
1909,21 → 1918,52
scan_ethphy(1);
if (c == '7')
{
scan_ethphy(7);
ethphy_print_status(7);
//scan_ethphy(7);
//ethphy_print_status(7);
printf("ext_sr 0x%x\n",eth_mii_read(0x7, 0x1b));
}
if (c == 'r')
ethphy_reset(0);
{
ethphy_reset(7);
printf("PHY reset\n");
}
if (c == 'R')
oeth_reset_tx_bd_pointer();
{
//oeth_reset_tx_bd_pointer();
ethmac_setup();
printf("MAC reset\n");
}
if (c == 'n')
ethphy_reneg(0);
ethphy_reneg(7);
if (c == 'N')
ethphy_set_autoneg(0);
ethphy_set_autoneg(7);
if (c == 'm')
ethmac_togglehugen();
if (c == 't')
ethphy_set_10mbit(0);
if (c == 'w')
{
// Play with HWCFG mode of Alaska 88e1111 Phy
c = uart_getc(DEFAULT_UART);
short newvalue;
// c is an ascii char, let's convert it to actual hex value
if (c >= 'A' && c <= 'F')
newvalue = c - (65 - 10);
else if (c >= 'a' && c <= 'f')
newvalue = c - (99 - 10);
else if (c >= '0' && c <= '9')
newvalue = c - 48;
 
// Take this value and or it into the bottom bit (supposedly ext_sr)
#define MII_M1111_PHY_EXT_SR 0x1b
short ext_sr;
ext_sr = eth_mii_read(0x7, MII_M1111_PHY_EXT_SR);
#define MII_M1111_HWCFG_MODE_MASK 0xf
ext_sr &= ~MII_M1111_HWCFG_MODE_MASK;
ext_sr |= (short) newvalue;
eth_mii_write(0x7, MII_M1111_PHY_EXT_SR, ext_sr);
printf("ext_sr updated to - 0x%x\n",eth_mii_read(0x7, MII_M1111_PHY_EXT_SR));
}
if ( c == 'b' )
{
printf("\n\t---\n");
/spi/board/Makefile
0,0 → 1,13
SW_ROOT=../../..
 
include $(SW_ROOT)/Makefile.inc
 
%.dis: %.elf
$(Q)$(OR32_OBJDUMP) -d $< > $@
 
%.bin: %.elf
$(Q)$(OR32_OBJCOPY) -O binary $< $@
 
clean:
$(Q)rm -f *.elf *.bin *.vmem *.flashin *.dis
 
/spi/board/simplespi-readflash.c
0,0 → 1,184
// Little program to dump the contents of the SPI flash memory it's connected
// to on the board
 
#include "cpu-utils.h"
 
#include "board.h"
#include "uart.h"
#include "simple-spi.h"
#include "printf.h"
 
 
int spi_master;
char slave;
 
 
void
spi_write_ignore_read(int core, char dat)
{
spi_core_write_data(core,dat);
while (!(spi_core_data_avail(core))); // Wait for the transaction (should
// generate a byte)
spi_core_read_data(core);
}
 
char
spi_read_ignore_write(int core)
{
spi_core_write_data(core, 0x00);
while (!(spi_core_data_avail(core))); // Wait for the transaction (should
// generate a byte)
return spi_core_read_data(core);
}
 
 
unsigned long
spi_read_id(int core, char slave_sel)
{
unsigned long rdid;
char* rdid_ptr = (char*) &rdid;
int i;
spi_core_slave_select(core, slave_sel); // Select slave
rdid_ptr[3] = 0;
// Send the RDID command
spi_write_ignore_read(core,0x9f); // 0x9f is READ ID command
// Now we read the next 3 bytes
for(i=0;i<3;i++)
{
rdid_ptr[i] = spi_read_ignore_write(core);
}
spi_core_slave_select(core, 0); // Deselect slave
return rdid;
}
 
// Read status regsiter
char
spi_read_sr(int core, char slave_sel)
{
char rdsr;
spi_core_slave_select(core, slave_sel); // Select slave
// Send the RDSR command
spi_write_ignore_read(core,0x05); // 0x05 is READ status register command
rdsr = spi_read_ignore_write(core);
spi_core_slave_select(core, 0); // Deselect slave
return rdsr;
}
 
 
void
spi_read_block(int core, char slave_sel, unsigned int addr, int num_bytes,
char* buf)
{
int i;
spi_core_slave_select(core, slave_sel); // Select slave
spi_write_ignore_read(core, 0x3); // READ command
spi_write_ignore_read(core,((addr >> 16) & 0xff)); // addres high byte
spi_write_ignore_read(core,((addr >> 8) & 0xff)); // addres middle byte
spi_write_ignore_read(core,((addr >> 0) & 0xff)); // addres low byte
for(i=0;i<num_bytes;i++)
buf[i] = spi_read_ignore_write(core);
spi_core_slave_select(core, 0); // Deselect slave
}
 
 
#define printhelp() printf("\nUsage: \n\t[d]ump\t\tdump 256 bytes of data to screen from flash\n\t[+/-]\t\tIncrease/decrease dump address by 256 bytes\n\t[</>]\t\tIncrease/decrease dump address by 4096 bytes\n\t[s]tatus\t\tprint status of SPI flash\n\n")
 
void
print_spi_status(void)
{
 
printf("SPI core: %d\n",spi_master);
printf("SPI slave select: 0x%x\n",slave&0xff);
 
printf("SPI slave info:\n");
printf("\tID:\t%x\n", spi_read_id(spi_master, slave));
printf("\tSR:\t%x\n", spi_read_sr(spi_master, slave));
printf("\n");
 
}
 
 
 
int
main()
{
 
uart_init(0); // init the UART before we can printf
volatile char c;
int i,j;
spi_master = 0;
slave = 1;
 
spi_core_slave_select(spi_master, 0); // Deselect slaves
 
// Clear the read FIFO
while (spi_core_data_avail(spi_master))
c = spi_core_read_data(spi_master);
 
// SPI core 0, should already be configured to read out data
// when we reset.
 
printf("\n\n\tSPI dumping app\n\n");
unsigned long dump_addr = 0;
char read_buf[256];
int dump_amount = 0x100;
 
while(1){
printf("[d,+,-,s,h] > ");
c = uart_getc(DEFAULT_UART);
 
if ((c != '+') && (c != '-') && (c != '<') && (c != '>') )
{
printf("%c ",c);
printf("\n");
}
if (c == 'h')
printhelp();
else if (c == 's')
print_spi_status();
else if (c == '+')
{
dump_addr += dump_amount;
printf("dump_addr= 0x%x\r", dump_addr);
}
else if (c == '-')
{
dump_addr -= dump_amount;
printf("dump_addr= 0x%x\r", dump_addr);
}
else if (c == '>')
{
dump_addr += dump_amount*16;
printf("dump_addr= 0x%x\r", dump_addr);
}
else if (c == '<')
{
dump_addr -= dump_amount*16;
printf("dump_addr= 0x%x\r", dump_addr);
}
else if (c == 'd')
{
spi_read_block(spi_master, 1, dump_addr, dump_amount, read_buf);
// Print it out, 32 bytes across each time
for(i=0;i<(dump_amount/32);i++)
{
printf("%.5x: ", (i*32)+dump_addr);
for(j=0;j<32;j++)
printf("%.2x", read_buf[(i*32)+j] & 0xff);
printf("\n");
}
dump_addr += dump_amount;
 
}
 
}
return 0;
 
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.