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URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

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Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /openrisc/trunk/orpsocv2/sw/tests
    from Rev 431 to Rev 435
    ↔ Reverse comparison
  •

Rev 431 → Rev 435

/ethmac/board/ethmac-ping.c
70,6 → 70,8
#define DEST_IP_BYTES 0xc0,0xa8,0x01,0x08 // 192 .168.1.8
//#define DEST_IP_BYTES 0xac,0x1e,0x0,0x01 // 172.30.0.1
 
#define BCAST_DEST_IP_BYTES 0xc0,0xa8,0x01,0xff // 192 .168.1.255
 
/* Functions in this file */
void ethmac_setup(void);
void oeth_printregs(void);
863,10 → 865,7
OETH_INT_MASK_BUSY |
OETH_INT_MASK_TXC |
OETH_INT_MASK_RXC;
#ifndef RTLSIM
printf("\nafter config\n\n");
oeth_printregs();
#endif
 
// Buffer setup stuff
volatile oeth_bd *tx_bd, *rx_bd;
int i,j,k;
1132,9 → 1131,9
0x00,
0x40,
0x01,
0xee,0xf5,
0xb5,0x8f,
OUR_IP_BYTES, /* Source IP */
0xc0,0xa8,0x64,0xff, /* Dest. IP */
BCAST_DEST_IP_BYTES, /* Dest. IP */
/* ICMP Message body */
0x08,0x00,0x7d,0x65,0xa7,0x20,0x00,0x01,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,
15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,
1900,13 → 1899,13
 
if (c == 's')
tx_packet((void*) ping_packet, 98);
if (c == 'S')
else if (c == 'S')
tx_packet((void*)big_ping_packet, 1514);
if (c == 'h')
else if (c == 'h')
scan_ethphys();
if (c == 'i')
else if (c == 'i')
ethphy_init();
if (c == 'P')
else if (c == 'P')
{
print_packet_contents = print_packet_contents ? 0 : 1;
if (print_packet_contents)
1914,38 → 1913,38
else
printf("Packet dumping disabled\n");
}
if (c == 'p')
else if (c == 'p')
oeth_printregs();
if (c == '0')
else if (c == '0')
scan_ethphy(0);
if (c == '1')
else if (c == '1')
scan_ethphy(1);
if (c == '7')
else if (c == '7')
{
//scan_ethphy(7);
//ethphy_print_status(7);
printf("ext_sr 0x%x\n",eth_mii_read(0x7, 0x1b));
}
if (c == 'r')
else if (c == 'r')
{
ethphy_reset(7);
printf("PHY reset\n");
}
if (c == 'R')
else if (c == 'R')
{
//oeth_reset_tx_bd_pointer();
ethmac_setup();
printf("MAC reset\n");
}
if (c == 'n')
else if (c == 'n')
ethphy_reneg(7);
if (c == 'N')
else if (c == 'N')
ethphy_set_autoneg(7);
if (c == 'm')
else if (c == 'm')
ethmac_togglehugen();
if (c == 't')
else if (c == 't')
ethphy_set_10mbit(0);
if (c == 'w')
else if (c == 'w')
{
// Play with HWCFG mode of Alaska 88e1111 Phy
c = uart_getc(DEFAULT_UART);
1968,12 → 1967,17
eth_mii_write(0x7, MII_M1111_PHY_EXT_SR, ext_sr);
printf("ext_sr updated to - 0x%x\n",eth_mii_read(0x7, MII_M1111_PHY_EXT_SR));
}
if ( c == 'b' )
else if ( c == 'b' )
{
printf("\n\t---\n");
oeth_dump_bds();
printf("\t---\n");
}
else if ( c == 'B' )
{
tx_packet((void*) broadcast_ping_packet, 298);
}
 
}
 
/or1200/sim/or1200-div.c
11,7 → 11,6
*/
 
#include "cpu-utils.h"
#include "uart.h"
#include "printf.h"
 
static int sdiv_errors, udiv_errors;
19,7 → 18,7
#define VERBOSE_TESTS 0
 
// Make this bigger when running on FPGA target. For simulation it's enough.
#define NUM_TESTS 200
#define NUM_TESTS 2000
 
int
or1k_div(int dividend, int divisor)
42,16 → 41,17
check_div(int dividend, int divisor, int expected_result)
{
#if VERBOSE_TESTS
printf("l.div 0x%.8x / 0x%.8x = 0x%.8x : ", dividend, divisor,
printf("l.div 0x%.8x / 0x%.8x = (SW) 0x%.8x : ", dividend, divisor,
expected_result);
#endif
int result = or1k_div(dividend, divisor);
report(result);
if ( result != expected_result)
{
printf("l.div 0x%.8x / 0x%.8x = 0x%.8x : ", dividend, divisor,
printf("l.div 0x%.8x / 0x%.8x = (SW) 0x%.8x : ", dividend, divisor,
expected_result);
printf("FAIL - 0x%.8x\n",result);
printf("(HW) 0x%.8x - MISMATCH\n",result);
sdiv_errors++;
}
#if VERBOSE_TESTS
66,17 → 66,18
unsigned int expected_result)
{
#if VERBOSE_TESTS
printf("l.divu 0x%.8x / 0x%.8x = 0x%.8x : ", dividend, divisor,
printf("l.divu 0x%.8x / 0x%.8x = (SW) 0x%.8x : ", dividend, divisor,
expected_result);
#endif
 
unsigned int result = or1k_div(dividend, divisor);
unsigned int result = or1k_divu(dividend, divisor);
report(result);
if ( result != expected_result)
{
printf("l.divu 0x%.8x / 0x%.8x = 0x%.8x : ", dividend, divisor,
printf("l.divu 0x%.8x / 0x%.8x = (SW) 0x%.8x : ", dividend, divisor,
expected_result);
printf("FAIL - 0x%.8x\n",result);
printf("(HW) 0x%.8x - MISMATCH\n",result);
udiv_errors++;
}
#if VERBOSE_TESTS
137,7 → 138,8
n = rand();
d = rand();
 
report(0x10101010);
 
while ( d >= n )
d >>= (rand() & 0xff);
 
146,9 → 148,11
// Calculate a value that's really smaller than the numerator
while ( d >= ~(n-1) )
d >>= (rand() & 0xff);
 
if (!d) d = 1;
// Processor thinks it's in 2's complement already, so we'll convert
// from the interpreted 2's complement to unsigned for our calculation
expected_result = div_soft(~(n-1), d);
expected_result = div_soft(~(n-1), d);
// Answer will be an unsigned +ve value, but of course it has to be
// negative so convert back to 2's complment negative
expected_result = ~expected_result + 1; // 2's complement
156,17 → 160,35
else
expected_result = div_soft(n, d);
 
/* Report things */
report(n);
report(d);
report(expected_result);
 
/* Signed divide */
check_div(n, d, expected_result);
 
/* Unsigned divide test */
/* Ensure numerator's bit 31 is clear */
n >>= 1;
 
/* If divisor is > numerator, shift it by a random amount */
while ( d >= n )
d >>= (rand() & 0xff);
if (!d) d = 1;
 
expected_result = div_soft(n, d);
 
/* Report things */
report(n);
report(d);
report(expected_result);
/* Unsigned divide */
check_divu(n, d, expected_result);
i++;
//printf("%d\n",i);
 
}
 
/or1200/sim/or1200-mul.c
0,0 → 1,205
/*
Test integer multiply
Use a software multiplication algorithm to compare against hardware
calculated results
 
Julius Baxter, julius@opencores.org
 
*/
 
#include "cpu-utils.h"
#include "printf.h"
 
static int smul_errors, umul_errors;
 
#define VERBOSE_TESTS 0
 
// Make this bigger when running on FPGA target. For simulation it's enough.
#define NUM_TESTS 2000
 
int
or1k_mul(int multiplicant, int multiplier)
{
int result;
asm ("l.mul\t%0,%1,%2" : "=r" (result) : "r" (multiplicant),
"r" (multiplier));
return result;
}
 
unsigned int
or1k_mulu(unsigned int mulidend, unsigned int mulisor)
{
int result;
asm ("l.mulu\t%0,%1,%2" : "=r" (result) : "r" (mulidend), "r" (mulisor));
return result;
}
 
 
void
check_mul(int multiplicand, int multiplier, int expected_result)
{
#if VERBOSE_TESTS
printf("l.mul 0x%.8x * 0x%.8x = (SW) 0x%.8x : ", multiplicand, multiplier,
expected_result);
#endif
int result = or1k_mul(multiplicand, multiplier);
report(result);
if ( result != expected_result)
{
printf("l.mul 0x%.8x * 0x%.8x = (SW) 0x%.8x : ", multiplicand, multiplier,
expected_result);
printf("(HW) 0x%.8x - MISMATCH\n",result);
smul_errors++;
}
#if VERBOSE_TESTS
else
printf("OK\n");
#endif
}
 
void
check_mulu(unsigned int multiplicand, unsigned int multiplier,
unsigned int expected_result)
{
#if VERBOSE_TESTS
printf("l.mulu 0x%.8x * 0x%.8x = (SW) 0x%.8x : ", multiplicand, multiplier,
expected_result);
#endif
 
unsigned int result = or1k_mulu(multiplicand, multiplier);
report(result);
if ( result != expected_result)
{
printf("l.mulu 0x%.8x * 0x%.8x = (SW) 0x%.8x : ", multiplicand, multiplier,
expected_result);
printf("(HW) 0x%.8x - MISMATCH\n",result);
umul_errors++;
}
#if VERBOSE_TESTS
else
printf("OK\n");
#endif
}
 
 
// Software implementation of multiply
unsigned int
mul_soft(unsigned int n, unsigned int d)
{
 
unsigned int m = 0;
//printf("sft: 0x%x 0x%xd\n",n,d);
int i;
for(i=0; i<32; i++)
{
//printf("bit %d: 0x%x\n",i, (((1<<i) & d)));
if ((1<<i) & d)
{
m += (unsigned int) (n << i);
}
}
 
return (unsigned int) m;
}
 
int
main(void)
{
#ifdef _UART_H_
uart_init(DEFAULT_UART);
#endif
umul_errors = 0;
smul_errors = 0;
 
int i;
 
unsigned int n, d;
unsigned int expected_result;
i=0;
n=0;d=0;
while(i < NUM_TESTS)
{
 
n = rand() >> 20;
d = (rand() >> 24);
 
report(0x10101010);
 
if (n&0x10) // Randomly select if we should negate n
{
// 2's complement of n
n = ~n + 1;
}
if (d&0x80) // Randomly select if we should negate d
{
// 2's complement of d
d = ~d + 1;
}
if ((n & 0x80000000) && (d & 0x80000000))
expected_result = mul_soft(~(n-1), ~(d-1));
else if ((n & 0x80000000) && !(d & 0x80000000))
{
expected_result = mul_soft(~(n-1), d);
expected_result = ~expected_result + 1; // 2's complement
}
else if (!(n & 0x80000000) && (d & 0x80000000))
{
expected_result = mul_soft(n, ~(d-1));
expected_result = ~expected_result + 1; // 2's complement
}
else if (!(n & 0x80000000) && !(d & 0x80000000))
expected_result = mul_soft(n, d);
 
 
/* Report things */
report(n);
report(d);
report(expected_result);
 
 
/* Signed mulide */
check_mul(n, d, expected_result);
 
/* Unsigned mulide test */
/* Ensure numerator's bit 31 is clear */
n >>= 1;
 
expected_result = mul_soft(n, d);
 
/* Report things */
report(n);
report(d);
report(expected_result);
/* Unsigned mulide */
check_mulu(n, d, expected_result);
report(i);
i++;
 
}
 
 
printf("Integer multiply check complete\n");
printf("Unsigned:\t%d tests\t %d errors\n",
NUM_TESTS, umul_errors);
printf("Signed:\t\t%d tests\t %d errors\n",
NUM_TESTS, smul_errors);
 
if ((umul_errors > 0) || (smul_errors > 0))
report(0xbaaaaaad);
else
report(0x8000000d);
 
return 0;
}

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