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  • This comparison shows the changes necessary to convert path 
    /openrisc/trunk/orpsocv2/sw
    from Rev 396 to Rev 397
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  •

Rev 396 → Rev 397

/tests/or1200/sim/or1200-maci.S
0,0 → 1,128
/*
OR1200 MAC test
 
Very basic, testing simple instructions and multiplication,
accumulation values
 
Julius Baxter, julius.baxter@orsoc.se
*/
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2010 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
#include "spr-defs.h"
#include "board.h"
#include "or1200-defines.h"
 
// Check MAC unit is enabled before trying to run this test
#ifndef OR1200_MAC_IMPLEMENTED
# error
# error No MAC unit detected. This test requires hardware MAC support
# error
#endif
 
/* =================================================== [ exceptions ] === */
.section .vectors, "ax"
 
 
/* ---[ 0x100: RESET exception ]----------------------------------------- */
.org 0x100
l.movhi r0, 0
/* Clear status register */
l.ori r1, r0, SPR_SR_SM
l.mtspr r0, r1, SPR_SR
/* Clear timer */
l.mtspr r0, r0, SPR_TTMR
 
/* Jump to program initialisation code */
.global _start
l.movhi r4, hi(_start)
l.ori r4, r4, lo(_start)
l.jr r4
l.nop
 
.org 0x600
l.nop 0x1
 
.org 0x700
l.nop 0x1
 
 
/* =================================================== [ text ] === */
.section .text
 
/* =================================================== [ start ] === */
 
.global _start
_start:
// Kick off test
l.jal _main
l.nop
 
 
/* =================================================== [ main ] === */
.global _main
_main:
// First clear MAC
l.macrc r3
 
/* Jeremy stuff. A l.maci which should not overflow */
l.movhi r4,hi(0x00000002)
l.ori r4,r4,lo(0x00000002)
 
l.mtspr r0,r0,SPR_MACHI
l.mtspr r0,r0,SPR_MACLO
 
l.maci r4,0x0002
l.mfspr r3,r0,SPR_MACHI
l.nop 0x2
l.nop
l.mfspr r3,r0,SPR_MACLO
l.nop 0x2
l.nop
 
/* Jeremy stuff. A l.maci which should overflow and be truncated. */
l.movhi r4,hi(0x7fffffff)
l.ori r4,r4,lo(0x7fffffff)
 
l.mtspr r0,r0,SPR_MACHI
l.mtspr r0,r0,SPR_MACLO
 
l.maci r4,0x7fff
l.mfspr r3,r0,SPR_MACHI
l.nop 0x2
l.nop
l.mfspr r3,r0,SPR_MACLO
l.nop 0x2
l.nop
l.nop 0x1
/tests/uart/sim/uart-interrupt.c
3,21 → 3,19
*
* Tests UART and interrupt routines servicing them.
*
* Relies on testbench having uart0's tx line tied to uart1's rx line
* Relies on testbench having uart0's lines in loopback (rx = tx)
*
* Shows how single ISR can be used for two cores.
*
* Julius Baxter, julius.baxter@orsoc.se
*
*/
 
 
#include "uart-utils.h"
#include "cpu-utils.h"
#include "spr-defs.h"
#include "board.h"
#include "uart.h"
#include "int.h"
#include "design-defines.h"
#include "orpsoc-defines.h"
 
#ifndef UART0
# error
24,13 → 22,7
# error UART0 missing and is required for UART interrupt (loopback) test
# error
#endif
#ifndef UART1
# error
# error UART1 missing and is required for UART interrupt (loopback) test
# error
#endif
 
 
struct uart_tx_ctrl
{
char *bufptr;
63,7 → 55,7
{
rxchar = uart_getc(core);
report(0xff & rxchar);
if (rxchar == 0x2a) // when char is "*"
if (rxchar == 0x2a) // Exit simulation when RX char is '*'
exit(0x8000000d);
}
}
111,19 → 103,20
 
/* Install UART core 0 interrupt handler */
int_add(UART0_IRQ, uart_int_handler,(void*) &uart0_core);
 
/* Install UART core 1 interrupt handler */
int_add(UART1_IRQ, uart_int_handler,(void*) &uart1_core);
//int_add(UART1_IRQ, uart_int_handler,(void*) &uart1_core);
 
/* Enable interrupts in supervisor register */
mtspr (SPR_SR, mfspr (SPR_SR) | SPR_SR_IEE);
uart_init(uart0_core);
uart_init(uart1_core);
//uart_init(uart1_core);
uart_rxint_enable(uart1_core);
//uart_rxint_enable(uart1_core);
uart_rxint_enable(uart0_core);
char* teststring = "\n\tHello world, and UART 1, from UART 0\n\0";
char* teststring = "\n\tHello world from UART 0\n\0";
 
uart0_tx_buffer(teststring);
 
139,6 → 132,8
 
uart0_tx_buffer(done_calculating);
// Character '*', which will be received in the interrupt handler and cause
// the simulation to exit.
char* finish = "*\n\0";
uart0_tx_buffer(finish);
/apps/testfloat/Makefile
17,9 → 17,11
 
ELF_DEPENDS= $(common_testfloat_sources) $(testfloat_SOURCES)
 
include ../Makefile.inc
SW_ROOT=../..
 
include $(SW_ROOT)/Makefile.inc
 
 
#testfloat.elf:
# $(Q)$(OR32_CC) $^ -o $@
 
/apps/dhry/dhry.c
15,7 → 15,7
****************************************************************************
*/
 
#include "or32-utils.h"
#include "cpu-utils.h"
#include "board.h"
#include "dhry.h"
#include "uart.h"
/apps/dhry/Makefile
1,28 → 1,14
.PHONY: dhry.vmem
.PHONY: dhry.bin
SW_ROOT=../..
 
include ../Makefile.inc
# Force it to be regenerated each time, as the NUM_RUNS is likely to be changed
 
NUM_RUNS ?= 10
 
OR32_CFLAGS += -DNUM_RUNS=$(NUM_RUNS)
include $(SW_ROOT)/Makefile.inc
 
NUM_RUNS ?= 10
 
# Have our specific make rules here, so each time we run it gets compiled.
# This is useful as the NUM_RUNS variable can change from build to build.
OR32_CFLAGS+= -DNUM_RUNS=$(NUM_RUNS)
 
.PHONY: dhry.vmem
dhry.vmem: dhry.bin $(UTILS_BIN2VMEM)
$(Q)$(UTILS_BIN2VMEM) $< > $@
 
.PHONY: dhry.bin
dhry.bin: dhry.elf
$(Q)$(OR32_OBJCOPY) -O binary $< $@
 
.PHONY: dhry.elf
dhry.elf: dhry.c $(ELF_DEPENDS)
$(Q)$(OR32_CC) $^ $(OR32_CFLAGS) $(OR32_LDFLAGS) -o $@
 
%.dis: %.elf
$(Q)$(OR32_OBJDUMP) -d $< > $@
 
/apps/spiflash/Makefile
21,6 → 21,8
# author: julius.baxter@orsoc.se
#
 
SW_ROOT=../..
 
#PROGRAMMINGFILE=
PROGRAMMINGFILE_SWBIN=progfile.swbin # Binary file with sizeword
PROGRAMMINGFILE_DATA=progfile.o
27,8 → 29,10
 
ELF_DEPENDS +=$(PROGRAMMINGFILE_DATA)
 
include ../Makefile.inc
 
 
include $(SW_ROOT)/Makefile.inc
 
OR32_LDFLAGS = -lgcc -Tspiflash-program.ld -e 256
 
../utils/bin2binsizeword:
/Makefile.inc
71,6 → 71,9
DRIVER_INCLUDE_PATHS +=-I$(BOARD_PATH)/sw/board/include
endif
 
# For now, only apps path is in root sw directory
SW_APPS_PATH=$(SW_ROOT)/apps
 
VECTORS_OBJ ?=$(CPU_DRIVER)/crt0.o
ORPSOC_LIB ?=$(SW_ROOT)/lib/liborpsoc.a
SUPPORT_LIBS ?=$(ORPSOC_LIB)
126,6 → 129,8
$(UTILS_BIN2VMEM):
$(Q)$(MAKE) -C $(SW_ROOT)/utils bin2vmem
 
processed-verilog-headers: $(PROCESSED_DEFINES)
 
# Rule to generate C header file from Verilog file with `defines in it
$(DESIGN_PROCESSED_VERILOG_DEFINES): $(DESIGN_VERILOG_DEFINES)
$(Q)echo; echo "\t### Creating software defines header from verilog defines ###";
194,4 → 199,5
distclean:
$(Q)for dir in $(SWDIRS); do if [ -d ../$$dir ]; then $(MAKE) -C ../$$dir clean; fi; done
$(Q)for dir in $(SW_DRIVER_PATHS); do $(MAKE) -C $$dir clean; done
$(Q)for dir in `ls $(SW_APPS_PATH)`; do $(MAKE) -C $(SW_ROOT)/apps/$$dir clean; done
$(Q)rm -f $(PROCESSED_DEFINES)

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