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Subversion Repositories openrisc

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /openrisc/trunk/orpsocv2
    from Rev 41 to Rev 42
    Reverse comparison

Rev 41 → Rev 42

/bench/sysc/src/UartSC.cpp
28,7 → 28,9
 
#include "UartSC.h"
 
//#define UART_SC_DEBUG
 
 
SC_HAS_PROCESS( UartSC );
 
//! Constructor for the Uart system C model
54,6 → 56,10
{
// Calculate number of clocks per UART bit
clocks_per_bit = (int)(clk_freq_hz/uart_baud);
bits_received=0;
#ifdef UART_SC_DEBUG
printf("UartSC Initialised: Sys. clk. freq.: %d Hz, Baud: %d, cpb: %d\n", clk_freq_hz, uart_baud, clocks_per_bit);
#endif
}
 
 
61,7 → 67,9
void
UartSC::checkTx () {
 
#ifdef UART_SC_DEBUG
//printf("Uart TX activity: level is : 0x%x\n", uarttx.read()&1);
#endif
// Check the number of bits received
if (bits_received==0)
74,7 → 82,9
// Start
counter = 1;
bits_received++; // We got the start bit
//cout << "UartSC checkTx: got start bit at time " << sc_time_stamp() << endl;
#ifdef UART_SC_DEBUG
cout << "UartSC checkTx: got start bit at time " << sc_time_stamp() << endl;
#endif
}
}
else if (bits_received > 0 && bits_received < 9)
116,9 → 126,14
else
{
// Print the char
//printf("Char received: 0x%2x time: ", current_char);
//cout << sc_time_stamp() << endl;
cout << current_char;
#ifdef UART_SC_DEBUG
printf("Char received: 0x%2x time: ", current_char);
cout << sc_time_stamp() << endl;
#endif
// cout'ing the char didn't work for some systems - jb 090613ol
//cout << current_char;
printf("%c",current_char);
 
bits_received = 0;
counter = 0;
}
/bench/sysc/src/TraceSC.cpp
28,6 → 28,8
 
#include "TraceSC.h"
 
using namespace std;
 
SC_HAS_PROCESS( TraceSC );
 
//! Constructor for the trace module
46,38 → 48,32
#if VM_TRACE
 
// Setup the name of the VCD dump file
 
char* dumpName;
char* dumpSuffix = "-vlt.vcd\0";
char* dumpNameDefault = "vlt-dump.vcd\0";
// We will be passed the current test-name when we're called
if (argc > 1)
string dumpNameDefault("vlt-dump.vcd");
string dumpSuffix("-vlt.vcd");
string dumpDir("../results/"); // Note: hardcoded to store all VCDs in the ../results dir
string testNameString;
string vcdDumpFile;
if (argc > 1) // If we were passed a name on the command line, use it
{
// Assume test name is first thing
int testname_argv_index = 1;
// Take the second argument as the test name and we'll
// concatendate "-vlt.vcd" on the end
dumpName = (char*) malloc((strlen(argv[testname_argv_index] +
strlen(dumpSuffix))*sizeof(char)));
// Copy in the test name
strcpy(dumpName, argv[testname_argv_index]);
// Now add on the suffix
strcat(dumpName, dumpSuffix);
printf("VCD dumpfile: %s\n", dumpName);
testNameString = (argv[1]);
vcdDumpFile = dumpDir + testNameString + dumpSuffix;
}
else
dumpName = dumpNameDefault;
 
else // otherwise use our default VCD dump file name
vcdDumpFile = dumpDir + dumpNameDefault;
Verilated::traceEverOn (true);
cout << "Enabling VCD trace" << endl;
 
printf("VCD dumpfile: %s\n", vcdDumpFile.c_str());
 
// Establish a new trace with its correct time resolution, and trace to
// great depth.
spTraceFile = new SpTraceVcdCFile ();
setSpTimeResolution (sc_get_time_resolution ());
traceTarget->trace (spTraceFile, 99);
spTraceFile->open (dumpName);
spTraceFile->open (vcdDumpFile.c_str());
 
// Method to drive the dump on each clock edge
SC_METHOD (driveTrace);
/sim/bin/Makefile
714,7 → 714,7
 
clean-sysc:
# Clean away dependency files generated by verilator
rm -rf $(BENCH_SYSC_SRC_DIR)/*.d
$(MAKE) -C $(BENCH_SYSC_SRC_DIR) -f $(BENCH_SYSC_SRC_DIR)/Modules.make clean
 
clean-rtl:
# Clean away temporary verilog source files

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