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URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

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  • This comparison shows the changes necessary to convert path
    /openrisc/trunk/orpsocv2
    from Rev 545 to Rev 546
    Reverse comparison

Rev 545 → Rev 546

/rtl/verilog/ram_wb/ram_wb_b3.v
62,8 → 62,8
assign wb_b3_trans_start = ((wb_cti_i == 3'b001)|(wb_cti_i == 3'b010)) &
wb_stb_i & !wb_b3_trans;
assign wb_b3_trans_stop = (wb_cti_i == 3'b111) &
wb_stb_i & wb_b3_trans & wb_ack_o;
assign wb_b3_trans_stop = ((wb_cti_i == 3'b111) &
wb_stb_i & wb_b3_trans & wb_ack_o) | wb_err_o;
always @(posedge wb_clk_i)
if (wb_rst_i)
161,7 → 161,8
// Ack Logic
reg wb_ack_o_r;
 
assign wb_ack_o = wb_ack_o_r & wb_stb_i;
assign wb_ack_o = wb_ack_o_r & wb_stb_i &
!(burst_access_wrong_wb_adr | addr_err);
always @ (posedge wb_clk_i)
if (wb_rst_i)
213,7 → 214,8
assign addr_err = wb_cyc_i & wb_stb_i & (|wb_adr_i[aw-1-8:mem_adr_width]);
// OR in other errors here...
assign wb_err_o = wb_ack_o & (burst_access_wrong_wb_adr | addr_err);
assign wb_err_o = wb_ack_o_r & wb_stb_i &
(burst_access_wrong_wb_adr | addr_err);
 
//
// Access functions

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